Space converter, preparation method thereof and probe card

Abstract

The invention discloses a space converter and a preparation method thereof, and a probe card, and the space converter comprises an insulating substrate which comprises a plurality of first conductive holes; the insulating substrate further comprises a first surface and a second surface, the first surface side comprises first conductive pads electrically connected with the first conductive holes, and the second surface side comprises third conductive pads electrically connected with the first conductive holes; the at least one insulating layer is positioned on the surface of one side of the insulating substrate; the insulating layer comprises a plurality of second conductive holes which are electrically connected with the first conductive holes in a one-to-one correspondence manner; the surface of the side, away from the insulating substrate, of the insulating layer comprises second conductive pads electrically connected with the second conductive holes. Wherein the hole distance between two adjacent second conductive holes is L2, the hole distance between two first conductive holes correspondingly and electrically connected with the two second conductive holes is L1, and L1 is larger than or equal to L2. According to the technical scheme, the transmission path of the electric signal passing through the space converter can be reduced, and the transmission rate of the signal in the space converter is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a space converter and a preparation method thereof, and a probe card. Background Art

[0002] After semiconductor components are manufactured, they need to be tested for their electronic and functional properties to ensure that they meet product specifications. However, as the size of semiconductor components becomes smaller and smaller, it becomes more difficult to test semiconductor components at the wafer level. The multiple probes used by the test equipment must be carefully configured so that the multiple probes can be independent of each other while being accurately aligned with the multiple contact pads of the chip.

[0003] The existing technical solution mainly detects the chip through a probe card. In order to detect the grains on the chip, the distribution of the probes on the probe card must be the same as the distribution of the contact points on the grains, so the probes will also have a compact distribution. The grains on the chip are compactly distributed, making it difficult for the compactly distributed probes to be directly electrically connected to the test circuit board. Therefore, a space transformer with multiple microholes is usually set up, and one end of the probe passes through the space transformer through a conductive wire, and the other end of the conductive wire is led out to be electrically connected to the test circuit board.

[0004] However, when the traditional space converter is electrically connected to the corresponding test circuit board, the wire is directly pulled from the micro-perforated plate to the test circuit board, resulting in longer line routing, longer transmission path of electrical signals, larger line resistance, and lower signal transmission efficiency, which affects the efficiency of electrical testing. Summary of the invention

[0005] The present invention provides a space converter and a preparation method thereof, and a probe card, so as to reduce the transmission path of an electrical signal, reduce the transmission resistance of a line, increase the transmission rate of a signal in the space converter, and further improve the test practicability of the space converter.

[0006] In a first aspect, the present invention provides a space transformer, comprising:

[0007] An insulating substrate, comprising a plurality of first conductive holes; the insulating substrate further comprising a first surface and a second surface, the first surface side comprising a first conductive pad electrically connected to each of the first conductive holes, and the second surface side comprising a third conductive pad electrically connected to each of the first conductive holes;

[0008] At least one insulating layer is located on one side surface of the insulating substrate; the insulating layer includes a plurality of second conductive holes electrically connected to each of the first conductive holes in a one-to-one correspondence; a side surface of the insulating layer facing away from the insulating substrate includes a second conductive pad electrically connected to each of the second conductive holes;

[0009] The hole spacing between two adjacent second conductive holes is L2, the hole spacing between two first conductive holes electrically connected to the two second conductive holes is L1, and L1≥L2.

[0010] Optionally, in the direction in which the insulating substrate points to the insulating layer, of the two adjacent insulating layers, the insulating layer close to the insulating substrate is a first insulating layer, and the insulating layer far from the insulating substrate is a second insulating layer;

[0011] The second conductive hole in the first insulating layer is a first second conductive hole, and the second conductive hole in the second insulating layer is a second second conductive hole; the hole spacing between two adjacent first second conductive holes is L21, and the hole spacing between two second second conductive holes electrically connected to the two first second conductive holes is L22;

[0012] Among them, L21≥L22.

[0013] Optionally, L2≥60μm; L1>150μm.

[0014] Optionally, the aperture of the second conductive hole is R2; the aperture of the first conductive hole is R1;

[0015] Among them, R2≤R1.

[0016] Optionally, R2 ≥ 30 μm; R1 ≥ 50 μm.

[0017] Optionally, the insulating layer includes photoresist.

[0018] In a second aspect, the present invention provides a method for preparing a space transformer, comprising:

[0019] An insulating substrate is provided; the insulating substrate comprises a plurality of first conductive holes; the insulating substrate further comprises a first surface and a second surface, the first surface side comprises a first conductive pad electrically connected to each of the first conductive holes, and the second surface side comprises a third conductive pad electrically connected to each of the first conductive holes;

[0020] At least one insulating layer is arranged on one side surface of the insulating substrate; the insulating layer includes a plurality of second conductive holes electrically connected to the first conductive holes one by one; the insulating layer includes a second conductive pad electrically connected to the second conductive holes on one side surface away from the insulating substrate; wherein the hole spacing between two adjacent second conductive holes is L2, and the hole spacing between two first conductive holes electrically connected to the two second conductive holes is L1, and L1≥L2.

[0021] Optionally, when a plurality of insulating layers are provided on one side surface of the insulating substrate, in the arrangement direction of the insulating substrate and the insulating layer, of the two adjacent insulating layers, the insulating layer close to the insulating substrate is the first insulating layer, and the insulating layer far from the insulating substrate is the second insulating layer; the second conductive hole in the first insulating layer is a first-second conductive hole, and the second conductive hole in the second insulating layer is a second-second conductive hole; the hole spacing between two adjacent first-second conductive holes is L21, and the hole spacing between two second-second conductive holes electrically connected to the two first-second conductive holes is L22;

[0022] Among them, L21≥L22.

[0023] Optionally, at least one insulating layer is provided on one side surface of the insulating substrate, comprising:

[0024] A whole layer of insulating material is provided on one side surface of the insulating substrate;

[0025] Drilling and electroplating the insulating material to form a plurality of second conductive holes electrically connected to the first conductive holes in a one-to-one correspondence;

[0026] A rewiring process is performed on a side of the insulating material facing away from the insulating substrate to form each of the second conductive pads electrically connected to each of the second conductive holes.

[0027] In a third aspect, the present invention provides a probe card, comprising: a test circuit board, a plurality of probes, and the space transformer described in the first aspect;

[0028] The test circuit board is electrically connected to each of the first conductive pads or the third conductive pads on the insulating substrate away from the insulating layer; each of the probes is electrically connected to each of the second conductive pads in the insulating layer away from the insulating substrate.

[0029] The technical solution provided by the present invention is to provide an insulating substrate including a plurality of first conductive holes, wherein the first surface side of the insulating substrate includes a first conductive pad electrically connected to each first conductive hole, and the second surface side of the insulating substrate includes a third conductive pad electrically connected to each first conductive hole; and to provide at least one insulating layer including a plurality of second conductive holes, wherein each second conductive hole is electrically connected to each first conductive hole in a one-to-one correspondence, and the hole spacing L2 between two adjacent second conductive holes is less than or equal to the hole spacing L1 between two first conductive holes electrically connected to the two second conductive holes, so that the spacing between two adjacent first conductive pads, after passing through the first conductive hole and the second conductive hole, the spacing between two adjacent second conductive pads away from the insulating substrate side can be reduced, and when the space transformer is used to test semiconductor chips, no threading is required, thereby improving the preparation efficiency of the space transformer. In addition, the use of conductive holes and conductive pads can reduce the transmission path of electrical signals, reduce the transmission resistance of the line, and increase the transmission rate of signals in the space transformer, thereby improving the test practicality of the space transformer. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic diagram of the structure of a space converter provided by an embodiment of the present invention;

[0031] Figure 2 A schematic diagram of the structure of another space converter provided by an embodiment of the present invention;

[0032] Figure 3 A schematic diagram of the structure of another space converter provided by an embodiment of the present invention;

[0033] Figure 4 A flow chart of a method for preparing a space transformer provided by an embodiment of the present invention;

[0034] Figure 5 A schematic diagram of a process structure for preparing a space converter provided by an embodiment of the present invention;

[0035] Figure 6 A schematic diagram of another process structure for preparing a space transformer provided by an embodiment of the present invention;

[0036] Figure 7 A flow chart of a method for preparing an insulating layer provided by an embodiment of the present invention;

[0037] Figure 8 A schematic diagram of a process structure for preparing an insulating layer provided by an embodiment of the present invention;

[0038] Fig. 9 A schematic structural diagram of a probe card provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0039] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0040] Figure 1 A schematic diagram of the structure of a space converter provided by an embodiment of the present invention is shown in FIG. Figure 1 As shown, the space transformer 100 includes an insulating substrate 10 and at least one insulating layer 20. The insulating substrate 10 includes a plurality of first conductive holes 13; the insulating substrate 10 also includes a first surface 11 and a second surface 12, the first surface 11 side includes a first conductive pad 131 electrically connected to each first conductive hole 13, and the second surface 12 side includes a third conductive pad 132 electrically connected to each first conductive hole 13. At least one insulating layer 20 is located on one side surface of the insulating substrate 10; the insulating layer 20 includes a plurality of second conductive holes 21 electrically connected to each first conductive hole 13 in a one-to-one correspondence; the side surface of the insulating layer 20 facing away from the insulating substrate 10 includes a second conductive pad 22 electrically connected to each second conductive hole 21.

[0041] The hole spacing between two adjacent second conductive vias 21 is L2, and the hole spacing between two first conductive vias 13 electrically connected to the two second conductive vias 21 is L1, where L1≥L2.

[0042] It should be noted that the insulating layer 20 can be located on the first surface 11 side or the second surface 12 side of the insulating substrate 10. When the insulating layer 20 is located on the first surface 11 side of the insulating substrate 10, the second conductive via 21 is electrically connected to the first conductive via 13 through the first conductive pad 131 located on the first surface 11; when the insulating layer 20 is located on the second surface 12 side of the insulating substrate 10, the second conductive via 21 is electrically connected to the first conductive via 13 through the third conductive pad 132 located on the second surface 12. The arrangement can be made according to actual needs and is not specifically limited here. For ease of description, the embodiment of the present invention is described by taking the insulating layer 20 located on the second surface 12 side of the insulating substrate 10 as an example.

[0043] The insulating substrate 10 includes a material such as ceramic, sapphire or glass that has a certain hardness and is not easily deformed, so that the insulating substrate 10 can provide a certain support force for the space transformer 100. When the space transformer 100 is used to perform a temperature test on the semiconductor chip in the future, the insulating substrate 10 is prevented from being deformed, thereby improving the reliability of the space transformer 100. The insulating layer 20 includes an insulating material such as polyimide that has a temperature-resistant property and can be set according to actual needs. Optionally, the hardness of the insulating substrate 10 is greater than the hardness of the insulating layer 20.

[0044] Specifically, the first conductive pad 131 can be electrically connected to the terminal of the detection signal, and the second conductive pad 22 facing away from the insulating substrate 10 can be electrically connected to the terminal to be detected. The space transformer 100 can transmit part of the detection signal of the first conductive pad 131 to the second conductive pad 22, and transmit part of the electrical signal of the second conductive pad 22 to the first conductive pad 131 to realize electrical signal detection. The size between each detection contact in a semiconductor chip with a smaller size is also smaller. In order to enable the space transformer 100 to be applied to a probe card, it can realize the detection of a small-sized semiconductor chip. At least one insulating layer 20 is provided on one side of the insulating substrate 10, and the hole spacing between two adjacent first conductive holes 13 is greater than or equal to the hole spacing L2 between two adjacent second conductive holes 21 in the insulating layer 20, and the first conductive hole 13 is electrically connected to the second conductive hole 21 through the third conductive pad 132, so that the spacing between two adjacent first conductive pads 131, after passing through the first conductive hole 13 and the second conductive hole 21, the spacing between two adjacent second conductive pads 22 exposed away from the insulating substrate 10 can be reduced, when the space transformer 100 is used to test semiconductor chips, no threading is required, thereby improving the preparation efficiency of the space transformer 100. In addition, the use of conductive holes and conductive pads can reduce the transmission path of electrical signals and the transmission resistance of the line, and can be applied to test scenarios with high frequency requirements, with strong practicality.

[0045] The technical solution of the embodiment of the present invention is to provide an insulating substrate including a plurality of first conductive holes, wherein the first surface side of the insulating substrate includes a first conductive pad electrically connected to each first conductive hole, and the second surface side of the insulating substrate includes a third conductive pad electrically connected to each first conductive hole; and to provide at least one insulating layer including a plurality of second conductive holes, wherein each second conductive hole is electrically connected to each first conductive hole in a one-to-one correspondence, and the hole spacing L2 between two adjacent second conductive holes is less than or equal to the hole spacing L1 between two first conductive holes electrically connected to the two second conductive holes, so that the spacing between two adjacent first conductive pads, after passing through the first conductive hole and the second conductive hole, the spacing between two adjacent second conductive pads away from the insulating substrate side can be reduced, and when the space transformer is used to test semiconductor chips, no threading is required, thereby improving the preparation efficiency of the space transformer. In addition, the use of conductive holes and conductive pads can reduce the transmission path of electrical signals, reduce the transmission resistance of the line, and increase the transmission rate of signals in the space transformer, thereby improving the test practicality of the space transformer.

[0046] In order to ensure that the transmission path of the electrical signal in the space transformer 100 is kept short, the size of each conductive pad in the space transformer 100 will not be set to be particularly large. Therefore, when the spacing between the detection contacts on the semiconductor chip to be tested is small, and the use of one insulating layer 20 cannot make the second conductive pads 22 located on the side away from the insulating substrate 10 contact with the detection contacts respectively, two or more insulating layers 20 can be provided to reduce the spacing between the second conductive pads 22 on the side away from the insulating substrate 10. In an optional embodiment, Figure 2 A schematic diagram of the structure of another space converter provided by an embodiment of the present invention is shown in FIG. Figure 2 As shown, in the direction Z from the insulating substrate 10 to the insulating layer 20, in the two adjacent insulating layers 20, the insulating layer close to the insulating substrate 10 is the first insulating layer 201, and the insulating layer far from the insulating substrate 10 is the second insulating layer 202. The second conductive hole in the first insulating layer 201 is the first second conductive hole 211, and the second conductive hole in the second insulating layer 202 is the second second conductive hole 212; the hole spacing between two adjacent first second conductive holes 211 is L21, and the hole spacing between two second second conductive holes 212 correspondingly electrically connected to the two first second conductive holes 211 is L22; wherein, L21≥L22.

[0047] Specifically, after passing through the first conductive hole 13 and the first-second conductive hole 211, the spacing between two adjacent first conductive pads 131 and the spacing between two adjacent second conductive pads 221 located on the surface of one side of the first insulating layer 201 is reduced, and the second conductive pad 221 is electrically connected to the second conductive pad 222 through the second-second conductive hole 212. Since the hole spacing L22 between two adjacent second-second conductive holes 212 is less than or equal to the hole spacing L21 between two adjacent first-second conductive holes 211, the spacing between two adjacent second conductive pads 222 located on the side of the second-second insulating layer 202 away from the insulating substrate 10 is further reduced. In this way, by setting the hole spacing L22 between two adjacent second conductive holes 212 to be less than or equal to the hole spacing L21 between two adjacent first conductive holes 211, compared with the hole spacing between two adjacent first conductive pads 131, in the direction from the insulating substrate 10 to the insulating layer 20, in the second conductive pad 22 of each insulating layer 20 facing away from the insulating substrate 10, the spacing between two adjacent second conductive pads 22 gradually decreases, so that the space converter 100 can be suitable for the detection of semiconductor chips of suitable sizes, thereby improving the applicability of the space converter 100.

[0048] It is understandable that the number of insulating layers 20 can be set according to actual needs. Figure 1 FIG. 1 only shows a structure in which the space transformer 100 includes an insulating layer 20. Figure 2 2 shows a structure in which the space transformer 100 includes two layers of insulating layers 20. In other optional embodiments, in the direction from the insulating substrate 10 to the insulating layer 20, in the second conductive pads 22 of each insulating layer 20 away from the insulating substrate 10, the spacing between two adjacent second conductive pads 22 gradually decreases, and the space transformer 100 can also be provided with more than two layers of insulating layers 20, so that the manufactured space transformer 100 can be adapted to semiconductor chips of appropriate sizes, while improving the utilization rate of the insulating layer 20. That is, when the test of the corresponding semiconductor chip can be realized by using one layer of insulating layer 20, only one layer of insulating layer 20 is provided in the space transformer 100, so as to avoid energy waste caused by using multiple layers of insulating layers 20.

[0049] Optional, reference Figure 1 , L2≥60μm; L1>150μm.

[0050] Specifically, by setting the hole spacing L2 between two adjacent second conductive holes 21 to be greater than or equal to 60μm, the space transformer 100 can be applicable to the detection of semiconductor chips with a spacing between each detection contact of 60 microns, and the detection of semiconductor chips with a spacing between each detection contact greater than 60 microns, thereby improving the applicability of the space transformer 100; by setting the hole spacing L1 between two adjacent first conductive holes 13 to be greater than 150μm, two adjacent first conductive pads 131 electrically connected to the two first conductive holes 13 have a good insulation effect, so that when the first conductive pad 131 located on one side of the insulating substrate 10 is electrically connected to the detection circuit board, the electrical connection reliability between the space transformer 100 and the detection circuit board can be improved.

[0051] Exemplarily, the hole spacing L1 between two adjacent first conductive holes 13 is 200 μm, and may be other values, which are not specifically limited here.

[0052] Optional, Figure 3 A schematic diagram of the structure of another space converter provided by an embodiment of the present invention is shown in FIG. Figure 3 As shown, the aperture of the second conductive hole 21 is R2, wherein R2 ≥ 30 μm.

[0053] Specifically, by setting the lower limit of the aperture R2 of the second conductive hole 21 to 30 μm, the space transformer 100 can be applied to detecting semiconductor chips with a contact size of 30 μm and semiconductor chips with a contact size greater than 30 μm, thereby improving the practicality of the space transformer 100.

[0054] Optional, reference Figure 3 , the aperture of the first conductive hole 13 is R1; wherein R1≥50 μm.

[0055] Specifically, by setting the lower limit of the aperture R1 of the first conductive hole 13 to 50 μm, the aperture of the first conductive pad 131 electrically connected to the first conductive hole 13 is at least 50 μm. When the space transformer 100 is electrically connected to the detection circuit board through each first conductive pad 131, the electrical contact area between the space transformer 100 and the detection circuit board can be increased, thereby improving the electrical connection reliability between the space transformer 100 and the detection circuit board.

[0056] Optional, reference Figure 1 , the insulating layer 20 includes a photoresist. Thus, when preparing the second conductive hole 21 in the insulating layer 20 , it can be prepared by an exposure and development process, thereby improving the preparation efficiency of the space transformer 100 .

[0057] Based on the same inventive concept, an embodiment of the present invention provides a method for preparing a space transformer. Figure 4 This is a flow chart of a method for preparing a space transformer provided in an embodiment of the present invention. The method is applicable to preparing the space transformer provided in an embodiment of the present invention. The method can be implemented in the form of hardware and / or software. Figure 5 A schematic diagram of a process structure for preparing a space converter according to an embodiment of the present invention is provided. Figure 4 and Figure 5 , the preparation method of the space transformer comprises:

[0058] S101. Provide an insulating substrate.

[0059] Among them, the insulating substrate 10 includes multiple first conductive holes 13; the insulating substrate 10 also includes a first surface 11 and a second surface 12, the first surface 11 side includes a first conductive pad 131 electrically connected to each first conductive hole 13, and the second surface 12 side includes a third conductive pad 132 electrically connected to each first conductive hole 13.

[0060] It is understandable that the insulating substrate 10 includes a material with a certain hardness, such as ceramic, sapphire or glass, so as to provide a certain support to prevent the space transformer 100 from being deformed.

[0061] Specifically, the insulating substrate 10 may be formed by first providing an insulating substrate body without the first conductive hole 13, the first conductive pad 131 and the third conductive pad 132, drilling holes in the insulating substrate body to form a plurality of through holes penetrating the insulating substrate body, then electroplating each through hole to form the first conductive hole 13, and then, through a rewiring process, forming a first conductive pad 131 and a third conductive pad 132 electrically connected to the first conductive hole 13 on the first surface 11 and the second surface 12 of the insulating substrate body, respectively, thereby forming the insulating substrate 10 including the first conductive hole 13, the first conductive pad 131 and the third conductive pad 132.

[0062] It should be noted that the insulating substrate 10 may be composed of a single glass substrate or multiple glass substrates, and may be configured according to actual needs, which is not specifically limited here.

[0063] S102, disposing at least one insulating layer on one surface of the insulating substrate.

[0064] The insulating layer 20 includes a plurality of second conductive holes 21 electrically connected to the first conductive holes 13 one by one; a surface of the insulating layer 20 facing away from the insulating substrate 10 includes a second conductive pad 22 electrically connected to the second conductive holes 21; a hole spacing between two adjacent second conductive holes 21 is L2, a hole spacing between two first conductive holes 13 electrically connected to the two second conductive holes 21 is L1, and L1≥L2.

[0065] Specifically, the method for forming at least one insulating layer on the surface of one side of the insulating substrate 10 can be: a whole layer of insulating material is set on the surface of one side of the insulating substrate 10, and then the insulating material is drilled and electroplated to form a plurality of second conductive holes 21 electrically connected to each first conductive hole 13 one by one, and a second conductive pad 22 electrically connected to the second conductive hole 21 is set on the side of the insulating material away from the insulating substrate 10 to form at least one insulating layer 20. At least one insulating layer 20 is provided on one side of the insulating substrate 10, and the hole spacing between two adjacent first conductive holes 13 is greater than or equal to the hole spacing L2 between two adjacent second conductive holes 21 in the insulating layer 20, and the first conductive hole 13 is electrically connected to the second conductive hole 21 through the third conductive pad 132, so that the spacing between two adjacent first conductive pads 131, after passing through the first conductive hole 13 and the second conductive hole 21, the spacing between two adjacent second conductive pads 22 exposed away from the insulating substrate 10 can be reduced, when the space transformer 100 is used to test semiconductor chips, no threading is required, thereby improving the preparation efficiency of the space transformer 100. In addition, the use of conductive holes and conductive pads can reduce the transmission path of electrical signals and the transmission resistance of the line, and can be applied to test scenarios with high frequency requirements, with strong practicality.

[0066] The technical solution of the embodiment of the present invention is to provide an insulating substrate, and to set an insulating layer on one side of the insulating substrate, wherein the insulating substrate includes a plurality of first conductive holes, and the insulating layer includes a plurality of second conductive holes corresponding to each first conductive hole, and each second conductive hole is electrically connected to each first conductive hole through a first conductive pad or a third conductive pad, and the hole spacing L2 between two adjacent second conductive holes is less than or equal to the hole spacing L1 between two first conductive holes correspondingly electrically connected to the two second conductive holes, so that the spacing between two adjacent first conductive pads, after passing through the first conductive hole and the second conductive hole, the spacing between two adjacent second conductive pads away from one side of the insulating substrate can be reduced, and when the space transformer is used to test semiconductor chips, no threading is required, thereby improving the preparation efficiency of the space transformer. In addition, the use of conductive holes and conductive pads can reduce the transmission path of electrical signals, reduce the transmission resistance of the line, and increase the transmission rate of signals in the space transformer, thereby improving the test practicality of the space transformer.

[0067] Figure 6 A schematic diagram of another process structure for preparing a space transformer according to an embodiment of the present invention is shown in FIG. Figure 6 As shown, when a plurality of insulating layers 20 are provided on one side surface of the insulating substrate 10, in the arrangement direction of the insulating substrate 10 and the insulating layers 20, of the two adjacent insulating layers 20, the insulating layer 20 close to the insulating substrate 10 is the first insulating layer 20, and the insulating layer 20 far from the insulating substrate 10 is the second insulating layer 20; the second conductive hole 21 in the first insulating layer 20 is the first-second conductive hole 21, and the second conductive hole 21 in the second insulating layer 20 is the second-second conductive hole 21; the hole spacing between two adjacent first-second conductive holes 21 is L21, and the hole spacing between two second-second conductive holes 21 correspondingly electrically connected to the two first-second conductive holes 21 is L22; wherein, L21≥L22. In this way, by setting the hole spacing L22 between two adjacent second conductive holes 212 to be less than or equal to the hole spacing L21 between two adjacent first conductive holes 211, compared with the hole spacing between two adjacent first conductive pads 131, in the direction from the insulating substrate 10 to the insulating layer 20, in the second conductive pad 22 of each insulating layer 20 facing away from the insulating substrate 10, the spacing between two adjacent second conductive pads 22 gradually decreases, so that the space converter 100 can be suitable for the detection of semiconductor chips of suitable sizes, thereby improving the applicability of the space converter 100.

[0068] Based on the above embodiments, the present invention describes the case where at least one insulating layer is provided on one side surface of the insulating substrate. Figure 7 A flowchart of a method for preparing an insulating layer provided in an embodiment of the present invention, Figure 8 A schematic diagram of a process structure for preparing an insulating layer provided by an embodiment of the present invention is shown in FIG. Figure 7 and Figure 8 As shown, the method for preparing the insulating layer includes:

[0069] S121. Dispose a whole layer of insulating material on one side surface of the insulating substrate.

[0070] Among them, the insulating material includes materials such as polyimide and photoresist, which can be set according to actual needs and are not specifically limited here.

[0071] Specifically, a whole layer of insulating material may be disposed on one surface of the insulating substrate 10 by using a spin coating process or a spray coating process.

[0072] S122, drilling and electroplating the insulating material to form a plurality of second conductive holes electrically connected to the first conductive holes in a one-to-one correspondence.

[0073] Specifically, when the insulating material is photoresist, an exposure and development process can be used to drill a through hole that can expose the third conductive pad 132, and then the through hole is electroplated to form the second conductive hole 21. When the insulating material is a material such as polyimide, a laser process can be used to drill a through hole that can expose the third conductive pad 132, and then the through hole is electroplated to form the second conductive hole 21. The process for forming the second conductive hole 21 can also be other, which is not specifically limited here.

[0074] S123, rewiring the side of the insulating material away from the insulating substrate to form second conductive pads electrically connected to the second conductive holes.

[0075] Specifically, a rewiring process is adopted to form each second conductive pad 22 on the surface of each second conductive hole 21 away from the insulating substrate 10 , without the need to separately provide the second conductive pad 22 , thereby improving the preparation efficiency of the second conductive pad 22 .

[0076] The technical solution of the embodiment of the present invention is to set a whole layer of insulating material on the surface of one side of the insulating substrate, drill and electroplate the insulating material to form a plurality of second conductive holes electrically connected to the first conductive holes one by one, and rewire the side of the insulating material away from the insulating substrate to form second conductive pads electrically connected to the second conductive holes, so that the second conductive pads can be electrically connected to the first conductive pad or the third conductive pad through the second conductive holes and the first conductive holes, thereby shortening the transmission path of the electrical signal, reducing the transmission resistance of the line, improving the efficiency of the space converter in transmitting the electrical signal, and improving the practicality of the space converter.

[0077] It is understandable that the above description only takes the preparation of one insulating layer as an example. When the space transformer includes multiple insulating layers, the above process can be used to sequentially prepare each insulating layer, which will not be described in detail here.

[0078] Based on the same inventive concept, an embodiment of the present invention further provides a probe card, Fig. 9 A schematic diagram of the structure of a probe card provided by an embodiment of the present invention is shown in FIG. Fig. 9 As shown, the probe card 200 includes a test circuit board 30, a plurality of probes 40, and a space transformer 100 provided by any embodiment of the present invention. The test circuit board 30 is electrically connected to each first conductive pad 131 or third conductive pad 132 on the side of the insulating substrate 10 away from the insulating layer 20; each probe 40 is electrically connected to each second conductive pad 22 in the insulating layer 20 away from the insulating substrate 10.

[0079] Specifically, the test circuit board 30 is electrically connected to the space transformer 100 through the first conductive pad 131, which can shorten the electrical connection path between the test circuit board 30 and the space transformer 100, thereby reducing line resistance and improving signal transmission efficiency, and is suitable for testing high-frequency circuits. In addition, the probe card has the technical features of the space transformer provided in the embodiment of the present invention, and can achieve the beneficial effects of the space transformer provided in the embodiment of the present invention. The similarities can be referred to the above description of the space transformer provided in the embodiment of the present invention, and will not be repeated here.

[0080] It should be noted that, in practical applications, different space converters can be set for different semiconductor test chips, and the positions of the first conductive pads or the third conductive pads electrically connected to the test circuit board in the space converter are the same, so that multiple identical test circuit boards can be mass-produced without having to design different test circuit boards according to each space converter. When testing the corresponding semiconductor test chip, the corresponding space converter is electrically connected to the test circuit board. After the test is completed, the probe card formed by the test circuit board and the space converter can also be used to test the same type of semiconductor test chip.

[0081] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, combinations and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A space transformer, characterized in that: include: An insulating substrate, comprising a plurality of first conductive holes; the insulating substrate further comprising a first surface and a second surface, the first surface side comprising a first conductive pad electrically connected to each of the first conductive holes, and the second surface side comprising a third conductive pad electrically connected to each of the first conductive holes; At least one insulating layer is located on one side surface of the insulating substrate; the insulating layer includes a plurality of second conductive holes electrically connected to each of the first conductive holes in a one-to-one correspondence; a side surface of the insulating layer facing away from the insulating substrate includes a second conductive pad electrically connected to each of the second conductive holes; The hole spacing between two adjacent second conductive holes is L2, the hole spacing between two first conductive holes electrically connected to the two second conductive holes is L1, and L1≥L2.

2. The space transformer according to claim 1, characterized in that: In the direction from the insulating substrate to the insulating layer, of the two adjacent insulating layers, the insulating layer close to the insulating substrate is a first insulating layer, and the insulating layer far from the insulating substrate is a second insulating layer; The second conductive hole in the first insulating layer is a first second conductive hole, and the second conductive hole in the second insulating layer is a second second conductive hole; the hole spacing between two adjacent first second conductive holes is L21, and the hole spacing between two second second conductive holes electrically connected to the two first second conductive holes is L22; Among them, L21≥L22.

3. The space transformer according to claim 1, characterized in that: L2≥60μm; L1>150μm.

4. The space transformer according to claim 1, characterized in that: The aperture of the second conductive hole is R2; the aperture of the first conductive hole is R1; Among them, R2≤R1.

5. The space transformer according to claim 4, characterized in that: R2≥30μm; R1≥50μm.

6. The space transformer according to claim 1, characterized in that: The insulating layer includes photoresist.

7. A method for preparing a space transformer, characterized in that: include: An insulating substrate is provided; the insulating substrate comprises a plurality of first conductive holes; the insulating substrate further comprises a first surface and a second surface, the first surface side comprises a first conductive pad electrically connected to each of the first conductive holes, and the second surface side comprises a third conductive pad electrically connected to each of the first conductive holes; At least one insulating layer is arranged on one side surface of the insulating substrate; the insulating layer includes a plurality of second conductive holes electrically connected to the first conductive holes one by one; the insulating layer includes a second conductive pad electrically connected to the second conductive holes on one side surface away from the insulating substrate; wherein the hole spacing between two adjacent second conductive holes is L2, and the hole spacing between two first conductive holes electrically connected to the two second conductive holes is L1, and L1≥L2.

8. The preparation method according to claim 7, characterized in that: When a plurality of insulating layers are arranged on one side surface of the insulating substrate, in the arrangement direction of the insulating substrate and the insulating layer, of the two adjacent insulating layers, the insulating layer close to the insulating substrate is the first insulating layer, and the insulating layer far from the insulating substrate is the second insulating layer; the second conductive hole in the first insulating layer is the first-second conductive hole, and the second conductive hole in the second insulating layer is the second-second conductive hole; the hole spacing between two adjacent first-second conductive holes is L21, and the hole spacing between two second-second conductive holes electrically connected to the two first-second conductive holes is L22; Among them, L21≥L22.

9. The preparation method according to claim 7, characterized in that: At least one insulating layer is provided on one side surface of the insulating substrate, comprising: A whole layer of insulating material is provided on one side surface of the insulating substrate; Drilling and electroplating the insulating material to form a plurality of second conductive holes electrically connected to the first conductive holes in a one-to-one correspondence; A rewiring process is performed on a side of the insulating material facing away from the insulating substrate to form each of the second conductive pads electrically connected to each of the second conductive holes.

10. A probe card, characterized in that: include: A test circuit board, a plurality of probes, and a space transformer as claimed in any one of claims 1 to 9; The test circuit board is electrically connected to each of the first conductive pads or the third conductive pads on the insulating substrate away from the insulating layer; each of the probes is electrically connected to each of the second conductive pads in the insulating layer away from the insulating substrate.

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