Current generation circuit and current generation method

Abstract

The invention discloses a current generation circuit and a current generation method. The current generation circuit comprises an operation unit, a curvature compensation current unit and a feedback unit. The arithmetic unit is used for generating a first reference current after first-order compensation based on a first current in direct proportion to the temperature and a second current in inverse proportion to the temperature; the curvature compensation current unit is used for generating compensation current based on the first voltage, the first reference voltage and the second reference voltage so as to perform curvature compensation on the first reference current; the feedback unit is used for transmitting second reference current generated after curvature compensation of the first reference current to the curvature compensation current unit. According to the current generation circuit and the current generation method, the first current and the second current are generated under the condition that a thin-film resistor is not used, and the compensation current with the temperature coefficient opposite to that of the first reference current at each temperature point is superposed on the basis of the first reference current for first-order temperature compensation. And the temperature coefficient of the first reference current is further reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and in particular relates to a current generating circuit and a current generating method. Background Art

[0002] The traditional way to generate a zero temperature drift reference current is to generate a zero temperature drift reference voltage and then divide it by a resistor to generate a zero temperature drift current. However, the premise is that the resistor has no temperature coefficient, such as a thin film resistor. For some processes that only have Poly resistors, the traditional solution will no longer be applicable because Poly resistors have a large temperature coefficient.

[0003] The information disclosed in this background technology section is only intended to enhance the understanding of the overall background of the invention and should not be regarded as an acknowledgment or any form of suggestion that the information constitutes the prior art already known to a person skilled in the art. Summary of the invention

[0004] An object of the present invention is to provide a current generating circuit and a current generating method, which can further reduce the temperature coefficient of the reference current without using a thin film resistor.

[0005] In order to achieve the above objective, a specific embodiment of the present invention provides a current generating circuit, including: a reference unit, a current generating unit, a calculation unit, a curvature compensation current unit and a feedback unit.

[0006] The reference unit is used to generate a first current proportional to the temperature; the current generating unit is used to generate a second current inversely proportional to the temperature; the operation unit is used to generate a first reference current after first-order compensation based on the first current and the second current; the curvature compensation current unit is used to generate a compensation current based on a first voltage, a first reference voltage and a second reference voltage to perform curvature compensation on the first reference current, and the first voltage is inversely proportional to the temperature; the feedback unit is used to transmit the second reference current generated after curvature compensation of the first reference current to the curvature compensation current unit, and the curvature compensation current unit adjusts the compensation current based on the second reference current.

[0007] In one or more embodiments of the present invention, the reference unit is further configured to generate a first voltage and a reference voltage and to generate a first reference voltage and a second reference voltage based on the reference voltage.

[0008] In one or more embodiments of the present invention, the reference unit includes an amplifier, a first transistor, a first resistor, a second resistor, a third resistor, a first triode, a second triode and a third triode; the first end of the first transistor is connected to a power supply voltage, the control end of the first transistor is connected to the output end of the amplifier, the second end of the first transistor is connected to the first end of the first resistor and the first end of the second resistor, the second end of the first resistor is connected to the first input end of the amplifier, the second end of the first triode and the control end of the first triode, the second end of the second resistor is connected to the second input end of the amplifier and the first end of the third resistor, the second end of the third resistor is connected to the second end of the second triode and the control end of the second triode, the control end of the third triode is connected to the control end of the second triode, the second end of the third triode generates a first current, and the first end of the first triode, the first end of the second triode and the first end of the third triode are connected to the reference voltage.

[0009] In one or more embodiments of the present invention, the reference unit includes an amplifier, a first transistor, a first resistor, a second resistor, a third resistor, a first triode, a second triode, a third triode and a voltage dividing unit; the first end of the first transistor is connected to the power supply voltage, the control end of the first transistor is connected to the output end of the amplifier, the second end of the first transistor is connected to the first end of the first resistor, the first end of the second resistor and the voltage dividing unit to generate a reference voltage, the voltage dividing unit is used to divide the reference voltage to generate a first reference voltage and a second reference voltage, the second end of the first resistor is connected to the first input end of the amplifier and the second end of the first triode, the second end of the first triode is connected to the control end of the first triode to generate a first voltage, the second end of the second resistor is connected to the second input end of the amplifier and the first end of the third resistor, the second end of the third resistor is connected to the second end of the second triode and the control end of the second triode, the control end of the third triode is connected to the control end of the second triode, the second end of the third triode generates a first current, and the first end of the first triode, the first end of the second triode and the first end of the third triode are connected to the reference voltage.

[0010] In one or more embodiments of the present invention, the current generating unit includes a fourth resistor, a fourth transistor, a second transistor and a first current mirror unit, the control end of the fourth transistor is connected to the first end of the fourth resistor, the first end of the fourth transistor is connected to the second end of the fourth resistor, the first end of the second transistor is connected to the first end of the fourth resistor, the control end of the second transistor is connected to the second end of the fourth transistor, and the first current mirror unit is connected to the second end of the second transistor and the second end of the fourth transistor to generate a second current.

[0011] In one or more embodiments of the present invention, the operation unit includes a second current mirror unit, and the second current mirror unit is used to receive the first current and the second current and generate a first reference current.

[0012] In one or more embodiments of the present invention, the curvature compensation current unit includes an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor and a third current mirror unit, the first end of the eighth transistor is connected to the first end of the ninth transistor and is used to receive the second reference current, the first end of the tenth transistor is connected to the first end of the eleventh transistor and is used to receive the second reference current, the second end of the ninth transistor is connected to the second end of the eleventh transistor and is connected to the second current mirror unit, and the third current mirror unit is used to receive the currents on the ninth transistor and the eleventh transistor to generate the compensation current;

[0013] Among them, the control end of the eighth transistor is used to receive the first voltage, the control end of the ninth transistor is used to receive the first reference voltage, the control end of the tenth transistor is used to receive the second reference voltage, and the control end of the eleventh transistor is used to receive the first voltage; or, the control end of the eighth transistor is used to receive the first reference voltage, the control end of the ninth transistor is used to receive the first voltage, the control end of the tenth transistor is used to receive the first voltage, and the control end of the eleventh transistor is used to receive the second reference voltage.

[0014] In one or more embodiments of the present invention, the curvature compensation current unit also includes a switch group, which is used to switch between different situations based on a control signal, one situation being: the control end of the eighth transistor is connected to the first voltage, the control end of the ninth transistor is connected to the first reference voltage, the control end of the tenth transistor is connected to the second reference voltage, and the control end of the eleventh transistor is connected to the first voltage; one situation is: the control end of the eighth transistor is connected to the first reference voltage, the control end of the ninth transistor is connected to the first voltage, the control end of the tenth transistor is connected to the first voltage, and the control end of the eleventh transistor is connected to the second reference voltage.

[0015] In one or more embodiments of the present invention, the feedback unit includes a fourth current mirror unit, which is connected to the operation unit and the curvature compensation current unit to generate a second reference current and transmit the second reference current to the curvature compensation current unit.

[0016] In one or more embodiments of the present invention, the current generating circuit further includes an output unit connected to the feedback unit to output a target reference current based on the second reference current.

[0017] The present invention also discloses a current generating method. Based on the current generating circuit, the method comprises:

[0018] obtaining a first current proportional to the temperature;

[0019] obtaining a second current inversely proportional to the temperature;

[0020] Acquire a first reference current after first-order compensation is generated based on the first current and the second current;

[0021] generating a compensation current based on a first voltage, a first reference voltage and a second reference voltage by a curvature compensation current unit to perform curvature compensation on a first reference current, wherein the first voltage is inversely proportional to the temperature;

[0022] The second reference current generated after curvature compensation of the first reference current is transmitted to the curvature compensation current unit through the feedback unit, and the compensation current is adjusted based on the second reference current through the curvature compensation current unit.

[0023] In one or more embodiments of the present invention, generating a compensation current based on a first voltage, a first reference voltage and a second reference voltage by a curvature compensation current unit to perform curvature compensation on a first reference current includes: switching different situations through corresponding control signals based on different temperature curves of the first reference current, one situation is: a first input terminal of the curvature compensation current unit is connected to a first voltage, a second input terminal of the curvature compensation current unit is connected to a first reference voltage, a third input terminal of the curvature compensation current unit is connected to a second reference voltage, and a fourth input terminal of the curvature compensation current unit is connected to the first voltage; another situation is: a first input terminal of the curvature compensation current unit is connected to a first reference voltage, a second input terminal of the curvature compensation current unit is connected to a first voltage, a third input terminal of the curvature compensation current unit is connected to a first voltage, and a fourth input terminal of the curvature compensation current unit is connected to a second reference voltage. .

[0024] Compared with the prior art, the current generating circuit and current generating method of the present invention generate the first current and the second current without using thin-film resistors, and superimpose a compensation current having a temperature coefficient opposite to that of the first reference current at each temperature point on the basis of a first reference current of first-order temperature compensation. In the circuit, this is equivalent to extracting a current having the same temperature coefficient as the first reference current from the first reference current for curvature compensation, thereby further reducing the temperature coefficient of the first reference current. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0026] Figure 1 is a circuit schematic diagram of a current generating circuit in an embodiment.

[0027] Figure 2 is a circuit schematic diagram of a reference unit in an embodiment.

[0028] Figure 3 is a circuit schematic diagram of a current generating unit in an embodiment.

[0029] Figure 4 FIG. 4 is a circuit diagram of a curvature compensation current unit in an embodiment.

[0030] Figure 5 FIG. 4 is a circuit diagram of a switch group in an embodiment.

[0031] Figure 6 Schematic diagram of a temperature compensation variation curve of a first reference current opening upward in an embodiment.

[0032] Figure 7 Schematic diagram of a temperature compensation variation curve of a first reference current with an opening downward in an embodiment. DETAILED DESCRIPTION

[0033] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0034] "Coupled" or "connected" or "connected" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrically conductive medium, which may have parasitic inductance or parasitic capacitance; indirect connection may also include connection through other active or passive devices on the basis of achieving the same or similar functional purposes, such as connection through circuits or components such as switches and follower circuits. In addition, in the invention, words such as "first" and "second" are mainly used to distinguish one technical feature from another technical feature, and do not necessarily require or imply that there is a certain actual relationship, quantity or order between these technical features.

[0035] In the detailed description of the specification, reference is made to the accompanying drawings forming a part thereof, wherein like reference numerals refer to like parts throughout, and wherein are shown by way of exemplary embodiments that may be implemented. It should be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description should not be considered in a limiting sense.

[0036] The various operations in the specification may be described in turn as multiple discrete actions or operations in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be interpreted as implying that these operations must be order-dependent. Specifically, these operations may not be performed in the order presented. The described operations may be performed in an order different from the described embodiments. Various additional operations may be performed and / or the described operations may be omitted in additional embodiments.

[0037] For purposes of this disclosure, the phrase "A and / or B" means (A), (B), or (A and B). For purposes of this disclosure, the phrase "A, B and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).

[0038] Various components and devices may be referred to or shown in the singular form herein (e.g., "transistor," "transistor," "switch," etc.), but this is merely for ease of discussion, and any element referred to in the singular form may include multiple such elements in accordance with the teachings herein.

[0039] The specification describes the use of the phrases "in one embodiment" or "in other embodiments" or "in some embodiments", which may each refer to one or more of the same or different embodiments. In addition, the terms "including", "comprising", "having", etc. used in relation to the embodiments of the present disclosure are synonymous.

[0040] like Figure 1 As shown, a current generating circuit in an embodiment of the present invention includes: a reference unit 10 , a current generating unit 20 , a calculation unit 30 , a curvature compensation current unit 40 , a feedback unit 50 and an output unit 60 .

[0041] The reference unit 10 is used to generate a first current IPTAT which is proportional to the temperature; the current generating unit 20 is used to generate a second current INTC which is inversely proportional to the temperature; the operation unit 30 is used to generate a first reference current ICTAT1 after first-order compensation based on the first current IPTAT and the second current INTC; the curvature compensation current unit 40 is used to generate a compensation current I_Curve based on a first voltage VBE, a first reference voltage VLT and a second reference voltage VHT to perform curvature compensation on the first reference current ICTAT1, and the first voltage VBE is inversely proportional to the temperature; the feedback unit 50 is used to transmit the second reference current ICTAT2 generated after the curvature compensation of the first reference current ICTAT1 to the curvature compensation current unit 40 and output the final reference current IZTC, and the curvature compensation current unit 40 adjusts the compensation current I_Curve based on the second reference current ICTAT2; the output unit 60 is connected to the feedback unit 50 to output a target reference current IZTC based on the second reference current ICTAT2.

[0042] In one embodiment, the reference unit 10 is further used to generate the first voltage VBE and the reference voltage VBG and generate the first reference voltage VLT and the second reference voltage VHT based on the reference voltage VBG. In other embodiments, the first voltage VBE, the first reference voltage VLT and the second reference voltage VHT may be generated by other circuits.

[0043] like Figure 2 As shown, the reference unit 10 includes an amplifier EA, a first transistor M1, a first resistor R1, a second resistor R2, a third resistor R3, a first triode Q1, a second triode Q2, a third triode Q3 and a voltage dividing unit; the first end of the first transistor M1 is connected to the power supply voltage, the control end of the first transistor M1 is connected to the output end of the amplifier EA, the second end of the first transistor M1 is connected to the first end of the first resistor R1, the first end of the second resistor R2 and the voltage dividing unit to generate a reference voltage VBG, the voltage dividing unit is used to divide the reference voltage VBG to generate a first reference voltage VLT and a second reference voltage VHT, the second end of the first resistor R1 is connected to the amplifier E A first input terminal of A is connected to a second terminal of the first triode Q1, the second terminal of the first triode Q1 is connected to a control terminal of the first triode Q1 to generate a first voltage VBE, a second terminal of the second resistor R2 is connected to a second input terminal of the amplifier EA and a first terminal of a third resistor R3, a second terminal of the third resistor R3 is connected to a second terminal of the second triode Q2 and a control terminal of the second triode Q2, a control terminal of the third triode Q3 is connected to a control terminal of the second triode Q2, a second terminal of the third triode Q3 generates a first current IPTAT, and a first terminal of the first triode Q1, a first terminal of the second triode Q2, and a first terminal of the third triode Q3 are connected to a reference voltage. In one embodiment, the reference voltage is a ground voltage.

[0044] In one embodiment, the voltage divider unit is formed by three voltage divider resistors Ra connected in series, and the resistances of the three voltage divider resistors Ra can be adjusted, or the resistances of one or two of the voltage divider resistors Ra can be adjusted to adjust the first reference voltage VLT and the second reference voltage VHT. In other embodiments, the voltage divider unit can also be composed of other circuits. The reference voltage VBG is divided by the three voltage divider resistors Ra to generate the first reference voltage VLT and the second reference voltage VHT, and the second reference voltage VHT is greater than the first reference voltage VLT. The reference voltage VBG, the first reference voltage VLT and the second reference voltage VHT are voltages with zero temperature coefficients.

[0045] like Figure 3 As shown, the current generating unit 20 includes a fourth resistor R4, a fourth triode Q4, a second transistor M2 and a first current mirror unit, the control end of the fourth triode Q4 is connected to the first end of the fourth resistor R4, the first end of the fourth triode Q4 is connected to the second end of the fourth resistor R4 and the reference voltage, the first end of the second transistor M2 is connected to the first end of the fourth resistor R4, the control end of the second transistor M2 is connected to the second end of the fourth triode Q4, and the first current mirror unit is connected to the second end of the second transistor M2 and the second end of the fourth triode Q4 to generate the second current INTC.

[0046] In one embodiment, the first current mirror unit includes a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6 and a seventh transistor M7.

[0047] A first end of the third transistor M3, a first end of the fourth transistor M4, and a first end of the fifth transistor M5 are connected to the power supply voltage, a control end of the third transistor M3, a control end of the fourth transistor M4, and a control end of the fifth transistor M5 are connected, a second end of the third transistor M3 is connected to the control end of the third transistor M3 and a second end of the second transistor M2, a second end of the fourth transistor M4 is connected to the control end of the second transistor M2 and a second end of the fourth triode Q4, a second end of the fifth transistor M5 is connected to the second end of the sixth transistor M6, a control end of the sixth transistor M6, and a control end of the seventh transistor M7, a first end of the sixth transistor M6 and a first end of the seventh transistor M7 are connected to the reference voltage, and a second end of the seventh transistor M7 generates a second current INTC.

[0048] like Figure 1 As shown, the operation unit 30 includes a second current mirror unit, and the second current mirror unit is used to receive the first current IPTAT and the second current INTC and output the first reference current ICTAT1.

[0049] In one embodiment, the second current mirror unit includes a twelfth transistor M12 and a thirteenth transistor M13, the first end of the twelfth transistor M12 and the first end of the thirteenth transistor M13 are connected to the power supply voltage, the second end of the twelfth transistor M12 and the control end of the twelfth transistor M12 are connected to the second end of the third triode Q3 and the second end of the seventh transistor M7, the control end of the twelfth transistor M12 is connected to the control end of the thirteenth transistor M13, and the second end of the twelfth transistor M12 is connected to the curvature compensation current unit 40 and the feedback unit 50.

[0050] The curvature compensation current unit 40 has four input terminals, namely a first input terminal, a second input terminal, a third input terminal and a fourth input terminal. Figure 4 As shown, the curvature compensation current unit 40 includes an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a fourteenth transistor M14, a fifteenth transistor M15 and a third current mirror unit.

[0051] The first end of the eighth transistor M8 is connected to the first end of the ninth transistor M9 and is used to receive the second reference current ICTAT2. The first end of the tenth transistor M10 is connected to the first end of the eleventh transistor M11 and is used to receive the second reference current ICTAT2. The second end of the eighth transistor M8 is connected to the second end of the fourteenth transistor M14 and the control end of the fourteenth transistor M14, and the first end of the fourteenth transistor M14 is connected to the reference voltage. The second end of the tenth transistor M10 is connected to the second end of the fifteenth transistor M15 and the control end of the fifteenth transistor M15, and the first end of the fifteenth transistor M15 is connected to the reference voltage. The second end of the ninth transistor M9 is connected to the second end of the eleventh transistor M11 and is connected to the second current mirror unit. The third current mirror unit is used to receive the currents on the ninth transistor M9 and the eleventh transistor M11 to generate the compensation current I_Curve. In one embodiment, the fourteenth transistor M14 constitutes a bias unit of the eighth transistor M8, and the fifteenth transistor M15 constitutes a bias unit of the tenth transistor M10. In other embodiments, the fourteenth transistor M14 and / or the fifteenth transistor M15 may not be provided.

[0052] In one embodiment, the third current mirror unit includes a sixteenth transistor M16 and a seventeenth transistor M17. The control end of the sixteenth transistor M16 is connected to the control end of the seventeenth transistor M17, the control end of the sixteenth transistor M16 is connected to the second end of the sixteenth transistor M16, the second end of the ninth transistor M9 and the second end of the eleventh transistor M11, the first end of the sixteenth transistor M16 and the first end of the seventeenth transistor M17 are connected to the reference voltage, and the second end of the seventeenth transistor M17 is connected to the second end of the thirteenth transistor M13 and the feedback unit 50 to generate the compensation current I_Curve. The size of the compensation current I_Curve can be adjusted by increasing or decreasing the number of the seventeenth transistors M17 connected to the sixteenth transistor M16 or the width-to-length ratio of the seventeenth transistor M17.

[0053] The control end of the eighth transistor M8 is the first input end of the curvature compensating current unit 40, the control end of the ninth transistor M9 is the second input end of the curvature compensating current unit 40, the control end of the tenth transistor M10 is the third input end of the curvature compensating current unit 40, and the control end of the eleventh transistor M11 is the fourth input end of the curvature compensating current unit 40.

[0054] Wherein, in the first case (the first reference current ICTAT1 opens upward), the control end of the eighth transistor M8 is used to receive the first voltage VBE, the control end of the ninth transistor M9 is used to receive the first reference voltage VLT, the control end of the tenth transistor M10 is used to receive the second reference voltage VHT, and the control end of the eleventh transistor M11 is used to receive the first voltage VBE. In the second case (the first reference current ICTAT1 opens downward), the control end of the eighth transistor M8 is used to receive the first reference voltage VLT, the control end of the ninth transistor M9 is used to receive the first voltage VBE, the control end of the tenth transistor M10 is used to receive the first voltage VBE, and the control end of the eleventh transistor M11 is used to receive the second reference voltage VHT.

[0055] In one embodiment, the second reference current ICTAT2 can be received by using transistors. Two transistors are used, and the control end of each transistor is connected to the feedback unit 50 to perform mirror copying of the second reference current ICTAT2, wherein the second end of one transistor is connected to the first end of the eighth transistor M8 and the first end of the ninth transistor M9, and the second end of the other transistor is connected to the first end of the tenth transistor M10 and the first end of the eleventh transistor M11, and the first ends of the two transistors are connected to the power supply voltage. In other embodiments, other methods can also be used to receive the second reference current ICTAT2.

[0056] like Figure 5As shown, the curvature compensation current unit 40 further includes a switch group, which is used to switch between different situations based on a control signal. In one embodiment, the switch group is used to switch between the first situation and the second situation based on the control of the first control signal φ1 and the second control signal φ2.

[0057] In one embodiment, the switch group includes eight switches K1, K2, K3, K4, K5, K6, K7, and K8. The first ends of the switches K1, K2, K3, and K4 are all used to receive the first voltage VBE, the second end of the switch K1 is connected to the control end of the eighth transistor M8, the second end of the switch K2 is connected to the control end of the ninth transistor M9, the second end of the switch K3 is connected to the control end of the tenth transistor M10, and the second end of the switch K4 is connected to the control end of the eleventh transistor M11. The first ends of the switches K5 and K6 are all used to receive the first reference voltage VLT, the second end of the switch K5 is connected to the control end of the eighth transistor M8, the second end of the switch K6 is connected to the control end of the ninth transistor M9, the first ends of the switches K7 and K8 are all used to receive the second reference voltage VHT, the second end of the switch K7 is connected to the control end of the tenth transistor M10, and the second end of the switch K8 is connected to the control end of the eleventh transistor M11.

[0058] The switches K1, K4, K6 and K7 are all controlled by the first control signal φ1, and the switches K2, K3, K5 and K8 are all controlled by the second control signal φ2. In the first case, the first control signal φ1 is at a high level, the second control signal φ2 is at a low level, the switches K1, K4, K6 and K7 are all closed, and the switches K2, K3, K5 and K8 are all opened; in the second case, the second control signal φ2 is at a high level, the first control signal φ1 is at a low level, the switches K2, K3, K5 and K8 are all closed, and the switches K1, K4, K6 and K7 are all opened.

[0059] like Figure 1 As shown, the feedback unit 50 includes a fourth current mirror unit, which is connected to the operation unit 30 and the curvature compensation current unit 40 to generate a second reference current ICTAT2 and transmit the second reference current ICTAT2 to the curvature compensation current unit 40 .

[0060] In one embodiment, the fourth current mirror unit includes an eighteenth transistor M18, a nineteenth transistor M19, a twentieth transistor M20, a twenty-first transistor M21 and a twenty-second transistor M22.

[0061] The control end of the eighteenth transistor M18 is connected to the control end of the nineteenth transistor M19, the control end of the eighteenth transistor M18 is connected to the second end of the eighteenth transistor M18, the second end of the thirteenth transistor M13 and the second end of the seventeenth transistor M17, the first end of the eighteenth transistor M18 and the first end of the nineteenth transistor M19 are connected to the reference voltage. The second end of the twentieth transistor M20 is connected to the control end of the twentieth transistor M20 and the second end of the nineteenth transistor M19, the control end of the twentieth transistor M20 is connected to the control end of the twenty-first transistor M21 and the control end of the twenty-second transistor M22, the second end of the twenty-first transistor M21 is connected to the first end of the eighth transistor M8 and the first end of the ninth transistor M9, the second end of the twenty-second transistor M22 is connected to the first end of the tenth transistor M10 and the first end of the eleventh transistor M11. The first end of the twentieth transistor M20, the first end of the twenty-first transistor M21 and the first end of the twenty-second transistor M22 are connected to the power supply voltage.

[0062] like Figure 1 As shown, the output unit 60 includes a twenty-third transistor M23, a control end of the twenty-third transistor M23 is connected to the control end of the twentieth transistor M20, a first end of the twenty-third transistor M23 is connected to the power supply voltage, and a second end of the twenty-third transistor M23 outputs the target reference current IZTC.

[0063] In one embodiment, the first transistor M1, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the eighth transistor M8, the ninth transistor M9, the tenth transistor M10, the eleventh transistor M11, the twelfth transistor M12, the thirteenth transistor M13, the twentieth transistor M20, the twenty-first transistor M21, the twenty-second transistor M22 and the twenty-third transistor M23 are P-channel MOS transistors.

[0064] The second transistor M2 , the sixth transistor M6 , the seventh transistor M7 , the fourteenth transistor M14 , the fifteenth transistor M15 , the sixteenth transistor M16 , the seventeenth transistor M17 , the eighteenth transistor M18 , and the nineteenth transistor M19 are N-channel MOS transistors.

[0065] A first end of the first transistor M1, a first end of the third transistor M3, a first end of the fourth transistor M4, a first end of the fifth transistor M5, a first end of the eighth transistor M8, a first end of the ninth transistor M9, a first end of the tenth transistor M10, a first end of the eleventh transistor M11, a first end of the twelfth transistor M12, a first end of the thirteenth transistor M13, a first end of the twentieth transistor M20, a first end of the twenty-first transistor M21, a first end of the twenty-second transistor M22, a first end of the twenty-third transistor M23, a first end of the second transistor M2, a first end of the sixth transistor M6, a first end of the seventh transistor M7, a first end of the fourteenth transistor M14, a first end of the fifteenth transistor M15, a first end of the sixteenth transistor M16, a first end of the seventeenth transistor M17, a first end of the eighteenth transistor M18, and a first end of the nineteenth transistor M19 are sources.

[0066] The second end of the first transistor M1, the second end of the third transistor M3, the second end of the fourth transistor M4, the second end of the fifth transistor M5, the second end of the eighth transistor M8, the second end of the ninth transistor M9, the second end of the tenth transistor M10, the second end of the eleventh transistor M11, the second end of the twelfth transistor M12, the second end of the thirteenth transistor M13, the second end of the twentieth transistor M20, the second end of the twenty-first transistor M21, the second end of the twenty-second transistor M22, the second end of the twenty-third transistor M23, the second end of the second transistor M2, the second end of the sixth transistor M6, the second end of the seventh transistor M7, the second end of the fourteenth transistor M14, the second end of the fifteenth transistor M15, the second end of the sixteenth transistor M16, the second end of the seventeenth transistor M17, the second end of the eighteenth transistor M18, and the second end of the nineteenth transistor M19 are drains.

[0067] The control end of the first transistor M1, the control end of the third transistor M3, the control end of the fourth transistor M4, the control end of the fifth transistor M5, the control end of the eighth transistor M8, the control end of the ninth transistor M9, the control end of the tenth transistor M10, the control end of the eleventh transistor M11, the control end of the twelfth transistor M12, the control end of the thirteenth transistor M13, the control end of the twentieth transistor M20, the control end of the twenty-first transistor M21, the control end of the twenty-second transistor M22, the control end of the twenty-third transistor M23, the control end of the second transistor M2, the control end of the sixth transistor M6, the control end of the seventh transistor M7, the control end of the fourteenth transistor M14, the control end of the fifteenth transistor M15, the control end of the sixteenth transistor M16, the control end of the seventeenth transistor M17, the control end of the eighteenth transistor M18, and the control end of the nineteenth transistor M19 are gates.

[0068] In other embodiments, the first transistor M1, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the eighth transistor M8, the ninth transistor M9, the tenth transistor M10, the eleventh transistor M11, the twelfth transistor M12, the thirteenth transistor M13, the twentieth transistor M20, the twenty-first transistor M21, the twenty-second transistor M22, and the twenty-third transistor M23 may be N-channel MOS transistors. The second transistor M2, the sixth transistor M6, the seventh transistor M7, the fourteenth transistor M14, the fifteenth transistor M15, the sixteenth transistor M16, the seventeenth transistor M17, the eighteenth transistor M18, and the nineteenth transistor M19 may be P-channel MOS transistors.

[0069] In one embodiment, the first triode Q1, the second triode Q2, the third triode Q3 and the fourth triode Q4 are NPN triodes. The first end of the first triode Q1, the first end of the second triode Q2, the first end of the third triode Q3 and the first end of the fourth triode Q4 are emitters, the second end of the first triode Q1, the second end of the second triode Q2, the second end of the third triode Q3 and the second end of the fourth triode Q4 are collectors, and the control end of the first triode Q1, the control end of the second triode Q2, the control end of the third triode Q3 and the control end of the fourth triode Q4 are bases. In other embodiments, the first triode Q1, the second triode Q2, the third triode Q3 and the fourth triode Q4 may be PNP triodes.

[0070] In addition, the current mirror ratio of each current mirror unit can be adjusted as needed.

[0071] In one embodiment, if Figure 2 As shown, the first current IPTAT clamps nodes A and B through the amplifier EA, so that the voltage drop on the third resistor R3 is ΔVBE=VT*ln(N), VT is the thermal voltage, N is the emitter junction area ratio of the first transistor Q1 and the second transistor Q2, so the first current IPTAT is IPTAT=VT*ln(N) / R3, and is finally output after being mirrored by the second transistor Q2 and the third transistor Q3.

[0072] like Figure 3 As shown, the second current INTC makes the voltage on the fourth resistor R4 drop to the voltage VBE4 between the control end of the fourth transistor Q4 and the first end of the fourth transistor Q4, so that the second current INTC is INTC=VBE4 / R4, and is finally output after being mirrored by the first current mirror unit.

[0073] like Figure 4 , 5As shown in Figures 1 and 2, the first reference voltage VLT and the second reference voltage VHT are fixed voltages corresponding to low temperature and high temperature, respectively, and the first voltage VBE is inversely proportional to the temperature. Among them, the switches K1, K2, K3, K4, K5, K6, K7, and K8 are switched according to the first control signal Φ1 and the second control signal Φ2 to control according to the actual temperature curve of the first reference current ICTAT1 after the actual first-order temperature compensation, as shown in Figure 2. Figure 6 As shown, when the temperature curve of the first reference current ICTAT1 is a parabola opening upward (the first situation), the switch K1, the switch K4, the switch K6 and the switch K7 are closed, at this time, the control terminal of the eighth transistor M8 is connected to the first voltage VBE, the control terminal of the ninth transistor M9 is connected to the first reference voltage VLT, the control terminal of the tenth transistor M10 is connected to the second reference voltage VHT, and the control terminal of the eleventh transistor M11 is connected to the first voltage VBE. In the low temperature section, as the temperature continues to rise, the first voltage VBE decreases, the current on the eighth transistor M8 increases, the current on the ninth transistor M9 will gradually decrease and finally tend to zero, and the The current on the eleventh transistor M11 will gradually increase and finally approach the second reference current ICTAT2. The current on the sixteenth transistor M16 is the sum of the current on the ninth transistor M9 and the current on the eleventh transistor M11. Therefore, the current on the sixteenth transistor M16 will be a parabola opening upward as the temperature changes, which is basically the same as the first reference current ICTAT1 changing with temperature. The current bending amplitude on the sixteenth transistor M16 can be adjusted by adjusting the first reference voltage VLT and the second reference voltage VHT. Finally, the compensation current I_Curve is mirrored and output through the seventeenth transistor M17.

[0074] Similarly, if Figure 7 As shown, when the temperature curve of the first reference current ICTAT1 is a parabola opening downward (the second situation), the switch K2, the switch K3, the switch K5 and the switch K8 are closed, at this time, the control terminal of the eighth transistor M8 is connected to the first reference voltage VLT, the control terminal of the ninth transistor M9 is connected to the first voltage VBE, the control terminal of the tenth transistor M10 is connected to the first voltage VBE, and the control terminal of the eleventh transistor M11 is connected to the second reference voltage VHT. In the low temperature section, as the temperature continues to rise, the current on the ninth transistor M9 will gradually increase and finally approach the second reference current ICTAT2, and the current on the eleventh transistor M11 will gradually decrease and finally approach zero. Therefore, the current on the sixteenth transistor M16 will be a parabola opening downward as the temperature changes.

[0075] By adding the first current IPTAT generated by the reference unit 10 and the second current INTC generated by the current generating unit 20 in a certain ratio, a first reference current ICTAT1 with first-order temperature compensation is constructed. At this time, the first reference current ICTAT1 after the first-order temperature compensation still has a large temperature coefficient, and the relationship between its current value and temperature is a temperature curve with a curvature characteristic similar to a parabola.

[0076] The first reference current ICTAT1 is mirrored and outputted through the operation unit 30, and the compensation current I_Curve is extracted from the second end of the thirteenth transistor M13 through the curvature compensation current unit 40, so as to perform curvature compensation on the first reference current ICTAT1, and the second reference current ICTAT2 after curvature compensation is mirrored and inputted into the curvature compensation current unit 40 through the feedback unit 50, and the compensation current I_Curve having a temperature coefficient substantially the same as that of the first reference current ICTAT1 is generated through the curvature compensation current unit 40. Finally, the second reference current ICTAT2 after curvature compensation is mirrored through the output unit 60 to output the final target reference current IZTC with zero temperature drift.

[0077] By superimposing a compensation current I_Curve having a temperature coefficient opposite to that of the first reference current ICTAT1 at each temperature point on the first reference current ICTAT1 of first-order temperature compensation, it is equivalent in the circuit to extract a current having the same temperature coefficient as that of the first reference current ICTAT1 from the first reference current ICTAT1, thereby further reducing the temperature coefficient of the first reference current ICTAT1.

[0078] This embodiment further discloses a current generating method. Based on the above current generating circuit, the method includes:

[0079] The first current IPTAT proportional to the temperature is obtained through the reference unit 10 .

[0080] The second current INTC inversely proportional to the temperature is obtained through the current generating unit 20 .

[0081] The first reference current ICTAT1 after first-order compensation based on the first current IPTAT and the second current INTC is obtained by the operation unit 30 .

[0082] The curvature compensation current unit 40 generates a compensation current I_Curve based on a first voltage VBE, a first reference voltage VLT and a second reference voltage VHT to perform curvature compensation on the first reference current ICTAT1 . The first voltage VBE is inversely proportional to the temperature.

[0083] The second reference current ICTAT2 generated after curvature compensation of the first reference current ICTAT1 is transmitted to the curvature compensation current unit 40 through the feedback unit 50 , and the curvature compensation current unit 40 adjusts the compensation current I_Curve based on the second reference current ICTAT2 .

[0084] Generating a compensation current I_Curve based on the first voltage VBE, the first reference voltage VLT and the second reference voltage VHT by the curvature compensation current unit 40 to perform curvature compensation on the first reference current ICTAT1 includes: based on different temperature curves of the first reference current ICTAT1 (opening upward or downward), switching different situations through corresponding control signals (first control signal φ1 and second control signal φ2), one situation is: the first input terminal of the curvature compensation current unit 40 is connected to the first voltage VBE, the second input terminal of the curvature compensation current unit 40 is connected to the first reference voltage VLT, the third input terminal of the curvature compensation current unit 40 is connected to the second reference voltage VHT, and the fourth input terminal of the curvature compensation current unit 40 is connected to the first voltage VBE; one situation is: the first input terminal of the curvature compensation current unit 40 is connected to the first reference voltage VLT, the second input terminal of the curvature compensation current unit 40 is connected to the first voltage VBE, the third input terminal of the curvature compensation current unit 40 is connected to the first voltage VBE, and the fourth input terminal of the curvature compensation current unit 40 is connected to the second reference voltage VHT.

[0085] The present application also discloses a chip, comprising the above-mentioned current generating circuit.

[0086] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0087] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A current generating circuit, characterized in that: include: A reference unit, used to generate a first current proportional to the temperature; a current generating unit, configured to generate a second current inversely proportional to the temperature; A calculation unit, used for generating a first reference current after first-order compensation based on the first current and the second current; a curvature compensation current unit, configured to generate a compensation current based on a first voltage, a first reference voltage, and a second reference voltage to perform curvature compensation on a first reference current, wherein the first voltage is inversely proportional to a temperature; as well as The feedback unit is used to transmit the second reference current generated after the curvature compensation of the first reference current to the curvature compensation current unit, and the curvature compensation current unit adjusts the compensation current based on the second reference current.

2. The current generating circuit according to claim 1, characterized in that: The reference unit is further configured to generate a first voltage and a reference voltage and to generate a first reference voltage and a second reference voltage based on the reference voltage.

3. The current generating circuit according to claim 1, characterized in that: The reference unit includes an amplifier, a first transistor, a first resistor, a second resistor, a third resistor, a first triode, a second triode and a third triode; the first end of the first transistor is connected to a power supply voltage, the control end of the first transistor is connected to the output end of the amplifier, the second end of the first transistor is connected to the first end of the first resistor and the first end of the second resistor, the second end of the first resistor is connected to the first input end of the amplifier, the second end of the first triode and the control end of the first triode, the second end of the second resistor is connected to the second input end of the amplifier and the first end of the third resistor, the second end of the third resistor is connected to the second end of the second triode and the control end of the second triode, the control end of the third triode is connected to the control end of the second triode, the second end of the third triode generates a first current, and the first end of the first triode, the first end of the second triode and the first end of the third triode are connected to a reference voltage.

4. The current generating circuit according to claim 2, characterized in that: The reference unit includes an amplifier, a first transistor, a first resistor, a second resistor, a third resistor, a first triode, a second triode, a third triode and a voltage dividing unit; the first end of the first transistor is connected to a power supply voltage, the control end of the first transistor is connected to the output end of the amplifier, the second end of the first transistor is connected to the first end of the first resistor, the first end of the second resistor and the voltage dividing unit to generate a reference voltage, the voltage dividing unit is used to divide the reference voltage to generate a first reference voltage and a second reference voltage, the second end of the first resistor is connected to the first input end of the amplifier and the second end of the first triode, the second end of the first triode is connected to the control end of the first triode to generate a first voltage, the second end of the second resistor is connected to the second input end of the amplifier and the first end of the third resistor, the second end of the third resistor is connected to the second end of the second triode and the control end of the second triode, the control end of the third triode is connected to the control end of the second triode, the second end of the third triode generates a first current, and the first end of the first triode, the first end of the second triode and the first end of the third triode are connected to the reference voltage.

5. The current generating circuit according to claim 1, characterized in that: The current generating unit includes a fourth resistor, a fourth triode, a second transistor and a first current mirror unit, the control end of the fourth triode is connected to the first end of the fourth resistor, the first end of the fourth triode is connected to the second end of the fourth resistor, the first end of the second transistor is connected to the first end of the fourth resistor, the control end of the second transistor is connected to the second end of the fourth triode, and the first current mirror unit is connected to the second end of the second transistor and the second end of the fourth triode to generate a second current.

6. The current generating circuit according to claim 1, characterized in that: The operation unit includes a second current mirror unit, and the second current mirror unit is used for receiving the first current and the second current and generating a first reference current.

7. The current generating circuit according to claim 1, characterized in that: The curvature compensation current unit includes an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor and a third current mirror unit, wherein a first end of the eighth transistor is connected to a first end of the ninth transistor and is used to receive a second reference current, a first end of the tenth transistor is connected to a first end of the eleventh transistor and is used to receive a second reference current, a second end of the ninth transistor is connected to a second end of the eleventh transistor and is connected to the second current mirror unit, and the third current mirror unit is used to receive currents on the ninth transistor and the eleventh transistor to generate a compensation current; Among them, the control end of the eighth transistor is used to receive the first voltage, the control end of the ninth transistor is used to receive the first reference voltage, the control end of the tenth transistor is used to receive the second reference voltage, and the control end of the eleventh transistor is used to receive the first voltage; or, the control end of the eighth transistor is used to receive the first reference voltage, the control end of the ninth transistor is used to receive the first voltage, the control end of the tenth transistor is used to receive the first voltage, and the control end of the eleventh transistor is used to receive the second reference voltage.

8. The current generating circuit according to claim 7, characterized in that: The curvature compensation current unit also includes a switch group, which is used to switch between different situations based on a control signal, one situation being: the control end of the eighth transistor is connected to the first voltage, the control end of the ninth transistor is connected to the first reference voltage, the control end of the tenth transistor is connected to the second reference voltage, and the control end of the eleventh transistor is connected to the first voltage; one situation is: the control end of the eighth transistor is connected to the first reference voltage, the control end of the ninth transistor is connected to the first voltage, the control end of the tenth transistor is connected to the first voltage, and the control end of the eleventh transistor is connected to the second reference voltage.

9. The current generating circuit according to claim 1, characterized in that: The feedback unit includes a fourth current mirror unit, which is connected to the operation unit and the curvature compensation current unit to generate a second reference current and transmit the second reference current to the curvature compensation current unit.

10. The current generating circuit according to claim 1, characterized in that: The current generating circuit further includes an output unit connected to the feedback unit to output a target reference current based on the second reference current.

11. A method for generating electric current, characterized in that: Based on the current generating circuit according to any one of claims 1 to 10, the method comprises: obtaining a first current proportional to the temperature; obtaining a second current inversely proportional to the temperature; Acquire a first reference current after first-order compensation is generated based on the first current and the second current; generating a compensation current based on a first voltage, a first reference voltage and a second reference voltage by a curvature compensation current unit to perform curvature compensation on a first reference current, wherein the first voltage is inversely proportional to the temperature; The second reference current generated after curvature compensation of the first reference current is transmitted to the curvature compensation current unit through the feedback unit, and the compensation current is adjusted based on the second reference current through the curvature compensation current unit.

12. The current generating method according to claim 11, characterized in that: Generating a compensation current based on a first voltage, a first reference voltage and a second reference voltage through a curvature compensation current unit to perform curvature compensation on a first reference current includes: based on different temperature curves of the first reference current, switching between different situations through corresponding control signals, one situation being: a first input terminal of the curvature compensation current unit is connected to a first voltage, a second input terminal of the curvature compensation current unit is connected to a first reference voltage, a third input terminal of the curvature compensation current unit is connected to a second reference voltage, and a fourth input terminal of the curvature compensation current unit is connected to the first voltage; one situation being: a first input terminal of the curvature compensation current unit is connected to a first reference voltage, a second input terminal of the curvature compensation current unit is connected to a first voltage, a third input terminal of the curvature compensation current unit is connected to a first voltage, and a fourth input terminal of the curvature compensation current unit is connected to a second reference voltage.

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