Photon calculation method and device and computer equipment

Abstract

The invention provides a photon calculation method, a photon calculation device and computer equipment. The method comprises the steps that first data are obtained, the first data comprise a plurality of first elements, and each first element represents a number; splitting each first element in the first data into a plurality of parts in the electronic domain; and in a photon domain, representing a plurality of parts after each first element of the first data is split by adopting an optical signal, and carrying out optical processing on the optical signal so as to represent calculation on the plurality of first elements.

Description

Technical Field

[0001] The present invention relates to the field of photon computing technology, and more specifically, to a photon computing method, a photon computing device, and a computer device. Background Art

[0002] Modern society has an increasing demand for computing power. Chips are the hardware foundation of computing. Traditional chips use electrical signals to represent information and perform calculations (process information). The physical implementation of the above chips is mainly based on integrated circuits composed of CMOS transistors. For decades, integrated circuit chips have been developed roughly according to the empirical law summarized by Moore, that is, the number of transistors that can be accommodated on an integrated circuit will double approximately every 18 to 24 months. In order to support this development, the characteristic size of transistors has become smaller and smaller, approaching the physical limit.

[0003] Currently, it has been proposed to use light for computing. Summary of the invention

[0004] The present invention provides a photon computing method, a photon computing device, and a computer device to solve the above-mentioned defects in the prior art.

[0005] In a first aspect, an embodiment of the present invention provides a method of photon computing, the method comprising: acquiring first data, the first data comprising a plurality of first elements, each of the first elements representing a number; in an electronic domain, splitting each first element in the first data into a plurality of parts; in a photon domain, using an optical signal to represent the plurality of parts of each first element of the first data after being split, and optically processing the optical signal, thereby representing calculation of the plurality of first elements.

[0006] In some embodiments of the present invention, splitting each first element in the first data into multiple parts in the electronic domain includes: splitting the first element along bits in the electronic domain.

[0007] In some embodiments of the present invention, splitting each first element in the first data into multiple parts includes: using a group of first electrical signals to represent the multiple parts after the first element is split, and using multiple groups of first electrical signals to respectively represent the multiple first elements.

[0008] In some embodiments of the present invention, the step of using an optical signal to represent the multiple parts of each first element of the first data includes: using a group of optical signals to represent the multiple parts of the first element, and using multiple groups of optical signals to represent the multiple first elements respectively. The step of using multiple groups of optical signals to represent the multiple first elements respectively may include: modulating multiple light paths according to the multiple groups of first electrical signals to generate multiple groups of optical signals representing the multiple first elements respectively.

[0009] In some embodiments of the present invention, the method further includes: obtaining second data, the second data including a plurality of second elements, each of which represents a number. The calculation includes multiplying each first element of the first data by a corresponding second element in the second data. In some embodiments of the present invention, multiplying each first element of the first data by a corresponding second element in the second data includes: using an electrical signal to represent the second data; using the electrical signal representing the second data as a control signal of an optical computing unit, and optically processing the plurality of groups of optical signals using the optical computing unit under the control of the control signal.

[0010] In some embodiments of the present invention, the method further comprises: splitting each second element in the second data into a plurality of parts in the electronic domain. In some embodiments of the present invention, splitting each second element in the second data into a plurality of parts in the electronic domain comprises: splitting the second element along the bit position in the electronic domain.

[0011] In some embodiments of the present invention, splitting each second element in the second data into multiple parts in the electronic domain includes: using a group of second electrical signals to represent the multiple parts of the second element, and using multiple groups of second electrical signals to respectively represent the multiple second elements.

[0012] In some embodiments of the present invention, the multiplying each first element of the first data by the corresponding second element of the second data comprises: using the plurality of sets of second electrical signals as control signals of an optical computing unit; and optically processing the plurality of sets of optical signals using the optical computing unit under the control of the control signal. Optionally, the optical computing unit comprises a Mach-Zehnder interferometer.

[0013] In some embodiments of the present invention, the first data includes at least a portion of elements in a vector or a matrix, and the second data includes at least a portion of elements in a vector or a matrix.

[0014] In some embodiments of the present invention, the method further comprises: converting the optical signal outputted by the optical processing into a plurality of groups of digital electrical signals; and performing an accumulation operation on the numbers represented by the plurality of groups of digital electrical signals. In some embodiments of the present invention, the method further comprises: before performing the accumulation operation, scaling the numbers represented by the digital electrical signals, or performing a shift operation on the numbers represented in binary form.

[0015] In some embodiments of the present invention, the multiplication of each first element of the first data by the corresponding second element of the second data includes: performing optical processing in the photon domain to represent the multiplication operation on the multiple parts after the first element is split and the multiple parts after the second element is split. In some embodiments of the present invention, the method also includes converting the optical signal after the optical processing into an analog electrical signal, and performing a summation operation on the numbers represented by the analog electrical signal to obtain multiple first summation results, each of which represents the sum of multiple products obtained by multiplying a certain part after the first elements are split by a certain part after the corresponding second elements are split.

[0016] In some embodiments of the present invention, the method further includes: performing mapping operations on the plurality of first summation results to obtain a plurality of intermediate results, wherein the mapping operations are scaling the first summation results or keeping them unchanged, and at least one of the mapping operations is scaling; and performing an accumulation operation on the plurality of intermediate results to obtain a second summation result. At least one of the plurality of intermediate results is keeping its corresponding first summation result unchanged.

[0017] In some embodiments of the present invention, the method includes: converting analog electrical signals representing the multiple first summation results into digital electrical signals and representing the multiple first summation results in binary form; and shifting at least two of the first summation results in binary form.

[0018] In a second aspect, an embodiment of the present invention provides a photonic computing device, the device comprising: a first data splitting module, configured to split each first element in the first data into multiple parts in the electronic domain, wherein the first data includes multiple first elements, each of which represents a number; an optical processing module, configured to use an optical signal in the photon domain to represent the multiple parts of each first element of the first data after being split, and optically process the optical signal, thereby representing calculation of the multiple first elements. In some embodiments of the present invention, in the electronic domain, the first element is split along the bit position.

[0019] In some embodiments of the present invention, the first data splitting module splits each first element in the first data into multiple parts in the electronic domain, including: using a group of first electrical signals to represent the multiple parts after the first element is split, and using multiple groups of first electrical signals to respectively represent the multiple first elements.

[0020] In some embodiments of the present invention, the optical processing module uses optical signals in the photon domain to represent the multiple parts after each first element of the first data is split, including: using a group of optical signals to represent the multiple parts after the first element is split, and using multiple groups of optical signals to respectively represent the multiple first elements.

[0021] In some embodiments of the present invention, using multiple groups of optical signals to respectively represent the multiple first elements includes: modulating multiple paths of light according to the multiple groups of first electrical signals to generate multiple groups of optical signals respectively representing the multiple first elements.

[0022] In some embodiments of the present invention, the photonic computing device further comprises a second data splitting module, which is configured to split each second element in the second data into a plurality of parts in the electronic domain, wherein the second data comprises a plurality of the second elements, each of which represents a number. In some embodiments of the present invention, in the electronic domain, the second element is split along the bit position.

[0023] In some embodiments of the present invention, the second data splitting module splits each second element in the second data into multiple parts in the electronic domain, including: using a group of second electrical signals to represent the multiple parts after the second element is split, and using multiple groups of second electrical signals to respectively represent the multiple second elements.

[0024] In some embodiments of the present invention, the optical processing module includes an optical computing unit. The optical processing of the optical signal by the optical module includes: using the multiple sets of second electrical signals as control signals of the optical computing unit; and using the optical computing unit to optically process the multiple sets of optical signals under the control of the control signal. Optionally, the optical computing unit includes a Mach-Zehnder interferometer.

[0025] In some embodiments of the present invention, the first data includes a vector, and the second data includes a matrix.

[0026] In some embodiments of the present invention, the photonic computing device further comprises:

[0027] an optical-electrical conversion module, configured to convert the optical signal output after the optical processing into an analog electrical signal;

[0028] A summing processing module is configured to perform summing processing on the numbers represented by the analog electrical signals to obtain a plurality of summing results;

[0029] a scaling processing module, configured to perform scaling processing on at least one of the plurality of summation results respectively; and

[0030] The accumulation module is configured to accumulate the summation result after the scaling process and the summation result before the scaling process.

[0031] In some embodiments of the present invention, the photonic computing device further comprises:

[0032] an optical-electrical conversion module, configured to convert the optical signal output after the optical processing into an analog electrical signal;

[0033] A summing processing module is configured to perform summing processing on the numbers represented by the analog electrical signals to obtain a plurality of summing results;

[0034] an analog-to-digital conversion module, configured to convert the analog electrical signal representing the summation result into a digital electrical signal, and represent the summation result in binary form;

[0035] a shift module configured to perform a shift operation on at least one of the summation results in binary form; and

[0036] The accumulation module is configured to accumulate the summation results that have undergone the shift operation and the summation results that have not undergone the shift operation among the multiple summation results.

[0037] In a third aspect, an embodiment of the present invention further provides a method of photon computing, comprising: acquiring first data, the first data comprising multiple first elements, each of the first elements representing a number; in a photon domain, using an optical signal to represent the first data; optically processing the optical signal to represent calculations on the corresponding multiple first elements; in an analog electronic domain, performing a first summation operation on the processing results represented by the analog electrical signal; and in a digital electronic domain, performing a second summation operation on the processing results represented by the digital electrical signal.

[0038] In some embodiments of the present invention, the method further includes converting the optically processed optical signal into the analog electrical signal; the first summation operation includes performing a summation operation according to the number represented by the analog electrical signal to obtain a plurality of first summation results.

[0039] In some embodiments of the present invention, the processing result represented by the digital electrical signal includes the first summation result; wherein the second summation operation includes: generating a second summation result according to the first summation result.

[0040] In some implementations of the present invention, the method further includes performing a shift operation on at least one of the first summation results represented by the digital electrical signal, and performing the second summation operation after the shift operation.

[0041] In some implementations of the present invention, the method further includes performing scaling processing on at least one of the plurality of first summation results to obtain at least one corresponding intermediate result.

[0042] In a fourth aspect, an embodiment of the present invention provides a computer device, which includes the photonic computing device described in any embodiment of the present invention.

[0043] According to the embodiments of the present invention, at least one of the following technical effects can be achieved: improving the efficiency or accuracy of optical computing, reducing the difficulty of hardware implementation of the computing system, such as reducing the performance requirements of related hardware such as photoelectric conversion, electro-optical conversion or modulator, or being more suitable for specific computing tasks such as multiplication calculation, multiplication followed by summation calculation or matrix calculation. The various aspects, features, advantages, etc. of the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. According to the following detailed description in conjunction with the accompanying drawings, the above aspects, features, advantages, etc. of the present invention will become more clear. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 is a flow chart of a method for photon computing according to one embodiment of the present invention.

[0045] Figure 2 is a flow chart of a method for photon computing according to another embodiment of the present invention.

[0046] Figure 3 is a flow chart of a method for photon computing according to another embodiment of the present invention.

[0047] Figure 4 is a block diagram of a photonic computing device according to an embodiment of the present invention.

[0048] Figure 5 is a block diagram of a photonic computing device according to another embodiment of the present invention.

[0049] Figure 6 is a block diagram of a photonic computing device according to another embodiment of the present invention.

[0050] Figure 7 is a schematic diagram showing an example of splitting an input number according to an embodiment of the present invention.

[0051] Figure 8 is a schematic diagram showing an example architecture of a photonic computing device according to an embodiment of the present invention.

[0052] Fig. 9 is a schematic diagram showing an example of an input vector and a matrix according to an embodiment of the present invention.

[0053] Fig.10 The photon computing method of the present invention is shown in FIG. Fig. 9 A schematic diagram of the logic of the input data is shown. DETAILED DESCRIPTION

[0054] In order to facilitate understanding of various aspects, features and advantages of the technical solution of the present invention, the present invention is described in detail below in conjunction with the accompanying drawings. It should be understood that the various embodiments described below are only for illustration and are not intended to limit the scope of protection of the present invention.

[0055] The terms used herein are for the purpose of describing specific embodiments and are not intended to limit the present invention. As used herein, the wording "a" is intended to include plural cases unless the context clearly indicates a single quantity. The terms "first", "second" or other similar expressions are used to distinguish objects and do not mean order or sequence unless the order of their representation is clearly indicated. When referring to the inventor, it refers to the inventor of the present disclosure (this application).

[0056] The embodiments of the present invention do not impose any particular limitation on the execution order of the steps, as long as the purpose or function of the invention can be achieved. Some steps or orders may be executed in parallel, sequentially, or alternately.

[0057] The inventor has studied photon computing. The inventor has found that, in some cases, some aspects of current photon computing still require input / output of electrical signals, such as the need to communicate electrical signals with traditional electrical signal chips. As a result, the signal will have conversion requirements such as electro-optical conversion, photoelectric conversion, and analog-to-digital conversion. For example, the signal needs to undergo analog-to-digital conversion from the photon domain / analog electronic domain to the digital electronic domain, but the current analog-to-digital conversion technology is difficult to achieve high-speed and high-precision (for example, greater than 8-bit accuracy) signal conversion, that is, high-speed and high-precision analog-to-digital conversion is close to the limit. On the other hand, in some calculations, sufficient data accuracy is required to ensure the accuracy of the calculation results. For example, some artificial intelligence calculations require 8-bit data accuracy input to maintain accuracy, and after various calculations and processing, the data representing the calculation results requires at least 16-bit accuracy to ensure accuracy. Therefore, in optical computing, 16-bit data is represented by optical signals. In the process of converting the optical signal into the final digital electrical signal, the use of a conventional 8-bit analog-to-digital converter will obviously cause a decrease in data accuracy, resulting in a decrease in the overall accuracy of the calculation model or algorithm.

[0058] In addition, in some systems that implement photonic computing, it is also beneficial to reduce the design / manufacturing difficulty of hardware such as electro-optical conversion and modulators.

[0059] The main purpose of the present invention is to provide a photon computing solution suitable for actual computing scenarios. At least one of the following technical effects can be achieved: improving the efficiency or accuracy of optical computing, reducing the difficulty of hardware implementation of the computing system, such as reducing the performance requirements of related hardware such as photoelectric conversion, electro-optical conversion or modulator, or being more suitable for specific computing tasks such as multiplication calculation, multiplication-first-then-summation calculation or matrix calculation.

[0060] Figure 1 The processing process of the photon computing method according to an embodiment of the present invention is shown. In this embodiment, the photon computing method proposed by the present invention includes: S101, obtaining first data, the first data includes multiple first elements, each of the first elements represents a number; S102, in the electronic domain, splitting each first element in the first data into multiple parts; S103, in the photon domain, using an optical signal to represent the multiple parts of each first element of the first data after being split; S104, optically processing the optical signal, thereby indicating that the multiple first elements are calculated. In some embodiments of the present invention, step S101 is performed in the electronic domain, for example, the first data to be processed in the form of an analog electrical signal or a digital electrical signal is input.

[0061] In some implementations of the present invention, in step S102, each first element in the first data may be split into multiple parts in the digital electronic domain.

[0062] In some embodiments of the present invention, in step S102, splitting each first element in the first data into multiple parts includes: using a group of first electrical signals to represent the multiple parts after the first element is split, and using multiple groups of first electrical signals to respectively represent the multiple first elements. That is, for the multiple first elements, since each of the first elements is split, it is necessary to use multiple groups of first electrical signals to represent the multiple first elements. The first element can be in the form of a binary number or a decimal number, for example, but is not limited thereto. The group of electrical signals can include at least 2 electrical signals, and the electrical signal can be a current signal or a voltage signal, a digital electrical signal or an analog electrical signal. Figure 7As shown, the binary number "11010100" is split into a high-order part: "1101" and a low-order part: "0100". Exemplarily, the low-order part can be represented by an analog electrical signal A1, and the high-order part can be represented by an analog electrical signal A2. A group of electrical signals including A1 and A2 can completely represent the two parts of the first element "11010100" after being split, thereby representing the first element "11010100". In some embodiments, multiple electrical signals are required to fully represent the low-order part, or multiple electrical signals are required to fully represent the high-order part. For example, in order to represent the low-order part, two analog electrical signals A1 and A2 are used, and in order to represent the high-order part, two analog electrical signals A3 and A4 are used. At this time, a group of electrical signals representing the first element includes four electrical signals A1, A2, A3 and A4. In some embodiments, the low-order part can be represented by multiple digital electrical signals, and the high-order part can be represented by another multiple digital electrical signals. Thus, a set of first electrical signals can be used to represent the multiple parts (high-order part, low-order part) after the first element is split. The set of first electrical signals, or the electrical signals used to represent the high-order part and the low-order part, can be used as a driving signal of a modulator to modulate light, so that the optical signal is used to represent the multiple parts after each first element of the first data is split.

[0063] In some embodiments of the present invention, in step S103, the use of optical signals to represent the multiple parts after each first element of the first data is split includes: using a group of optical signals to represent the multiple parts after the first element is split, and using multiple groups of optical signals to respectively represent the multiple first elements. In an exemplary embodiment of the present invention, the use of multiple groups of optical signals to respectively represent the multiple first elements may include: modulating multiple paths of light according to the multiple groups of first electrical signals to generate multiple groups of optical signals respectively representing the multiple first elements. Modulating multiple paths of light according to the multiple groups of first electrical signals may be, for example, the first electrical signal directly drives a modulator to modulate the light, or may be, for example, converting the first electrical signal into a suitable electrical signal to drive the modulator through a signal conversion circuit. The present invention is not limited to this, and the present invention may also use other electro-optical conversion methods known in the art to convert the multiple groups of first electrical signals into multiple groups of optical signals.

[0064] In some embodiments of the present invention, in step S104, optically processing the optical signal includes performing optical processing such as modulation and interference on the optical signal. For example, a Mach-Zehnder interferometer may be used to perform interference processing on the optical signal to represent calculation of the corresponding multiple first elements.

[0065] The present invention can improve computing power through calculation in the photon domain by splitting the input data in the electronic domain and then performing calculation processing in the photon domain, and can achieve good accuracy even if the bit width of the input data is long. In addition, it can also reduce the difficulty of hardware implementation of the computing system, such as reducing the performance requirements of related hardware such as photoelectric conversion devices, analog-to-digital conversion, and digital-to-analog conversion, and reduce the difficulty of design and manufacturing.

[0066] Figure 2 The processing process of the photon computing method according to another embodiment of the present invention is shown. In this embodiment, the photon computing method proposed by the present invention includes: S101, obtaining first data, the first data includes multiple first elements, each of which represents a number; S102, in the electronic domain, splitting each first element in the first data into multiple parts; S103, in the photon domain, using optical signals to represent the multiple parts of each first element of the first data after being split; S104, optically processing the optical signal to represent the calculation of the multiple first elements; S105, converting the optical signal output after the optical processing into multiple groups of digital electrical signals; S106, performing accumulation operations on the numbers represented by the multiple groups of digital electrical signals.

[0067] Here, performing an accumulation operation on the numbers represented by the multiple groups of digital electrical signals means performing the accumulation operation in the digital electronic domain.

[0068] In some embodiments of the present invention, in step S105, converting the optical signal output after the optical processing into a plurality of groups of digital electrical signals includes: converting the optical signal output after the optical processing into an analog electrical signal by photoelectric conversion, such as using a photodiode, and then converting the analog electrical signal into a plurality of groups of digital electrical signals by analog-to-digital conversion. In some embodiments of the present invention, since the first element is split and then calculated separately, it is necessary to perform scaling operations on the split numbers in subsequent steps to restore the true calculation results.

[0069] Figure 3The processing process of the photon computing method according to another embodiment of the present invention is shown. In this embodiment, the photon computing method proposed by the present invention includes: S101, obtaining first data (for example, a vector), the first data includes multiple first elements, each of which represents a number; S102, in the electronic domain, splitting each first element in the first data into multiple parts; S103, in the photon domain, using an optical signal to represent the multiple parts of each first element of the first data after being split; S201, obtaining second data (for example, a matrix), the second data includes multiple second elements, each of which represents a number; S202, in the electronic domain, splitting each second element in the second data into multiple parts; S203, using a group of second electrical signals to represent the multiple parts of the second element after being split, and using multiple groups of second electrical signals to represent the multiple second elements respectively; S301, using the multiple groups of second electrical signals as control units of optical computing units (for example, which may include Mach-Zehnder interferometers) signal, the optical computing unit optically processes the multiple groups of optical signals under the control of the control signal to represent that each part of the first element of the first data is multiplied by each part of the corresponding second element in the second data; S302, converting the optically processed optical signal into an analog electrical signal, and performing a summation operation on the number (processing result) represented by the analog electrical signal to obtain a plurality of first summation results, wherein each of the first summation results represents the sum of a plurality of products obtained by multiplying a certain part of the first elements after being split by a certain part of the corresponding second elements after being split; S303, obtaining a plurality of intermediate results by respectively performing a mapping operation on the plurality of first summation results, wherein the mapping operation is to scale the first summation result or keep it unchanged, and at least one of the mapping operations is a scaling operation; S304, performing an accumulation operation on the plurality of intermediate results to obtain a second summation result.

[0070] The “sum operation” in step S302 may also be referred to as a first sum operation; and the accumulation operation in step S304 may be referred to as a second sum operation.

[0071] Exemplarily, in step S102, each first element in the first data may be split into multiple parts in the digital electronic domain, and in step S202, each second element in the second data may be split into multiple parts in the digital electronic domain.

[0072] In some embodiments, the first summation operation and the second summation operation are performed in the analog electronic domain and the digital electronic domain, respectively, which can improve the efficiency of the calculation and reduce the requirements for the design of the analog-to-digital conversion circuit. Among them, the present invention does not specifically limit the execution order of each step, as long as the purpose or function of the invention can be achieved. Some steps or sequences can be executed in parallel, sequentially, or alternately. Exemplarily, the execution order of steps S201 to S203 and steps S101 to S103 is not limited, and can be executed in parallel, sequentially, or alternately.

[0073] Exemplarily, the first data may include elements in a tensor, and the second data may include elements in a tensor. Exemplarily, the first data includes multiple elements in a vector or a matrix, and the second data includes multiple elements in a vector or a matrix. Exemplarily, the elements of the first data may include each element in a vector V, and the second data may include each element of a column in a matrix M. By performing a dot product operation (dot product operation) on the first data and the second data, at least a part of the multiplication calculation of the vector V and the matrix M can be completed. Among them, the dot product operation generally includes first performing multiplication operations on multiple first elements and corresponding multiple second elements respectively, and then summing the results of each multiplication operation.

[0074] In some embodiments of the present invention, the scaling process performed in step S303 may include the following processes or may be replaced by the following processes: converting the analog electrical signal representing the first summation result into a digital electrical signal and representing the first summation result in binary form; performing a shift process on the first summation result in binary form. Figure 7 Similarly, the 8-bit first element is split into the first high 4 bits and the first low 4 bits, and the 8-bit second element is split into the second high 4 bits and the second low 4 bits, wherein the dot product of the part corresponding to the first high 4 bits and the part corresponding to the second high 4 bits (i.e., the summation result in binary form) should be shifted left by 8 bits, the dot product of the part corresponding to the first high 4 bits and the part corresponding to the second low 4 bits should be shifted left by 4 bits, the dot product of the part corresponding to the second low 4 bits and the part corresponding to the second high 4 bits should be shifted left by 4 bits, and the dot product of the part corresponding to the second low 4 bits and the part corresponding to the second low 4 bits should be shifted left by 4 bits, and the dot product of the part corresponding to the second low 4 bits and the part corresponding to the second high 4 bits shall not be shifted.

[0075] In step S304, the embodiment of the present invention performs an accumulation operation (second summing operation) on the plurality of intermediate results, and the result is output as the calculation result of the mathematical operation required for the first data and the second data. It should be understood that the present invention is not only applicable to binary data, but also to data of other bases.

[0076] In an exemplary embodiment, the photon computing method includes obtaining first data, the first data including a plurality of first elements, each of which represents a number; in the photon domain, using an optical signal to represent the first data; optically processing the optical signal to represent the calculation of the corresponding plurality of first elements; in the analog electronic domain, performing a first summation operation on the processing result represented by the analog electrical signal; and in the digital electronic domain, performing a second summation operation on the processing result represented by the digital electrical signal. Through the first summation operation and the second summation operation, the accuracy of photon computing can be improved and the performance requirements of certain hardware of the photon computing device can be reduced.

[0077] In some embodiments of the present invention, the method further includes converting the optically processed optical signal into the analog electrical signal; the first summing operation includes performing a summing operation based on the analog electrical signal to obtain a plurality of first summing results.

[0078] In some embodiments of the present invention, the processing result represented by the digital electrical signal includes the first summation result; wherein the second summation operation includes: generating a second summation result according to the first summation result.

[0079] In some implementations of the present invention, the method further includes performing a shift operation on at least one of the first summation results represented by the digital electrical signal, and performing the second summation operation after the shift operation.

[0080] Corresponding to the photon computing method, the present invention also provides a photon computing device. Figure 4 A photonic computing device 10 according to an embodiment of the present invention is shown, and the device includes: a first data splitting module 100, configured to split each first element in the first data into multiple parts in the electronic domain, wherein the first data includes multiple first elements, and each first element represents a number; an optical processing module 300, configured to use an optical signal in the photon domain to represent the multiple parts of each first element of the first data after being split, and optically process the optical signal, thereby representing calculation of the multiple first elements.

[0081] In some embodiments of the present invention, the first data splitting module 100 splits each first element in the first data into multiple parts in the electronic domain, including: using a group of first electrical signals to represent the multiple parts after the first element is split, and using multiple groups of first electrical signals to respectively represent the multiple first elements.

[0082] In some embodiments of the present invention, the optical processing module 300 uses an optical signal in the photon domain to represent the multiple parts after each first element of the first data is split, including: using a group of optical signals to represent the multiple parts after the first element is split, and using multiple groups of optical signals to represent the multiple first elements respectively. In some embodiments of the present invention, the optical processing module 300 includes an optical modulator, which is configured to modulate multiple light channels according to the multiple groups of first electrical signals to generate multiple groups of optical signals representing multiple first elements respectively. Modulating multiple light channels according to the multiple groups of first electrical signals can be, for example, the first electrical signal directly drives the modulator to modulate the light, or it can be, for example, converting the first electrical signal into a suitable electrical signal to drive the modulator through a signal conversion circuit. In some embodiments of the present invention, the optical processing module 300 includes an optical computing unit, which is configured to optically process the optical signal, thereby indicating that the multiple first elements are calculated. Wherein, optically processing the optical signal includes optical processing such as modulation and interference of the optical signal. For example, the optical computing unit includes a Mach-Zehnder interferometer to perform interference processing on the optical signal.

[0083] Figure 5 FIG. 2 shows a photonic computing device 20 according to another embodiment of the present invention. Figure 4 In comparison, the main difference between the two is that the photonic computing device of this embodiment further includes a second data splitting module 200, which is configured to split each second element in the second data into multiple parts in the electronic domain, wherein the second data includes multiple second elements, and each second element represents a number. In some embodiments, the second data splitting module 200 splits each second element in the second data into multiple parts in the electronic domain, including: using a group of second electrical signals to represent the multiple parts after the second element is split, and using multiple groups of second electrical signals to respectively represent the multiple second elements.

[0084] In some embodiments of the present invention, the optical processing module 300 includes an optical computing unit. The optical processing of the optical signal by the optical module 300 includes: using the multiple groups of second electrical signals from the second data splitting module 200 as control signals of the optical computing unit; and using the optical computing unit to optically process the multiple groups of optical signals from the first data splitting module 100 under the control of the control signal. The optical computing unit may include multiple optical multipliers. Optionally, the optical computing unit includes a Mach-Zehnder interferometer.

[0085] In some embodiments of the present invention, the first data includes multiple elements in a vector or a matrix, and the second data includes multiple elements in a vector or a matrix.

[0086] Figure 6 FIG. 3 shows a photonic computing device 30 according to another embodiment of the present invention. Figure 5 Compared with the device shown in the figure, the photonic computing device 30 of this embodiment also includes: a photoelectric conversion module 400, which is configured to convert the optical signal output after being processed by the optical processing module 300 into an analog electrical signal; a summation processing module 500, which is configured to perform summation processing (summation operation) on the numbers represented by the analog electrical signal to obtain multiple summation results; a scaling processing module 600, which is configured to perform scaling processing on at least one of the multiple summation results; and an accumulation module 700, which is configured to accumulate the summation results that have been scaled and those that have not been scaled.

[0087] In some embodiments of the present invention, instead of the scaling processing module 600, an analog-to-digital conversion module and a shift module (eg, Figure 8 The analog-to-digital conversion module 800 and the shift module 900 in the embodiment of the present invention are as follows: wherein the analog-to-digital conversion module includes an analog-to-digital converter (ADC), which is configured to convert the analog electrical signal representing the summation result into a digital electrical signal and represent the summation result in binary form; the shift module is configured to perform a shift operation on at least one of the summation results in binary form; and the accumulation module 700 is configured to accumulate the summation results that have undergone the shift operation and the summation results that have not undergone the shift operation in the multiple summation results. In an optional embodiment, the scaling processing module 600 may include the shift module.

[0088] Accordingly, an embodiment of the present invention further provides a computer device, which includes the photonic computing device described in any embodiment of the present invention. In some embodiments, the computer device may include, but is not limited to, a personal computer, a server, or a network device.

[0089] The embodiments of the present invention can be used for dot product calculation, and dot product (dot product) can generally be used for vector-vector multiplication, vector-matrix multiplication, matrix-matrix multiplication, etc. Taking vector multiplication by matrix as an example, according to the multiplication rule of vector and matrix, taking the multiplication of 1×2 vector V1 and 2×2 matrix M1 as an example (that is, the vector is 1 row and 2 columns; the matrix is ​​2 rows and 2 columns), which mainly involves dot product operation, wherein each column of the matrix can be regarded as a vector, and during calculation, it can be considered that the vector V1 is dot-producted with the first column and the second column of the matrix M1 respectively, and two dot products are performed.

[0090] like Figure 8As shown, taking the implementation of a dot product calculation as an example, for example, taking the implementation of the dot product of the vector V1 and the first column of the matrix M1 as an example, it is necessary to multiply each element in the vector V1 with the corresponding element in the first column of the matrix M1 (scalar multiplication), and then sum each product. Figure 8 The partial structure of the photon computing device and some data flows are shown. For example, each element in the vector and matrix is ​​8 bits wide.

[0091] In the electronic domain, input data is received, such as an 8-bit vector, that is, each element in the vector is represented by an 8-bit width number, and each element of the vector is split into two parts: the lower 4 bits and the upper 4 bits (i.e., the lower part and the upper part). For each element of the vector, the lower 4 bits are converted into an analog electrical signal A1 through a digital-to-analog converter (DAC) 811, and the lower 4 bits are represented by the analog electrical signal A1; the upper 4 bits are converted into an analog electrical signal A2 through a DAC 812, and the upper 4 bits are represented by the analog electrical signal A2. For the vector V1, which contains two elements, in order to represent each part after the two elements are split, 4 analog electrical signals are required. Figure 8 Only the digital-to-analog converter 811 and the digital-to-analog converter 812 are shown, and the number of digital-to-analog converters can be determined according to needs, such as the number of elements in a vector and the number of multiple parts after splitting.

[0092] In the photonic domain, the optical modulator ( Figure 8 (not shown) modulates one light according to the analog electrical signal A1 representing the lower 4 bits to obtain an optical signal representing the lower 4 bits, and modulates one light according to the analog electrical signal A2 representing the upper 4 bits to obtain an optical signal representing the upper 4 bits, wherein the optical modulator is coupled to the DAC and the optical multiplier respectively ( Figure 8 For each element of the vector V1, the optical signal representing the lower 4 bits is input to the optical multiplier 821 of the optical processing module 300, and the optical signal representing the upper 4 bits is input to the optical multiplier 822 of the optical processing module 300, and the first column element of the matrix M1 is also input to the optical multiplier 821 and the optical multiplier 822.

[0093] Exemplarily, the first column of the 2×2 matrix M1 is used as the second data, and each element of the first column is also split into a high-order part (high 4 bits) and a low-order part (low 4 bits).

[0094] Exemplarily, in the optical multiplier 821, the low-order parts of each element of the vector V1 are multiplied with the low-order parts of (each element of) the first column of the 2×2 matrix, respectively, and the results of the multiple multiplications can be represented by multi-path light and then input into the photoelectric conversion submodule 831 for processing; in addition, in the optical multiplier 821, the low-order parts of each element of the vector V1 are multiplied with the high-order parts of (each element of) the first column of the 2×2 matrix, respectively, and the results of the multiple multiplications can be represented by multi-path light and then input into the photoelectric conversion submodule 832 for processing.

[0095] Exemplarily, in the optical multiplier 822, the high-order parts of each element of the vector V1 are multiplied with the low-order parts of the first column (each element) of the 2×2 matrix, respectively, and the results of multiple multiplication calculations can be represented by multi-path light and then input into the photoelectric conversion submodule 833 for processing; in addition, in the optical multiplier 822, the high-order parts of each element of the vector V1 are multiplied with the high-order parts of the first column (each element) of the 2×2 matrix, respectively, and the results of multiple multiplication calculations can be represented by multi-path light and then input into the photoelectric conversion submodule 834 for processing.

[0096] The first column of the 2×2 matrix is ​​used as the second data, which is split into a high-order part and a low-order part. In some embodiments, the multiplication calculation includes: using the analog electrical signal corresponding to the high-order part or the low-order part of the elements of the 2×2 matrix as a control signal, controlling the optical multiplier to process the optical signal input to the optical multiplier, for example, controlling the Mach-Zehnder interferometer in the optical multiplier to process each optical signal input to the optical multiplier.

[0097] Among them, the optical multipliers 821 and 822 can be used as a part of the optical computing unit of each embodiment of the present invention, and the optical multiplier 821 can realize the multiplication of multiple numbers by multiple other numbers, and the optical multiplier 822 can realize the multiplication of multiple numbers by multiple other numbers. Exemplarily, in each embodiment of the present invention, the optical computing unit may include multiple optical multipliers, and the optical multiplier can realize the multiplication of multiple numbers by multiple other numbers, and the optical processing module may include multiple optical computing units. Exemplarily, the number of optical multipliers can be determined according to the multiple parts of the elements of the first data, for example, the multiple parts after the splitting correspond to multiple optical multipliers respectively.

[0098] The output of the optical multiplier 821 (i.e., the processed optical signal) is converted into an analog electrical signal by the photoelectric conversion submodules 831 and 832 of the photoelectric conversion module 400, respectively; the output of the optical multiplier 822 (i.e., the processed optical signal) is converted into an analog electrical signal by the photoelectric conversion submodules 833 and 834, respectively. In some embodiments, each photoelectric conversion submodule includes two photodiodes and outputs two analog electrical signals. Specifically, the photoelectric conversion submodules 831, 832, 833, and 834 each output two analog electrical signals, which are then input into the summation processing module 500 for summation processing to obtain a summation result (which belongs to a dot product), and the summation result is input into the analog-to-digital conversion module 800 for analog-to-digital conversion to obtain a dot product represented by a digital signal. Figure 8 As shown, the summing processing module 500 includes summing units 871 , 872 , 873 and 874 , and the analog-to-digital conversion module 800 includes ADCs 841 , 842 , 843 , 844 . The two analog electrical signals output by the photoelectric conversion submodule 831 are input to the summing unit 871 for summing processing to obtain a summing result (first dot product), which is converted into a first dot product in 8-bit binary form by an analog-to-digital converter (ADC) 841. The first dot product is the dot product of the low-order part of the vector and the low-order part of the first column of the matrix; the two analog electrical signals output by the photoelectric conversion submodule 832 are input to the summing unit 872 for summing processing to obtain a summing result (second dot product), which is converted into a second dot product in 8-bit binary form by ADC 842. The second dot product is the dot product of the high-order part of the vector and the low-order part of the first column of the matrix; the two analog electrical signals output by the photoelectric conversion submodule 833 are input to the summing unit 873 for summing processing to obtain a summing result (third dot product), which is converted into a second dot product in 8-bit binary form by ADC 842. 843 is converted into a third dot product in 8-bit binary form, and the third dot product is the dot product of the low-order part of the vector and the high-order part of the first column of the matrix; the two analog electrical signals output by the photoelectric conversion submodule 834 are input into the summing unit 874 for summing processing to obtain a summing result (a fourth dot product), and the summing result is converted into a fourth dot product in 8-bit binary form by ADC 844, and the fourth dot product is the dot product of the high-order part of the vector and the high-order part of the first column of the matrix. In some embodiments, before each dot product analog electrical signal is input into the ADC, each dot product analog electrical signal can be amplified, for example, a transimpedance amplifier can be used to amplify the amplitude of these analog electrical signals.

[0099] In the digital electronic domain, the first dot product output by ADC 841 is the dot product of the low-order part of the vector and the low-order part of the first column of the matrix, so the first dot product does not need to be shifted. As a result, the 8-bit data output by ADC 841 is directly input to accumulator 860 without passing through shift module 900.

[0100] The second dot product output by ADC 842 is the dot product of the high-order part of the vector and the low-order part of the first column of the matrix, so the second dot product needs to be shifted left by 4 bits. As a result, the 8-bit data output by ADC 842 is input to the shift module 900, which performs a 4-bit left shift (expanding 2^4 times) operation 851 on it, and the shifted data is input to the accumulator 860.

[0101] The third dot product output by ADC 843 is the dot product of the low-order part of the vector and the high-order part of the first column of the matrix, so the third dot product needs to be shifted left by 4 bits. As a result, the 8-bit data output by ADC 843 is input to the shift module 900, which performs a 4-bit left shift (enlarged by 2^4 times) operation 852 on it, and the shifted data is input to the accumulator 860.

[0102] The fourth dot product output by ADC 844 is the product of the high-order part of the vector and the high-order part of the first column of the matrix, so the fourth dot product needs to be shifted left by 8 bits. As a result, the 8-bit data output by ADC 844 is input to the shift module 900, and the shift module 900 performs an operation 853 of shifting left by 8 bits (expanding by 2^8 times) on it, and the shifted data is input to the accumulator 860.

[0103] The accumulator 860 accumulates the received summation results without shifting and after shifting to obtain a 16-bit result, which is output as the calculation result of a column (e.g., the first column) in a 1×2 vector and a 2×2 matrix, wherein each element in the vector and the matrix is ​​8 bits. The accumulator 860 can be used as Figure 6 The example of the accumulation module 700 shown, or the accumulation module 700 may include the accumulator 860 .

[0104] For ease of understanding, the following Fig. 9 and Fig.10 , a specific example is used to illustrate the present invention of multiplying a vector V1 with a complete matrix M1. Fig. 9 As shown, the first data is a vector V1, V1 is (23 204), and the first data includes two first elements, which are 32 and 204 respectively; the second data includes a 2×2 matrix M1, that is:

[0105]

[0106] like Fig.10 As shown, the elements of the vector and matrix are split into two parts according to the bit position, including the first part, i.e., the high 4 bits (high part), and the second part, i.e., the low 4 bits (low part). After the split, the high part of each element of the vector constitutes a new vector, and the low part of each element constitutes another new vector. Similarly, after the split, the high part of each element of the matrix constitutes a new matrix, and the low part of each element of the matrix constitutes another new matrix.

[0107] Specifically, the binary number of element 32 in the vector is 0b00100000, which is split into: 0b0010 (high part) (corresponding to the decimal number 2), 0b0000 (low part) (corresponding to the decimal number 0); the binary number of element 204 in the vector is 0b11001100, which is split into: 0b1100 (high part) (corresponding to the decimal number 12), 0b1100 (low part) (corresponding to the decimal number 12). In a similar way, the elements in the 2×2 matrix are split (see Fig.10 ). Among them, "0b" represents the binary form of the number.

[0108] For ease of explanation, the following description is in the form of decimal numbers. It should be understood that the system may actually process binary numbers.

[0109] After the splitting, the first part (high-order part) of the plurality of first elements in the vector includes (2 12), and the second part (low-order part) of the plurality of first elements includes (0 12).

[0110] The first part (high-order part) corresponding to each second element in the matrix after splitting is:

[0111]

[0112] The second part (low-order part) corresponding to each second element in the matrix after splitting is:

[0113]

[0114] Four groups of results are obtained by multiplying two parts of the first element with the corresponding parts of the second element (i.e., dot products), wherein the two-by-two multiplication operation can be implemented in the photon domain, and each group of the four groups of results includes two first summation results (two dot products), and each first summation result represents the sum of multiple products obtained by multiplying a certain part of the first element after being split with a certain part of the corresponding second element after being split. Fig.10 As shown, according to the dot product of the vector and the matrix, they are:

[0115] The dot product results of the high-order parts of the first elements and the high-order parts of the corresponding second elements are: 72 and 58, where 72=2×6+12×5 and 58=2×11+12×3;

[0116] The dot product of the low-order parts of multiple first elements and the high-order parts of the corresponding second elements: 60 and 36;

[0117] The dot product of the high-order parts of multiple first elements and the low-order parts of the corresponding second elements: 196 and 12;

[0118] The dot product results of the low-order parts of multiple first elements and the low-order parts of the corresponding second elements are: 168 and 12.

[0119] In the electronic domain, Fig.10 As shown, due to the splitting, the dot product result of the high-order parts of multiple first elements and the corresponding high-order parts of the second elements should be shifted left by 8 bits, and for decimal numbers, it should be multiplied by 2^8. Therefore, the dot product results of the two become: 72×(2^8)=18432 and 58×(2^8)=14848.

[0120] Due to the splitting, the dot product results of the low-order parts of multiple first elements and the high-order parts of the corresponding second elements should be shifted left by 4 bits, and for decimal numbers, they should be multiplied by 2^4. Therefore, the dot product results of the two become: 60×(2^4)=960 and 36×(2^4)=576.

[0121] Due to the splitting, the dot product results of the high-order parts of multiple first elements and the corresponding low-order parts of the second elements should be shifted left by 4 bits, and for decimal numbers, they should be multiplied by 2^4. Therefore, the dot product results of the two become: 196×(2^4)=3136 and 12×(2^4)=192.

[0122] Due to the splitting, the dot product results of the low-order parts of multiple first elements and the low-order parts of the corresponding second elements do not need to be shifted, so the dot product results of the two are still: 168 and 12.

[0123] Finally, the above results are accumulated (summed) to obtain two second summation results, namely:

[0124] 18432+960+3136+168=22696,14848+576+192+12=15628

[0125] Therefore, the vector (32 204) and the matrix The result of the multiplication is (22696 15628).

[0126] The above description is based on the example of splitting an 8-bit number into two parts and a 2×2 matrix, but the present invention is not limited to this. The number of parts into which the elements in the vector and the matrix are split and the number of bits in each part can be the same or different. For example, an 8-bit number is split into two parts of 3 bits and 5 bits according to the bit position. For another example, a 16-bit number is split into three parts of 5 bits, 5 bits, and 6 bits according to the bit position.

[0127] Those skilled in the art should understand that what is disclosed above is only an implementation mode of the present invention, and it certainly cannot be used to limit the scope of rights for patent protection requested by the present invention. Equivalent changes made according to the implementation mode of the present invention are still within the scope covered by the claims of the present invention.

Claims

1. A method for photon computing, comprising: Acquire first data, where the first data includes a plurality of first elements, each of which represents a number; In the electronic domain, splitting each first element in the first data into a plurality of parts; In the photon domain, an optical signal is used to represent the multiple parts after each first element of the first data is split; The optical signal is optically processed to represent a calculation performed on the plurality of first elements.

2. The method according to claim 1, characterized in that The splitting each first element in the first data into a plurality of parts comprises: A group of first electrical signals is used to represent the multiple parts after the first element is split, and multiple groups of first electrical signals are used to represent the multiple first elements respectively.

3. The method according to claim 2, characterized in that The multiple parts obtained by splitting each first element of the first data using an optical signal include: A group of optical signals is used to represent the multiple parts after the first element is split, and multiple groups of optical signals are used to represent the multiple first elements respectively.

4. The method according to claim 3, characterized in that The using a plurality of groups of optical signals to respectively represent the plurality of first elements comprises: The multiple paths of light are modulated according to the multiple groups of first electrical signals to generate multiple groups of optical signals respectively representing multiple first elements.

5. The method according to claim 3, characterized in that: The method further comprises: Acquire second data, where the second data includes a plurality of second elements, and each second element represents a number; The calculation includes multiplying each first element of the first data by a corresponding second element of the second data.

6. The method according to claim 5, characterized in that The multiplying each first element of the first data by the corresponding second element of the second data comprises: using an electrical signal to represent the second data; using the electrical signal representing the second data as a control signal of the optical computing unit, Under the control of the control signal, the optical computing unit is used to optically process the plurality of groups of optical signals.

7. The method according to claim 5, characterized in that The method further comprises: In the electronic domain, each second element in the second data is split into a plurality of parts.

8. The method according to claim 7, characterized in that The step of splitting each second element in the second data into a plurality of parts in the electronic domain comprises: A group of second electrical signals is used to represent the multiple parts after the second element is split, and multiple groups of second electrical signals are used to represent the multiple second elements respectively.

9. The method according to claim 8, characterized in that The multiplying each first element of the first data by the corresponding second element of the second data comprises: using the plurality of sets of second electrical signals as control signals of the optical computing unit, Under the control of the control signal, the optical computing unit is used to optically process the plurality of groups of optical signals.

10. The method according to claim 9, characterized in that The optical computing unit includes a Mach-Zehnder interferometer.

11. The method according to claim 9, characterized in that The first data includes at least a portion of elements in a vector or a matrix, and the second data includes at least a portion of elements in a vector or a matrix.

12. The method according to claim 1, characterized in that The method further comprises: Converting the optical signal output after the optical processing into a plurality of sets of digital electrical signals; An accumulation operation is performed on the numbers represented by the multiple groups of digital electrical signals.

13. The method according to claim 12, characterized in that The step of splitting each first element in the first data into a plurality of parts in the electronic domain comprises: In the electronic domain, the first element is split along the bits.

14. The method according to claim 12, characterized in that The method further comprises: Before performing the accumulation operation, a scaling process is performed on the number represented by the digital electrical signal, or a shift operation is performed on the number represented in binary form.

15. The method according to claim 7, characterized in that The splitting operation on the first element and the second element includes: in the electronic domain, splitting the first element and the second element along the bit position.

16. The method according to claim 15, characterized in that The multiplying each first element of the first data by the corresponding second element of the second data comprises: In the photon domain, optical processing representing a multiplication operation is performed on the multiple parts obtained by splitting the first element and the multiple parts obtained by splitting the second element.

17. The method according to claim 16 further comprises: The optical signal after the optical processing is converted into an analog electrical signal, and the numbers represented by the analog electrical signal are summed to obtain multiple first summation results, each of which represents the sum of multiple products obtained by multiplying a certain part of the first elements after being split by a certain part of the corresponding second elements after being split.

18. The method according to claim 17, characterized in that The method further comprises: A plurality of intermediate results are obtained by respectively performing mapping operations on the plurality of first summation results, wherein the mapping operations are scaling the first summation results or keeping them unchanged, and at least one of the mapping operations is scaling; And performing an accumulation operation on the multiple intermediate results to obtain a second summation result.

19. The method according to claim 18, characterized in that At least one of the plurality of intermediate results remains unchanged as its corresponding first summation result.

20. The method according to claim 17, characterized in that The method further comprises: converting the analog electrical signals representing the plurality of first summation results into digital electrical signals, and representing the plurality of first summation results in binary form; A shift process is performed on at least two first summation results in binary form.

21. A photonic computing device, comprising: A first data splitting module is configured to split each first element in the first data into a plurality of parts in the electronic domain, wherein the first data includes a plurality of the first elements, and each of the first elements represents a number; and The optical processing module is configured to use an optical signal in a photon domain to represent the multiple parts of each first element of the first data after being split, and optically process the optical signal to represent calculation of the multiple first elements.

22. The photonic computing device according to claim 21, characterized in that: The first data splitting module splits each first element in the first data into multiple parts in the electronic domain, including: A group of first electrical signals is used to represent the multiple parts after the first element is split, and multiple groups of first electrical signals are used to represent the multiple first elements respectively.

23. The photonic computing device according to claim 22, characterized in that: The optical processing module uses an optical signal in the photon domain to represent the multiple parts after each first element of the first data is split, including: A group of optical signals is used to represent the multiple parts after the first element is split, and multiple groups of optical signals are used to represent the multiple first elements respectively.

24. The photonic computing device according to claim 23, characterized in that: The using a plurality of groups of optical signals to respectively represent the plurality of first elements comprises: The multiple paths of light are modulated according to the multiple groups of first electrical signals to generate multiple groups of optical signals respectively representing multiple first elements.

25. The photonic computing device according to claim 23, characterized in that: The photonic computing device further comprises: The second data splitting module is configured to split each second element in the second data into multiple parts in the electronic domain, wherein the second data includes multiple second elements, and each second element represents a number.

26. The photonic computing device according to claim 25, characterized in that: The second data splitting module splits each second element in the second data into multiple parts in the electronic domain, including: A group of second electrical signals is used to represent the multiple parts after the second element is split, and multiple groups of second electrical signals are used to represent the multiple second elements respectively.

27. The photonic computing device according to claim 26, characterized in that: The optical processing module includes an optical computing unit; The optical processing module optically processes the optical signal, including: using the plurality of sets of second electrical signals as control signals of the optical computing unit, Under the control of the control signal, the optical computing unit is used to optically process the plurality of groups of optical signals.

28. The photonic computing device according to claim 27, characterized in that: The optical computing unit includes a Mach-Zehnder interferometer.

29. The photonic computing device according to claim 27, characterized in that: The first data includes at least a portion of elements in a vector or a matrix, and the second data includes at least a portion of elements in a vector or a matrix.

30. The photonic computing device according to any one of claims 21 to 29, characterized in that: The photonic computing device further comprises: an optical-electrical conversion module, configured to convert the optical signal output after the optical processing into an analog electrical signal; A summing processing module is configured to perform summing processing on the numbers represented by the analog electrical signals to obtain a plurality of summing results; a scaling processing module configured to perform scaling processing on at least one of the plurality of summation results; and The accumulation module is configured to accumulate the summation result after the scaling process and the summation result before the scaling process.

31. The photonic computing device according to any one of claims 21 to 29, characterized in that: The photonic computing device further comprises: an optical-electrical conversion module, configured to convert the optical signal output after the optical processing into an analog electrical signal; A summing processing module is configured to perform summing processing on the numbers represented by the analog electrical signals to obtain a plurality of summing results; an analog-to-digital conversion module, configured to convert the analog electrical signal representing the summation result into a digital electrical signal, and represent the summation result in binary form; a shift module configured to perform a shift operation on at least one of the summation results in binary form; and The accumulation module is configured to accumulate the summation results that have undergone the shift operation and the summation results that have not undergone the shift operation among the multiple summation results.

32. A method of photon computing, comprising: Acquire first data, where the first data includes a plurality of first elements, each of which represents a number; In the photon domain, using an optical signal to represent the first data; Optically processing the optical signal, thereby indicating that calculations are performed on the corresponding plurality of first elements; In the analog electronic domain, a first summation operation is performed on the processing result represented by the analog electrical signal; In the digital electronic domain, a second summing operation is performed on the processing result represented by the digital electrical signal.

33. The method according to claim 32, characterized in that It also includes converting the optical signal that has undergone the optical processing into the analog electrical signal; the first summing operation includes performing a summing operation according to the number represented by the analog electrical signal to obtain a plurality of first summing results.

34. The method according to claim 33, characterized in that The processing result represented by the digital electrical signal includes the first summation result; wherein the second summation operation includes: generating a second summation result according to the first summation result.

35. The method according to claim 34, characterized in that The method further includes performing a shift operation on at least one of the first summation results represented by the digital electrical signal, and performing the second summation operation after the shift operation.

36. The method according to claim 33, characterized in that The method also includes performing scaling processing on at least one of the plurality of first summation results to obtain at least one corresponding intermediate result.

37. A computer device, characterized in that: A photonic computing device comprising any one of claims 21 to 31.

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