Multi-core processor adaptive deployment method and device, terminal equipment and storage medium

Abstract

The application discloses a kind of multi-core processor adaptive deployment method, device, terminal equipment and storage medium, wherein method includes: the running load of each core of processor is obtained;Wherein, part of core in the processor is deployed with management operating system in SMP architecture, other core is deployed with real-time operating system in SMP architecture;The management operating system and real-time operating system are deployed on software platform in AMP architecture;According to the running load of each core, the core of processor is adaptively deployed.The application uses AMP / SMP hybrid deployment architecture to consider high real-time, real-time and processor capacity.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of multi-core processing, and in particular to a multi-core processor adaptive deployment method and device, a terminal device and a storage medium. BACKGROUND

[0002] In power secondary equipment, embedded systems have been more and more widely applied, and almost every intelligent electronic device designed and produced at present belongs to an embedded system. With the rapid development of embedded processor technology, multi-core processors are increasingly used. In a multi-core system, there are two types of processing architectures, including a symmetric multiprocessing (SMP) architecture and an asymmetric multiprocessing (AMP) architecture. In the SMP mode, all processors share the same physical address space, and a single operating system schedules multiple cores, thereby improving the processing capacity of a single system by multiple times. In the AMP mode, each processor has its own local memory, and the cores independently run their own operating systems and application programs. Generally, products with high reliability and real-time requirements are suitable for using the AMP bare run scheme, and products with low real-time requirements but complex functions and high processor capacity requirements are suitable for using the SMP operating system scheme.

[0003] However, some products require both reliability and real-time performance and high processor capacity. For example, a differential protection consistency tester needs to test the time interval and time delay of differential transmission Ethernet frame messages with high real-time performance, and also needs to test the sampling precision and sampling synchronization of input analog and digital quantities of a differential protection device. Such products usually use an AMP architecture running mode of 1 management operating system plus multiple real-time bare cores. In this mode, each core needs to independently execute programs and share memory areas, and when multiple cores interact, inter-core communication or shared memory needs to be used, which is prone to memory read-write conflicts and other problems. SUMMARY

[0004] The present application provides a multi-core processor adaptive deployment method, device, terminal device and storage medium to solve the technical problem of memory read-write conflicts in the existing processor architecture mode used by products with high requirements for reliability, real-time performance and processor performance.

[0005] To solve the above technical problems, the present application embodiment provides a multi-core processor adaptive deployment method, comprising:

[0006] acquire a running load of each core of a processor; wherein, in the processor, part of the cores are deployed with a management operating system in an SMP architecture, and other cores are deployed with a real-time operating system in an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture;

[0007] adaptively deploy the cores of the processor according to the running load of each core.

[0008] As a preferred solution, the cores of the management operating system include a first master core and a plurality of first slave cores; and the cores of the real-time operating system include a second master core and a plurality of second slave cores.

[0009] As a preferred solution, the adaptively deploying the cores of the processor according to the running load of each core includes:

[0010] calculating an average load ratio of the cores of the management operating system according to the running load of each core;

[0011] when the average load ratio of the cores of the management operating system is less than a first preset load ratio within a preset time length, performing the following operations:

[0012] dynamically switching all processes in the management operating system to the first master core, and resetting all the first slave cores;

[0013] notifying the second master core by the first master core through inter-core communication, so that the second master core starts the first slave cores as real-time operating system slave core mode.

[0014] As a preferred solution, the calculation formula of the average load ratio of the cores of the management operating system is:

[0015]

[0016] In the formula, η1 represents the average load ratio of the cores of the management operating system; T represents a time interval; N represents the number of cores of the management operating system; Q 1,i represents the running load of the i-th core of the management operating system.

[0017] As a preferred solution, the adaptively deploying the cores of the processor according to the running load of each core includes:

[0018] calculating a load ratio of the second master core according to the running load of each core;

[0019] when the load ratio of the second master core is greater than a second preset load ratio, performing the following operations:

[0020] the second master core informs the first master core through inter-core communication, so that the first master core resets all the first slave cores and starts all the first slave cores as management operating system slave cores.

[0021] the first master core informs the second master core through inter-core communication, so that the second master core starts the first slave cores as real-time operating system slave cores.

[0022] As a preferred solution, after the master core of the real-time operating system starts the cores other than the master core in the management operating system as real-time operating system slave cores, the method further comprises:

[0023] when the load proportion of the master core of the real-time operating system is less than or equal to the second preset load proportion, the following operation is performed:

[0024] switch all the processes of the first slave cores to the cores of the real-time operating system, and reset all the first slave cores;

[0025] the second master core informs the first master core through inter-core communication, so that the first master core resets all the first slave cores and starts all the first slave cores as management operating system slave cores.

[0026] As a preferred solution, the calculation formula of the load proportion of the master core of the real-time operating system is:

[0027]

[0028] In the formula, η2 represents the load proportion of the master core of the real-time operating system; T represents a time interval; and Q2 represents the running load of the master core of the real-time operating system.

[0029] On the basis of the above-mentioned embodiments, another embodiment of the present application provides a multi-core processor adaptive deployment device, comprising a data acquisition module and an adaptive deployment module.

[0030] The data acquisition module is configured to acquire the running load of each core of a processor; wherein part of the cores of the processor are deployed with a management operating system in an SMP architecture, and other cores are deployed with a real-time operating system in an SMP architecture; and the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture.

[0031] The adaptive deployment module is configured to adaptively deploy the cores of the processor according to the running load of each core.

[0032] On the basis of the above-mentioned embodiments, a terminal device is provided in another embodiment of the present application, which comprises a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, and the processor implements the multi-core processor adaptive deployment method according to the above-mentioned embodiments of the present application when executing the computer program.

[0033] On the basis of the above-mentioned embodiments, a storage medium is provided in another embodiment of the present application, which comprises a stored computer program, wherein the storage medium controls a device where the storage medium is located to execute the multi-core processor adaptive deployment method according to the above-mentioned embodiments of the present application when the computer program is running.

[0034] Compared with the prior art, the embodiments of the present application have the following beneficial effects:

[0035] The present application obtains the running load of each core of a processor, wherein part of the cores in the processor are deployed with a management operating system in an SMP architecture, and the other cores are deployed with a real-time operating system in an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture; and the cores of the processor are adaptively deployed according to the running load of each core. The present application adopts an AMP / SMP hybrid deployment architecture, and the management operating system and the real-time operating system are deployed on the same software platform in an AMP architecture, and each operating system is deployed in an SMP architecture to implement high-level applications of each core of the processor, which takes into account high real-time performance, real-time performance, and processor capability. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figure 1 is a flowchart of a multi-core processor adaptive deployment method provided by an embodiment of the present application;

[0037] Figure 2 is a structural diagram of a multi-core processor hybrid dynamic deployment provided by an embodiment of the present application;

[0038] Figure 3 is a structural diagram of a multi-core processor hybrid dynamic deployment provided by an embodiment of the present application;

[0039] Figure 4 is a structural diagram of a multi-core processor hybrid dynamic deployment provided by an embodiment of the present application;

[0040] Figure 5 is a structural diagram of a multi-core processor hybrid dynamic deployment provided by an embodiment of the present application;

[0041] Figure 6 is a structural diagram of a multi-core processor adaptive deployment device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0042] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative effort belong to the protection scope of the present application.

[0043] Embodiment one

[0044] Please refer to Figure 1 A multi-core processor adaptive deployment method provided by an embodiment of the present application comprises:

[0045] S1, obtaining the running load of each core of a processor; wherein part of the cores of the processor are deployed with a management operating system in an SMP architecture, and other cores are deployed with a real-time operating system in an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture.

[0046] S2, adaptively deploying the cores of the processor according to the running load of each core.

[0047] It should be noted that the present application provides a multi-core processor adaptive deployment method based on AMP / SMP hybrid dynamic deployment, and the management operating system and the real-time operating system are deployed on the same software platform in an AMP architecture, and each operating system is deployed in an SMP architecture to implement high-level applications of each core of the processor.

[0048] For example, a multi-core processor is used in a tester, an AMP architecture is deployed on a software platform, and a management operating system and a real-time operating system are simultaneously run, and an SMP architecture is deployed between each core of the processor in each operating system, so as to implement AMP / SMP hybrid dynamic deployment.

[0049] In this embodiment, the operating system automatically counts the running load of each core and stores the running load data of each core into a shared memory, and adaptively deploys the running state of each core in real time and dynamically based on the running load and through inter-core communication, so as to meet the real-time and complexity requirements of data processing.

[0050] In a preferred embodiment, the cores of the management operating system comprise a first master core and a plurality of first slave cores, and the cores of the real-time operating system comprise a second master core and a plurality of second slave cores.

[0051] In this embodiment, a four-core processor of a tester is taken as an example, and please refer to Figure 2, the software platform deploys an AMP architecture, and simultaneously runs a management operating system and a real-time operating system, wherein cores Core0 and Core1 deploy the management operating system in an SMP architecture, Core0 is defined as a master core and Core1 is defined as a slave core, and are used for file management, protocol communication, human-computer interaction and other high-level application functions; cores Core2 and Core3 deploy the real-time operating system in an SMP architecture, Core2 is defined as a master core and Core3 is defined as a slave core, Core2 performs functions such as acquisition operation and Ethernet frame receiving, and Core3 performs functions such as input and output and analog output.

[0052] In a preferred embodiment, the adaptive deployment of the cores of the processor according to the running load of each core comprises:

[0053] According to the running load of each core, the average load proportion of the cores of the management operating system is calculated;

[0054] When the average load proportion of the cores of the management operating system in a preset time length is less than a first preset load proportion, the following operation is performed:

[0055] All processes in the management operating system are dynamically switched to the first master core, and all the first slave cores are reset;

[0056] The first master core notifies the second master core through inter-core communication, so that the second master core starts the first slave core as a real-time operating system slave core mode.

[0057] In this embodiment, taking the four-core processor as an example, during normal operation, Core0 and Core1 run the management operating system, and Core2 and Core3 run the real-time operating system.

[0058] When the average load proportion of the cores of the management operating system in a preset time length is less than a first preset load proportion, first, all processes running on Core1 are dynamically switched to Core0, and Core1 is reset; then, Core0 notifies Core2 through inter-core communication to start 1 as a real-time operating system slave core mode. At this time, as shown in Figure 3 Core0 runs the management operating system and performs application functions such as file management, protocol communication, human-computer interaction, Core2, Core3 and Core1 run the real-time operating system, Core2 and Core1 perform functions such as acquisition operation, Ethernet frame receiving and other functions, and Core3 performs functions such as input and output and analog output.

[0059] It should be noted that the preset time length is usually set to 1 hour.

[0060] In a preferred embodiment, the formula for calculating the average load ratio of the core of the management operating system is:

[0061]

[0062] In the formula, η1 represents the average load ratio of the core of the management operating system; T represents the time interval; N represents the number of cores of the management operating system; Q 1,i represents the running load of the i-th core of the management operating system.

[0063] In a preferred embodiment, the adaptive deployment of the core of the processor according to the running load of each core comprises:

[0064] calculating the load ratio of the second master core according to the running load of each core;

[0065] when the load ratio of the second master core is greater than the second preset load ratio, performing the following operations:

[0066] the second master core notifies the first master core through inter-core communication, so that all processes in the management operating system are dynamically switched to the first master core, and all the first slave cores are reset;

[0067] the first master core notifies the second master core through inter-core communication, so that the second master core starts the first slave core as a slave core mode of the real-time operating system.

[0068] In the embodiment, taking the four-core processor as an example, when the tester performs differential protection packet transmission test, the tester needs to receive a large number of Ethernet frame packets, and the packets are transmitted at the ms level. The tester needs to quickly receive a large number of packets and accurately record the receiving time, and the real-time requirement is high. At this time, the running load of Core2 is high.

[0069] When the load ratio of the master core of the real-time operating system is greater than the second preset load ratio, first, Core2 sends inter-core communication to Core0, Core0 dynamically switches all processes running on Core1 to Core0, and resets Core1; then, Core0 notifies Core2 through inter-core communication to start Core1 as a slave core mode of the real-time operating system, and Core1 undertakes part of the differential protection test function. At this time, as shown in Figure 4 Core0 runs the management operating system to perform file management, protocol communication, human-computer interaction and other application functions, Core2, Core3 and Core1 run the real-time operating system, Core2 and Core1 perform differential transmission test, acquisition operation, Ethernet frame reception and other functions, and Core3 performs input and output, analog output and other functions.

[0070] In a preferred embodiment, after the main core of the real-time operating system starts the other cores of the management operating system as real-time operating system slave core mode, it further comprises:

[0071] When the load proportion of the main core of the real-time operating system is less than or equal to the second preset load proportion, the following operations are performed:

[0072] Switch all processes of the first slave core to the core of the real-time operating system, and reset all the first slave cores;

[0073] The second main core informs the first main core through inter-core communication, so that the first main core resets all the first slave cores and starts all the first slave cores as management operating system slave core mode.

[0074] In this embodiment, taking the four-core processor as an example, when the management operating system of the tester runs complex functions, such as a large number of file import and export, program upgrade, experimental report printing, etc., the best performance of the advanced application needs to be exerted. First, if Core1 is in real-time operating system slave core mode at this time, Core2 will dynamically switch the processes running on Core1 to Core2 or Core3; then, Core2 informs Core0 through inter-core communication to restart Core1 as management operating system slave core mode, and Core1 undertakes part of the complex advanced application functions. At this time, as shown in Figure 5 Core0 and Core1 run the management operating system to perform file management, protocol communication, human-computer interaction, and other advanced applications, and Core2 and Core3 run the real-time operating system to perform acquisition and operation, Ethernet reception, input and output, and analog output functions.

[0075] In a preferred embodiment, the calculation formula of the load proportion of the main core of the real-time operating system is:

[0076]

[0077] In the formula, η2 represents the load proportion of the main core of the real-time operating system; T represents the time interval; and Q2 represents the running load of the main core of the real-time operating system.

[0078] The application compares the performance and real-time performance of various deployments through op command and Cyclictest test tool, and the test object is differential protection consistency test, the tester adopts T3 four-core processor, the software adopts open source LINUX+RT-Thread domestic operating system, and the AMP / SMP hybrid dynamic deployment system architecture is carried out, the AMP deployment two operating systems, LINUX+RT-Thread; the LINUX operating system is deployed on Core0, Core1, Core0 is the main core, Core1 is the slave core, the RT-Thread real-time operating system is deployed on Core2, Core3, Core2 is the main core, and Core3 is the slave core. The results are shown in the following table:

[0079]

[0080]

[0081] It can be seen that the real-time performance of the SMP deployment is poor, and the CPU load of the AMP deployment is too high. After the AMP / SMP hybrid dynamic deployment system architecture is deployed, the real-time performance and performance of the differential protection consistency tester are improved.

[0082] Embodiment two

[0083] Please refer to Figure 6 , a structure schematic view of a multi-core processor adaptive deployment device provided by an embodiment of the application, comprising: a data acquisition module and an adaptive deployment module;

[0084] The data acquisition module is used to acquire the running load of each core of the processor; wherein part of the cores in the processor are deployed with a management operating system in an SMP architecture, and other cores are deployed with a real-time operating system in an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture;

[0085] The adaptive deployment module is used to adaptively deploy the cores of the processor according to the running load of each core.

[0086] Embodiment three

[0087] Correspondingly, an embodiment of the application provides a terminal device, which comprises a processor, a memory and a computer program stored in the memory and configured to be executed by the processor, and the processor implements the multi-core processor adaptive deployment method provided in the above-mentioned embodiments of the application when executing the computer program.

[0088] Embodiment four

[0089] Correspondingly, the embodiment of the present application provides a storage medium including a stored computer program, wherein the computer program controls a device where the storage medium is located to perform the multi-core processor adaptive deployment method provided in the above embodiment of the present application when the computer program is running.

[0090] It should be noted that the apparatus embodiment described above is merely illustrative, wherein the units described as separate components can or can not be physically separated, and the components displayed as units can or can not be physical units, that is, they can be located in one place, or can be distributed on multiple network units. Part or all of the modules can be selected to achieve the purpose of the embodiment of the present application according to actual needs. In addition, the connection relationship between the modules in the apparatus embodiment provided by the present application indicates that there is a communication connection between them, which can be implemented as one or more communication buses or signal lines. Those skilled in the art can understand and implement it without creative labor.

[0091] Those skilled in the art can clearly understand that, in order to facilitate and be brief, the specific working process of the apparatus described above can refer to the corresponding process in the foregoing method embodiment, which will not be described here.

[0092] The terminal device can be a desktop computer, a notebook computer, a palm computer, a cloud server and other computing devices. The terminal device can include, but is not limited to, a processor and a memory.

[0093] The processor can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor, etc. The processor is the control center of the device, and connects various parts of the device through various interfaces and lines.

[0094] The memory can be used to store the computer program, and the processor realizes various functions of the device by running or executing the computer program stored in the memory and calling data stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, at least one application required by a function, and the like; and the data storage area can store data created according to the use of the mobile phone and the like. In addition, the memory can include a high-speed random access memory, and can also include a nonvolatile memory, for example, a hard disk, a memory, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, at least one disk storage device, a flash memory device, or other volatile solid-state memory devices.

[0095] The storage medium is a storage medium, and the computer program is stored in the storage medium. When the processor executes the computer program, the steps of each method embodiment described above can be realized. The computer program includes computer program code, which can be in the form of source code, object code, an executable file, or some intermediate form, etc. The computer readable medium can include any entity or device capable of carrying the computer program code, a recording medium, a U disk, a mobile hard disk, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc. It should be noted that the content included in the computer readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction, for example, in some jurisdictions, according to legislation and patent practice, the computer readable medium does not include electrical carrier signals and telecommunication signals.

[0096] The above is the preferred embodiment of the present application. It should be noted that for those skilled in the art, without departing from the principles of the present application, a number of improvements and refinements can be made, which are also considered within the scope of protection of the present application.

Claims

1. A multi-core processor adaptive deployment method, characterized in that, include: The operating load of each core of the processor is obtained; wherein, some cores of the processor deploy a management operating system in an SMP architecture, and other cores deploy a real-time operating system in an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture; The processor cores are adaptively deployed based on the operating load of each core; wherein, the average load percentage of the cores managing the operating system is calculated based on the operating load of each core. When the average load percentage of the core of the management operating system within a preset time period is less than a first preset load percentage, the following operation is performed: Dynamically switch all processes in the management operating system to the first master core in the management operating system, and reset all the first slave cores in the management operating system; The first master core notifies the second master core of the real-time operating system through inter-core communication, so that the second master core boots the first slave core into the slave core mode of the real-time operating system. Calculate the load percentage of the second main core based on the operating load of each core; When the load percentage of the second main core is greater than the second preset load percentage, the following operation is performed: The second master core notifies the first master core via inter-core communication, so that all processes in the management operating system are dynamically switched to the first master core and all the first slave cores are reset. The first master core notifies the second master core via inter-core communication, so that the second master core boots the first slave core into a real-time operating system slave core mode.

2. The multi-core processor adaptive deployment method as described in claim 1, characterized in that, The core of the management operating system includes a first master core and several first slave cores; the core of the real-time operating system includes a second master core and several second slave cores.

3. The multi-core processor adaptive deployment method as described in claim 2, characterized in that, The formula for calculating the average load percentage of the core of the management operating system is as follows: ； In the formula, This indicates the average load percentage of the kernel that manages the operating system. Indicates a time interval; Indicates the number of kernels managing the operating system; Indicates the management of the operating system. The core operating load.

4. The multi-core processor adaptive deployment method as described in claim 2, characterized in that, After the main kernel of the real-time operating system boots all kernels in the management operating system other than the main kernel into a real-time operating system slave kernel mode, the process further includes: When the load percentage of the main core of the real-time operating system is less than or equal to the second preset load percentage, the following operation is performed: Switch all processes of the first slave core to the kernel of the real-time operating system and reset all the first slave cores; The second master core notifies the first master core via inter-core communication, so that the first master core resets all the first slave cores and starts all the first slave cores into management operating system slave core mode.

5. The multi-core processor adaptive deployment method as described in claim 2, characterized in that, The formula for calculating the load percentage of the main core of the real-time operating system is as follows: ； In the formula, This indicates the load percentage of the main kernel of the real-time operating system. Indicates a time interval; This indicates the workload of the main kernel of the real-time operating system.

6. A multi-core processor adaptive deployment device, characterized in that, include: Data acquisition module and adaptive deployment module; The data acquisition module is used to acquire the operating load of each core of the processor; wherein, some cores of the processor deploy a management operating system in an SMP architecture, and other cores deploy a real-time operating system in an SMP architecture; the management operating system and the real-time operating system are deployed on a software platform in an AMP architecture. The adaptive deployment module is used to adaptively deploy the processor cores according to the operating load of each core; wherein, based on the operating load of each core, the average load percentage of the core managing the operating system is calculated. When the average load percentage of the core of the management operating system within a preset time period is less than a first preset load percentage, the following operation is performed: Dynamically switch all processes in the management operating system to the first master core in the management operating system, and reset all the first slave cores in the management operating system; The first master core notifies the second master core of the real-time operating system through inter-core communication, so that the second master core boots the first slave core into the slave core mode of the real-time operating system. Calculate the load percentage of the second main core based on the operating load of each core; When the load percentage of the second main core is greater than the second preset load percentage, the following operation is performed: The second master core notifies the first master core via inter-core communication, so that all processes in the management operating system are dynamically switched to the first master core and all the first slave cores are reset. The first master core notifies the second master core via inter-core communication, so that the second master core boots the first slave core into a real-time operating system slave core mode.

7. A terminal device, characterized in that, It includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor, when executing the computer program, implements the multi-core processor adaptive deployment method as described in any one of claims 1 to 5.

8. A storage medium, characterized in that, The storage medium includes a stored computer program, wherein, when the computer program is executed, it controls the device where the storage medium is located to perform the multi-core processor adaptive deployment method as described in any one of claims 1 to 5.

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