Analog domain low-bit multi-bit fused quantization method

Abstract

The application discloses a low-bit multi-bit fusion quantization method in an analog domain, which is used for supporting analog domain and digital / analogue mixed domain in-memory computing macro units and accelerator design and belongs to the technical field of application-specific integrated circuit design. The method proposes a low-bit multi-bit fusion quantization method in an analog domain to alleviate the power waste problem caused by low-bit weight calculation result quantization. Compared with a conventional bit-by-bit quantization method, in view of the different characteristics of different bit weight calculation results on neural network performance contribution, the quantization method adopts the conventional bit-by-bit quantization for the calculation results of high-bit weight, and adopts the method of fusing the calculation results of multiple low-bit weight in an analog domain and quantizing once for the calculation results of low-bit weight. On the premise of guaranteeing the neural network performance, the quantization times are reduced, the power consumption of the quantization part is reduced, and the energy efficiency of the calculation unit is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of application specific integrated circuit design, in particular to a low-bit multi-bit fusion quantization method in analog domain. BACKGROUND

[0002] In highly parallel neural network applications, Computing in Memory (CIM) has been proven to have significant energy efficiency advantages and acceleration effects. CIM completes the Multiply and Accumulate (MAC) operation directly in the memory array, effectively reducing the large amount of energy consumption caused by the frequent transmission of data between the processor and the storage, thereby overcoming the "memory wall" problem under the Von Neumann architecture. In neural networks, a large number of input data and weights exist in the form of high-precision floating-point numbers. In order to effectively deploy neural networks on CIM circuits, it is necessary to quantize these floating-point data. At present, the commonly used quantization method is to convert floating-point numbers into integer data (such as INT8, INT4, etc.). Such integer / fixed-point quantization methods can basically meet the requirements of neural network inference, and the error caused by quantization usually has a negligible effect on inference accuracy. However, the integer quantization method exhibits different characteristics at the software and hardware levels. At the software level, the calculation results of different bit weights have different effects on neural networks, and the results of low-bit weights contribute less to performance; while at the hardware level, the readout of results of different bit weights consumes the same circuit energy. Therefore, merging the results of low-bit weights into the results of high-bit weights for quantization readout can save energy without affecting the performance of neural networks. In addition, the sparsity of neural networks enables the clipping operation on the full-range readout results to further reduce circuit area and energy consumption, while having a limited effect on neural network performance. SUMMARY

[0003] The present application provides a low-bit multi-bit fusion quantization method in analog domain to alleviate the problem of power waste caused by quantization of low-bit weight calculation results.

[0004] The present application provides a low-bit multi-bit fusion quantization method in analog domain to alleviate the problem of power waste caused by quantization of low-bit weight calculation results.

[0005] Clustering the data involved in the calculation;

[0006] Fusing low bits using a specific quantization readout combination;

[0007] According to the budget of the quantization readout, discarding a certain number of bits from the high-bit weights of the selected fusion quantization combination.

[0008] Optionally, in one embodiment of the present application, when the data participating in the calculation is clustered, s is selected from the data participating in the calculation, and s is an integer power of 2.

[0009] Optionally, in one embodiment of the present application, in the use of a specific quantization readout combination to fuse low bits, the selection principle of the low bit fusion quantization combination includes: from the perspective of the hardware readout circuit, the difference of the full scale logarithm of different bit weight fusion combinations is less than or equal to 1; from the perspective of software performance, the bit quantity of the low bit weight fusion combination is greater than or equal to the bit quantity of the high bit weight fusion combination.

[0010] Optionally, in one embodiment of the present application, the implementation mode of the analog domain low bit fusion includes charge domain weighted sharing and current domain / time domain weighted superposition.

[0011] Optionally, in one embodiment of the present application, according to specific network requirements and the area of the readout circuit, the full scale result is selected from high bits.

[0012] The analog domain low bit multi-bit fusion quantization method of the embodiment of the present application can alleviate the problem of power waste caused by low bit weight calculation result quantization. Compared with the traditional bit-by-bit quantization method, in view of the different characteristics of different bit weight calculation results on the performance (precision) of the neural network, the quantization method adopts the regular bit-by-bit quantization for the calculation result of the high bit weight, and adopts the method of analog domain fusion of multiple low bit weight calculation results for the calculation result of the low bit weight, reduces the quantization times, reduces the power consumption of the quantization part, and thus improves the energy efficiency of the calculation unit under the premise of ensuring the performance of the neural network.

[0013] Additional aspects and advantages of the present application will be described in the following description and part will become apparent from the following description or will be learned by practice of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0014] The above and / or additional aspects and advantages of the present application will become apparent and be readily understood from the following description, taken in conjunction with the accompanying drawings, in which:

[0015] Figure 1 A schematic diagram of an analog domain low bit multi-bit fusion quantization method provided according to an embodiment of the present application. DETAILED DESCRIPTION

[0016] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, in which the same or similar reference signs represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below are exemplary and are intended to explain the present application, and cannot be understood as a limitation of the present application.

[0017] As shown in Figure 1 The analog domain low-bit multi-bit fusion quantization method is used for supporting analog domain and digital / analogue mixed domain in-memory computing macro unit and accelerator design.

[0018] As shown in Figure 1 The multiplication produces different bit results of O0, O1, O2, and the like. The analog domain low-bit multi-bit fusion quantization method comprises the following steps.

[0019] The data participating in the calculation is clustered.

[0020] The low bits are fused by using a specific quantization readout combination.

[0021] According to the budget of the quantization readout, the selected fusion quantization combination is discarded from the high-bit weight by a certain bit.

[0022] In this embodiment, when the data participating in the calculation is clustered, s data participating in the calculation is selected, and s is an integer power of 2, and s can be 32, 64, and the like.

[0023] In this embodiment, the principles for selecting the low-bit fusion quantization combination include: from the perspective of the hardware readout circuit, the difference between the full-scale logarithms of different bit weight fusion combinations should be less than or equal to 1; from the perspective of software performance, the number of bits of the low-bit weight fusion combination should be greater than or equal to the number of bits of the high-bit weight fusion combination; different selection methods correspond to different software and hardware overheads.

[0024] In this embodiment, the implementation method of the analog domain low-bit fusion includes charge domain weighted sharing, current domain / time domain weighted superposition.

[0025] In this embodiment, the selection of the full-scale result from the high bit should depend on the specific network requirements and the area of the readout circuit, and the discard of 0, 1, 2, and 3 bits can be appropriately considered.

[0026] The analog domain low-bit multi-bit fusion quantization method proposed according to the embodiment of the present application is used for supporting analog domain and digital / analogue mixed domain in-memory computing macro unit and accelerator design, and the method takes into account the software and hardware overheads.

[0027] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Also, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in one or N embodiments or examples. Furthermore, the person skilled in the art can combine and combine the different embodiments or examples described in the present specification and the features of the different embodiments or examples, without contradiction.

[0028] In addition, the terms "first", "second", are used only for descriptive purposes and cannot be understood to indicate or imply relative importance or imply the number of the indicated technical features. Thus, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "N" is at least two, for example, two, three, etc., unless otherwise explicitly specified.

Claims

1. An analog domain low-order multi-bit fusion quantization method, characterized in that: The method is used to perform a quantized readout after fusing multiple low-order weight calculation results in the analog domain, and includes the following steps: Clustering the data involved in the calculation; Use a specific quantized readout combination to fuse the low bits; According to the budget of quantization readout, a certain number of bits are discarded from the high-order weights of the selected fusion quantization combination; The full-scale result is rounded off starting from the high bit according to the specific network requirements and the area of ​​the readout circuit; When using a specific quantization readout combination to fuse the low bits, the principles for selecting the low-bit fusion quantization combination include: from the perspective of the hardware readout circuit, the difference in the full-scale logarithm of different bit weight fusion combinations is less than or equal to 1; from the perspective of software performance, the number of bits of the low-bit weight fusion combination is greater than or equal to the number of bits of the high-bit weight fusion combination.

2. The analog domain low-order multi-bit fusion quantization method according to claim 1, characterized in that: When clustering the data involved in the calculation, s data are selected from the data that need to participate in the calculation, where s is an integer power of 2.

3. The analog domain low-order multi-bit fusion quantization method according to claim 1, characterized in that: The implementation methods of analog domain low-bit fusion include charge domain weighted sharing and current domain / time domain weighted superposition.

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