Display panel, and test system and test method of display panel

Abstract

The invention provides a display panel, and a test system and a test method of the display panel, and relates to the technical field of display. In the display panel, a first bonding pad is connected with a display driving signal line, and a second bonding pad is not connected with the display driving signal line. The relative position relation between the first bonding pad and the second bonding pad is fixed after the first bonding pad and the second bonding pad are prepared, and the alignment relation between the probe at the first bonding pad and the first bonding pad can be reflected based on the alignment relation between the probe at the second bonding pad and the second bonding pad. By inputting the first voltage signal to the second bonding pad, the purpose of detecting whether the probe on the test fixture and the bonding pad on the display panel are misplaced or not can be achieved based on the feedback signal. The first voltage signal is not transmitted to the display driving signal line, so that the normal lightening detection of the display panel is not influenced under the condition of detecting whether the probe on the test fixture and the bonding pad on the display panel are misplaced.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel, and a testing system and a testing method for the display panel. Background Art

[0002] With the continuous development of science and technology, various display devices have been widely used in people's lives and work, bringing great convenience to people's daily lives. As one of the important components of display devices, the design of the display panel will directly or indirectly affect the display effect of the display device.

[0003] During the manufacturing process of each display panel, it needs to be lit up by the test fixture before it can flow to the next manufacturing process. If the probes on the test fixture are misaligned with the pads on the display panel during docking, the display panel may be burned after the test fixture is powered on.

[0004] Then, how to detect whether there is misalignment between the probe on the test fixture and the pad on the display panel is a technical problem that needs to be solved urgently by those skilled in the art. Summary of the invention

[0005] In view of the above problems, the present application provides a display panel, and a test system and method for the display panel, to achieve the purpose of detecting whether there is misalignment between the probe on the test fixture and the pad on the display panel. The specific scheme is as follows:

[0006] A first aspect of the present application provides a display panel, the display panel comprising a display area and a non-display area, the non-display area at least partially surrounding the display area, the display area comprising a display drive signal line, the non-display area comprising a pad, the pad comprising at least one first pad and at least one second pad, at least one of the first pads being a test pad connected to the display drive signal line;

[0007] At least one of the second pads is not connected to the display driving signal line, and at least one of the second pads is input with a first voltage signal and outputs a feedback signal.

[0008] A second aspect of the present application provides a display panel testing system, the display panel testing system comprising the display panel and the testing fixture described above;

[0009] The test fixture includes at least one first probe and at least one second probe, wherein the at least one first probe is used to be electrically connected to a first pad in the display panel, and the at least one second probe is used to be electrically connected to a second pad in the display panel.

[0010] A third aspect of the present application provides a display panel testing method, which is applied to a test fixture in the display panel testing system described above, and includes a first testing phase. In the first testing phase, the display panel testing method includes:

[0011] Connecting at least one of the first probes on the test fixture to at least one of the first pads, and connecting at least one of the second probes on the test fixture to at least one of the second pads;

[0012] Sending the first voltage signal to the second pad through the second probe, and collecting the feedback signal;

[0013] Whether the second probe and the second pad are misaligned is determined based on the feedback signal.

[0014] By means of the above technical solution, the present application provides a display panel, and a test system and a test method for the display panel. In the display panel, the first pad is connected to the display drive signal line, and it can be understood that the first pad is a test pad for display panel lighting detection; the second pad is not connected to the display drive signal line, and it can be understood that the second pad is a pad for detecting whether there is misalignment between the probe on the test fixture and the pad on the display panel.

[0015] Since the relative position relationship between the first pad and the second pad is fixed after preparation, the relative position relationship of the probe on the test fixture is determined based on the position of the pad on the display panel, or the relative position relationship of the pad on the display panel is determined based on the position of the probe on the test fixture, so if the probe at the second pad is misaligned with the second pad, it can be explained that the probe at the first pad is also misaligned with the first pad; conversely, if the probe at the second pad is not misaligned with the second pad, it can be explained that the probe at the first pad is not misaligned with the first pad either.

[0016] In this design, by inputting the first voltage signal to the second pad, the purpose of detecting whether there is misalignment between the probe on the test fixture and the pad on the display panel can be achieved based on the feedback signal. In addition, since the second pad is not connected to the display drive signal line, the first voltage signal will not be transmitted to the display drive signal line, which means that the technical solution of this application will not affect the normal lighting detection of the display panel when detecting whether there is misalignment between the probe on the test fixture and the pad on the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and the originals and elements are not necessarily drawn to scale.

[0018] Figure 1 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention;

[0019] Figure 2 A schematic diagram of the structure of a test fixture provided by an embodiment of the present invention;

[0020] Figure 3 A schematic diagram of the alignment relationship between a probe on a test fixture and a pad on a display panel provided by an embodiment of the present invention;

[0021] Figure 4 A schematic diagram of the alignment relationship between a probe on another test fixture and a pad on a display panel provided by an embodiment of the present invention;

[0022] Figure 5 A schematic flow chart of a method for testing a display panel provided by an embodiment of the present invention;

[0023] Figure 6 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0024] Figure 7 A schematic diagram of a capacitor structure provided by an embodiment of the present invention;

[0025] Figure 8 A schematic diagram of an equivalent circuit structure of a display panel testing system provided by an embodiment of the present invention;

[0026] Fig. 9 A schematic flow chart of another display panel testing method provided by an embodiment of the present invention;

[0027] Fig.10 A schematic diagram of a voltage and time curve provided by an embodiment of the present invention;

[0028] Fig.11 Another schematic diagram of a voltage-time curve provided by an embodiment of the present invention;

[0029] Fig.12 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0030] Fig.13 A schematic diagram of an equivalent circuit structure of another display panel testing system provided by an embodiment of the present invention;

[0031] Fig.14 A schematic flow chart of another display panel testing method provided by an embodiment of the present invention;

[0032] Fig.15 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0033] Fig.16 A schematic diagram of an equivalent circuit structure of another display panel testing system provided by an embodiment of the present invention;

[0034] Fig.17 A schematic flow chart of another display panel testing method provided by an embodiment of the present invention;

[0035] Fig.18 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0036] Fig.19 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0037] Fig. 20 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0038] Fig.21 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0039] Fig. 22 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0040] Fig.23 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0041] Fig.24 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0042] Fig.25 A schematic flow chart of another display panel testing method provided by an embodiment of the present invention;

[0043] Fig.26 A schematic diagram of test phase distribution corresponding to a display panel test method provided by an embodiment of the present invention;

[0044] Fig. 27 A timing diagram corresponding to a display panel testing method provided by an embodiment of the present invention;

[0045] Fig.28 A schematic diagram of test phase distribution corresponding to another display panel test method provided by an embodiment of the present invention;

[0046] Fig.29 A timing diagram corresponding to another display panel testing method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0047] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application. The terms used in the implementation mode of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. It is known to those skilled in the art that with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0048] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0049] It should be noted that the directional words appearing in the present invention are based on the relative position relationship shown in the drawings and cannot be used as an absolute limitation to the present application.

[0050] refer to Figure 1 , Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of the present invention. The display panel 100 provided in an embodiment of the present invention includes: a display area AA and a non-display area BB, the non-display area BB at least partially surrounds the display area AA, the display area AA includes a display drive signal line L1, the non-display area BB includes a pad, the pad includes at least one first pad 11 and at least one second pad 12, and the at least one first pad 11 is a test pad connected to the display drive signal line L1.

[0051] At least one second pad 12 is not connected to the display driving signal line L1 , and the at least one second pad 12 is input with the first voltage signal and outputs a feedback signal.

[0052] Specifically, in the embodiment of the present invention, the non-display area BB is completely surrounded by the display area AA as an example for explanation, and the display drive signal line L1 includes but is not limited to a data signal line that provides data signals to pixels. The display drive signal line L1 extends from the display area AA to the non-display area BB where the first pad 11 is provided to connect with the first pad 11. At this time, it can be understood that the first pad 11 is a test pad for lighting detection of the display panel 100. The second pad 12 is not connected to the display drive signal line L1. At this time, it can be understood that the second pad 12 is a pad for detecting whether there is a misalignment between the probe on the test fixture and the pad on the display panel 100.

[0053] refer to Figure 2 , Figure 2 A schematic diagram of a test fixture provided by an embodiment of the present invention; Figure 3 , Figure 3 A schematic diagram of the alignment relationship between a probe on a test fixture and a pad on a display panel provided by an embodiment of the present invention; Figure 4 , Figure 4 A schematic diagram of the alignment relationship between a probe on another test fixture and a pad on a display panel provided by an embodiment of the present invention. Based on the display panel 100 provided by an embodiment of the present invention, the display panel test system includes the display panel 100 provided by an embodiment of the present invention and a test fixture 13.

[0054] like Figure 2 and Figure 3 As shown, the test fixture 13 includes at least one first probe 14 and at least one second probe 15 , wherein the at least one first probe 14 is used to electrically connect to the first pad 11 in the display panel 100 , and the at least one second probe 15 is used to electrically connect to the second pad 12 in the display panel 100 .

[0055] Since the relative position relationship between the first pad 11 and the second pad 12 is fixed after preparation, the relative position relationship between the probes on the test fixture 13 is determined based on the position of the pads on the display panel 100, or the relative position relationship between the pads on the display panel 100 is determined based on the position of the probes on the test fixture 13, if the second probe 15 at the second pad 12 is misaligned with the second pad 12, it can be explained that the first probe 14 at the first pad 12 is also misaligned with the first pad 11, such as Figure 3 conversely, if the second probe 15 at the second pad 12 is not misaligned with the second pad 12, it can be explained that the first probe 14 at the first pad 11 is not misaligned with the first pad 11, such as Figure 4 shown.

[0056] In other words, the arrangement of the probes on the test fixture 13 is the same as the arrangement of the pads on the display panel 100. If the second pad 12 and the second probe 15 are aligned normally, it can be determined that the first pad 11 and the first probe 14 are aligned normally; if the second pad 12 and the second probe 15 are aligned abnormally, it can be determined that the first pad 11 and the first probe 14 are aligned abnormally, that is, there is a problem of misalignment between the probes on the test fixture 13 and the pads on the display panel 100.

[0057] It should be noted that, in the embodiment of the present application, the second pad 12 can be a new pad added based on the existing display panel. Of course, when the first pad 11 is not fully utilized, the unused first pad 11 can also be used as the second pad 12, and the unused first pad 11 is not connected to the display drive signal line L1.

[0058] Similarly, in the embodiment of the present application, the second probe 15 can be a new probe added based on the existing test fixture 13. Of course, when the first probe 14 is not fully utilized, the unused first probe 14 can also be used as the second probe 15.

[0059] refer to Figure 5 , Figure 5 A flow chart of a display panel testing method provided by an embodiment of the present invention. Based on the display panel testing system provided by an embodiment of the present invention, the display panel testing method provided by an embodiment of the present invention includes: a first testing stage, in which the display panel testing method includes:

[0060] S101 : connecting at least one first probe 14 on the test fixture 13 to at least one first pad 11 , and connecting at least one second probe 15 on the test fixture 13 to at least one second pad 12 .

[0061] S102: Send a first voltage signal to the second pad 12 through the second probe 15, and collect a feedback signal.

[0062] S103: Determine whether the second probe 15 and the second pad 12 are misaligned based on the feedback signal.

[0063] From the above description, it can be known that, at least before the lighting detection of the display panel 100, the second probe 15 connected to the second pad 12 is used to send a first voltage signal to the second pad 12, and the alignment relationship between the second probe 15 and the second pad 12 is determined based on the feedback signal, thereby reflecting the alignment relationship between the first probe 14 and the first pad 11, thereby achieving the purpose of detecting whether there is a misalignment between the probe on the test fixture 13 and the pad on the display panel 100 before the lighting detection.

[0064] Furthermore, since the second pad 12 is not connected to the display drive signal line L1, the first voltage signal will not be transmitted to the display drive signal line L1 during the alignment detection process between the pad and the probe; at the same time, during the lighting detection process of the display panel 100, the second pad 12 does not provide any display drive signal to the display drive signal line L1. This means that the technical solution of the present application will not affect the normal lighting detection of the display panel 100 when realizing the detection of whether the probe on the test fixture 13 and the pad on the display panel 100 are misaligned.

[0065] It can be seen that the technical solution of the present application is designed to detect whether there is a misaligned second pad 12 between the probe on the test fixture 13 and the pad on the display panel 100, and the second probe 15 sends a first voltage signal to the second pad 12 to determine whether there is an abnormal misalignment between the probe and the pad. When the probe and the pad are misaligned abnormally, the staff can be prompted to realign in time, thereby eliminating detection errors caused by misalignment between the probe and the pad, eliminating hidden dangers such as display panel burns and residual charge, improving detection accuracy, and improving the manufacturing yield of the display panel.

[0066] The method of notifying the staff when the probe and the pad are misaligned includes but is not limited to sound and light alarms.

[0067] In an optional embodiment of the present invention, reference Figure 6 , Figure 6 A schematic diagram of another display panel provided by an embodiment of the present invention. The display panel 100 provided by an embodiment of the present invention further includes a capacitor structure 16 ; the capacitor structure 16 includes a first electrode plate 161 and a second electrode plate 162 .

[0068] At least one second pad 12 is connected to one of the first electrode plate 161 and the second electrode plate 162 , and the other electrode plate is electrically connected to the fixed signal terminal.

[0069] Specifically, in the embodiment of the present invention, the display panel 100 includes a substrate 17 and an array layer 18 located on one side of the substrate 17. The array layer 18 is provided with a thin film transistor 19. The thin film transistor 19 is used to form a circuit for the display panel 100 to work, for example, to form a pixel circuit for the display panel 100 to control pixels. In the embodiment of the present invention, it includes but is not limited to integrating the capacitor structure 16 on the array layer 18 through a semiconductor process.

[0070] like Figure 6 As shown, the thin film transistor 19 includes an active layer 191, a gate 192, a source 193 and a drain 194. The array layer 18 includes a buffer layer 20, a gate insulating layer 21 disposed between the active layer 191 and the gate 192, an interlayer insulating layer 22 disposed between the gate 192 and the source 193 and the drain 194, a passivation layer 23 disposed on the side of the source 193 and the drain 194 away from the interlayer insulating layer 22, and a planarization layer 24 disposed on the side of the passivation layer 23 away from the interlayer insulating layer 22. It should be noted that in the embodiment of the present invention, the source 193 and the drain 194 are located in the same layer as an example for description.

[0071] Optionally, the substrate 17 includes but is not limited to a substrate of a flexible insulating material having properties such as stretchability, bendability or flexibility, and its material includes but is not limited to polyimide material (PI for short) or polycarbonate material (PC for short) or polyethylene terephthalate material (PET for short) and the like.

[0072] Optionally, the buffer layer 20 includes but is not limited to an inorganic material layer or an organic material layer, wherein the material of the inorganic material layer includes but is not limited to silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide or aluminum nitride, and the material of the organic material layer includes but is not limited to acrylic or PI.

[0073] like Figure 6 As shown, the first electrode plate 161 and the second electrode plate 162 are arranged opposite to each other in a first direction X, and the first direction X is a direction perpendicular to the plane where the display panel 100 is located.

[0074] The first electrode plate 161 and the second electrode plate 162 are located in different metal layers.

[0075] Or, refer to Figure 7 , Figure 7 A schematic diagram of a capacitor structure provided in an embodiment of the present invention. The capacitor structure 16 is an interdigital capacitor.

[0076] The first electrode plate 161 and the second electrode plate 162 are located on the same metal layer.

[0077] It should be noted that the structure of the array layer 18 is only described in the form of an example. Figure 6 Taking the capacitor structure shown as an example, when the display panel 100 is designed as 10 masks, the first electrode 161 and the second electrode 162 can be made in the first metal layer M1 and the second metal layer M2 respectively; when the display panel 100 is designed as 11 masks, the first electrode 161 and the second electrode 162 can be arbitrarily selected to be made in the first metal layer M1, the second metal layer M2 or the third metal layer M3 according to the design conditions of the display panel 100.

[0078] Exemplarily, the first electrode 161 is made in the first metal layer M1, and the second electrode 162 is made in the second metal layer M2; or, the first electrode 161 is made in the first metal layer M1, and the second electrode 162 is made in the third metal layer M3; or, the first electrode 161 is made in the second metal layer M2, and the second electrode 162 is made in the third metal layer M3.

[0079] refer to Figure 8 , Figure 8A schematic diagram of an equivalent circuit structure of a display panel test system provided in an embodiment of the present invention. Based on the display panel 100 provided in an embodiment of the present invention, after the capacitor structure 16 is integrated in the array layer 18, one of the plates in the capacitor structure 16 is connected to the second pad 12, and the other plate is electrically connected to the fixed signal terminal Vb. It should be noted that the fixed signal terminal Vb can be any potential signal terminal such as GND, VGH, VGL, or VCOM in the display panel 100, and the selection of the voltage potential is related to the GIP circuit routing design in the display panel.

[0080] like Figure 8 As shown, the test fixture 13 includes: a voltage transmission component 25 and a first resistor R1.

[0081] The input end of the voltage transmission component 25 is electrically connected to the first voltage terminal Va, and the output end of the voltage transmission component 25 is electrically connected to the second probe 15 via the first resistor R1.

[0082] The first voltage terminal Va is used to provide a first voltage signal V1 , and the voltage value represented by the first voltage signal V1 is a first voltage value; the feedback signal is a target time signal used for the voltage value at the second probe 15 to rise to the first voltage value.

[0083] It should be noted that the feedback signal includes but is not limited to being collected by the test fixture 13 .

[0084] refer to Fig. 9 , Fig. 9 A flow chart of another display panel testing method provided by an embodiment of the present invention. Based on the display panel testing system provided by an embodiment of the present invention, a possible implementation method of step S103 of the display panel testing method provided by an embodiment of the present invention, "determining whether the second probe 15 and the second pad 12 are misaligned based on the feedback signal" is:

[0085] S103a1: Determine a charging time signal for charging the capacitor structure 16 to a first voltage value.

[0086] S103a2: Compare the target time signal and the charging time signal, and determine whether the second probe 15 and the second pad 12 are misaligned according to the comparison result.

[0087] Specifically, in the embodiments of the present invention, refer to Fig.10 , Fig.10 A voltage and time curve diagram provided in an embodiment of the present invention, referring to Fig.11 , Fig.11Another voltage and time curve diagram provided by an embodiment of the present invention is that the charging time signal for the capacitor structure 16 to be charged to the first voltage value is T1, and the target time signal for the voltage value at the second probe 15 to rise to the first voltage value is T2.

[0088] During the probe and pad alignment detection phase, ie, the first test phase, the test fixture 13 applies the first voltage signal V1 to the second probe 15 via the internal voltage transmission component 25 , and the test fixture 13 does not apply any signal to the first probe 14 .

[0089] When the second probe 15 and the second pad 12 are not misaligned, since the second pad 12 is connected to one of the plates in the capacitor structure 16, the second probe 15 is connected to the corresponding plate in the capacitor structure 16 through the second pad 12. At this time, the circuit path of the second probe 15, the second pad 12 and the capacitor structure 16 is in a connected state. Due to the existence of the capacitor structure 16, the target time signal T2 used for the voltage value at the second probe 15 to rise to the first voltage value is equal to the charging time signal T1 of the capacitor structure 16 to charge to the first voltage value. Fig.10 shown.

[0090] In other words, in the first test stage, when the target time signal T2 used for the voltage value at the second probe 15 to rise to the first voltage value is equal to the charging time signal T1 for the capacitor structure 16 to charge to the first voltage value, it can be explained that the second probe 15 and the second pad 12 are not misaligned, and further it can be explained that the first probe 14 and the first pad 11 are not misaligned.

[0091] When the second probe 15 is misaligned with the second pad 12, that is, the second probe 15 is not connected to the second pad 12, the second probe 15 is not connected to the plate in the capacitor structure 16. At this time, the circuit path of the second probe 15, the second pad 12 and the capacitor structure 16 is in a disconnected state at the connection point between the second probe 15 and the second pad 12, and the first voltage signal V1 can only be transmitted to the second probe 15, and cannot continue to be transmitted to the second pad 12 and the capacitor structure 16. The target time signal T2 used for the voltage value at the second probe 15 to rise to the first voltage value will be less than the charging time signal T1 of the capacitor structure 16 to charge to the first voltage value, that is, the voltage value at the second probe 15 will rise to the first voltage value in a shorter time, such as Fig.11 shown.

[0092] In other words, when the target time signal T2 used for the voltage value at the second probe 15 to rise to the first voltage value is less than the charging time signal T1 for the capacitor structure 16 to charge to the first voltage value, it can be explained that the second probe 15 and the second pad 12 are misaligned, and further it can be explained that the first probe 14 and the first pad 11 are misaligned.

[0093] In general, the technical solution of the present application designs a second pad 12 based on the design of the original display panel, and includes but is not limited to a capacitor structure 16 integrated through a semiconductor process in the array layer 18. By comparing the target time signal T2 used for the voltage value at the second probe 15 to rise to the first voltage value and the charging time signal T1 used for the capacitor structure 16 to charge to the first voltage value, it is possible to determine whether the second probe 15 and the second pad 12 are misaligned, and then determine whether the first probe 14 and the first pad 11 are misaligned.

[0094] In an optional embodiment of the present invention, reference Fig.12 , Fig.12 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention: The display panel 100 further includes a ground line L2.

[0095] At least one second pad 12 is connected to the ground trace L2 via a connection line.

[0096] Specifically, in the embodiment of the present invention, the grounding line L2 includes but is not limited to a grounding loop line disposed in the display panel 100, and the grounding loop line is usually disposed around the display area AA. By connecting at least one second pad 12 to the grounding line L2 through a connecting line, the grounding method of the second pad 12 can be simplified without complicated wiring.

[0097] refer to Fig.13 , Fig.13 Schematic diagram of equivalent circuit structure of another display panel test system provided by an embodiment of the present invention. Based on the display panel 100 provided by an embodiment of the present invention, the capacitor structure 16 is not integrated in the array layer 18, but the second pad 12 is directly connected to the ground trace L2, that is, the second pad 12 is directly grounded.

[0098] like Fig.13 As shown, the test fixture 13 includes: a voltage transmission component 25, a first resistor R1 and a second resistor R2.

[0099] The input end of the voltage transmission component 25 is electrically connected to the first voltage terminal Va, and the output end of the voltage transmission component 25 is electrically connected to the second probe 15 through the first resistor R1 and the second resistor R2 in sequence; the connection node between the first resistor R1 and the second resistor R2 is the first connection node G1.

[0100] The first voltage terminal Va is used to provide the first voltage signal V1; the feedback signal is a voltage signal at the first connection node G1.

[0101] It should be noted that the feedback signal includes but is not limited to being collected by the test fixture 13 .

[0102] refer to Fig.14 , Fig.14 A flow chart of another display panel testing method provided by an embodiment of the present invention. Based on the display panel testing system provided by an embodiment of the present invention, a possible implementation method of step S103 of the display panel testing method provided by an embodiment of the present invention, "determining whether the second probe 15 and the second pad 12 are misaligned based on the feedback signal" is:

[0103] S103b1: Determine a first actual voltage signal at the first connection node G1 according to the first voltage signal V1, the resistance value of the first resistor R1, and the resistance value of the second resistor R2.

[0104] S103b2: Compare the feedback signal with the first actual voltage signal, and determine whether the second probe 15 and the second pad 12 are misaligned according to the comparison result.

[0105] Specifically, in the embodiment of the present invention, the first actual voltage signal at the first connection node G1 is determined to be V2 according to the first voltage signal V1, the resistance value of the first resistor R1, and the resistance value of the second resistor R2. That is, when the second probe 15 and the second pad 12 are not misaligned, the first actual voltage signal at the first connection node G1 is V2, where V2=V1×R2 / (R1+R2).

[0106] During the probe and pad alignment detection phase, ie, the first test phase, the test fixture 13 applies the first voltage signal V1 to the second probe 15 via the internal voltage transmission component 25 , and the test fixture 13 does not apply any signal to the first probe 14 .

[0107] When the second probe 15 and the second pad 12 are not misaligned, the circuit path of the first resistor R1, the second resistor R2, the second probe 15 and the second pad 12 is connected, and the voltage signal at the first connection node G1 represented by the detected feedback signal is equal to the first actual voltage signal V2.

[0108] In other words, in the first test phase, when the voltage signal at the first connection node G1 represented by the detected feedback signal is equal to the first actual voltage signal V2, it can be explained that the second probe 15 and the second pad 12 are not misaligned, and further it can be explained that the first probe 14 and the first pad 11 are not misaligned.

[0109] When the second probe 15 is misaligned with the second pad 12, that is, the second probe 15 is not connected to the second pad 12, the circuit path of the first resistor R1, the second resistor R2, the second probe 15 and the second pad 12 is in a disconnected state at the connection point between the second probe 15 and the second pad 12, and the voltage signal at the first connection node G1 represented by the detected feedback signal is not equal to the first actual voltage signal V2.

[0110] In other words, in the first test phase, when the voltage signal at the first connection node G1 represented by the detected feedback signal is not equal to the first actual voltage signal V2, it can be explained that the second probe 15 is misaligned with the second pad 12, and further that the first probe 14 is misaligned with the first pad 11.

[0111] In general, the technical solution of the present application designs a second pad 12 based on the design of the original display panel, and grounds the second pad 12. By comparing the voltage signal at the first connection node G1 and the first actual voltage signal V2, it can be determined whether the second probe 15 and the second pad 12 are misaligned, and then whether the first probe 14 and the first pad 11 are misaligned. Furthermore, the technical solution of the present application can determine whether the pad and the probe are misaligned before the lighting test. If the probe and the pad are misaligned, the problem of panel burns caused by direct power-on when the panel is lit up is avoided.

[0112] It should be noted that compared with the technical solution of setting up the capacitor structure 16, this technical solution requires adaptive improvement of the internal circuit structure of the test fixture 13, and a second resistor R2 is connected in series between the first resistor R1 and the second probe 15 to realize the detection of the voltage signal of the first connection node G1.

[0113] In an optional embodiment of the present invention, reference Fig.15 , Fig.15 A schematic diagram of the structure of another display panel provided in an embodiment of the present invention; Fig.16 , Fig.16 The equivalent circuit structure diagram of another display panel test system provided by an embodiment of the present invention is as follows: The display panel 100 further includes a ground line L2 and a target resistor R.

[0114] At least one second pad 12 is connected to the ground trace L2 through a connection line and a target resistor R.

[0115] In the embodiment of the present invention, Fig.15As shown, the target resistance R is formed in the form of a metal trace L3. The metal trace L3 includes but is not limited to being integrated and arranged in the array layer 18 through a semiconductor process. When the display panel 100 is designed as 10 masks, the metal trace L3 can be arranged in the first metal layer M1 or the second metal layer M2; when the display panel 100 is designed as 11 masks, the metal trace L3 can be arranged in the first metal layer M1, the second metal layer M2, or the third metal layer M3.

[0116] Specifically, in the embodiment of the present invention, the grounding line L2 includes but is not limited to a grounding loop line disposed in the display panel 100, and the grounding loop line is usually disposed around the display area AA. By connecting at least one second pad 12 to the grounding line L2 through a connecting line and a target resistor R, the grounding method of the second pad 12 can be simplified without complicated wiring.

[0117] like Fig.16 As shown, based on the display panel 100 provided in the embodiment of the present invention, the capacitor structure 16 is not integrated in the array layer 18, but the second pad 12 is directly connected to the ground trace L2 through the target resistor R, that is, the second pad 12 is directly grounded through the target resistor R.

[0118] like Fig.16 As shown, the test fixture 13 includes: a voltage transmission component 25 and a first resistor R1.

[0119] The input end of the voltage transmission component 25 is electrically connected to the first voltage terminal Va, and the output end of the voltage transmission component 25 is electrically connected to the second probe 15 via the first resistor R1.

[0120] The first voltage terminal Va is used to provide a first voltage signal V1 ; the feedback signal is a voltage signal at the second probe 15 .

[0121] It should be noted that the feedback signal includes but is not limited to being collected by the test fixture 13 .

[0122] refer to Fig.17 , Fig.17 A flow chart of another display panel testing method provided by an embodiment of the present invention. Based on the display panel testing system provided by an embodiment of the present invention, a possible implementation method of step S103 of the display panel testing method provided by an embodiment of the present invention, "determining whether the second probe 15 and the second pad 12 are misaligned based on the feedback signal" is:

[0123] S103c1: Determine a second actual voltage signal at the second probe 15 according to the first voltage signal V1, the resistance value of the first resistor R1 and the resistance value of the target resistor R.

[0124] S103c2: Compare the feedback signal with the second actual voltage signal, and determine whether the second probe 15 and the second pad 12 are misaligned according to the comparison result.

[0125] Specifically, in the embodiment of the present invention, the second actual voltage signal at the second probe 15 is determined to be V3 according to the first voltage signal V1, the resistance value of the first resistor R1, and the resistance value of the target resistor R. That is, when the second probe 15 and the second pad 12 are not misaligned, the second actual voltage signal at the second probe 15 is V3, where V3=V1×R / (R1+R).

[0126] During the probe and pad alignment detection phase, ie, the first test phase, the test fixture 13 applies the first voltage signal V1 to the second probe 15 via the internal voltage transmission component 25 , and the test fixture 13 does not apply any signal to the first probe 14 .

[0127] When the second probe 15 and the second pad 12 are not misaligned, the circuit path of the first resistor R1, the second probe 15, the second pad 12 and the target resistor R is connected, and the voltage signal at the second probe 15 represented by the detected feedback signal is equal to the second actual voltage signal V3.

[0128] In other words, in the first test phase, when the voltage signal at the second probe 15 represented by the detected feedback signal is equal to the second actual voltage signal V3, it can be explained that the second probe 15 and the second pad 12 are not misaligned, and further it can be explained that the first probe 14 and the first pad 11 are not misaligned.

[0129] When the second probe 15 is misaligned with the second pad 12, that is, the second probe 15 is not connected to the second pad 12, the circuit path of the first resistor R1, the second probe 15, the second pad 12 and the target resistor R is in a disconnected state at the connection point between the second probe 15 and the second pad 12, and the voltage signal at the second probe 15 represented by the detected feedback signal is not equal to the second actual voltage signal V3.

[0130] In other words, in the first test phase, when the voltage signal at the second probe 15 represented by the detected feedback signal is not equal to the second actual voltage signal V3, it can be explained that the second probe 15 is misaligned with the second pad 12, and further that the first probe 14 is misaligned with the first pad 11.

[0131] In general, the technical solution of the present application designs a second pad 12 based on the original display panel design, and grounds the second pad 12 through a target resistor R. By comparing the voltage signal at the second probe 15 with the second actual voltage signal V3, it is possible to determine whether the second probe 15 and the second pad 12 are misaligned, and then determine whether the first probe 14 and the first pad 11 are misaligned.

[0132] It should be noted that, compared with the technical solution of setting the capacitor structure 16 , this technical solution does not need to improve the internal circuit structure of the test fixture 13 , and the test fixture 13 with the same structure can be used to detect different display panel 100 structures.

[0133] In an optional embodiment of the present invention, when the number of the at least one second pad 12 is one, the second pad 12 is located at any position of the non-display area BB.

[0134] Specifically, in the embodiment of the present invention, when the number of at least one second pad 12 is one, the second pad 12 can be designed at any position in the non-display area BB according to the shape of the display panel 100, and the position of the second pad 12 is not specifically limited.

[0135] In an optional embodiment of the present invention, when the number of the at least one second pad 12 is plural, at least two second pads 12 are arranged in the same row, or at least two second pads 12 are arranged in different rows.

[0136] Specifically, in the embodiments of the present invention, refer to Fig.18 , Fig.18 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention, referring to Fig.19 , Fig.19 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention; a plurality of first pads 11 constitute at least one test pad group 26, and at least one test pad group 26 corresponds to a second pad 12; Fig.18 As shown, a plurality of first pads 11 constitute two test pad groups 26, and the two test pad groups 26 are respectively provided with a second pad 12; Fig.19 As shown, a plurality of first pads 11 constitute two test pad groups 26 , one of which has a second pad 12 disposed therein, and the other has no second pad 12 disposed therein.

[0137] refer to Fig. 20 , Fig. 20A schematic diagram of another display panel structure provided by an embodiment of the present invention. A plurality of first pads 11 in the same test pad group 26 are arranged in sequence in the row direction; at least one test pad group 26 is provided with two second pads 12; and the two second pads 12 in the same test pad group 26 are respectively provided at two ends of the plurality of first pads 11.

[0138] Considering that the probes on the test fixture 13 are an integral structure, when the probes and pads are misaligned, if there is no rotational offset between the probes on the test fixture and the pads on the display panel, the offset of the probe misalignment is the same at the edge and middle positions of each test pad group 26, and if there is a rotational offset, the offset of the probe misalignment should be the largest at the edge position of each test pad group 26. Therefore, if there is no misalignment of the pads and probes at the two end positions of each test pad group 26, it is considered that the alignment of the middle pad and the probe is normal. Therefore, in the embodiment of the present application, the two second pads 12 are set at the two end positions of each test pad group 26. This design will have a more accurate detection result for the misalignment of the pads and probes.

[0139] Of course, it is understandable that in other embodiments of the present invention, the second pad 12 may also be disposed at other positions of each test pad group 26 according to actual needs. Fig.21 , Fig.21 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention, referring to Fig. 22 , Fig. 22 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention, referring to Fig.23 , Fig.23 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention, wherein a plurality of first pads 11 in the same test pad group 26 are arranged in an array; at least two rows in the array are respectively provided with at least one second pad 12. Fig.24 , Fig.24 A structural schematic diagram of another display panel provided in an embodiment of the present invention, wherein a plurality of first pads 11 in the same group of test pad groups 26 are arranged in an array; at least three second pads 12 are arranged in the array arrangement, and the arrangement of geometric centers of three second pads 12 among the at least three second pads 12 constitutes three vertices of a virtual triangle.

[0140] In general, the selection of the position of the second pad 12 is for the purpose of achieving a more accurate detection result of the misalignment between the pad and the probe.

[0141] In an optional embodiment of the present invention, reference Fig.25 , Fig.25A flow chart of another display panel testing method provided by an embodiment of the present invention. The display panel testing method further includes: a second testing phase, in which the display panel testing method further includes:

[0142] S104: When the second probe 15 and the second pad 12 are not misaligned, a routing test signal is sent to the first pad 11 through the first probe 14, and a routing feedback signal at the first pad 11 is collected; and whether the display drive signal line L1 is broken is determined based on the routing feedback signal.

[0143] Specifically, in the embodiments of the present invention, refer to Fig.26 , Fig.26 A schematic diagram of the test phase distribution corresponding to a test method for a display panel provided in an embodiment of the present invention, with reference to Fig. 27 , Fig. 27 A timing diagram corresponding to a display panel testing method provided in an embodiment of the present invention. The display panel testing method includes executing the first test phase at least once and executing the second test phase once; the second test phase is executed after at least one first test phase is completed, and the test result of the first test phase closest to the second test phase is that the second probe and the second pad are not misaligned.

[0144] like Fig.26 and Fig. 27 As shown, the detection method is equivalent to a one-time detection method, that is, before using the test fixture 13 to detect the display drive signal line L1, at least one pad and probe alignment detection is required. Only when there is no error between the pad and the probe, the second test phase will be started, that is, the test fixture 13 will be used to detect the display drive signal line L1.

[0145] refer to Fig.28 , Fig.28 A schematic diagram of the test phase distribution corresponding to another display panel test method provided by an embodiment of the present invention, referring to Fig.29 , Fig.29 A timing diagram corresponding to another display panel testing method provided in an embodiment of the present invention. The display panel testing method includes executing the first test phase at least once and executing the second test phase at least once; and executing the first test phase at least once between two adjacent second test phases.

[0146] like Fig.28 and Fig.29As shown, the detection method is equivalent to a real-time detection method. Before using the test fixture 13 to detect the display drive signal line L1, at least one alignment test of the pad and the probe must be performed. Only when there is no error between the pad and the probe, the second test phase will be started, that is, the test fixture 13 will be used to detect the display drive signal line L1; and in the process of using the test fixture 13 to detect the display drive signal line L1, the first test phase must be interspersed. At this time, the test fixture 13 is stopped from detecting the display drive signal line L1 during the first interspersed test phase. In this way, it is guaranteed to the greatest extent that there will be no misalignment between the probe and the pad during the process of using the test fixture 13 to detect the display drive signal line L1, thereby eliminating the detection errors caused by the misalignment between the probe and the pad, eliminating the hidden dangers of display panel burns and charge residues, improving the detection accuracy, and improving the manufacturing yield of the display panel.

[0147] It should be noted that Fig. 27 and Fig.29 The VT signal, GRESET signal, STV_L signal, STV_R signal and CK1_L signal are some signals required for testing the display panel 100 based on the test fixture 13. Taking the VT signal as an example, when executing the first test phase, the VT signal is in a high level signal, that is, the test fixture 13 does not send a routing test signal to the first pad 11 through the first probe 14 at this time. Through the cooperation of multiple signals, the display panel 100 can be tested.

[0148] The display panel, the testing system and the testing method of the display panel provided by the present invention are introduced in detail above. The principles and implementation methods of the present invention are explained in this article by using specific examples. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation method and the scope of application. In summary, the content of this specification should not be understood as a limitation on the present invention.

[0149] It should be noted that each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0150] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device that includes a series of elements is inherent to the elements, or also includes elements inherent to these processes, methods, articles or devices. In the absence of further restrictions, the elements defined by the sentence "including a..." do not exclude the presence of other identical elements in the process, method, article or device that includes the elements.

[0151] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, characterized in that: The display panel comprises a display area and a non-display area, wherein the non-display area at least partially surrounds the display area, the display area comprises a display drive signal line, the non-display area comprises pads, the pads comprise at least one first pad and at least one second pad, and at least one of the first pads is a test pad connected to the display drive signal line; At least one of the second pads is not connected to the display driving signal line, and at least one of the second pads is input with a first voltage signal and outputs a feedback signal.

2. The display panel according to claim 1, characterized in that: The display panel further comprises a capacitor structure; the capacitor structure comprises a first electrode plate and a second electrode plate; At least one of the second pads is connected to one of the first electrode plate and the second electrode plate.

3. The display panel according to claim 2, characterized in that: The capacitor structure is an interdigital capacitor; The first electrode plate and the second electrode plate are located on the same metal layer.

4. The display panel according to claim 2, characterized in that: The first electrode plate and the second electrode plate are arranged opposite to each other in a first direction, and the first direction is a direction perpendicular to the plane where the display panel is located; The first electrode plate and the second electrode plate are located in different metal layers.

5. The display panel according to claim 1, characterized in that: The display panel also includes a ground trace; At least one of the second pads is connected to the ground trace through a connecting wire.

6. The display panel according to claim 1, characterized in that: The display panel also includes a ground trace and a target resistor; At least one of the second pads is connected to the ground trace through a connecting line and the target resistor.

7. The display panel according to claim 6, characterized in that: The target resistor is a metal trace.

8. The display panel according to any one of claims 1 to 7, characterized in that: When the number of at least one second pad is one, the second pad is located at any position in the non-display area.

9. The display panel according to any one of claims 1 to 7, characterized in that: When the number of at least one of the second pads is plural, at least two of the second pads are arranged in the same row, or at least two of the second pads are arranged in different rows.

10. A display panel testing system, characterized in that: The display panel testing system comprises the display panel and the testing fixture according to any one of claims 1 to 9; The test fixture includes at least one first probe and at least one second probe, wherein the at least one first probe is used to be electrically connected to a first pad in the display panel, and the at least one second probe is used to be electrically connected to a second pad in the display panel.

11. The display panel testing system according to claim 10, characterized in that: The display panel further includes a capacitor structure; the capacitor structure includes a first electrode plate and a second electrode plate; at least one of the second pads is connected to one of the first electrode plate and the second electrode plate, and the other electrode plate is electrically connected to a fixed signal terminal; The second probe is connected to the second pad.

12. The display panel testing system according to claim 11, characterized in that: The test fixture comprises: a voltage transmission component and a first resistor; The input end of the voltage transmission component is electrically connected to the first voltage end, and the output end of the voltage transmission component is electrically connected to the second probe through the first resistor; Among them, the first voltage terminal is used to provide the first voltage signal, and the voltage value represented by the first voltage signal is a first voltage value; the feedback signal is a target time signal used for the voltage value at the second probe to rise to the first voltage value.

13. The display panel testing system according to claim 10, characterized in that: The display panel further includes a grounding trace; at least one of the second pads is connected to the grounding trace via a connecting wire; The second probe is connected to the second pad.

14. The display panel testing system according to claim 13, characterized in that: The test fixture comprises: a voltage transmission component, a first resistor and a second resistor; The input end of the voltage transmission component is electrically connected to the first voltage end, and the output end of the voltage transmission component is electrically connected to the second probe through the first resistor and the second resistor in sequence; the connection node between the first resistor and the second resistor is a first connection node; The first voltage terminal is used to provide the first voltage signal; and the feedback signal is a voltage signal at the first connection node.

15. The display panel testing system according to claim 10, characterized in that: The display panel also includes a ground trace and a target resistor; At least one of the second pads is connected to the ground trace via a connecting line and the target resistor; The second probe is connected to the second pad.

16. The display panel testing system according to claim 15, characterized in that: The test fixture comprises: a voltage transmission component and a first resistor; The input end of the voltage transmission component is electrically connected to the first voltage end, and the output end of the voltage transmission component is electrically connected to the second probe through the first resistor; The first voltage terminal is used to provide the first voltage signal; and the feedback signal is a voltage signal at the second probe.

17. A method for testing a display panel, characterized in that: The display panel testing method is applied to a test fixture in a display panel testing system according to any one of claims 10 to 16, and the display panel testing method includes a first testing phase. In the first testing phase, the display panel testing method includes: Connecting at least one of the first probes on the test fixture to at least one of the first pads, and connecting at least one of the second probes on the test fixture to at least one of the second pads; Sending the first voltage signal to the second pad through the second probe, and collecting the feedback signal; Whether the second probe and the second pad are misaligned is determined based on the feedback signal.

18. The display panel testing method according to claim 17, characterized in that: The display panel further includes a capacitor structure; the capacitor structure includes a first electrode plate and a second electrode plate; at least one of the second pads is connected to one of the first electrode plate and the second electrode plate, and the other electrode plate is electrically connected to a fixed signal terminal; The second probe is connected to the second pad; the test fixture includes: a voltage transmission component and a first resistor; the input end of the voltage transmission component is electrically connected to the first voltage end, and the output end of the voltage transmission component is electrically connected to the second probe through the first resistor; wherein the first voltage end is used to provide the first voltage signal, and the voltage value represented by the first voltage signal is the first voltage value; the feedback signal is a target time signal used for the voltage value at the second probe to rise to the first voltage value; The determining, based on the feedback signal, whether the second probe and the second pad are misaligned includes: Determine a charging time signal for charging the capacitor structure to the first voltage value; The target time signal and the charging time signal are compared, and it is determined whether the second probe and the second pad are misaligned according to the comparison result.

19. The display panel testing method according to claim 17, characterized in that: The display panel also includes a ground trace; At least one of the second pads is connected to the ground trace through a connecting line; the second probe is connected to the second pad; the test fixture comprises: a voltage transmission component, a first resistor and a second resistor; the input end of the voltage transmission component is electrically connected to the first voltage end, and the output end of the voltage transmission component is electrically connected to the second probe through the first resistor and the second resistor in sequence; the connection node between the first resistor and the second resistor is a first connection node; wherein the first voltage end is used to provide the first voltage signal; the feedback signal is the voltage signal at the first connection node; The determining, based on the feedback signal, whether the second probe and the second pad are misaligned includes: determining a first actual voltage signal at the first connection node according to the first voltage signal, the resistance value of the first resistor, and the resistance value of the second resistor; The feedback signal is compared with the first actual voltage signal, and it is determined whether the second probe and the second pad are misaligned according to the comparison result.

20. The display panel testing method according to claim 17, characterized in that: The display panel also includes a ground trace and a target resistor; At least one of the second pads is connected to the ground trace via a connecting line and the target resistor; The second probe is connected to the second pad; the test fixture comprises: a voltage transmission component and a first resistor; the input end of the voltage transmission component is electrically connected to the first voltage end, and the output end of the voltage transmission component is electrically connected to the second probe through the first resistor; wherein the first voltage end is used to provide the first voltage signal; the feedback signal is the voltage signal at the second probe; The determining, based on the feedback signal, whether the second probe and the second pad are misaligned includes: determining a second actual voltage signal at the second probe according to the first voltage signal, the resistance value of the first resistor, and the resistance value of the target resistor; The feedback signal is compared with the second actual voltage signal, and it is determined whether the second probe and the second pad are misaligned according to the comparison result.

21. The display panel testing method according to claim 17, characterized in that: In the case where the second probe and the second pad are not misaligned, the display panel testing method further includes a second testing phase. In the second testing phase, the display panel testing method further includes: A routing test signal is sent to the first pad through the first probe, and a routing feedback signal at the first pad is collected; and whether the display drive signal line is broken is determined based on the routing feedback signal.

22. The display panel testing method according to claim 21, characterized in that: The display panel testing method comprises performing the first testing phase at least once and performing the second testing phase once; The second test phase is performed after at least one of the first test phases is completed, and a test result of the first test phase closest to the second test phase is that the second probe and the second pad are not misaligned.

23. The display panel testing method according to claim 21, characterized in that: The display panel testing method comprises performing the first testing phase at least once and performing the second testing phase at least once; Between two adjacent second test phases, the first test phase is executed at least once.

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