Analysis method, device and equipment of full-bridge LLC circuit, and storage medium

Abstract

The application discloses an analysis method and device of a full-bridge LLC circuit, equipment and a storage medium, and belongs to the field of new energy vehicles. The method is executed by a control program of an OBC, and the OBC comprises a full-bridge LLC circuit. The method comprises the following steps: transmitting a frequency adjustment factor to a digital control circuit; the digital control circuit is connected with the full-bridge LLC circuit, and is used for providing a switching control signal to a MOS tube of the full-bridge LLC circuit; the frequency adjustment factor is used for generating the switching control signal and adjusting the switching frequency of the MOS tube; the output current and the output voltage of the full-bridge LLC circuit are detected; a current waveform diagram is displayed based on the output current, and a voltage waveform diagram is displayed based on the output voltage. The method can analyze the soft switching working condition of the full-bridge LLC circuit.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of new energy vehicles, in particular to a full-bridge LLC circuit analysis method, device, equipment and storage medium. BACKGROUND

[0002] An on-board charger (OBC) is a charger installed on an electric vehicle, mainly applied to Blade Electric Vehicles (BEV) and Plug-in Hybrid Electric Vehicles (PHEV). Specifically, the function of the OBC is to convert alternating current (AC) from the power grid into direct current (DC) required by the high-voltage battery of the electric vehicle, and also can convert the direct current of the power battery into alternating current to supply external loads (V2L) or other vehicles (V2V) or directly feedback to the grid (V2G), that is, the OBC can realize bidirectional energy transmission between the vehicle power battery and external loads or the grid.

[0003] The OBC in the related art will use a full-bridge LLC topology DCDC, and the bidirectional OBC will use a CLLLC topology structure. LLC is a resonant circuit that realizes constant output voltage by controlling the switching frequency (frequency regulation). Its advantages are: realizing zero voltage turn-on (ZVS) of the primary four MOS (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET) switches and zero current turn-off (ZCS) of the secondary rectifier diodes. Through this soft switching technology, the switching loss of the DCDC power supply can be reduced, and the efficiency and power density of the OBC can be improved.

[0004] The related art lacks a method for detailed analysis of the soft switching implementation of the full-bridge LLC circuit of the OBC control system, and is limited to using the OBC development scheme recommended by a specific supplier, which is not conducive to the developer to freely choose any manufacturer's chip for independent controllable development. SUMMARY

[0005] The present application provides a full-bridge LLC circuit analysis method, device, equipment and storage medium, which can enrich the analysis method of the full-bridge LLC circuit. The technical solution is as follows:

[0006] According to an aspect of the present application, a method for analyzing a full-bridge LLC circuit is provided, the method is executed by a terminal, the terminal logs in a first account; the method comprises:

[0007] displaying a first live room in which a live bullet chat game is started, the live bullet chat game is a game in which at least one account in the first live room participates by sending bullet chat messages;

[0008] receiving a first sensing operation, the first sensing operation is a user operation received by a sensor in the terminal;

[0009] in response to the first sensing operation, displaying, in the first live room, a first bullet chat message corresponding to the first sensing operation and sent by the first account;

[0010] displaying a response result of the live bullet chat game to the first bullet chat message.

[0011] According to another aspect of the present application, a device for analyzing a full-bridge LLC circuit is provided, the device logs in a first account; the device comprises:

[0012] a display module, configured to display a first live room in which a live bullet chat game is started, the live bullet chat game is a game in which at least one account in the first live room participates by sending bullet chat messages;

[0013] a sensing module, configured to receive a first sensing operation, the first sensing operation is a user operation received by a sensor in the terminal;

[0014] the display module, configured to, in response to the first sensing operation, display, in the first live room, a first bullet chat message corresponding to the first sensing operation and sent by the first account;

[0015] the display module, configured to display a response result of the live bullet chat game to the first bullet chat message.

[0016] According to another aspect of the present application, a computer device is provided, the computer device comprises a processor and a memory, the memory stores at least one instruction, at least one program, a code set or an instruction set, the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by the processor to implement the method for analyzing a full-bridge LLC circuit according to the above aspect.

[0017] According to another aspect of the present application, a computer readable storage medium is provided, the readable storage medium storing at least one instruction, at least one program, a code set or an instruction set, the at least one instruction, the at least one program, the code set or the instruction set being loaded and executed by a processor to implement the analysis method of the full-bridge LLC circuit according to the above aspect.

[0018] According to another aspect of the present application, a computer program product or computer program is provided, the computer program product or computer program comprising computer instructions stored in a computer readable storage medium. A processor of a computer device reads the computer instructions from the computer readable storage medium, and the processor executes the computer instructions to cause the computer device to perform the analysis method of the full-bridge LLC circuit provided in various optional implementations of the above aspect.

[0019] The technical solutions provided by the present application have at least the following beneficial effects:

[0020] The analysis method of the full-bridge LLC circuit is provided, the switching frequency of the MOS tube of the full-bridge LLC circuit can be dynamically adjusted by the digital control circuit, the working state of the full-bridge LLC circuit can be changed, the output voltage and current of the full-bridge LLC circuit are measured, the current waveform diagram and the voltage waveform diagram are displayed, the soft switching working condition of the full-bridge LLC circuit is analyzed by the developer, and the details of the soft switching waveform and the efficiency advantage of the LLC DCDC are understood. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0022] Figure 1 is a schematic diagram of a computer device provided by an exemplary embodiment of the present application;

[0023] Figure 2 is a schematic diagram of a charging system provided by an exemplary embodiment of the present application;

[0024] Figure 3 is a schematic diagram of module one provided by an exemplary embodiment of the present application;

[0025] Figure 4 is a schematic diagram of module two provided by an exemplary embodiment of the present application;

[0026] Figure 5 is a schematic diagram of module three provided by an exemplary embodiment of the present application;

[0027] Figure 6 is a schematic diagram of module four provided by an example embodiment of the present application;

[0028] Figure 7 is a schematic diagram of module five provided by an example embodiment of the present application;

[0029] Figure 8 is a schematic diagram of module six provided by an example embodiment of the present application;

[0030] Figure 9 is a circuit schematic diagram of a charging system provided by an example embodiment of the present application;

[0031] Figure 10 is a flow chart of an analysis method of a full-bridge LLC circuit provided by an example embodiment of the present application;

[0032] Figure 11 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an example embodiment of the present application;

[0033] Figure 12 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an example embodiment of the present application;

[0034] Figure 13 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an example embodiment of the present application;

[0035] Figure 14 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an example embodiment of the present application;

[0036] Figure 15 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an example embodiment of the present application;

[0037] Figure 16 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an example embodiment of the present application;

[0038] Figure 17 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an example embodiment of the present application;

[0039] Figure 18 is a flow chart of an analysis method of a full-bridge LLC circuit provided by an example embodiment of the present application;

[0040] Figure 19 is a structural schematic diagram of an analysis device of a full-bridge LLC circuit provided by an example embodiment of the present application;

[0041] Figure 20FIG. 1 is a structural schematic diagram of a computer device according to an example embodiment of the present application.

[0042] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments consistent with the present application and, together with the description, further serve to explain the principles of the application. DETAILED DESCRIPTION

[0043] For the purpose of making the objects, technical solutions and advantages of the present application clearer, the embodiments of the present application will be further described in detail below with reference to the drawings.

[0044] A full-bridge LLC circuit is a high-efficiency DC-DC power conversion topology. Exemplarily, a full-bridge LLC circuit includes power switches, a resonant tank, a transformer, and a diode rectifier. The power switches are usually MOSFET power switches, which are used to convert the input DC voltage into a high-frequency square wave. The resonant tank is composed of a resonant capacitor (Cr), a resonant inductor (Lr), and a magnetizing inductor (Lm). The function of the resonant tank is to filter out the harmonics of the square wave and output a sine wave at the base switching frequency to the input of the transformer. Among them, the resonant inductor (Lr) is in series with the capacitor and the transformer, and the magnetizing inductor (Lm) is in parallel with them. The transformer is used to transmit the sine wave signal and to step up or step down the voltage according to the application requirements. The diode rectifier is used to convert the sine wave into a stable DC output.

[0045] The working process of the full-bridge LLC circuit can include the following four steps:

[0046] Step 1, conversion of input voltage: first, the input DC voltage is converted into a high-frequency AC square wave by using four MOSFET power switches (full-bridge structure). The four MOSFET power switches work in a complementary manner, ensuring that at any moment, two MOSFET power switches are turned on, and the other two MOSFET power switches are turned off, thereby forming a continuous AC signal.

[0047] Step 2, resonance and voltage division: the AC square wave then enters the resonant tank. In the resonant tank, the harmonics of the square wave are filtered out, leaving only the sine wave at the base frequency. The amplitude of the sine wave is affected by the parameters of the resonant tank, especially the ratio of the resonant inductor and the magnetizing inductor. By adjusting these parameters, the voltage division of the sine wave on the magnetizing inductor can be controlled, and thus the output voltage can be adjusted.

[0048] Step 3, transmission of the transformer: the sine wave signal processed by the resonant tank is transmitted to the high-frequency transformer. The transformer steps up or steps down the voltage according to the application requirements, ensuring that the output voltage meets the design requirements.

[0049] Step 4, rectification and output: on the secondary side of the transformer, the sine wave signal is converted into a stable DC output through a diode rectifier. The function of the rectifier is to convert the AC signal into a DC signal, while ensuring the smoothness and stability of the output voltage.

[0050] Figure 1 A schematic diagram of the computer device 101 provided by an example embodiment of the present application is shown.

[0051] By way of example, the analysis method of the full-bridge LLC circuit shown in the embodiments of the present application can be applied in a computer device 101 running a control program 102 of an OBC. The computer device can include a vehicle terminal, a mobile phone, a tablet computer, a notebook computer, a laptop computer, a desktop computer, an all-in-one computer, an Internet of Things device, a smart robot workstation, a television, a set-top box, smart glasses, a smart watch, a digital camera, an MP4 player device, an MP5 player device, a learning machine, a talking machine, an electronic paper, an electronic dictionary, a Virtual Reality (VR) player device, or an Augmented Reality (AR) player device, etc.

[0052] The computer device 101 includes a first memory and a first processor. The first memory stores an analysis program of a full-bridge LLC circuit; the analysis program of the full-bridge LLC circuit is called and executed by the first processor to implement the analysis method of the full-bridge LLC circuit provided by the present application. The first memory can include, but is not limited to, the following: Random Access Memory (RAM), Read Only Memory (ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), and Electric Erasable Programmable Read-Only Memory (EEPROM).

[0053] The first processor can be composed of one or more integrated circuit chips. Alternatively, the first processor can be a general-purpose processor, such as a Central Processing Unit (CPU) or a Network Processor (NP). Alternatively, the first processor can implement the analysis method of the full-bridge LLC circuit provided by the present application by running a program or code.

[0054] For example, computer device 101 is connected to an OBC, which includes a digital control circuit and a full-bridge LLC circuit. The digital control circuit generates a switching control signal based on a resonant frequency adjustment factor provided by a program, and inputs the switching control signal into the full-bridge LLC circuit. For example, as... Figure 2 As shown, the digital control circuit includes: module one resonant frequency adjustment factor 301, module two periodic reset integrator 302, and module three full-bridge PWM (Pulse Width Modulation) generator 303; the full-bridge LLC circuit includes: module four full-bridge driver 304, module five LLC resonant cavity 305, and module six full-bridge rectifier circuit 306.

[0055] For example, the overall design goals of the LLCDCDC are: input voltage Vin = 400V, rated output voltage Vo = 350V, minimum output voltage Vomin = 280V, maximum output voltage Vomax = 420V, rated output power Po = 6.6kW, and LLC resonant frequency fr = 500kHz. The above design goals are merely illustrative; the full-bridge LLC circuit provided in this application can also employ other design goals. Based on the above design goals, an example of a digital control circuit and a full-bridge LLC circuit is given.

[0056] Module as Figure 3 As shown, the frequency adjustment factor K_rel_freq 401 is multiplied by the first gain 402: the resonant frequency is 500kHz, and then multiplied by the second gain 403: 2π. Then, it is discretized using a 100kHz sampling clock 404 source to obtain a discrete signal. The discrete signal is then delayed by 405 time steps, and the result is used as the input of the subsequent periodic reset integrator 302. Figure 3 Examples are given with frequency adjustment factors of 1.2, 1, and 0.8 respectively.

[0057] Module Two, as Figure 4 As shown, the modulated frequency adjustment factor is input to module 2 integrator 406. Integrator 406 is reset with a period of 2π. Therefore, the integrator will output a sawtooth wave with a modulated resonant frequency, with a peak value of 2π and a frequency of 500kHz*K_rel_freq. After passing through the sin function 407, it is converted into a sine wave with a frequency of 500kHz*K_rel_freq.

[0058] According to the above design goals, when K_rel_freq=1, the output frequency fs of module 2 is equal to the resonant frequency fr of the full-bridge LLC circuit, which is 500kHz, and the full-bridge LLC circuit is operating in a resonant state.

[0059] When K_rel_freq = 1.2, the output frequency of Module 2, fs = 600 kHz > fr, and the full-bridge LLC circuit operates in the under-resonant state.

[0060] When K_rel_freq = 0.8, the output frequency of Module 2, fs = 400 kHz < fr, and the full-bridge LLC circuit operates in the over-resonant state.

[0061] Module 3 is as Figure 5 shown. The sine wave output by Module 2 is input into Module 3. The front-end comparator 408 of Module 3 synchronously outputs a square-wave signal corresponding to the frequency, and then through the dead-time control module 409, two dead-time complementary switch control signals S12 and S34 are output. The dead-time control module 409 includes a buffer 410 and a NOT gate 411. The buffer 410 is used to delay the square-wave signal for a dead-time to obtain the switch control signal S12. The dead time is a delay time set to avoid the simultaneous conduction of the high-side and low-side power transistors. For example, the dead time can be 50 nanoseconds or 100 nanoseconds. The NOT gate 411 is used to invert the square-wave signal and output a switch control signal S34 that is complementary to the switch control signal S12.

[0062] Module 4 is as Figure 6 shown. The full-bridge driver 304 consists of 4 silicon carbide (SiC) MOS 412. The MOS 412 can use CREE's C3M0030090K. At the same time, a 1 nF capacitor 413 is additionally connected in parallel to the Vds of the MOS 412 to absorb the transient reverse current. The gate of the MOS 412 uses RC filtering to limit the edge time of the MOS 412 and optimize the EMI (Electromagnetic Interference) performance. The switching frequency of the full-bridge driver 304 is determined by the frequencies of the switch control signals S12 and S34 output by the previous-stage PWM generator 303.

[0063] Module 5 is as Figure 7 shown. The mainstream bidirectional CLLC topology is adopted. Since the forward and reverse analysis processes are similar, only the forward charging process of the LLC is taken as an example for illustration below. Among them, the 4 MOS transistors in the secondary can be replaced by rectifier diodes, and the high-voltage battery is replaced by a resistor with the same power.

[0064] Exemplarily, there are two choices for the LLC primary resonant inductor 414 and the secondary resonant inductor 415. One is to use independent inductor components. The advantage is that the flexibility can be adjusted according to the circuit needs, which is beneficial to development and debugging. The other is to use the leakage inductance of the transformer to replace the resonant inductor, that is, the magnetically integrated LLC transformer. The advantage is that the cost is reduced by eliminating the separate resonant inductor, but it is difficult to adjust the leakage inductance and the flexibility is poor.

[0065] Module six as Figure 8 As shown in the figure, the high-voltage battery of the vehicle is charged by replacing the 6.6kW same power resistor 416 18.56Ω, the default battery rated voltage is 350V, the depleted voltage is 280V, and the full voltage is 420V. At the same time, the output voltage Vo_fbk and the output current Io_fbk are collected as feedback parameters for software closed-loop control to realize constant current charging or constant voltage charging control.

[0066] After the connection of modules one to six, the circuit shown in the figure can be obtained. Figure 9 The input of the digital control circuit is the frequency adjustment factor, and the output is the switch control signal S12 and the switch control signal S34. The full-bridge LLC circuit is obtained by sequentially connecting the module four full-bridge drive 304, the module five LLC resonant cavity 305, and the module six full-bridge rectifier circuit 306. The digital control circuit outputs the switch control signal S12 and the switch control signal S34 as the switch control signal of the full-bridge LLC circuit by using the DC power supply 417 to power the full-bridge LLC circuit.

[0067] Figure 10 It is a flowchart of the analysis method of the full-bridge LLC circuit provided by an exemplary embodiment of the present application. The method can be used in the computer device as shown in the figure. Figure 1 The method is executed by the control program of the OBC running in the computer device, and the OBC includes the full-bridge LLC circuit. The method includes the following steps.

[0068] Step 210: transmitting the frequency adjustment factor to the digital control circuit; the digital control circuit is connected to the full-bridge LLC circuit and used to provide the switch control signal to the MOS tube of the full-bridge LLC circuit; the frequency adjustment factor is used to generate the switch control signal and adjust the switching frequency of the MOS tube.

[0069] The frequency adjustment factor is a constant, for example, the frequency adjustment factor is a positive number. The frequency adjustment factor is used to adjust the switching frequency of the full-bridge LLC circuit. Optionally, the frequency adjustment factor is multiplied by the resonant frequency of the full-bridge LLC circuit to obtain the switching frequency, which facilitates the developer to adjust the switching frequency based on the resonant frequency of the full-bridge LLC circuit to control the working state of the full-bridge LLC circuit. For example, the frequency adjustment factor is input into the module one resonant frequency adjustment factor 301 of the digital control circuit, so as to facilitate the digital control circuit to output the switch control signal S12 and S34 based on the frequency adjustment factor.

[0070] For example, the frequency adjustment factor can be dynamically changed, and the control program can dynamically adjust the frequency adjustment factor based on the detected output voltage and / or output current of the full-bridge LLC circuit to control the full-bridge LLC circuit to be in a target operating state, or to control the output current and / or output voltage of the full-bridge LLC circuit to meet an expectation.

[0071] For example, at a first time, the control program inputs a first frequency adjustment factor, and determines that the output current deviates from a target output current based on the detected output current; at a second time, the control program can input a second frequency adjustment factor to control the output current to approach the target output current. In this way, the control program can generate a signal of a dynamically changed frequency adjustment factor according to an error signal of the output voltage and / or output current and the target output voltage and / or target output current in real time.

[0072] Optionally, the control program transmits a first frequency adjustment factor to the digital control circuit; the first frequency adjustment factor corresponds to a first switching frequency, and the first switching frequency is equal to a resonant frequency of the full-bridge LLC circuit. For example, the first frequency adjustment factor is 1, the first switching frequency is 500 Hz, and the resonant frequency of the full-bridge LLC circuit is 500 Hz, so that the full-bridge LLC circuit operates in a resonant state.

[0073] Or, a second frequency adjustment factor is transmitted to the digital control circuit; the second frequency adjustment factor corresponds to a second switching frequency, and the second switching frequency is greater than the resonant frequency of the full-bridge LLC circuit. For example, the second frequency adjustment factor is 1.2, the second switching frequency is 600 Hz, and the resonant frequency of the full-bridge LLC circuit is 500 Hz, so that the full-bridge LLC circuit operates in an under-resonant state.

[0074] Or, a third frequency adjustment factor is transmitted to the digital control circuit; the third frequency adjustment factor corresponds to a third switching frequency, and the third switching frequency is less than the resonant frequency of the full-bridge LLC circuit. For example, the third frequency adjustment factor is 0.8, the third switching frequency is 400 Hz, and the resonant frequency of the full-bridge LLC circuit is 500 Hz, so that the full-bridge LLC circuit operates in an over-resonant state.

[0075] Step 220: detecting the output current and the output voltage of the full-bridge LLC circuit.

[0076] For example, as shown in FIG. 2, the control program can detect the output voltage Vo_fbk and the output current Io_fbk of the full-bridge LLC circuit. Figure 8

[0077] ​Optionally, the control program can also detect other data in the full-bridge LLC circuit to analyze the operation of the full-bridge LLC circuit. For example, the Vds of each of the four MOSFETs, the current of the MOSFETs, the switching control signal of the input MOSFET, the voltage and current of each of the four diodes in the full-bridge rectifier circuit 306, and the like can be detected.

[0078] Step 230: display the current waveform diagram based on the output current and the voltage waveform diagram based on the output voltage.

[0079] For example, the control program can display the current waveform diagram of the output current and the voltage waveform diagram of the output voltage on the computer device. From the current waveform diagram and the voltage waveform diagram, it can be seen that the full-bridge LLC circuit periodically performs the soft switching process, which facilitates the developer to understand the soft switching operation of the LLC circuit by analyzing the current waveform diagram and the voltage waveform diagram, and to understand the soft switching waveform details and efficiency advantages of the LLC DCDC.

[0080] Optionally, if the control program also detects other circuit data, the corresponding waveform diagram can also be displayed to facilitate the developer to analyze.

[0081] In an optional embodiment, as shown in Figure 11 the computer device displays the corresponding output voltage and primary resonance inductance current when different frequency adjustment factors K_rel_freq are input.

[0082] When the first frequency adjustment factor is input, the current waveform diagram and the voltage waveform diagram of the full-bridge LLC circuit operating in the resonance state are displayed based on the output current and the output voltage, respectively. For example, as shown in Figure 11 when K_rel_freq = 1, the switching frequency fs = 500 kHz, Vout = 350 V, the primary resonance inductance current is approximately a sine wave, and the full-bridge LLC circuit operates in the resonance state.

[0083] When the second frequency adjustment factor is input, the current waveform diagram and the voltage waveform diagram of the full-bridge LLC circuit operating in the under-resonance state are displayed based on the output current and the output voltage, respectively. For example, as shown in Figure 11 when K_rel_freq = 1.2, the switching frequency fs = 600 kHz, Vout = 284 V, the primary resonance inductance current is under-resonance, and when K_rel_freq is slightly increased, Vout = 280 V.

[0084] When the third frequency adjustment factor is input, the current waveform diagram and the voltage waveform diagram of the full-bridge LLC circuit operating in the over-resonance state are displayed based on the output current and the output voltage, respectively. For example, as shown in Figure 11As shown, when K_rel_freq=0.8, the switching frequency fs=400 kHz, Vout=420 V, and the primary resonant inductance current is over resonant.

[0085] In an alternative embodiment, the computer device can also display the ZVS zero voltage turn-on waveform of resonance, under resonance, and over resonance. As can be seen from the figure, before the gate turn-on, the MOS Vds has been reduced, realizing soft turn-on, avoiding the loss caused by the crossing of voltage and current in the MOS turn-on stage.

[0086] As shown in the full-bridge LLC circuit working in the resonant state, a first zero voltage turn-on ZVS waveform diagram is displayed; the first ZVS waveform diagram is used to analyze the ZVS condition of the full-bridge LLC circuit working in the resonant state; the first ZVS waveform diagram includes at least one of the following: a waveform diagram of a switching control signal, a drain-source voltage waveform diagram of a MOS transistor, and a current waveform diagram of the MOS transistor. Figure 12

[0087] As shown in the full-bridge LLC circuit working in the under resonant state, a second ZVS waveform diagram is displayed; the second ZVS waveform diagram is used to analyze the ZVS condition of the full-bridge LLC circuit working in the under resonant state; the second ZVS waveform diagram includes at least one of the following: a waveform diagram of a switching control signal, a drain-source voltage waveform diagram of a MOS transistor, and a current waveform diagram of the MOS transistor. Figure 13

[0088] As shown in the full-bridge LLC circuit working in the over resonant state, a third ZVS waveform diagram is displayed; the third ZVS waveform diagram is used to analyze the ZVS condition of the full-bridge LLC circuit working in the over resonant state; the third ZVS waveform diagram includes at least one of the following: a waveform diagram of a switching control signal, a drain-source voltage waveform diagram of a MOS transistor, and a current waveform diagram of the MOS transistor. Figure 14 In an alternative embodiment, the computer device can also display the ZCS zero current turn-off waveform of resonance, under resonance, and over resonance. As can be seen from the figure, before the diode turn-off, the diode current has been reduced, realizing soft turn-off, avoiding the loss caused by the crossing of voltage and current in the diode turn-off stage.

[0089] As shown in the full-bridge LLC circuit working in the resonant state, a first zero current turn-off ZCS waveform diagram is displayed; the first ZCS waveform diagram is used to analyze the ZCS condition of the full-bridge LLC circuit working in the resonant state; the first ZCS waveform diagram includes at least one of the following: a voltage waveform diagram of a secondary diode in the full-bridge LLC circuit, and a current waveform diagram of the secondary diode.

[0090] Figure 15 As shown in the full-bridge LLC circuit working in the under resonant state, a second ZCS waveform diagram is displayed; the second ZCS waveform diagram is used to analyze the ZCS condition of the full-bridge LLC circuit working in the under resonant state; the second ZCS waveform diagram includes at least one of the following: a waveform diagram of a switching control signal, a drain-source voltage waveform diagram of a MOS transistor, and a current waveform diagram of the MOS transistor.

[0091] As shown in the full-bridge LLC circuit working in the over resonant state, a third ZCS waveform diagram is displayed; the third ZCS waveform diagram is used to analyze the ZCS condition of the full-bridge LLC circuit working in the over resonant state; the third ZCS waveform diagram includes at least one of the following: a waveform diagram of a switching control signal, a drain-source voltage waveform diagram of a MOS transistor, and a current waveform diagram of the MOS transistor.​​​Figure 16 In the case where the full-bridge LLC circuit works in the under-resonance state, a second ZCS waveform diagram is displayed, as shown in FIG. 2B. The second ZCS waveform diagram is used to analyze the ZCS condition when the full-bridge LLC circuit works in the under-resonance state. The second ZCS waveform diagram includes at least one of the voltage waveform of the secondary diode in the full-bridge LLC circuit and the current waveform of the secondary diode.

[0092] As shown in FIG. 2C, in the case where the full-bridge LLC circuit works in the over-resonance state, a third ZCS waveform diagram is displayed. The third ZCS waveform diagram is used to analyze the ZCS condition when the full-bridge LLC circuit works in the over-resonance state. The third ZCS waveform diagram includes at least one of the voltage waveform of the secondary diode in the full-bridge LLC circuit and the current waveform of the secondary diode. Figure 17

[0093] In summary, the method provided by the embodiment provides an analysis method of the full-bridge LLC circuit. The switching frequency of the MOS tube of the full-bridge LLC circuit can be dynamically adjusted by the digital control circuit, the working state of the full-bridge LLC circuit is changed, the output voltage and the output current of the full-bridge LLC circuit are measured, the current waveform diagram and the voltage waveform diagram are displayed, the soft switching working condition of the full-bridge LLC circuit is analyzed by the developer, and the details of the soft switching waveform and the efficiency advantage of the LLC DCDC are understood.

[0094] The method provided by the embodiment can analyze the output voltage, the LLC output current, the primary MOS tube ZVS waveform, and the secondary diode ZCS waveform of the LLC in the resonance, under-resonance, and over-resonance states. Different ZVS and ZCS waveform characteristics corresponding to different frequency adjustment factors are embodied, the developer can completely understand the soft switching waveforms of the LLC DCDC in the three states, and the possible development results and optimization paths of the developed LLC DCDC are fully evaluated.

[0095] In an optional embodiment, the computer device can dynamically adjust the frequency adjustment factor according to the target charging voltage or the target charging current of the OBC, so that the actual output voltage or the actual output current approaches the target value.

[0096] Figure 18 FIG. 1 is a flow diagram of an analysis method of a full-bridge LLC circuit provided by an example embodiment of the present application. The method can be used in a computer device as shown in FIG. 2A. Figure 1 Figure 10 Based on the embodiment shown in FIG. 2B, step 210 includes step 211 and step 212.

[0097] Step 211: calculating a voltage error signal of the output voltage and the target charging voltage; or, calculating a current error signal of the output current of the full-bridge LLC circuit and the target charging current. ​​

[0098] For example, the OBC can be set with a target charging voltage during constant voltage charging, and a target charging current during constant current charging. The control program can calculate a frequency adjustment factor according to the error between the detected output current and / or output voltage of the full-bridge LLC circuit and the target output current and / or target output voltage.

[0099] For example, the frequency adjustment factor can be calculated according to the error signal, for example, when the target charging voltage is higher than the output voltage, the output voltage can be increased by reducing the frequency adjustment factor.

[0100] For example, the control program provides a frequency adjustment factor, and the control program adjusts the switching frequency of the drive circuit gate signal by adjusting this variable, so as to adjust the output voltage of the LLC DCDC. The frequency adjustment factor can be obtained according to the error signal of the constant current charging target charging current, or according to the error signal of the target charging voltage of the constant voltage charging. The frequency adjustment factor facilitates the control program of the OBC to realize the constant current and constant voltage control of the two stages of fast charging of the battery. Further, the ZVS and ZCS waveforms corresponding to the frequency adjustment factor are obtained for analysis and evaluation, so as to realize the software control combined with the overall LLC DCDC of the circuit to achieve the soft switching effect evaluation.

[0101] Step 212: adjust the frequency adjustment factor based on the voltage error signal to control the output voltage to approach the target charging voltage; or, adjust the frequency adjustment factor based on the current error signal to control the output current to approach the target charging current.

[0102] In summary, the method provided by the embodiment can calculate the error between the output current or output voltage of the full-bridge LLC circuit and the target value according to the set target charging current or target charging voltage, dynamically adjust the switching frequency of the MOS tube of the full-bridge LLC circuit through the digital control circuit, and adjust the output current or output voltage of the full-bridge LLC circuit. The output voltage and current of the full-bridge LLC circuit are measured, and the current waveform diagram and voltage waveform diagram are displayed, which facilitates the developers to analyze the soft switching working condition of the full-bridge LLC circuit and understand the details and efficiency advantages of the soft switching waveform of the LLC DCDC.

[0103] It should be noted that the application can display a prompt interface, a pop-up window or output voice prompt information before and during the collection of relevant data of the user, which is used to prompt the user that the relevant data of the user is currently being collected, so that the application only starts to perform the relevant steps of obtaining the relevant data of the user after obtaining the confirmation operation of the user to the prompt interface or the pop-up window, otherwise (that is, without obtaining the confirmation operation of the user to the prompt interface or the pop-up window), ending the relevant steps of obtaining the relevant data of the user, that is, not obtaining the relevant data of the user. In other words, all the user data collected by the application is collected under the condition that the user agrees and authorizes, and the collection, use and processing of the relevant user data need to comply with the relevant laws, regulations and standards of the country and region.

[0104] It should be noted that the order of the method steps provided by the embodiments of the application can be appropriately adjusted, and the steps can also be increased or decreased accordingly according to the situation. Any person skilled in the art can easily think of changes within the technical range disclosed in the application, which should be covered within the protection scope of the application, therefore, it will not be described again.

[0105] Figure 19 is a structural schematic diagram of an analysis device of a full-bridge LLC circuit provided by an exemplary embodiment of the application. The device runs a control program of an on-board charger (OBC), and the OBC includes the full-bridge LLC circuit. The device includes:

[0106] The transmission module 1001 is configured to transmit a frequency adjustment factor to a digital control circuit. The digital control circuit is connected to the full-bridge LLC circuit and configured to provide a switching control signal to a MOS transistor of the full-bridge LLC circuit. The frequency adjustment factor is used to generate the switching control signal and adjust the switching frequency of the MOS transistor.

[0107] The detection module 1002 is configured to detect an output current and an output voltage of the full-bridge LLC circuit.

[0108] The display module 1003 is configured to display a current waveform diagram based on the output current and a voltage waveform diagram based on the output voltage.

[0109] In an alternative embodiment, the transmission module 1001 is configured to perform at least one of the following:

[0110] The transmission module 1001 is configured to transmit a first frequency adjustment factor to the digital control circuit. The first frequency adjustment factor corresponds to a first switching frequency, and the first switching frequency is equal to a resonant frequency of the full-bridge LLC circuit.

[0111] transmitting a second frequency adjustment factor to the digital control circuit; the second frequency adjustment factor corresponds to a second switching frequency, the second switching frequency is greater than a resonant frequency of the full-bridge LLC circuit;

[0112] transmitting a third frequency adjustment factor to the digital control circuit; the third frequency adjustment factor corresponds to a third switching frequency, the third switching frequency is less than the resonant frequency of the full-bridge LLC circuit.

[0113] In an optional embodiment, the display module 1003 is configured to perform at least one of:

[0114] in the case of inputting the first frequency adjustment factor, display the current waveform graph and the voltage waveform graph of the full-bridge LLC circuit operating in the resonant state based on the output current and the output voltage respectively;

[0115] in the case of inputting the second frequency adjustment factor, display the current waveform graph and the voltage waveform graph of the full-bridge LLC circuit operating in the under-resonant state based on the output current and the output voltage respectively;

[0116] in the case of inputting the third frequency adjustment factor, display the current waveform graph and the voltage waveform graph of the full-bridge LLC circuit operating in the over-resonant state based on the output current and the output voltage respectively.

[0117] In an optional embodiment, the display module 1003 is configured to perform at least one of:

[0118] in the case of the full-bridge LLC circuit operating in the resonant state, display a first zero-voltage turn-on (ZVS) waveform graph; the first ZVS waveform graph is used to analyze the ZVS condition of the full-bridge LLC circuit operating in the resonant state; the first ZVS waveform graph includes at least one of: a waveform graph of the switching control signal, a drain-source voltage waveform graph of the MOS tube, a current waveform graph of the MOS tube;

[0119] in the case of the full-bridge LLC circuit operating in the under-resonant state, display a second ZVS waveform graph; the second ZVS waveform graph is used to analyze the ZVS condition of the full-bridge LLC circuit operating in the under-resonant state; the second ZVS waveform graph includes at least one of: a waveform graph of the switching control signal, a drain-source voltage waveform graph of the MOS tube, a current waveform graph of the MOS tube;

[0120] In a case that the full-bridge LLC circuit works in an over-resonance state, a third ZVS waveform diagram is displayed; the third ZVS waveform diagram is used for analyzing ZVS of the full-bridge LLC circuit working in the over-resonance state; and the third ZVS waveform diagram includes at least one of a waveform diagram of the switch control signal, a drain-source voltage waveform diagram of the MOS tube, and a current waveform diagram of the MOS tube.

[0121] In an alternative embodiment, the display module 1003 is configured to perform at least one of:

[0122] In a case that the full-bridge LLC circuit works in a resonance state, a first zero-current turn-off ZCS waveform diagram is displayed; the first ZCS waveform diagram is used for analyzing ZCS of the full-bridge LLC circuit working in the resonance state; and the first ZCS waveform diagram includes at least one of a voltage waveform diagram of a secondary diode in the full-bridge LLC circuit and a current waveform diagram of the secondary diode.

[0123] In a case that the full-bridge LLC circuit works in an under-resonance state, a second ZCS waveform diagram is displayed; the second ZCS waveform diagram is used for analyzing ZCS of the full-bridge LLC circuit working in the under-resonance state; and the second ZCS waveform diagram includes at least one of a voltage waveform diagram of a secondary diode in the full-bridge LLC circuit and a current waveform diagram of the secondary diode.

[0124] In a case that the full-bridge LLC circuit works in an over-resonance state, a third ZCS waveform diagram is displayed; the third ZCS waveform diagram is used for analyzing ZCS of the full-bridge LLC circuit working in the over-resonance state; and the third ZCS waveform diagram includes at least one of a voltage waveform diagram of a secondary diode in the full-bridge LLC circuit and a current waveform diagram of the secondary diode.

[0125] In an alternative embodiment, the OBC is provided with a target charging voltage.

[0126] The transmission module 1001 is configured to calculate a voltage error signal of the output voltage and the target charging voltage.

[0127] The transmission module 1001 is configured to adjust the frequency adjustment factor based on the voltage error signal to control the output voltage to approach the target charging voltage.

[0128] In an alternative embodiment, the OBC is provided with a target charging current.

[0129] The transmission module 1001 is configured to calculate a current error signal of an output current of the full-bridge LLC circuit and the target charging current.

[0130] The transmission module 1001 is configured to adjust the frequency adjustment factor based on the current error signal, and control the output current to approach the target charging current.

[0131] In an optional embodiment, the transmission module 1001 is configured to multiply the frequency adjustment factor by the resonant frequency of the full-bridge LLC circuit, and then multiply the result by 2π to obtain a first result.

[0132] The transmission module 1001 is configured to discretize the first result using a sampling clock to obtain a discrete signal.

[0133] The transmission module 1001 is configured to delay the discrete signal by one time step to obtain an input signal.

[0134] The transmission module 1001 is configured to input the input signal to the digital control circuit.

[0135] In an optional embodiment, the digital control circuit includes a cycle reset integrator and a full-bridge pulse width modulation (PWM) generator connected in sequence.

[0136] The cycle reset integrator is configured to convert the input signal into a sine wave.

[0137] The full-bridge PWM generator is configured to convert the sine wave into the switch control signal.

[0138] It should be noted that the analysis device of the full-bridge LLC circuit provided in the above embodiments is only exemplified by the division of the above functional modules, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the analysis device of the full-bridge LLC circuit provided in the above embodiments and the analysis method of the full-bridge LLC circuit belong to the same concept, and the specific implementation process is detailed in the method embodiments, which will not be repeated here.

[0139] Embodiments of the present application also provide a computer device, which includes a processor and a memory, and the memory stores at least one instruction, at least one program, a code set or an instruction set. The at least one instruction, at least one program, code set or instruction set is loaded and executed by the processor to implement the analysis method of the full-bridge LLC circuit provided by each method embodiment. The computer device can be realized as a terminal.

[0140] Exemplarily, Figure 20 FIG. 1 is a structural schematic diagram of a computer device provided by an exemplary embodiment of the present application.

[0141] Generally, the computer device 1700 includes a processor 1701 and a memory 1702.

[0142] The processor 1701 can include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 1701 can be implemented in the form of at least one of a DSP (Digital Signal Processing), an FPGA (Field-Programmable Gate Array), a PLA (Programmable Logic Array). The processor 1701 can also include a main processor and a coprocessor. The main processor is a processor for processing data in an awake state, also known as a CPU (Central Processing Unit). The coprocessor is a low-power processor for processing data in a standby state. In some embodiments, the processor 1701 can be integrated with a GPU (Graphics Processing Unit) that is responsible for rendering and drawing the content to be displayed by the display screen. In some embodiments, the processor 1701 can also include an AI (Artificial Intelligence) processor for processing machine learning-related computing operations.

[0143] The memory 1702 can include one or more computer-readable storage media that can be non-transitory. The memory 1702 can also include a high-speed random access memory, and a nonvolatile memory such as one or more disk storage devices, flash storage devices. In some embodiments, the non-transitory computer-readable storage medium in the memory 1702 is used to store at least one instruction for being executed by the processor 1701 to implement the analysis method of the full-bridge LLC circuit provided by the method embodiments in the present application.

[0144] In some embodiments, the computer device 1700 can also optionally include a peripheral device interface 1703 and at least one peripheral device. The processor 1701, the memory 1702, and the peripheral device interface 1703 can be connected through a bus or a signal line. Each peripheral device can be connected to the peripheral device interface 1703 through a bus, a signal line, or a circuit board. Specifically, the peripheral device includes at least one of a radio frequency circuit 1704, a display screen 1705, a camera assembly 1706, an audio circuit 1707, and a power supply 1708.

[0145] The peripheral interface 1703 can be used to connect at least one peripheral device related to I / O (Input / Output) to the processor 1701 and the memory 1702. In some embodiments, the processor 1701, the memory 1702 and the peripheral interface 1703 are integrated on the same chip or circuit board; in some other embodiments, any one or two of the processor 1701, the memory 1702 and the peripheral interface 1703 can be implemented on a separate chip or circuit board, and the embodiments of the present application are not limited in this regard.

[0146] The radio frequency circuit 1704 is used to receive and transmit RF (Radio Frequency) signals, also known as electromagnetic signals. The radio frequency circuit 1704 communicates with a communication network and other communication devices through electromagnetic signals. The radio frequency circuit 1704 converts electrical signals into electromagnetic signals for transmission, or converts received electromagnetic signals into electrical signals. Optionally, the radio frequency circuit 1704 includes an antenna system, an RF transceiver, one or more amplifiers, a tuner, an oscillator, a digital signal processor, a codec chipset, a subscriber identity module card, and the like. The radio frequency circuit 1704 can communicate with other computer devices through at least one wireless communication protocol. The wireless communication protocol includes but is not limited to the World Wide Web, a metropolitan area network, an intranet, various generations of mobile communication networks (2G, 3G, 4G and 5G), a wireless local area network and / or a WiFi (Wireless Fidelity) network. In some embodiments, the radio frequency circuit 1704 can also include NFC (Near Field Communication) related circuitry, and the present application is not limited in this regard.

[0147] The display screen 1705 is configured to display a UI (User Interface). The UI can include graphics, text, icons, video, and any combination thereof. When the display screen 1705 is a touch display screen, the display screen 1705 is further configured to capture touch signals on or above the surface of the display screen 1705. The touch signals can be input to the processor 1701 as control signals for processing. In this case, the display screen 1705 can also be configured to provide virtual buttons and / or virtual keyboard, also known as soft buttons and / or soft keyboard. In some embodiments, the display screen 1705 can be one, configured on the front panel of the computer device 1700; in other embodiments, the display screen 1705 can be at least two, respectively configured on different surfaces of the computer device 1700 or in a folding design; in still other embodiments, the display screen 1705 can be a flexible display screen, configured on a curved surface or a folding surface of the computer device 1700. Even, the display screen 1705 can also be configured in an irregular shape other than a rectangle, i.e., a special-shaped screen. The display screen 1705 can be made of LCD (Liquid Crystal Display), OLED (Organic Light-Emitting Diode), etc.

[0148] The camera assembly 1706 is configured to capture images or videos. Optionally, the camera assembly 1706 includes a front-facing camera and a rear-facing camera. Typically, the front-facing camera is configured on the front panel of the computer device 1700, and the rear-facing camera is configured on the back of the computer device. In some embodiments, the rear-facing camera is at least two, respectively any one of a main camera, a depth-of-field camera, a wide-angle camera, and a telephoto camera, to realize the background blur function by fusing the main camera and the depth-of-field camera, the panoramic shooting and VR (Virtual Reality) shooting function by fusing the main camera and the wide-angle camera, or other fusion shooting functions. In some embodiments, the camera assembly 1706 can further include a flash. The flash can be a single-color-temperature flash or a dual-color-temperature flash. The dual-color-temperature flash refers to a combination of a warm light flash and a cold light flash, which can be used for light compensation under different color temperatures.

[0149] The audio circuit 1707 can include a microphone and a speaker. The microphone is used to collect sound waves of the user and the environment, and convert the sound waves into an electrical signal input to the processor 1701 for processing, or input to the radio frequency circuit 1704 to realize voice communication. For the purpose of stereo sound collection or noise reduction, the microphone can be multiple, respectively arranged at different parts of the computer device 1700. The microphone can also be an array microphone or an omnidirectional collection type microphone. The speaker is used to convert the electrical signal from the processor 1701 or the radio frequency circuit 1704 into sound waves. The speaker can be a traditional diaphragm speaker, or a piezoelectric ceramic speaker. When the speaker is a piezoelectric ceramic speaker, not only can it convert electrical signals into sound waves that humans can hear, but it can also convert electrical signals into sound waves that humans cannot hear for ranging purposes. In some embodiments, the audio circuit 1707 can also include a headphone jack.

[0150] The power supply 1708 is used to supply power to various components in the computer device 1700. The power supply 1708 can be alternating current, direct current, disposable battery or rechargeable battery. When the power supply 1708 includes a rechargeable battery, the rechargeable battery can be a wired charging battery or a wireless charging battery. The wired charging battery is a battery that is charged through a wired line, and the wireless charging battery is a battery that is charged through a wireless coil. The rechargeable battery can also be used to support fast charging technology.

[0151] In some embodiments, the computer device 1700 further includes one or more sensors 1709. The one or more sensors 1709 include, but are not limited to, an acceleration sensor 1710, a gyroscope sensor 1711, a pressure sensor 1712, an optical sensor 1713, and a proximity sensor 1714.

[0152] The acceleration sensor 1710 can detect the acceleration magnitude in three coordinate axes of the coordinate system established by the computer device 1700. For example, the acceleration sensor 1710 can be used to detect the components of the gravitational acceleration in three coordinate axes. The processor 1701 can control the touch display 1705 to display the user interface in a landscape view or a portrait view according to the gravitational acceleration signal collected by the acceleration sensor 1710. The acceleration sensor 1710 can also be used for game or user motion data collection.

[0153] The gyroscope sensor 1711 can detect the body orientation and rotation angle of the computer device 1700, and the gyroscope sensor 1711 can collect 3D actions of the user on the computer device 1700 in cooperation with the acceleration sensor 1710. The processor 1701 can realize the following functions according to the data collected by the gyroscope sensor 1711: motion sensing (such as changing the UI according to the user's tilt operation), image stabilization when shooting, game control, and inertial navigation.

[0154] Pressure sensor 1712 can be disposed on the side bezel of computer device 1700 and / or on the lower layer of touch display screen 1705. When pressure sensor 1712 is disposed on the side bezel of computer device 1700, it can detect the user's grip signal on computer device 1700, and processor 1701 can perform left / right hand recognition or quick operation based on the grip signal collected by pressure sensor 1712. When pressure sensor 1712 is disposed on the lower layer of touch display screen 1705, processor 1701 can control operable controls on the UI interface based on the user's pressure operation on touch display screen 1705. Operable controls include at least one of button controls, scroll bar controls, icon controls, and menu controls.

[0155] Optical sensor 1713 is used to collect ambient light intensity. In one embodiment, processor 1701 can control the display brightness of touch display screen 1705 based on the ambient light intensity collected by optical sensor 1713. Specifically, when the ambient light intensity is high, the display brightness of touch display screen 1705 is increased; when the ambient light intensity is low, the display brightness of touch display screen 1705 is decreased. In another embodiment, processor 1701 can also dynamically adjust the shooting parameters of camera assembly 1706 based on the ambient light intensity collected by optical sensor 1713.

[0156] The proximity sensor 1714, also known as a distance sensor, is typically located on the front panel of the computer device 1700. The proximity sensor 1714 is used to detect the distance between the user and the front of the computer device 1700. In one embodiment, when the proximity sensor 1714 detects that the distance between the user and the front of the computer device 1700 is gradually decreasing, the processor 1701 controls the touch display screen 1705 to switch from a screen-on state to a screen-off state; when the proximity sensor 1714 detects that the distance between the user and the front of the computer device 1700 is gradually increasing, the processor 1701 controls the touch display screen 1705 to switch from a screen-off state to a screen-on state.

[0157] Those skilled in the art will understand that Figure 20 The structure shown does not constitute a limitation on the computer device 1700, and may include more or fewer components than shown, or combine certain components, or use different component arrangements.

[0158] This application also provides a computer-readable storage medium storing at least one instruction, at least one program, code set, or instruction set. When the at least one instruction, at least one program, code set, or instruction set is loaded and executed by the processor of a computer device, the analysis method for the full-bridge LLC circuit provided in the above-described method embodiments is implemented.

[0159] The application further provides a computer program product or computer program, which comprises computer instructions stored in a computer readable storage medium. A processor of a computer device reads the computer instructions from the computer readable storage medium, and the processor executes the computer instructions, so that the computer device executes the analysis method of the full-bridge LLC circuit provided in each method embodiment.

[0160] Those skilled in the art can understand that all or part of the steps of the above-mentioned embodiments can be completed by hardware, or by program instructing relevant hardware to complete, and the program can be stored in a computer readable storage medium. The readable storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk.

[0161] The above only describes optional embodiments of the application and is not intended to limit the application. Any modification, equivalent switching, improvement, etc. made within the spirit and principle of the application shall be included in the protection scope of the application.

Claims

1. A method for analyzing a full-bridge LLC circuit, characterized in that, The method is executed by the control program of the on-board charger (OBC), the OBC including the full-bridge LLC circuit; the method includes: Multiply the frequency adjustment factor by the resonant frequency of the full-bridge LLC circuit, and then multiply by 2π to obtain the first result; The first result is discretized using a sampling clock to obtain a discrete signal; The discrete signal is delayed by one time step to obtain the input signal; The input signal is input to the digital control circuit; the digital control circuit is connected to the full-bridge LLC circuit and is used to provide switching control signals to the MOSFETs of the full-bridge LLC circuit; the frequency adjustment factor is used to generate the switching control signal and adjust the switching frequency of the MOSFETs. Detect the output current and output voltage of the full-bridge LLC circuit; The current waveform is displayed based on the output current, and the voltage waveform is displayed based on the output voltage.

2. The method according to claim 1, characterized in that, The transmission of the frequency adjustment factor to the digital control circuit includes at least one of the following: A first frequency adjustment factor is transmitted to the digital control circuit; the first frequency adjustment factor corresponds to a first switching frequency, and the first switching frequency is equal to the resonant frequency of the full-bridge LLC circuit. A second frequency adjustment factor is transmitted to the digital control circuit; the second frequency adjustment factor corresponds to a second switching frequency, which is greater than the resonant frequency of the full-bridge LLC circuit. A third frequency adjustment factor is transmitted to the digital control circuit; the third frequency adjustment factor corresponds to a third switching frequency, which is less than the resonant frequency of the full-bridge LLC circuit.

3. The method according to claim 2, characterized in that, The display of a current waveform based on the output current and the display of a voltage waveform based on the output voltage include at least one of the following: When the first frequency adjustment factor is input, the current waveform and the voltage waveform of the full-bridge LLC circuit operating in the resonant state are displayed based on the output current and the output voltage, respectively. With the second frequency adjustment factor input, the current waveform and voltage waveform of the full-bridge LLC circuit operating in the underresonant state are displayed based on the output current and the output voltage, respectively. With the third frequency adjustment factor input, the current waveform and voltage waveform of the full-bridge LLC circuit operating in the over-resonance state are displayed based on the output current and the output voltage, respectively.

4. The method according to any one of claims 1 to 3, characterized in that, The method further includes at least one of the following: When the full-bridge LLC circuit is operating in a resonant state, a first zero-voltage turn-on (ZVS) waveform diagram is displayed; the first ZVS waveform diagram is used to analyze the ZVS situation when the full-bridge LLC circuit is operating in a resonant state; the first ZVS waveform diagram includes at least one of the following: the waveform diagram of the switch control signal, the drain-source voltage waveform diagram of the MOSFET, and the current waveform diagram of the MOSFET; When the full-bridge LLC circuit operates in an underresonant state, a second ZVS waveform is displayed; the second ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an underresonant state; the second ZVS waveform includes at least one of the following: the waveform of the switch control signal, the drain-source voltage waveform of the MOSFET, and the current waveform of the MOSFET; When the full-bridge LLC circuit operates in an over-resonance state, a third ZVS waveform is displayed; the third ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZVS waveform includes at least one of the following: the waveform of the switch control signal, the drain-source voltage waveform of the MOS transistor, and the current waveform of the MOS transistor.

5. The method according to any one of claims 1 to 3, characterized in that, The method further includes at least one of the following: When the full-bridge LLC circuit is operating in a resonant state, a first zero-current turn-off (ZCS) waveform diagram is displayed; the first ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit is operating in a resonant state; the first ZCS waveform diagram includes at least one of the following: the voltage waveform diagram of the secondary diode in the full-bridge LLC circuit, and the current waveform diagram of the secondary diode; When the full-bridge LLC circuit operates in an underresonant state, a second ZCS waveform diagram is displayed; the second ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit operates in an underresonant state; the second ZCS waveform diagram includes at least one of the following: the voltage waveform diagram of the secondary diode in the full-bridge LLC circuit, and the current waveform diagram of the secondary diode; When the full-bridge LLC circuit operates in an over-resonance state, a third ZCS waveform diagram is displayed; the third ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZCS waveform diagram includes at least one of the following: the voltage waveform diagram of the secondary diode in the full-bridge LLC circuit, and the current waveform diagram of the secondary diode.

6. The method according to any one of claims 1 to 3, characterized in that, The OBC is configured with a target charging voltage; the method further includes: Calculate the voltage error signal between the output voltage and the target charging voltage; The frequency adjustment factor is adjusted based on the voltage error signal to control the output voltage to approach the target charging voltage.

7. The method according to any one of claims 1 to 3, characterized in that, The OBC is configured with a target charging current; the method further includes: Calculate the current error signal between the output current of the full-bridge LLC circuit and the target charging current; The frequency adjustment factor is adjusted based on the current error signal to control the output current to approach the target charging current.

8. The method according to any one of claims 1 to 3, characterized in that, The digital control circuit includes: a periodic reset integrator and a full-bridge pulse width modulation (PWM) generator connected in sequence; The periodic reset integrator is used to convert the input signal into a sine wave; The full-bridge PWM generator is used to convert the sine wave into the switching control signal.

9. An analysis device for a full-bridge LLC circuit, characterized in that, The device includes: A transmission module is used to multiply a frequency adjustment factor by the resonant frequency of the full-bridge LLC circuit, and then multiply by 2π to obtain a first result; to discretize the first result using a sampling clock to obtain a discrete signal; to delay the discrete signal by a time step to obtain an input signal; and to input the input signal into a digital control circuit. The digital control circuit is connected to the full-bridge LLC circuit and is used to provide switching control signals to the MOSFETs of the full-bridge LLC circuit. The frequency adjustment factor is used to generate the switching control signals and adjust the switching frequency of the MOSFETs. The detection module is used to detect the output current and output voltage of the full-bridge LLC circuit; The display module is used to display a current waveform based on the output current and a voltage waveform based on the output voltage.

10. A computer device, characterized in that, The computer device includes a processor and a memory, the memory storing at least one program, which is loaded and executed by the processor to implement the analysis method for a full-bridge LLC circuit as described in any one of claims 1 to 8.

11. A computer-readable storage medium, characterized in that, The readable storage medium stores at least one program, which is loaded and executed by a processor to implement the analysis method for a full-bridge LLC circuit as described in any one of claims 1 to 8.

12. A computer program product, characterized in that, The computer program product includes computer instructions stored in a computer-readable storage medium, a processor of a computer device reading the computer instructions from the computer-readable storage medium, and the processor executing the computer instructions to cause the computer device to perform the analysis method for a full-bridge LLC circuit as described in any one of claims 1 to 8.

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