An amplifier circuit and an amplifier device

Abstract

The embodiment of the present disclosure provides an amplifier circuit and an amplifier device, wherein the amplifier circuit is applied to a power amplifier, and the amplifier circuit comprises: a bias circuit, the bias circuit comprising a first bias transistor, a second end of the first bias transistor being coupled with the power amplifier, and the first bias transistor being configured to provide a bias current to the power amplifier; and an overcurrent protection circuit, the overcurrent protection circuit being coupled with a first end of the first bias transistor, and the overcurrent protection circuit being configured to provide a first current to the first bias transistor, and further configured to adjust the bias current to limit a current of the power amplifier in a first state, and to adjust the first current according to the bias current in a second state.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of semiconductor manufacturing, and particularly relates to an amplifier circuit and an amplifier device. BACKGROUND

[0002] Radio frequency power amplifier (PA) is an indispensable part in modern communication system, which is used to amplify input signal power. However, in some extreme conditions (such as low temperature, high mismatch, etc.), the current in the radio frequency power amplifier will exceed its current threshold, resulting in the radio frequency power amplifier burning out. Therefore, an over current protection (OCP) circuit is urgently needed for the radio frequency power amplifier in the process of use, to ensure its stable work. SUMMARY

[0003] Therefore, the present disclosure provides an amplifier circuit and an amplifier device to solve at least one technical problem in the related art. To achieve the above purpose, the technical solution of the present disclosure is as follows: the present disclosure provides an amplifier circuit applied to a power amplifier, comprising: a bias circuit, the bias circuit comprising a first bias transistor, a second end of the first bias transistor being coupled with the power amplifier, for providing a bias current to the power amplifier; an over current protection circuit coupled with a first end of the first bias transistor, for providing a first current to the first bias transistor, and further for adjusting the bias current to limit the current of the power amplifier in a first state, and adjusting the first current according to the bias current in a second state.

[0004] In some embodiments, the over current protection circuit comprises: a current mirror circuit; wherein the current mirror circuit comprises a first transistor, one or more second transistors connected with the first transistor, and a reference current source connected with the first transistor, the second transistor being used for outputting the first current.

[0005] In some embodiments, when the number of the second transistors is one, the first end of the first transistor is coupled with the first end of the second transistor, the third end of the first transistor is coupled with the third end of the second transistor, the second end of the first transistor is grounded through the reference current source, and the second end of the second transistor is coupled with the first end of the first bias transistor.

[0006] In some embodiments, when the number of the second transistors is multiple, the multiple second transistors are connected in parallel; wherein the first end of the first transistor is coupled with the first end of the multiple second transistors for connecting a power supply, the third end of the first transistor is coupled with the third end of the multiple second transistors, the second end of the first transistor is grounded through the reference current source, and the second end of the multiple second transistors is used for coupling with the first end of the first bias transistor.

[0007] In some embodiments, at least one of the multiple second transistors is connected with the first bias transistor.

[0008] In some embodiments, at least part of the multiple second transistors and the first transistor constitute a current mirror circuit with different proportions.

[0009] In some embodiments, in the first state, the first current is smaller than the bias current, and the overcurrent protection circuit is used to make the first bias transistor in a linear region or a saturation region to reduce the bias current, so that the reduced bias current is the same as the first current; and / or, in the second state, the first current is greater than the bias current, and the overcurrent protection circuit is used to make the second transistor in a linear region or a saturation region to reduce the first current, so that the reduced first current is the same as the bias current.

[0010] In some embodiments, in the first state, the bias current is greater than the first current, and the overcurrent protection circuit is used to reduce the bias current so that the reduced bias current is the same as the first current.

[0011] In some embodiments, the power amplifier includes an amplification transistor; the bias circuit further includes a first resistor; wherein the second end of the first bias transistor is coupled with the third end of the amplification transistor through the first resistor; the second end of the amplification transistor is grounded; the third end of the amplification transistor is used for receiving an input signal, and the first end of the amplification transistor is used for emitting an output signal.

[0012] In some embodiments, the power amplifier further includes a first capacitor and a second capacitor; wherein the first capacitor is coupled with the third end of the amplification transistor, and the input signal is transmitted to the third end of the amplification transistor through the first capacitor; the second capacitor is coupled with the first end of the amplification transistor, and the output signal is output through the second capacitor.

[0013] In some embodiments, the biasing circuit further comprises a second biasing transistor, a third capacitor, a second resistor and a third resistor; wherein a second end of the second biasing transistor is grounded; a third end of the second biasing transistor is coupled to a first end of the second biasing transistor through the third capacitor and the second resistor connected in series, and the third end of the second biasing transistor is further coupled to a third end of the amplifying transistor through the third resistor.

[0014] The embodiments of the present disclosure further provide an amplifier device, comprising at least an amplifier circuit as described in the above embodiments of the present disclosure.

[0015] The embodiments of the present disclosure provide an amplifier circuit applied to a power amplifier, comprising: a biasing circuit comprising a first biasing transistor, a second end of the first biasing transistor being coupled to the power amplifier for providing a biasing current to the power amplifier; an overcurrent protection circuit coupled to a first end of the first biasing transistor for providing a first current to the first biasing transistor, and for adjusting the biasing current to limit the current of the power amplifier in a first state, and for adjusting the first current according to the biasing current in a second state. In the embodiments of the present disclosure, by arranging the overcurrent protection circuit in the amplifier circuit, the current of the power amplifier can be effectively limited and adjusted in different working states, so as to ensure that the power amplifier can work stably, thereby avoiding the power amplifier from being burned out due to excessive current in extreme conditions, and further reducing the risk of burning the power amplifier, and obviously reducing the equipment repair rate. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 A component structure schematic diagram of a power amplifier and an amplifier circuit is provided for an embodiment of the present disclosure;

[0017] Figure 2 A circuit block diagram of a power amplifier and an amplifier circuit is provided for an embodiment of the present disclosure;

[0018] Figure 3 A circuit block diagram of another power amplifier and amplifier circuit is provided for an embodiment of the present disclosure;

[0019] Figure 4 A current mirror circuit schematic diagram with a first transistor and a second transistor is provided for an embodiment of the present disclosure;

[0020] Figure 5 An output characteristic schematic diagram of a MOS transistor is provided for an embodiment of the present disclosure;

[0021] Figure 6The figure provides a schematic diagram of the change of the current of the amplifying transistor and the input power when the over-current protection circuit is set in the amplifier circuit and not set in the over-current protection circuit.

[0022] The figure includes: 101-power amplifier; 102-amplifier circuit; 120-bias circuit; 130-over-current protection circuit. DETAILED DESCRIPTION

[0023] The technical solutions in the embodiments of the present disclosure will be clearly and completely described below in combination with the embodiments of the present disclosure and the drawings. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the present disclosure.

[0024] In the following description, a large number of specific details are given in order to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid obscuring the present disclosure, some technical features known in the art are not described; that is, not all features of the actual embodiments are described here, and well-known functions and structures are not described in detail.

[0025] In the drawings, the sizes of layers, regions, elements and their relative sizes can be exaggerated for clarity. The same reference signs represent the same elements throughout.

[0026] It should be understood that when an element or layer is referred to as being "on", "adjacent", "connected to", or "coupled to" another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer, or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on", "directly adjacent", "directly connected to", or "directly coupled to" another element or layer, then there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. As a result, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present disclosure. Similarly, a second element, component, region, layer or section discussed below could be termed a first element, component, region, layer or section without departing from the teachings of the present disclosure.

[0027] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or

[0028] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0029] For a thorough understanding of the present disclosure, reference will be made to the following detailed description taken in conjunction with the accompanying drawings. The preferred embodiments of the present disclosure will be described below in detail, however, the present disclosure can have other embodiments in addition to those described.

[0030] In a mobile terminal, a radio frequency power amplifier is used to amplify the radio frequency signal to be transmitted, and then feedback to the antenna for transmission. In recent years, with the development of communication and consumer electronics, the requirements for power supply voltage, output power and peak-to-average ratio of the radio frequency power amplifier are increasing, which puts higher requirements on the robustness of the radio frequency power transmitter. However, in some extreme conditions (such as low temperature, high mismatch, etc.), the current in the radio frequency power amplifier can exceed its current threshold, causing the radio frequency power amplifier to be burned out. Therefore, how to avoid the power amplifier from being burned out in actual application is an imminent challenge.

[0031] Based on this, the embodiments of the present disclosure provide an amplifier circuit applied to a power amplifier; for effectively limiting and adjusting the current of the power amplifier in different working states, so as to ensure that the power amplifier can work stably. Referring to Figure 1 and Figure 2 , Figure 1A schematic diagram of a power amplifier 101 and an amplifier circuit 102 according to an embodiment of the present disclosure is provided as follows. Figure 2 A circuit diagram of the power amplifier 101 and the amplifier circuit 102 according to an embodiment of the present disclosure is provided as follows.

[0032] Reference is made to Figure 1 An input terminal of the power amplifier 101 is configured to receive an input signal RFin, another input terminal of the power amplifier 101 is configured to receive a bias current Ib provided by the amplifier circuit 102, and an output terminal of the power amplifier 101 is configured to output an output signal RFout. The amplifier circuit 102 is coupled to the power amplifier 101. Here, the amplifier circuit 102 includes a bias circuit 120 and an over-current protection circuit 130. One end of the bias circuit 120 is coupled to the over-current protection circuit 130, and another end of the bias circuit 120 is coupled to the power amplifier 101. The over-current protection circuit 130 is configured to provide a first current I1 to the bias circuit 120, and the bias circuit 120 is configured to provide the bias current Ib to the power amplifier 101. In actual applications, the over-current protection circuit 130 can be configured to adjust the bias current Ib to limit the current of the power amplifier 101 in a first state, and can also be configured to adjust the first current I1 according to the bias current Ib in a second state.

[0033] It should be noted that the power amplifier 101 in the embodiments of the present disclosure can include a radio frequency power amplifier PA. Here, an example in which the power amplifier includes only one radio frequency power amplifier is described, but the present disclosure is not limited thereto. In another embodiment, the power amplifier includes N radio frequency power amplifiers in cascade, where N is greater than or equal to 2, and an over-current protection circuit is provided for at least one radio frequency power amplifier. Optionally, an over-current protection circuit is provided for each radio frequency power amplifier. Optionally, an over-current protection circuit is provided only for the first radio frequency power amplifier and the last radio frequency power amplifier.

[0034] How the over-current protection circuit adjusts the bias current and the first current will be described in detail below in combination with specific embodiments and the accompanying drawings.

[0035] Reference is made to Figure 2 In some embodiments, the bias circuit 120 includes a first bias transistor T1 and a driving circuit. A first end of the first bias transistor T1 is coupled to the over-current protection circuit OCP 130, which is configured to provide the first current I1 to the first bias transistor T1 to limit the output current of the first bias transistor T1 when needed. A second end of the first bias transistor T1 is connected to the power amplifier 101, which is configured to provide the bias current Ib to the power amplifier 101. A third end of the first bias transistor T1 is connected to the driving circuit, which is configured to provide a driving voltage or a driving current to the first bias transistor T1 to obtain the required bias current Ib.

[0036] In some embodiments, the power amplifier 101 comprises an amplification transistor T2. A third terminal of the amplification transistor T2 is coupled to the first biasing transistor T1, a second terminal of the amplification transistor T2 is grounded, and a first terminal of the amplification transistor T2 is connected to a fixed power supply for supplying power to the amplification transistor T2. The third terminal of the amplification transistor T2 is also configured to receive an input signal RFin, and the first terminal of the amplification transistor T2 is also configured to output an output signal RFout.

[0037] In the above embodiments, the first biasing transistor T1 and the amplification transistor T2 are both triodes. In other embodiments, the first biasing transistor T1 and the amplification transistor T2 can also be other types of transistors, such as field effect transistors, and the present disclosure is not limited in this regard. In addition, the first biasing transistor T1 and the amplification transistor T2 can be the same type of transistor or different types of transistors.

[0038] In the above embodiments, the driving circuit and the amplification transistor are both connected to the power supply VDD. In other embodiments, the driving circuit and the amplification transistor can also be connected to other power supplies, and the power supplies to which the driving circuit and the amplification transistor are connected can also be different, and the present disclosure is not limited in this regard.

[0039] In some embodiments, continuing to refer to Figure 2 , the biasing circuit 120 can further comprise a first resistor R1, and the driving circuit comprises a driving current source Ibias. The second terminal of the first biasing transistor T1 is coupled to the third terminal of the amplification transistor T2 through the first resistor R1. The third terminal of the first biasing transistor T1 is coupled to a driving power supply through the driving current source Ibias. The driving power supply is configured to provide a driving voltage VDD to the driving current source Ibias. The driving current source Ibias is configured to provide a driving current and a driving signal to the first biasing transistor T1 to drive the first biasing transistor T1 to generate a biasing current Ib. An input terminal of the driving current source Ibias is connected to the driving power supply, and an output terminal of the driving current source Ibias is coupled to the third terminal of the first biasing transistor T1.

[0040] In some embodiments, the power amplifier 101 further comprises a first capacitor C1, a second capacitor C2 and an inductor L. The third terminal of the amplification transistor T2 is coupled to the first capacitor C1, and the input signal RFin is transmitted to the third terminal of the amplification transistor T2 through the first capacitor C1. The first terminal of the amplification transistor T2 is coupled to the second capacitor C2, and the output signal RFout is output after passing through the second capacitor C2. The first capacitor C1 and the second capacitor C2 are used for direct current isolation to filter the radio frequency signal. The first terminal of the amplification transistor T2 is connected to the fixed power supply through the inductor L. The inductor L is used to isolate the power supply signal of the amplification transistor T2 from the output signal (i.e. the radio frequency signal) to reduce the influence of the radio frequency signal on the power supply. The inductor L is also used for output impedance matching.

[0041] In some embodiments, with reference to Figure 2 , the bias circuit 120 can further comprise a fourth capacitor C4 and a fifth capacitor C5, both of which are connected in parallel with the first bias transistor T1. The first electrode end of the fourth capacitor C4 is coupled to the third terminal of the first bias transistor T1, and the second electrode end of the fourth capacitor C4 is grounded. The first electrode end of the fifth capacitor C5 is coupled to the first terminal of the first bias transistor T1, and the second electrode end of the fifth capacitor C5 is grounded. The fourth capacitor C4 and the fifth capacitor C5 are used for filtering, coupling, resonance and improving the linearity of the amplification transistor T2.

[0042] In some embodiments, with reference to Figure 3 , Figure 3 Another circuit block diagram of the power amplifier 101 and the amplifier circuit 102 is provided for the embodiments of the present disclosure. The bias circuit 120 can further comprise a second bias transistor T3, a third capacitor C3, a second resistor R2 and a third resistor R3. The first terminal of the second bias transistor T3 is coupled to the output end of the driving current source Ibias, the second terminal of the second bias transistor T3 is grounded, the third terminal of the second bias transistor T3 is coupled to the first terminal of the second bias transistor T3 through the series connection of the third capacitor C3 and the second resistor R2, and the third terminal of the second bias transistor T3 is also coupled to the third terminal of the amplification transistor T2 through the third resistor R3. Here, the second bias transistor T3, the third capacitor C3, the second resistor R2 and the third resistor R3 are used to form a loop for the bias circuit, and the purpose is to compensate the power amplifier, such as temperature compensation.

[0043] In some embodiments, the overcurrent protection circuit comprises a current mirror circuit. The current mirror circuit comprises a first transistor, one or more second transistors connected to the first transistor, and a reference current source connected to the first transistor. The second transistor is used to output a first current, and the reference current source is used to provide a reference current.

[0044] In some embodiments, the current mirror circuit includes a plurality of second transistors, and the plurality of second transistors are connected in parallel. The first end of the first transistor and the first end of the plurality of second transistors are coupled to the power supply end. The power supply can be the same as or different from the power supply connected to the power amplifier and / or the bias circuit, and is not limited here. Figure 4 In some embodiments, the power supply end is a battery power supply Vbat, the third end of the first transistor M1 is coupled to the third end of the plurality of second transistors M2, and the second end of the first transistor M1 is grounded through a reference current source.

[0045] In some embodiments, the plurality of second transistors and the first transistor can form current mirror circuits with different proportions to output different currents. At this time, the bias circuit 120 can be selectively connected to one of the second transistors to provide different I1 to the bias circuit. In this way, the current mirror circuit can switch the current limiting threshold of the overcurrent protection circuit according to the requirements of the power amplifier with different power to provide different maximum currents.

[0046] In some embodiments, the bias circuit 120 can also be selectively connected to the plurality of second transistors to provide different first currents I1 to the bias circuit.

[0047] In some embodiments, the plurality of second transistors can also form current mirror circuits with the same proportion as the first transistor.

[0048] In some embodiments, when the power amplifier 101 is a multi-stage amplifier, the plurality of second transistors can be respectively connected to the amplification transistors T2 in the multi-stage.

[0049] In some embodiments, the current mirror circuit includes one second transistor, the first end of the first transistor is coupled to the first end of the second transistor, the third end of the first transistor is coupled to the third end of the second transistor, the second end of the first transistor is grounded through a reference current source, and the second end of the second transistor is coupled to the first end of the first bias transistor.

[0050] Reference Figure 4 , Figure 4 A current mirror circuit with one first transistor M1 and one second transistor M2 is provided for the embodiments of the present disclosure. The first end of the first transistor M1 is coupled to the first end of the second transistor M2, the third end of the first transistor M1 is coupled to the third end of the second transistor M2, the second end of the first transistor M1 is grounded through a reference current source, and the second end of the second transistor M2 is coupled to the first end of the first bias transistor T1.

[0051] In some embodiments, the first transistor M1 and the second transistor M2 are field effect transistors. When the first transistor M1 and the second transistor M2 are both in normal working state, the power amplifier does not need over-current protection, and the output current of the second transistor M2 is the first current I1 provided by the over-current protection circuit. At this time, the first transistor M1 and the second transistor M2 are in saturation region. The size of the first current I1 is related to the reference current Iref and the width-length ratio of the second transistor M2 and the first transistor M1, that is, I1 = m*Iref, m is the ratio of the width-length ratio of the second transistor M2 and the first transistor M1. It should be noted that the first transistor and the second transistor can also be other types of transistors, such as triodes, etc., which are not limited here. When it is a triode, the first transistor M1 and the second transistor M2 are in amplification region.

[0052] In some embodiments, the first bias transistor is a triode. When the bias circuit is in the first state, for example, an abnormal working state, for example, when an extreme situation (such as low temperature, high mismatch, etc.) occurs, at this time, the current required by the first bias transistor T1 in the bias circuit changes, the current of the first bias transistor T1 in the bias circuit increases, and the first current provided by the over-current protection circuit is different from the bias current. For example, the first current is smaller than the bias current, and the over-current protection circuit is used to change the voltage at point A to make the first bias transistor be in saturation region, so as to reduce the bias current, so that the reduced bias current is the same as the first current, thereby limiting the current of the amplifier and protecting the amplifier. It should be noted that when the first bias transistor is a field effect transistor, the over-current protection circuit is used to change the voltage at point A to make the first bias transistor be in linear region, so as to reduce the bias current.

[0053] In some embodiments, the second transistor is a field effect transistor. When the bias circuit is in the second state, the first current I1 is greater than the bias current Ib, at this time, the over-current protection circuit is used to change the voltage at point A to make the second transistor M2 be in linear state, so as to reduce the first current I1, so that the reduced first current is the same as the bias current Ib. It should be noted that when the second transistor is a triode, the over-current protection circuit is used to change the voltage at point A to make the second transistor be in saturation region, so as to reduce the first current.

[0054] It should be noted that the reference Figure 5 , Figure 5 shows the output characteristic diagram of the MOS tube, in combination with Figure 3 and Figure 4 , when the first current I1 is greater than the bias current Ib, the over-current protection circuit raises the voltage at its output end A point, so that the second transistor M2 enters the linear region from the saturation region (when the second transistor M2 is a triode, it enters the saturation region), so as to reduce I1, until the reduced first current is the same as the bias current.

[0055] Similarly, when the first current I1 is less than the bias current Ib, the overcurrent protection current reduces the voltage at its output terminal A, thereby causing the first bias transistor T1 to enter the saturation region from the amplification region (when the first bias transistor T1 is a field-effect transistor, it enters the linear region), so as to reduce the bias current Ib until it is the same as the first current.

[0056] Therefore, in this embodiment, by setting an overcurrent protection circuit in the amplifier circuit, the current of the power amplifier can be effectively limited and regulated under different operating conditions to ensure stable operation of the power amplifier and prevent it from burning out due to excessive current under extreme conditions. This reduces the risk of power amplifier burnout and significantly lowers the equipment repair rate. Furthermore, the protection circuit can automatically adjust, eliminating the need for complex control circuits, simplifying the design and further improving reliability.

[0057] refer to Figure 6 , Figure 6 This diagram illustrates the change in current at the first terminal of the amplifying transistor with and without an overcurrent protection circuit in the amplifier circuit, as shown in this embodiment of the disclosure. The horizontal axis represents the input power, and the vertical axis represents the current Icc at the first terminal of the amplifying transistor. Figure 6 As can be seen, with the continuous increase of input power, the current Icc at the first terminal of the amplifying transistor also increases. When an overcurrent protection circuit (OCP) is set in the amplifier circuit, the current at the first terminal of the amplifying transistor will increase to a certain threshold current and then be limited to that threshold, no longer increasing. However, when no overcurrent protection circuit (OCP) is set in the amplifier circuit, the current Icc at the first terminal of the amplifying transistor continuously increases with the increase of input power, and even after reaching a certain threshold current, it continues to increase. This will cause the current of the amplifying transistor to become too large and burn out. In other words, in this embodiment of the present disclosure, by setting an overcurrent protection circuit in the amplifier circuit and setting an upper limit value for the magnitude of the bias current, the current Icc of the amplifying transistor is limited, thereby ensuring that the power amplifier can operate stably and reducing the risk of burnout.

[0058] Based on the amplifier circuit described above, this disclosure also provides an amplifier device, which includes at least the amplifier circuit described in the above embodiments of this disclosure.

[0059] This disclosure also provides an electronic device, which includes at least an amplifier device as described in the above embodiments of this disclosure.

[0060] It should be understood that the term "in one embodiment" or "in an embodiment" as used throughout this specification means that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the disclosure. Therefore, appearances of the phrase "in one embodiment" or "in an embodiment" in various places throughout the specification are not necessarily referring to the same embodiment. Furthermore, the particular features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that the sequence of the above-mentioned processes does not mean the order of execution, and the execution order of the processes should be determined according to their functions and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the disclosure. The sequence of the above-mentioned embodiments of the disclosure is only for description, and does not represent the advantages or disadvantages of the embodiments.

[0061] The preferred embodiments of the disclosure are described above, and the patent scope of the disclosure is not limited by the above description. Any equivalent structure transformation made according to the disclosure, or direct / indirect application in other related technical fields within the concept of the disclosure is included in the patent protection scope of the disclosure.

Claims

1. An amplifier circuit applied to a power amplifier, characterized by, The application relates to a power amplifier circuit. The bias circuit comprises a first bias transistor and a driving circuit, the second end of the first bias transistor is coupled with the power amplifier, and the bias current is provided to the power amplifier; The third end of the first bias transistor is connected with the driving circuit, and the driving circuit is used for providing the driving voltage or driving current to the first bias transistor; The overcurrent protection circuit is coupled with the first end of the first bias transistor, is used for providing the first current to the first bias transistor, and is used for adjusting the bias current to limit the current of the power amplifier in the first state and adjusting the first current according to the bias current in the second state; The overcurrent protection circuit comprises a first transistor and one or more second transistors connected with the first transistor; in the first state, the first current is smaller than the bias current, the overcurrent protection circuit is used for making the first bias transistor in the linear region or saturation region to reduce the bias current, and the reduced bias current is the same as the first current; in the second state, the first current is larger than the bias current, and the overcurrent protection circuit is used for making the second transistor in the linear region or saturation region to reduce the first current, and the reduced first current is the same as the bias current.

2. The amplifier circuit of claim 1, wherein The overcurrent protection circuit comprises a current mirror circuit. The current mirror circuit comprises the first transistor, the one or more second transistors connected with the first transistor and a reference current source connected with the first transistor, and the second transistor is used for outputting the first current.

3. The amplifier circuit of claim 2, wherein, When the number of the second transistors is one, the first end of the first transistor is coupled with the first end of the second transistor, the third end of the first transistor is coupled with the third end of the second transistor, the second end of the first transistor is grounded through the reference current source, and the second end of the second transistor is coupled with the first end of the first bias transistor.

4. The amplifier circuit of claim 2, wherein, When the number of the second transistors is multiple, the multiple second transistors are connected in parallel. The first end of the first transistor is coupled with the first end of the multiple second transistors, is used for connecting the power supply, the third end of the first transistor is coupled with the third end of the multiple second transistors, the second end of the first transistor is grounded through the reference current source, and the second end of the multiple second transistors is used for being coupled with the first end of the first bias transistor.

5. The amplifier circuit of claim 4, wherein, At least one of the multiple second transistors is connected with the first bias transistor.

6. The amplifier circuit of claim 4, wherein, At least part of the multiple second transistors and the first transistor form current mirror circuits with different proportions.

7. The amplifier circuit of claim 1, wherein The power amplifier comprises an amplification transistor; and the bias circuit further comprises a first resistor. The second end of the first bias transistor is coupled with the third end of the amplification transistor through the first resistor; the second end of the amplification transistor is grounded; the third end of the amplification transistor is used for receiving an input signal, and the first end of the amplification transistor is used for emitting an output signal.

8. The amplifier circuit of claim 7, wherein, The power amplifier further comprises a first capacitor and a second capacitor; The first capacitor is coupled to the third terminal of the amplification transistor, and the input signal is transmitted to the third terminal of the amplification transistor through the first capacitor; the second capacitor is coupled to the first terminal of the amplification transistor, and the output signal is output through the second capacitor.

9. The amplifier circuit of claim 8, wherein, The bias circuit further comprises a second bias transistor, a third capacitor, a second resistor and a third resistor; The second terminal of the second bias transistor is grounded; the third terminal of the second bias transistor is coupled to the first terminal of the second bias transistor through the third capacitor and the second resistor connected in series, and the third terminal of the second bias transistor is further coupled to the third terminal of the amplification transistor through the third resistor.

10. An amplifier arrangement characterized by The amplifier device at least comprises the amplifier circuit according to any one of claims 1-9.

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