SM4-GCM encryption operation device, method, equipment and medium
By designing parallel or separate encryption and multiplication operation mechanisms in the data encryption device, the long time problem caused by the large number of encryption and multiplication operations in the prior art is solved, and a more efficient data encryption process is achieved.
Patent Information
- Application Number
- CN202411558182.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-04
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2044-11-04
AI Technical Summary
When the existing data encryption methods are too many times of encryption and multiplication, the time of the data encryption process becomes very long, reducing the encryption efficiency.
A SM4-GCM encryption computing device is designed to realize parallel or separation operations of the encryption module and the multiplication module through the coordinated work of the data splicing module, control module, encryption module and multiplication module, thereby reducing the time of encryption and multiplication operations.
Through parallel or separate operations, the time spent on encryption and multiplication operations during data encryption is greatly reduced, and the efficiency of data encryption is improved.
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Figure CN119602935A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of cryptographic operations, and in particular to an SM4-GCM cryptographic operation device, method, equipment and medium. Background Art
[0002] With the development of Internet technology, data transmission has become increasingly important. Considering the security and privacy of data transmission, encrypting data transmission has become increasingly important. However, the existing data encryption method requires encryption calculations and multiplication operations to be performed in sequence. Once the number of encryption operations or multiplication operations is too many, the entire data encryption process will take a long time, which greatly reduces the efficiency of the data encryption process. Therefore, there is an urgent need for a data encryption method that can reduce the time spent on encryption operations and multiplication operations during the data encryption process. Summary of the invention
[0003] The purpose of the present invention is to provide an SM4-GCM encryption operation device, method, equipment and medium. In this scheme, the encryption module and the multiplication module can perform encryption operation and multiplication operation of data in parallel or complete all encryption operations separately and then complete all multiplication operations, which greatly reduces the time consumed by encryption operation and multiplication operation in the data encryption process.
[0004] In order to solve the above technical problems, the present invention provides an SM4-GCM encryption operation device, comprising: a data splicing module, a control module, an encryption module, and a multiplier module;
[0005] The data splicing module is used to splice a number of initial vectors to obtain a spliced vector;
[0006] The control module is used to call the encryption module to generate a round key, send a number of data to be encrypted to the encryption module, and send authentication data to the multiplier module;
[0007] The encryption module is used to perform a key expansion operation after being called by the control module to generate a preset number of round keys; perform an SM4 encryption operation on the concatenated vector according to the preset number of round keys in a first group of clock cycles to generate intermediate key data; and complete the SM4 encryption operation on each of the data to be encrypted in a number of groups of clock cycles starting from the second group of clock cycles to generate intermediate ciphertext data corresponding to each of the data to be encrypted; wherein each group of clock cycles contains the preset number of clock cycles;
[0008] The multiplier module is used to perform a target multiplication operation corresponding to the Ghash algorithm on the intermediate key data and the authentication data within the second group of clock cycles to generate an intermediate multiplication operation result; and complete the target multiplication operation on the intermediate key data, the intermediate multiplication operation result and the corresponding intermediate ciphertext data within several groups of clock cycles starting from the third group of clock cycles to generate and output the corresponding SM4-GCM encryption operation result.
[0009] Optionally, the encryption module includes: a round control module, a round module, several groups of S-box modules, and a round key storage module, wherein one group of S-box modules includes several S-box modules;
[0010] The wheel control module is used to call the wheel module several times in one clock cycle;
[0011] The round module is used to call each group of the S-box modules simultaneously within one clock cycle or call a group of the S-box modules within one clock cycle;
[0012] The S-box module is used to perform the key expansion operation to generate the preset number of round keys; perform the SM4 encryption operation on the received concatenated vector to generate the intermediate key data; perform the SM4 encryption operation on each of the received data to be encrypted at the same time or perform the SM4 encryption operation on each of the received data to be encrypted in sequence to generate each of the intermediate ciphertext data;
[0013] The round key storage module is used to store the preset number of round keys.
[0014] Optionally, the multiplier module includes: a hash module, a sequence multiplication module, a plurality of groups of multipliers, a multiplication result register, a first input register, and a second input register;
[0015] The hash module is used to call the sequence multiplication module several times within one clock cycle;
[0016] The sequence multiplication module is used to call each group of the multipliers simultaneously in one clock cycle or call a group of the multipliers in one clock cycle;
[0017] The multiplier is used to perform the target multiplication operation on the received intermediate key data and the authentication data within one clock cycle to generate an intermediate multiplication operation result; perform the target multiplication operation on the received intermediate key data, the intermediate multiplication operation result and each intermediate ciphertext data at the same time within one clock cycle, or perform the target multiplication operation on the received intermediate key data, the intermediate multiplication operation result and the corresponding intermediate ciphertext data within one clock cycle to generate each SM4-GCM encryption operation result;
[0018] The multiplication result register is used to store the intermediate multiplication operation result and each of the SM4-GCM encryption operation results;
[0019] The first input register is used to store the intermediate key data;
[0020] The second input register is used to store the authentication data and each intermediate ciphertext data.
[0021] Optionally, also include:
[0022] A first selector, configured to transmit the concatenated vector to the encryption module based on the control of the control module when the control module determines that the key expansion operation is completed;
[0023] a second selector, for transmitting the intermediate key data to the first input register in the multiplier module based on the control of the control module.
[0024] Optionally, also include:
[0025] A data storage device, used for storing the received authentication data;
[0026] a third selector, configured to receive the authentication data transmitted by the data storage device based on the control of the control module;
[0027] a fourth selector, configured to transmit the authentication data transmitted by the third selector to the second input register in the multiplier module based on the control of the control module.
[0028] Optionally, also include:
[0029] The counter module is used to count the SM4 encryption operations.
[0030] Optionally, also include:
[0031] A length memory, used for receiving and storing data length data corresponding to each of the data to be encrypted;
[0032] a padding module, configured to perform a preset padding operation on each of the intermediate ciphertext data based on each of the data length data within a plurality of groups of clock cycles starting from the fourth group of clock cycles, so as to set the target data position in each of the intermediate ciphertext data after padding to 0;
[0033] Wherein, the control module is also used for:
[0034] Determine whether new data to be encrypted is received;
[0035] If no new data to be encrypted is received, the padding module is controlled to perform the preset padding operation, and each of the intermediate ciphertext data after padding is stored in the second input register by controlling the third selector and the fourth selector;
[0036] Control the multiplier module to perform the target multiplication operation on the intermediate key data, each of the intermediate ciphertext data after padding, and each of the SM4-GCM encryption operation results within a number of groups of clock cycles starting from the fifth group of clock cycles, so as to generate a padding multiplication operation result corresponding to each of the intermediate ciphertext data after padding;
[0037] Performing an XOR operation on each of the bit-padded multiplication operation results and each of the data length data in a plurality of groups of clock cycles starting from the sixth group of clock cycles, so as to generate an intermediate XOR operation result corresponding to each of the bit-padded multiplication operation results;
[0038] Controlling the multiplier module to perform the target multiplication operation on each of the intermediate XOR operation results and the intermediate key data within a plurality of clock cycles starting from the seventh clock cycle, so as to generate a target multiplication operation result corresponding to each of the intermediate XOR operation results;
[0039] The XOR operation is performed on each of the target multiplication results and the intermediate multiplication results within several groups of clock cycles starting from the eighth group of clock cycles to generate and output a target XOR operation result corresponding to each of the target multiplication results, and the encryption module and the multiplier module are controlled to be closed.
[0040] In order to solve the above technical problems, the present invention also provides an SM4-GCM encryption operation method, which is applied to the SM4-GCM encryption operation device as described above, wherein the SM4-GCM encryption operation device comprises: a data splicing module, a control module, an encryption module, and a multiplier module; the method comprises:
[0041] Using the data splicing module to splice a number of initial vectors to obtain a spliced vector;
[0042] Using the control module to call the encryption module to generate a round key, and sending a number of data to be encrypted to the encryption module and sending authentication data to the multiplier module;
[0043] The encryption module is used to perform a key expansion operation after being called by the control module to generate a preset number of round keys; an SM4 encryption operation is performed on the concatenated vector according to the preset number of round keys in a first group of clock cycles to generate intermediate key data; and the SM4 encryption operation on each of the data to be encrypted is completed in a number of groups of clock cycles starting from the second group of clock cycles to generate intermediate ciphertext data corresponding to each of the data to be encrypted; wherein each group of clock cycles contains the preset number of clock cycles;
[0044] The multiplier module is used to perform a target multiplication operation corresponding to the Ghash algorithm on the intermediate key data and the authentication data within the second group of clock cycles to generate an intermediate multiplication operation result; and the target multiplication operation on the intermediate key data, the intermediate multiplication operation result and the corresponding intermediate ciphertext data is completed within several groups of clock cycles starting from the third group of clock cycles to generate and output the corresponding SM4-GCM encryption operation result.
[0045] In order to solve the above technical problems, the present invention further provides an electronic device, comprising:
[0046] Memory, used to store computer programs;
[0047] A processor is used to execute the computer program to implement the SM4-GCM encryption operation method as described above.
[0048] In order to solve the above technical problems, the present invention also provides a computer-readable storage medium for storing a computer program, which, when executed by a processor, implements the SM4-GCM encryption operation method as described above.
[0049] The purpose of the present invention is to provide an SM4-GCM encryption operation device, method, equipment and medium. The control module in the encryption operation device will call the encryption module to perform a key expansion operation to generate a preset number of round keys. At the same time, the data splicing module will splice a number of initial vectors and obtain a spliced vector. The encryption module will perform an SM4 encryption operation on the spliced vector according to the round key in a first group of clock cycles to generate intermediate key data. In a number of time periods starting from a second group of clock cycles, the encryption module will perform an SM4 encryption operation on a number of data to be encrypted to generate corresponding intermediate ciphertext data. At the same time, the multiplier The module will perform target multiplication operations on the intermediate key data and the authentication data within the second group of clock cycles to generate intermediate multiplication operation results, and will perform target multiplication operations on the intermediate key data, intermediate multiplication operation results and corresponding intermediate ciphertext data within several groups of clock cycles starting from the third group of clock cycles, thereby generating and outputting corresponding SM4-GCM encryption operation results. That is, the encryption module and multiplication module in this scheme can perform encryption operations and multiplication operations on the data in parallel or complete all encryption operations separately and then complete all multiplication operations, which greatly reduces the time consumed by encryption operations and multiplication operations during the data encryption process. BRIEF DESCRIPTION OF THE DRAWINGS
[0050] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.
[0051] Figure 1 A schematic diagram of the structure of an SM4-GCM encryption operation device provided by the present invention;
[0052] Figure 2 A schematic diagram of the structure of another SM4-GCM encryption operation device provided by the present invention;
[0053] Figure 3 A schematic diagram of the structure of an SM4-GCM encryption module provided by the present invention;
[0054] Figure 4 A schematic diagram of the structure of a multiplier module provided by the present invention;
[0055] Figure 5 A process flow chart of an SM4-GCM encryption operation method provided by the present invention;
[0056] Figure 6 A calculation flow chart of an SM4-GCM encryption operation device provided by the present invention;
[0057] Figure 7 The present invention provides a schematic structural diagram of an electronic device. DETAILED DESCRIPTION
[0058] The core of the present invention is to provide an SM4-GCM encryption operation device, method, equipment and medium. In this scheme, the encryption module and the multiplication module can perform encryption operation and multiplication operation of data in parallel or complete all encryption operations separately and then complete all multiplication operations, which greatly reduces the time consumed by encryption operation and multiplication operation in the data encryption process.
[0059] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0060] Please refer to Figure 1 , Figure 1 The schematic diagram of the structure of a SM4-GCM encryption operation device provided by the present invention includes: a data splicing module 1, a control module 2, an encryption module 3, and a multiplier module 4;
[0061] A data splicing module 1 is used to splice a number of initial vectors to obtain a spliced vector;
[0062] The control module 2 is used to call the encryption module 3 to generate a round key, and send a number of data to be encrypted to the encryption module 3 and send authentication data to the multiplier module 4;
[0063] The encryption module 3 is used to perform a key expansion operation after being called by the control module 2 to generate a preset number of round keys; perform an SM4 encryption operation on the spliced vector according to the preset number of round keys in a first group of clock cycles to generate intermediate key data; and complete the SM4 encryption operation on each data to be encrypted in a number of groups of clock cycles starting from the second group of clock cycles to generate intermediate ciphertext data corresponding to each data to be encrypted; wherein each group of clock cycles includes a preset number of clock cycles;
[0064] The multiplier module 4 is used to perform a target multiplication operation corresponding to the Ghash algorithm on the intermediate key data and the authentication data within the second group of clock cycles to generate an intermediate multiplication operation result; and complete the target multiplication operation on the intermediate key data, the intermediate multiplication operation result and the corresponding intermediate ciphertext data within several groups of clock cycles starting from the third group of clock cycles to generate and output the corresponding SM4-GCM encryption operation result.
[0065] In the present invention, considering that the encryption operation and the multiplication operation are performed sequentially in the prior art, when there is too much data to be encrypted, the efficiency of the data encryption operation will be greatly reduced, so the present scheme sets up a data splicing module 1, a control module 2, an encryption module 3, and a multiplier module 4, wherein the encryption module 3 needs to first perform a key expansion operation under the control of the control module 2 to generate a preset number of round keys, and then perform the SM4 encryption operation on the spliced vector generated by the data splicing module 1 according to the round keys in the first group of clock cycles and generate intermediate key data, while the multiplier module 4 performs the target multiplication operation on the intermediate key data and the authentication data in the second group of clock cycles and generates the intermediate multiplication operation result, and at the same time, the encryption module 3 will perform the target multiplication operation on the intermediate key data and the authentication data in the second group of clock cycles. The SM4 encryption operation on each data to be encrypted is completed within several groups of clock cycles starting from the clock cycle, and intermediate ciphertext data is generated, that is, the encryption module 3 can encrypt each data to be encrypted in turn within the second group of clock cycles, or can encrypt each data to be encrypted in turn within several groups of clock cycles starting from the second group of clock cycles. For the former method, the multiplier module 4 will perform the target multiplication operation on the intermediate ciphertext data in turn within several groups of clock cycles starting from the third group of clock cycles, that is, parallel processing with the encryption module 3, or the multiplier module 4 simultaneously performs the target multiplication operation on the intermediate ciphertext data corresponding to each data to be encrypted within the third group of clock cycles. The above methods can greatly reduce the time consumed by encryption operations and multiplication operations in the data encryption process.
[0066] This embodiment provides an SM4-GCM (SM4-Galois / Counter Mode, an encryption algorithm) encryption operation device, in which the control module 2 in the encryption operation device calls the encryption module 3 to perform a key expansion operation to generate a preset number of round keys, and at the same time, the data splicing module 1 splices a number of initial vectors to obtain a spliced vector, and the encryption module 3 performs an SM4 encryption operation on the spliced vector according to the round key in a first group of clock cycles to generate intermediate key data, and in a number of time periods starting from the second group of clock cycles, the encryption module 3 performs an SM4 encryption operation on a number of data to be encrypted to generate corresponding intermediate ciphertext data, and at the same time, the multiplier module 4 The target multiplication operation will be performed on the intermediate key data and the authentication data in the second group of clock cycles to generate an intermediate multiplication operation result, and the target multiplication operation will be performed on the intermediate key data, the intermediate multiplication operation result and the corresponding intermediate ciphertext data in several groups of clock cycles starting from the third group of clock cycles, so as to generate and output the corresponding SM4-GCM encryption operation result, that is, the encryption module 3 and the multiplication module in this scheme can perform encryption operation and multiplication operation of the data in parallel or complete all encryption operations separately and then complete all multiplication operations, which greatly reduces the time consumed by encryption operation and multiplication operation in the data encryption process.
[0067] Based on the above embodiments:
[0068] As an optional embodiment, the encryption module 3 includes: a round control module 2, a round module, a plurality of groups of S-box modules, and a round key storage module, wherein a group of S-box modules includes a plurality of S-box modules;
[0069] Round control module 2, used to call several round modules in one clock cycle;
[0070] A round module is used to call each group of S-box modules simultaneously in one clock cycle or to call a group of S-box modules in one clock cycle;
[0071] The S-box module is used to perform a key expansion operation to generate a preset number of round keys; perform an SM4 encryption operation on the received concatenated vector to generate intermediate key data; perform an SM4 encryption operation on each received data to be encrypted at the same time or perform an SM4 encryption operation on each received data to be encrypted in sequence to generate each intermediate ciphertext data;
[0072] The round key storage module is used to store a preset number of round keys.
[0073] In the present invention, the encryption module 3 is provided with a round control module 2, a round module, several groups of S-box modules, and a round key storage module, and one S-box module includes several S-box modules. Among them, the wheel control module 2 can call the wheel module, and then call the S-box module through the wheel module to perform the key expansion operation, and generate a preset number of round keys; in addition, after being called, the S-box module will also perform the SM4 encryption operation on the received concatenated vector to generate intermediate key data; and when the encryption module 3 completes the SM4 encryption operation on each data to be encrypted within the second group of clock cycles, that is, the encryption of all the data to be encrypted is completed at the same time within one clock cycle, the wheel control module 2 needs to call several secondary round modules within one clock cycle, and the wheel module needs to call each group of S-box modules at the same time within one clock cycle, and each group of S-box modules needs to perform the SM4 encryption operation at the same time to generate The intermediate ciphertext data corresponding to each data to be encrypted; similarly, when the encryption module 3 completes the SM4 encryption operation on each data to be encrypted within several groups of clock cycles starting from the second group of clock cycles, that is, encrypts each data to be encrypted in turn within several groups of clock cycles starting from the second group of clock cycles, the wheel control module 2 needs to call several secondary wheel modules in each clock cycle within the multiple clock cycles, and the wheel module needs to call a group of S-box modules in turn in each clock cycle within the multiple clock cycles, and a group of S-box modules in each clock cycle within the multiple clock cycles performs the SM4 encryption operation, and also obtains the intermediate ciphertext data of each data to be encrypted, thereby ensuring the integrity of the encryption process.
[0074] As an optional embodiment, the multiplier module 4 includes: a hash module, a sequence multiplication module, a plurality of groups of multipliers, a multiplication result register, a first input register, and a second input register;
[0075] A hash module is used to call the sequence multiplication module several times in one clock cycle;
[0076] A serial multiplication module for simultaneously calling groups of multipliers in one clock cycle or calling a group of multipliers in one clock cycle;
[0077] A multiplier, configured to perform a target multiplication operation on the received intermediate key data and the authentication data within one clock cycle to generate an intermediate multiplication operation result; perform a target multiplication operation on the received intermediate key data, the intermediate multiplication operation result, and each intermediate ciphertext data simultaneously within one clock cycle or perform a target multiplication operation on the received intermediate key data, the intermediate multiplication operation result, and the corresponding intermediate ciphertext data within one clock cycle to generate each SM4-GCM encryption operation result;
[0078] Multiplication result register, used to store intermediate multiplication operation results and each SM4-GCM encryption operation result;
[0079] A first input register, used to store intermediate key data;
[0080] The second input register is used to store authentication data and various intermediate ciphertext data.
[0081] In the present invention, a hash module, a sequence multiplication module, several groups of multipliers, a multiplication result register, a first input register, and a second input register are provided in the multiplier module 4. Among them, the hash module can call the sequence multiplication module, and then call a multiplier through the sequence multiplication module to perform standard multiplication operation on the intermediate key data and the authentication data in the second group of clock cycles to generate an intermediate multiplication operation result; and when the multiplier module 4 performs target multiplication operation on the intermediate key data, the intermediate multiplication operation result, and each intermediate ciphertext data in pairs in the third group of clock cycles, that is, the multiplication operation of all the intermediate ciphertext data is completed simultaneously in one clock cycle, the hash module needs to call the sequence multiplication module several times in one clock cycle, and the sequence multiplication module will call each group of multipliers at the same time in one clock cycle, and each group of multipliers will perform target multiplication operation on the intermediate key data, the intermediate multiplication operation result, and a corresponding intermediate ciphertext data at the same time, thereby generating each The SM4-GCM encryption operation result corresponding to the intermediate ciphertext data; similarly, when the multiplier module 4 performs target multiplication operations on the intermediate key data, the intermediate multiplication operation result and the corresponding intermediate ciphertext data in pairs within several groups of clock cycles starting from the third group of clock cycles, that is, multiplying each intermediate ciphertext data in turn within several groups of clock cycles starting from the third group of clock cycles, the hash module needs to call the sequence multiplication module several times within multiple clock cycles, and the sequence multiplication module will call a group of multipliers in turn in each clock cycle within the multiple clock cycles, and a group of multipliers in each clock cycle within the multiple clock cycles performs the target multiplication operation, and also obtains the SM4-GCM encryption operation result corresponding to each intermediate ciphertext data, thereby ensuring the integrity of the multiplication operation.
[0082] As an optional embodiment, it also includes:
[0083] A first selector, configured to transmit the concatenated vector to the encryption module 3 based on the control of the control module 2 when the control module 2 determines that the key expansion operation is completed;
[0084] The second selector is used to transmit the intermediate key data to the first input register in the multiplier module 4 based on the control of the control module 2 .
[0085] In the present invention, considering that the actual needs of the user may change, a first selector and a second selector are additionally provided, wherein the first selector can transmit the spliced vector to the encryption module 3 based on the control of the control module 2 when the control module 2 determines that the key expansion operation is completed, and the second selector can transmit the intermediate key data to the first input register in the multiplier module 4 based on the control of the control module 2, that is, the encryption operation and the multiplication operation process are controlled in real time based on the actual needs of the user, which is convenient for the user's actual operation.
[0086] As an optional embodiment, it also includes:
[0087] A data storage device for storing received authentication data;
[0088] A third selector, for receiving authentication data transmitted by the data storage based on the control of the control module 2;
[0089] The fourth selector is used to transmit the authentication data transmitted by the third selector to the second input register in the multiplier module 4 based on the control of the control module 2 .
[0090] In the present invention, considering that the actual needs of users may change, a data storage device, a third selector and a fourth selector are additionally provided, wherein the data storage device is used to receive and store authentication data. When a multiplication operation is required, the third selector will receive the authentication data transmitted by the data storage device based on the control of the control module 2, and the fourth selector will transmit the authentication data transmitted by the third selector to the second input register in the multiplier module 4 based on the control of the control module 2. Selection control is added to the original SM4-GCM encryption operation device to facilitate the actual operation of the user.
[0091] As an optional embodiment, it also includes:
[0092] Counter module, used to count SM4 encryption operations.
[0093] In the present invention, in order to distinguish the received concatenated vector from the data to be encrypted, a counter module is added in the present solution. Each time the concatenated vector or the data to be encrypted is subjected to the SM4 encryption operation, the counter module is counted. For example, the first time the concatenated vector is received, the count is 1, the second time the data to be encrypted is received, the count is 2, and so on. This is not only conducive to distinguishing the received concatenated vector from the data to be encrypted, but also convenient for the control module 2 to perform different multiplication operations according to the concatenated vector and each different data to be encrypted, thereby improving the accuracy of the solution.
[0094] As an optional embodiment, it also includes:
[0095] The length memory is used to receive and store the data length data corresponding to each data to be encrypted;
[0096] A padding module, used for performing a preset padding operation on each intermediate ciphertext data based on each data length data within a plurality of groups of clock cycles starting from the fourth group of clock cycles, so as to set the target data position in each intermediate ciphertext data after padding to 0;
[0097] The control module 2 is also used for:
[0098] Determine whether new data to be encrypted is received;
[0099] If no new data to be encrypted is received, the padding module is controlled to perform a preset padding operation, and each intermediate ciphertext data after padding is stored in the second input register by controlling the third selector and the fourth selector;
[0100] Control the multiplier module 4 to perform target multiplication operations on the intermediate key data, the intermediate ciphertext data after padding, and the SM4-GCM encryption operation results within several groups of clock cycles starting from the fifth group of clock cycles, so as to generate padding multiplication operation results corresponding to the intermediate ciphertext data after padding;
[0101] Performing an XOR operation on each bit-padded multiplication operation result and each data length data in a plurality of groups of clock cycles starting from the sixth group of clock cycles to generate an intermediate XOR operation result corresponding to each bit-padded multiplication operation result;
[0102] Controlling the multiplier module 4 to perform target multiplication operations on each intermediate XOR operation result and the intermediate key data in a plurality of groups of clock cycles starting from the seventh group of clock cycles, so as to generate target multiplication operation results corresponding to each intermediate XOR operation result;
[0103] In several groups of clock cycles starting from the eighth group of clock cycles, XOR operations are performed on each target multiplication result and the intermediate multiplication result to generate and output the target XOR operation result corresponding to each target multiplication result, and the encryption module 3 and the multiplier module 4 are controlled to be closed.
[0104] In the present invention, considering that there are multiple data to be encrypted, it is necessary to perform padding operations on each intermediate ciphertext data obtained after all the data to be encrypted are encrypted. Therefore, a length memory and a padding module are also provided in this scheme, wherein the length memory can receive and store the data length data corresponding to each data to be encrypted, and the padding module will perform a preset padding operation on each intermediate ciphertext data based on each data length data, so as to set the target data position in each intermediate ciphertext data after padding to 0, wherein the control module 2 will determine whether new data to be encrypted is received, that is, if no new data to be encrypted is received, the padding module is controlled to perform a preset padding operation, and the intermediate ciphertext data after padding is stored in the second input register by controlling the third selector and the fourth selector, and the multiplier module 4 is controlled to perform a target multiplication operation on the intermediate key data, the intermediate ciphertext data after padding and the SM4-GCM encryption operation results within several groups of clock cycles starting from the fifth group of clock cycles, so as to generate padding multiplication operation results corresponding to each intermediate ciphertext data after padding. In several groups of clock cycles starting from the sixth group of clock cycles, an XOR operation is performed on each padding multiplication result and each data length data to generate an intermediate XOR operation result corresponding to each padding multiplication result, and the multiplier module 4 is controlled to perform a target multiplication operation on each intermediate XOR operation result and intermediate key data in several groups of clock cycles starting from the seventh group of clock cycles to generate a target multiplication operation result corresponding to each intermediate XOR operation result; in several groups of clock cycles starting from the eighth group of clock cycles, an XOR operation is performed on each target multiplication operation result and the intermediate multiplication operation result to generate and output a target XOR operation result corresponding to each target multiplication operation result, and the encryption module 3 and the multiplier module 4 are controlled to be closed. That is, by controlling the corresponding selection module and the multiplier module 4 to perform corresponding multiplication and XOR operations on the intermediate ciphertext data after padding, accurate final data is obtained, thereby improving the accuracy of the scheme.
[0105] It should be noted that the actual SM4-GCM encryption operation device is Figure 2As shown, control module 2 is used to control the overall circuit operation process; encryption module 3 (Sm4_enc_core module) is used to perform SM4 encryption and decryption; multiplier module 4 (ghash_mult module) is used to perform multiplication operations in Ghash operations; padding module (gen_remain_bits module) is used to perform output padding operations; data splicing module 1 (Splicing module) is used to perform splicing operations on the 96-bit initial vector iv, and the splicing result is 128-bit data {iv, 32'h00000001}, which is used to generate j0; counter module counter module is used to perform accumulation operations on the output {iv, 32'h00000001} of the Splicing module. Each time data encryption is completed, a +1 operation is performed; Selector Sel0 module: a selector for selecting the input of sm4_enc_core; Selector sel1 module and selector sel2 module: a selector for selecting the b_buf input of the ghash_mult module; Initial vector memory iv_buf: a 96-bit register for storing the input initial vector iv; Key memory key_buf: a 128-bit register for storing the input key key; Data memory data_buf: a 128-bit register for storing the input data data; Length memory len_buf: a 128-bit register for storing the input data length data length; J0 memory j0_buf: a 128-bit register for storing the key intermediate data j0;
[0106] It should also be noted that if Figure 3 As shown, the encryption module 3 (sm4_enc_core) includes: a round control module (round_ctrl module): used to control sm4_enc_core to perform an encryption operation on data enc_data or a key expansion operation on key key based on an enc_round signal; a round module round module: used to call 4 S boxes to perform a round operation of the sm4 algorithm once within 1 clock cycle; an S box module s_box module: used to perform an 8-bit table lookup operation of the SM4 algorithm; a round key storage module ram_sp module: a storage array with a width of 32-bit and a depth of 32, used to store round keys; the encryption module 3 (sm4_enc_core) can complete a round operation per clock cycle, requiring a total of 32 clock cycles (in actual applications, N is generally 32, that is, generally 32 clock cycles are required, but the specific value of the clock cycle can be changed accordingly according to the actual encryption needs, and this application does not specifically limit the number of clock cycles here) to complete the key expansion operation, or complete the encryption and decryption of 128-bit input data.
[0107] It should also be noted that if Figure 4 As shown, the multiplier module 4 (ghash_mult module) includes: a hash module ghash_control module: used to perform process control of ghash operation; a serial multiplication module serial_mul module: calling 4 parallel 1-bit multipliers to perform 4-bit multiplication operation in 1 clock cycle; a multiplication result register rst_buf: used to store the result of multiplication operation; a first input register a register a_buf: a 128-bit register, used to store key intermediate data H as a multiplier. Wherein H is the result of performing SM4 encryption on 128-bit 0; a second input register b register b_buf: a 128-bit register, used to store the multiplicand b to be calculated.
[0108] It should also be noted that the advantages of the SM4-GCM encryption operation device provided by this solution are: 1. The encryption module 3 has both round key expansion and data encryption functions. The round key after the expansion operation is stored in the ram_sp memory. For the scenario where the key remains unchanged, the subsequent data encryption and decryption does not need to implement the round key expansion operation. 2. Through the control of the selector, the encryption module 3 sm4_enc_core module and the multiplier module 4 ghash_mult module can complete the encryption and ghash operations in parallel to improve the system execution efficiency.
[0109] Please refer to Figure 5 , Figure 5 The present invention provides a process flow chart of an SM4-GCM encryption operation method. The method is applied to the SM4-GCM encryption operation device as described above, the SM4-GCM encryption operation device comprising: a data splicing module 1, a control module 2, an encryption module 3, and a multiplier module 4; the method comprises:
[0110] S11: using the data splicing module 1 to splice a number of initial vectors to obtain a spliced vector;
[0111] S12: using the control module 2 to call the encryption module 3 to generate a round key, and sending a number of data to be encrypted to the encryption module 3 and sending authentication data to the multiplier module 4;
[0112] S13: using the encryption module 3 to perform a key expansion operation after being called by the control module 2 to generate a preset number of round keys; performing an SM4 encryption operation on the spliced vector according to the preset number of round keys in the first group of clock cycles to generate intermediate key data; and completing the SM4 encryption operation on each data to be encrypted in a number of groups of clock cycles starting from the second group of clock cycles to generate intermediate ciphertext data corresponding to each data to be encrypted; wherein each group of clock cycles includes a preset number of clock cycles;
[0113] S14: Use the multiplier module 4 to perform a target multiplication operation corresponding to the Ghash algorithm on the intermediate key data and the authentication data within the second group of clock cycles to generate an intermediate multiplication operation result; and complete the target multiplication operation on the intermediate key data, the intermediate multiplication operation result and the corresponding intermediate ciphertext data within several groups of clock cycles starting from the third group of clock cycles to generate and output the corresponding SM4-GCM encryption operation result.
[0114] The SM4-GCM encryption operation method provided in this embodiment corresponds to the above-mentioned device, so it has the same beneficial effects as the above-mentioned device. Therefore, for the embodiment of the SM4-GCM encryption operation method part, please refer to the description of the embodiment of the device part, which will not be repeated here.
[0115] It should be noted that the present invention provides an efficient SM4-GCM algorithm, and its execution process is as follows: Figure 6 As shown:
[0116] Step 1: Initialize the circuit and start working. Initialization mainly puts the control state machine in the control module 2 into a preset starting state;
[0117] Step 2: Figure 2 As shown, key, iv and length are injected and stored in registers key_buf, iv_buf and len_buf respectively;
[0118] Step 3: sm4_enc_core module implements key expansion: In 32 clock cycles, round_ctrl calls the round module 32 times to complete 32 rounds of key expansion. The result of the operation is 32 32-bit round keys, which are stored in the storage array ram_sp. These stored round keys will be used to perform SM4 encryption operations;
[0119] Step 4: Determine whether the key expansion is completed (after 32 clock cycles, 32 rounds of key expansion operations are completed). If not, return to step 3. If so, go to step 5.
[0120] Step 5, calculate H: At this time, control module 2 inputs 128-bit data 0 (joined data) into sm4_enc_core module through selector sel0. sm4_enc_core uses the round key stored in ram_sp to perform encryption operations. After 32 clock cycles, H is output. Control module 2 stores the output H in a_buf of ghash_mult module through selector sel3;
[0121] Step 6: Determine the input of authentication data AAD (AADditional Authenticated Data). If AAD is input, execute step 7, otherwise continue to wait for AAD input;
[0122] Step 7, if AAD data input is detected, AAD calculation is performed: AAD is input from the data_i interface and stored in data_buf. Control module 2 transmits AAD to the b_buf module of the ghash_mult module through selectors sel1 and sel2. At this time, the data stored in rst_buf is 0, and the data stored in a_buf is H (intermediate key data). Therefore, AAD and H are multiplied directly. ghash_control calls the serial_mul module to perform 4-bit multiplication per clock cycle. 128-bit multiplication requires 32 clock cycles to complete. As a result, the multiplication operation and SM4 encryption operation are both 32 clock cycles, and the operation is completed in parallel. The result of the operation is stored in rst_buf for use in the next Ghash operation. At the same time, control module 2sel0 selects the output data {iv, 32'h00000001} of the splicing module and inputs the data into the sm4_enc_core module. The sm4_enc_core module performs the encryption operation and also completes the calculation of the intermediate data j0 after 32 clock cycles. j0 is the result of SM4 encryption of the data {iv, 32'h00000001}. The control module 2 stores j0 in the register J0_buf through the selector sel3;
[0123] Step 8: Determine whether the newly input data_i is the encrypted data data or the new AAD data input; if AAD is input, call the ghash_mult module and perform AAD calculation, that is, execute step 7; if data data is input, execute step 9;
[0124] Step nine, calculate ciphertext and multiplication operation: control module 2sel0 selects the output data {iv, 32'h00000002} of the counter module and inputs it to the sm4_enc_core module. The sm4_enc_core module performs the encryption operation and also completes the calculation of the intermediate ciphertext data E after 32 clock cycles. E is XORed with the input data data to complete the calculation of the intermediate data C. C is directly output as ciphertext. At the same time, control module 2 stores C in register b_buf by controlling selectors sel1 and sel2. Counter module performs +1 operation {iv, 32'h00000003}. Afterwards, the ghash_mult module uses H and C in a_buf. rst_buf. Perform multiplication. ghash_control calls the serial_mul module to perform 4-bit multiplication in each clock cycle. 128-bit multiplication requires 32 clock cycles to complete. After 32 clock cycles, the result of the operation is stored in rst_buf; while ghash_mult is operating, the sm4_enc_core module encrypts {iv, 32'h00000003} in parallel, and the result of the operation is stored in the E_buf register of sm4_enc_core. Thus, the E data pre-calculation required for the next data encryption is completed. The multiplication operation and encryption operation are both 32 clock cycles, and there is no need to wait and can be executed in parallel.
[0125] Step 10, determine whether the input data is data and whether it is the last block of data;
[0126] If the input data is data and it is not the last piece of data, repeat the above steps, that is, execute step eight;
[0127] If the input data is data and it is the last piece of data (last_data), then execute step 11;
[0128] Step 11: At this time, the gen_remain_bits module performs a padding operation based on the input length and sets the extra bits to 0. At the same time, the control module 2 stores C in the register b_buf through selectors sel1 and sel2. The ghash_mult module uses H and C in a_buf. rst_buf, performs multiplication operation. After 32 clock cycles, the operation result Q is stored in rst_buf.
[0129] Step 12. Finally, the control module 2 uses the sel2 selector to perform an XOR operation on the data in rst_buf and the length data len_i. Then the multiplication operation is performed through the ghash_mult module. The result of the multiplication operation is XORed with the data stored in J0_buf, and the final Tag (target XOR operation result) is output.
[0130] It should also be noted that through the above design, the following beneficial effects can be achieved: the circuit first completes operations such as round key expansion and H operation. For the data encryption stage, the data data1 first performs the encryption operation, and the encryption is completed after 32 clock cycles. After completion, the encryption operation of data data2 can be performed immediately. At the same time, the encryption result of data1 can perform multiplication operations in parallel. Both are completed in 32 clock cycles. After completion, the SM4-GCM encryption module 3 outputs the encryption result of data2 and performs multiplication operations. At the same time, the SM4-GCM encryption module 3 starts to calculate the encryption of data3. Therefore, in the data encryption stage, data encryption and multiplication are performed completely in parallel, without waiting for each other, and have the highest execution efficiency.
[0131] Please refer to Figure 7 , Figure 7 A schematic diagram of the structure of an electronic device provided by the present invention. The electronic device comprises:
[0132] A memory 20, for storing computer programs;
[0133] The processor 21 is used to execute a computer program to implement the SM4-GCM encryption operation method as described above.
[0134] The electronic device provided in this embodiment may include but is not limited to a smart phone, a tablet computer, a laptop computer or a desktop computer.
[0135] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 can be implemented in at least one hardware form of a digital signal processor (DSP), a field-programmable gate array (FPGA), and a programmable logic array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 21 may be integrated with a graphics processing unit (GPU), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may also include an artificial intelligence (AI) processor, which is used to process computing operations related to machine learning.
[0136] The memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 20 is at least used to store the following computer program 201, wherein the computer program can implement the relevant steps of the SM4-GCM encryption operation method disclosed in any of the aforementioned embodiments after being loaded and executed by the processor 21. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 202 may include Windows, Unix, Linux, etc. Data 203 may include, but is not limited to, the SM4-GCM encryption operation method, etc.
[0137] In some embodiments, the electronic device may further include a display screen 22 , an input / output interface 23 , a communication interface 24 , a power source 25 , and a communication bus 26 .
[0138] Those skilled in the art will understand that Figure 7 The structure shown in the figure does not constitute a limitation on the electronic device, and may include more or fewer components than shown in the figure.
[0139] The present invention also provides an embodiment corresponding to a computer-readable storage medium, which is used to store a computer program, and when the computer program is executed by a processor, it implements the SM4-GCM encryption operation method as described above.
[0140] It is understandable that if the method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or part of the contribution to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium to execute all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.
[0141] The computer-readable storage medium provided in this embodiment corresponds to the above method, and therefore has the same beneficial effects as the above method. Therefore, for the embodiments of the computer-readable storage medium part, please refer to the description of the embodiments of the method part, which will not be repeated here.
[0142] It should be noted that, in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.
[0143] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. An SM4-GCM encryption computing device, characterized in that: include: Data splicing module, control module, encryption module, multiplier module; The data splicing module is used to splice a number of initial vectors to obtain a spliced vector; The control module is used to call the encryption module to generate a round key, send a number of data to be encrypted to the encryption module, and send authentication data to the multiplier module; The encryption module is used to perform a key expansion operation to generate a preset number of round keys after being called by the control module; Performing an SM4 encryption operation on the concatenated vector according to the preset number of round keys within a first group of clock cycles to generate intermediate key data; and completing the SM4 encryption operation on each of the data to be encrypted within a plurality of groups of clock cycles starting from the second group of clock cycles, so as to generate intermediate ciphertext data corresponding to each of the data to be encrypted; wherein each group of clock cycles includes the preset number of clock cycles; The multiplier module is used to perform a target multiplication operation corresponding to the Ghash algorithm on the intermediate key data and the authentication data within the second group of clock cycles to generate an intermediate multiplication operation result; and complete the target multiplication operation on the intermediate key data, the intermediate multiplication operation result and the corresponding intermediate ciphertext data within several groups of clock cycles starting from the third group of clock cycles to generate and output the corresponding SM4-GCM encryption operation result.
2. The SM4-GCM encryption operation device according to claim 1, characterized in that: The encryption module includes: a round control module, a round module, several groups of S-box modules, and a round key storage module, wherein one group of S-box modules includes several S-box modules; The wheel control module is used to call the wheel module several times in one clock cycle; The round module is used to call each group of the S-box modules simultaneously within one clock cycle or call a group of the S-box modules within one clock cycle; The S-box module is used to perform the key expansion operation to generate the preset number of round keys; perform the SM4 encryption operation on the received concatenated vector to generate the intermediate key data; perform the SM4 encryption operation on each of the received data to be encrypted at the same time or perform the SM4 encryption operation on each of the received data to be encrypted in sequence to generate each of the intermediate ciphertext data; The round key storage module is used to store the preset number of round keys.
3. The SM4-GCM encryption operation device according to claim 1, characterized in that: The multiplier module includes: a hash module, a sequence multiplication module, a plurality of groups of multipliers, a multiplication result register, a first input register, and a second input register; The hash module is used to call the sequence multiplication module several times within one clock cycle; The sequence multiplication module is used to call each group of the multipliers simultaneously in one clock cycle or call a group of the multipliers in one clock cycle; The multiplier is used to perform the target multiplication operation on the received intermediate key data and the authentication data within one clock cycle to generate an intermediate multiplication operation result; perform the target multiplication operation on the received intermediate key data, the intermediate multiplication operation result and each intermediate ciphertext data at the same time within one clock cycle, or perform the target multiplication operation on the received intermediate key data, the intermediate multiplication operation result and the corresponding intermediate ciphertext data within one clock cycle to generate each SM4-GCM encryption operation result; The multiplication result register is used to store the intermediate multiplication operation result and each of the SM4-GCM encryption operation results; The first input register is used to store the intermediate key data; The second input register is used to store the authentication data and each intermediate ciphertext data.
4. The SM4-GCM encryption operation device as claimed in claim 3, characterized in that: Also includes: A first selector, configured to transmit the concatenated vector to the encryption module based on the control of the control module when the control module determines that the key expansion operation is completed; a second selector, for transmitting the intermediate key data to the first input register in the multiplier module based on the control of the control module.
5. The SM4-GCM encryption operation device according to claim 4, characterized in that: Also includes: A data storage device, used for storing the received authentication data; a third selector, configured to receive the authentication data transmitted by the data storage device based on the control of the control module; a fourth selector, configured to transmit the authentication data transmitted by the third selector to the second input register in the multiplier module based on the control of the control module.
6. The SM4-GCM encryption operation device according to claim 1, characterized in that: Also includes: The counter module is used to count the SM4 encryption operations.
7. The SM4-GCM encryption operation device according to claim 5, characterized in that: Also includes: A length memory, used for receiving and storing data length data corresponding to each of the data to be encrypted; a padding module, configured to perform a preset padding operation on each of the intermediate ciphertext data based on each of the data length data within a plurality of groups of clock cycles starting from the fourth group of clock cycles, so as to set the target data position in each of the intermediate ciphertext data after padding to 0; Wherein, the control module is also used for: Determine whether new data to be encrypted is received; If no new data to be encrypted is received, the padding module is controlled to perform the preset padding operation, and each of the intermediate ciphertext data after padding is stored in the second input register by controlling the third selector and the fourth selector; Control the multiplier module to perform the target multiplication operation on the intermediate key data, each of the intermediate ciphertext data after padding, and each of the SM4-GCM encryption operation results within a number of groups of clock cycles starting from the fifth group of clock cycles, so as to generate a padding multiplication operation result corresponding to each of the intermediate ciphertext data after padding; Performing an XOR operation on each of the bit-padded multiplication operation results and each of the data length data in a plurality of groups of clock cycles starting from the sixth group of clock cycles, so as to generate an intermediate XOR operation result corresponding to each of the bit-padded multiplication operation results; Controlling the multiplier module to perform the target multiplication operation on each of the intermediate XOR operation results and the intermediate key data within a plurality of clock cycles starting from the seventh clock cycle, so as to generate a target multiplication operation result corresponding to each of the intermediate XOR operation results; The XOR operation is performed on each of the target multiplication results and the intermediate multiplication results within several groups of clock cycles starting from the eighth group of clock cycles to generate and output a target XOR operation result corresponding to each of the target multiplication results, and the encryption module and the multiplier module are controlled to be closed.
8. An SM4-GCM encryption operation method, characterized in that: Applied to the SM4-GCM encryption operation device according to any one of claims 1 to 7, the SM4-GCM encryption operation device comprises: a data splicing module, a control module, an encryption module, and a multiplier module; the method comprises: Using the data splicing module to splice a number of initial vectors to obtain a spliced vector; Using the control module to call the encryption module to generate a round key, and sending a number of data to be encrypted to the encryption module and sending authentication data to the multiplier module; The encryption module is used to perform a key expansion operation after being called by the control module to generate a preset number of round keys; an SM4 encryption operation is performed on the concatenated vector according to the preset number of round keys in a first group of clock cycles to generate intermediate key data; and the SM4 encryption operation on each of the data to be encrypted is completed in a number of groups of clock cycles starting from the second group of clock cycles to generate intermediate ciphertext data corresponding to each of the data to be encrypted; wherein each group of clock cycles contains the preset number of clock cycles; The multiplier module is used to perform a target multiplication operation corresponding to the Ghash algorithm on the intermediate key data and the authentication data within the second group of clock cycles to generate an intermediate multiplication operation result; and the target multiplication operation on the intermediate key data, the intermediate multiplication operation result and the corresponding intermediate ciphertext data is completed within several groups of clock cycles starting from the third group of clock cycles to generate and output the corresponding SM4-GCM encryption operation result.
9. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor, configured to execute the computer program to implement the SM4-GCM encryption operation method as described in claim 8.
10. A computer-readable storage medium, characterized in that: Used to store a computer program, which, when executed by a processor, implements the SM4-GCM encryption operation method as described in claim 8.
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