An SM4-GCM encryption computing device, method, equipment and medium

Abstract

This invention discloses an SM4-GCM encryption operation device, method, equipment, and medium, relating to the field of encryption operations. In the encryption operation device, the control module first calls the encryption module to perform a key expansion operation. The data concatenation module concatenates several initial vectors to obtain a concatenated vector. The encryption module then performs an SM4 encryption operation on the concatenated vector according to the round key to generate intermediate key data. Simultaneously, while the encryption module performs the SM4 encryption operation on the data to be encrypted, the multiplier module performs target multiplication operations on the intermediate key data and authentication data. This process continues until the multiplier module generates and outputs the SM4-GCM encryption operation result. Because the encryption module and multiplication module can perform data encryption and multiplication operations in parallel, or complete all encryption operations separately and then complete all multiplication operations, the time consumed by encryption and multiplication operations during data encryption is greatly reduced.

Description

Technical Field

[0001] This invention relates to the field of encryption computing, and in particular to an SM4-GCM encryption computing device, method, equipment, and medium. Background Technology

[0002] With the development of Internet technology, data transmission has become increasingly important. Considering the security and privacy of data transmission, encryption of data transmission has become increasingly important. However, existing data encryption methods require sequential encryption calculations and multiplication operations. If the number of encryption or multiplication operations is too large, the entire data encryption process will take a long time, which will greatly reduce the efficiency of the data encryption process. Therefore, there is an urgent need for a data encryption method that can reduce the time spent on encryption and multiplication operations during the data encryption process. Summary of the Invention

[0003] The purpose of this invention is to provide an SM4-GCM encryption operation device, method, equipment and medium. In this solution, the encryption module and the multiplication module can perform data encryption and multiplication operations in parallel or complete all encryption operations separately and then complete all multiplication operations, which greatly reduces the time consumed by encryption and multiplication operations in the data encryption process.

[0004] To solve the above-mentioned technical problems, the present invention provides an SM4-GCM encryption computing device, comprising: a data splicing module, a control module, an encryption module, and a multiplier module;

[0005] The data splicing module is used to splice several initial vectors to obtain a spliced ​​vector;

[0006] The control module is used to call the encryption module to generate a round key, and send several data to be encrypted to the encryption module and authentication data to the multiplier module;

[0007] The encryption module is configured to perform a key expansion operation to generate a preset number of round keys after being invoked by the control module; perform SM4 encryption on the concatenated vector according to the preset number of round keys within a first set of clock cycles to generate intermediate key data; and complete the SM4 encryption operation on each of the data to be encrypted within several sets of clock cycles starting from the second set of clock cycles to generate intermediate ciphertext data corresponding to each of the data to be encrypted; wherein each set of clock cycles contains the preset number of clock cycles;

[0008] The multiplier module is used to perform a target multiplication operation corresponding to the Ghash algorithm on the intermediate key data and the authentication data within the second set of clock cycles to generate an intermediate multiplication result; and to complete the target multiplication operation on the intermediate key data, the intermediate multiplication result and the corresponding intermediate ciphertext data within several sets of clock cycles starting from the third set of clock cycles to generate and output the corresponding SM4-GCM encryption operation result.

[0009] Optionally, the encryption module includes: a wheel control module, a wheel module, several sets of S-box modules, and a wheel key storage module, wherein a set of S-box modules includes several S-box modules;

[0010] The wheel control module is used to call the wheel module a number of times within one clock cycle;

[0011] The wheel module is used to simultaneously call each group of the S-box modules within one clock cycle or to call a group of the S-box modules within one clock cycle;

[0012] The S-box module is used to perform the key expansion operation to generate the preset number of round keys; to perform the SM4 encryption operation on the received concatenated vector to generate the intermediate key data; and to perform the SM4 encryption operation on each of the received data to be encrypted simultaneously or to perform the SM4 encryption operation on each of the received data to be encrypted sequentially to generate each of the intermediate ciphertext data.

[0013] The round key storage module is used to store the preset number of round keys.

[0014] Optionally, the multiplier module includes: a hash module, a sequence multiplication module, several sets of multipliers, a multiplication result register, a first input register, and a second input register;

[0015] The hash module is used to call the sequence multiplication module a number of times within one clock cycle;

[0016] The sequential multiplication module is used to simultaneously call each group of multipliers within one clock cycle or to call a group of multipliers within one clock cycle;

[0017] The multiplier is configured to perform the target multiplication operation on the received intermediate key data and the authentication data within one clock cycle to generate an intermediate multiplication result; or to perform the target multiplication operation on the received intermediate key data, the intermediate multiplication result, and each of the intermediate ciphertext data simultaneously within one clock cycle, or to perform the target multiplication operation on the received intermediate key data, the intermediate multiplication result, and the corresponding intermediate ciphertext data within one clock cycle to generate each of the SM4-GCM encryption operation results;

[0018] The multiplication result register is used to store the intermediate multiplication results and the results of each SM4-GCM encryption operation;

[0019] The first input register is used to store the intermediate key data;

[0020] The second input register is used to store the authentication data and each of the intermediate ciphertext data.

[0021] Optional, also includes:

[0022] A first selector is used to transmit the concatenated vector to the encryption module based on the control of the control module when the control module determines that the key expansion operation has ended.

[0023] A second selector is used to transmit the intermediate key data to the first input register in the multiplier module based on the control of the control module.

[0024] Optional, also includes:

[0025] A data storage device for storing the received authentication data;

[0026] A third selector is used to receive the authentication data transmitted by the data storage based on the control of the control module;

[0027] A fourth selector is used to transmit the authentication data transmitted by the third selector to the second input register in the multiplier module based on the control of the control module.

[0028] Optional, also includes:

[0029] A counter module is used to count the SM4 encryption operations.

[0030] Optional, also includes:

[0031] A length storage device is used to receive and store the data length data corresponding to each of the data to be encrypted;

[0032] The padding module is used to perform a preset padding operation on each of the intermediate ciphertext data based on the data length data within several sets of clock cycles starting from the fourth set of clock cycles, so as to set the target data position in each of the padded intermediate ciphertext data to 0.

[0033] The control module is further configured to:

[0034] Determine if new data to be encrypted has been received;

[0035] If no new data to be encrypted is received, the filling module is controlled to perform the preset filling operation, and the filling intermediate ciphertext data is stored in the second input register by controlling the third selector and the fourth selector.

[0036] The multiplier module is controlled to perform the target multiplication operation on the intermediate key data, the padded intermediate ciphertext data and the SM4-GCM encryption operation results within several sets of clock cycles starting from the fifth set of clock cycles, so as to generate the padded multiplication operation results corresponding to the padded intermediate ciphertext data.

[0037] Starting from the sixth clock cycle, an XOR operation is performed on the result of each of the padded multiplication operations and the data length data to generate an intermediate XOR operation result corresponding to the result of each of the padded multiplication operations.

[0038] The multiplier module is controlled to perform the target multiplication operation on each intermediate XOR operation result and the intermediate key data within several sets of clock cycles starting from the seventh set of clock cycles, so as to generate the target multiplication operation result corresponding to each intermediate XOR operation result;

[0039] Starting from the eighth clock cycle, the XOR operation is performed on each target multiplication result and the intermediate multiplication result within several clock cycles to generate and output the target XOR operation result corresponding to each target multiplication result, and to control the encryption module and the multiplier module to shut down.

[0040] To address the aforementioned technical problems, this invention also provides an SM4-GCM encryption operation method, applied to the SM4-GCM encryption operation device described above, wherein the SM4-GCM encryption operation device includes: a data concatenation module, a control module, an encryption module, and a multiplier module; the method includes:

[0041] The data splicing module is used to splice several initial vectors to obtain a spliced ​​vector;

[0042] The control module calls the encryption module to generate a round key, and sends several data to be encrypted and authentication data to the multiplier module.

[0043] The encryption module, after being invoked by the control module, performs a key expansion operation to generate a preset number of round keys; within the first set of clock cycles, it performs an SM4 encryption operation on the concatenated vector according to the preset number of round keys to generate intermediate key data; and within several sets of clock cycles starting from the second set of clock cycles, it completes the SM4 encryption operation on each of the data to be encrypted to generate intermediate ciphertext data corresponding to each of the data to be encrypted; wherein, each set of clock cycles contains the preset number of clock cycles;

[0044] The multiplier module performs a target multiplication operation corresponding to the Ghash algorithm on the intermediate key data and the authentication data within the second set of clock cycles to generate an intermediate multiplication result; and completes the target multiplication operation on the intermediate key data, the intermediate multiplication result and the corresponding intermediate ciphertext data within several sets of clock cycles starting from the third set of clock cycles to generate and output the corresponding SM4-GCM encryption operation result.

[0045] To address the aforementioned technical problems, the present invention also provides an electronic device, comprising:

[0046] Memory, used to store computer programs;

[0047] A processor for executing the computer program to implement the SM4-GCM encryption operation method as described above.

[0048] To address the aforementioned technical problems, the present invention also provides a computer-readable storage medium for storing a computer program, which, when executed by a processor, implements the SM4-GCM encryption method as described above.

[0049] The purpose of this invention is to provide an SM4-GCM encryption operation device, method, apparatus, and medium. The control module in the encryption operation device calls the encryption module to perform a key expansion operation to generate a preset number of round keys. Simultaneously, the data concatenation module concatenates several initial vectors to obtain a concatenated vector. Within the first set of clock cycles, the encryption module performs an SM4 encryption operation on the concatenated vector according to the round keys to generate intermediate key data. Then, within several time cycles starting from the second set of clock cycles, the encryption module performs an SM4 encryption operation on several data to be encrypted to generate corresponding intermediate ciphertext data. At the same time, the multiplier... The module performs target multiplication operations on the intermediate key data and the authentication data within the second set of clock cycles to generate intermediate multiplication results. Then, starting from the third set of clock cycles, it performs target multiplication operations on the intermediate key data, intermediate multiplication results, and corresponding intermediate ciphertext data within several sets of clock cycles, thereby generating and outputting the corresponding SM4-GCM encryption results. In other words, in this scheme, the encryption module and the multiplication module can perform data encryption and multiplication operations in parallel or complete all encryption operations separately and then complete all multiplication operations, which greatly reduces the time consumed by encryption and multiplication operations during the data encryption process. Attached Figure Description

[0050] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0051] Figure 1 This invention provides a schematic diagram of the structure of an SM4-GCM encryption computing device.

[0052] Figure 2 A schematic diagram of another SM4-GCM encryption computing device provided by the present invention;

[0053] Figure 3 A schematic diagram of the structure of an SM4-GCM encryption module provided by the present invention;

[0054] Figure 4 This is a schematic diagram of the structure of a multiplier module provided by the present invention;

[0055] Figure 5 A flowchart of an SM4-GCM encryption operation method provided by the present invention;

[0056] Figure 6 A calculation flowchart of an SM4-GCM encryption computing device provided by the present invention;

[0057] Figure 7 This is a schematic diagram of the structure of an electronic device provided by the present invention. Detailed Implementation

[0058] The core of this invention is to provide an SM4-GCM encryption operation device, method, equipment and medium. In this solution, the encryption module and the multiplication module can perform data encryption and multiplication operations in parallel or complete all encryption operations separately and then complete all multiplication operations, which greatly reduces the time consumed by encryption and multiplication operations in the data encryption process.

[0059] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0060] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of an SM4-GCM encryption computing device provided by the present invention. The device includes: a data splicing module 1, a control module 2, an encryption module 3, and a multiplier module 4;

[0061] Data splicing module 1 is used to splice several initial vectors to obtain a spliced ​​vector;

[0062] Control module 2 is used to call encryption module 3 to generate round key, and send several data to be encrypted to encryption module 3 and authentication data to multiplier module 4;

[0063] Encryption module 3 is used to perform key expansion operations to generate a preset number of round keys after being called by the controlled module 2; to perform SM4 encryption operations on the concatenated vector according to the preset number of round keys within the first set of clock cycles to generate intermediate key data; and to complete the SM4 encryption operations on each data to be encrypted within several sets of clock cycles starting from the second set of clock cycles to generate intermediate ciphertext data corresponding to each data to be encrypted; wherein each set of clock cycles contains a preset number of clock cycles;

[0064] Multiplier module 4 is used to perform target multiplication operations corresponding to the Ghash algorithm on intermediate key data and authentication data in the second set of clock cycles to generate intermediate multiplication operation results; and to complete target multiplication operations on intermediate key data, intermediate multiplication operation results and corresponding intermediate ciphertext data in several sets of clock cycles starting from the third set of clock cycles to generate and output the corresponding SM4-GCM encryption operation results.

[0065] In this invention, considering that existing technologies perform encryption and multiplication operations sequentially, which significantly reduces the efficiency of data encryption when there is a large amount of data to be encrypted, this solution includes a data concatenation module 1, a control module 2, an encryption module 3, and a multiplier module 4. The encryption module 3 first performs a key expansion operation under the control of the control module 2 to generate a preset number of round keys. Then, within the first set of clock cycles, it performs SM4 encryption on the concatenated vector generated by the data concatenation module 1 based on the round keys, generating intermediate key data. The multiplier module 4 performs target multiplication operations on the intermediate key data and authentication data within the second set of clock cycles, generating intermediate multiplication results. Simultaneously, the encryption module 3 will... Within a few clock cycles at the beginning of the clock cycle, the SM4 encryption operation of each data to be encrypted is completed, and intermediate ciphertext data is generated. That is, the encryption module 3 can encrypt each data to be encrypted sequentially within the second clock cycle, or it can encrypt each data to be encrypted sequentially within a few clock cycles starting from the second clock cycle. In the former case, the multiplier module 4 will perform the target multiplication operation on the intermediate ciphertext data sequentially within a few clock cycles starting from the third clock cycle, that is, it will process in parallel with the encryption module 3, or the multiplier module 4 will simultaneously perform the target multiplication operation on the intermediate ciphertext data corresponding to each data to be encrypted within the third clock cycle. Both of the above methods can significantly reduce the time consumed by encryption and multiplication operations during the data encryption process.

[0066] This embodiment provides an SM4-GCM (SM4-Galois / Counter Mode, an encryption algorithm) encryption processing device. The control module 2 in the encryption processing device calls the encryption module 3 to perform a key expansion operation to generate a preset number of round keys. Simultaneously, the data concatenation module 1 concatenates several initial vectors to obtain a concatenated vector. The encryption module 3 performs SM4 encryption on the concatenated vector according to the round keys within the first set of clock cycles to generate intermediate key data. Within several time cycles starting from the second set of clock cycles, the encryption module 3 performs SM4 encryption on several data to be encrypted to generate corresponding intermediate ciphertext data. Meanwhile, the multiplier module 4... In the second set of clock cycles, the target multiplication operation is performed on the intermediate key data and authentication data to generate the intermediate multiplication operation result. Then, in several sets of clock cycles starting from the third set of clock cycles, the target multiplication operation is performed on the intermediate key data, the intermediate multiplication operation result, and the corresponding intermediate ciphertext data to generate and output the corresponding SM4-GCM encryption operation result. That is, in this scheme, the encryption module 3 and the multiplication module can perform data encryption and multiplication operations in parallel or complete all encryption operations separately and then complete all multiplication operations, which greatly reduces the time consumed by encryption and multiplication operations in the data encryption process.

[0067] Based on the above embodiments:

[0068] As an optional embodiment, the encryption module 3 includes: a wheel control module 2, a wheel module, several sets of S-box modules, and a wheel key storage module, wherein a set of S-box modules includes several S-box modules;

[0069] Wheel control module 2 is used to call the wheel module several times within one clock cycle;

[0070] The wheel module is used to call various groups of S-box modules simultaneously within one clock cycle or to call a group of S-box modules within one clock cycle;

[0071] The S-box module is used to perform key expansion operations to generate a preset number of round keys; perform SM4 encryption on the received concatenated vector to generate intermediate key data; and perform SM4 encryption on each received data to be encrypted simultaneously or sequentially to generate intermediate ciphertext data.

[0072] The round key storage module is used to store a preset number of round keys.

[0073] In this invention, the encryption module 3 includes a round control module 2, a round module, several sets of S-box modules, and a round key storage module. Each S-box module contains several S-box modules. The round control module 2 can call the round module, which in turn calls the S-box modules to perform key expansion operations and generate a preset number of round keys. Furthermore, after being called, the S-box modules perform SM4 encryption on the received concatenated vector to generate intermediate key data. When the encryption module 3 completes the SM4 encryption of each data to be encrypted within the second clock cycle (i.e., simultaneously encrypts all data to be encrypted within one clock cycle), the round control module 2 needs to call the round module several times within one clock cycle, and the round module needs to simultaneously call each set of S-box modules within one clock cycle. Each set of S-box modules needs to simultaneously perform SM4 encryption operations to generate... The intermediate ciphertext data corresponding to each data to be encrypted; similarly, when the encryption module 3 completes the SM4 encryption operation of each data to be encrypted within several sets of clock cycles starting from the second set of clock cycles, that is, encrypts each data to be encrypted sequentially within several sets of clock cycles starting from the second set of clock cycles, the wheel control module 2 needs to call the wheel module several times in each clock cycle within multiple clock cycles, and the wheel module needs to call a set of S-box modules sequentially in each clock cycle within multiple clock cycles. The set of S-box modules in each clock cycle within multiple clock cycles performs the SM4 encryption operation, and the intermediate ciphertext data of each data to be encrypted is obtained in the same way, ensuring the integrity of the encryption process.

[0074] As an optional embodiment, multiplier module 4 includes: a hash module, a sequence multiplication module, several sets of multipliers, a multiplication result register, a first input register, and a second input register;

[0075] The hash module is used to call the sequence multiplication module a number of times within one clock cycle;

[0076] The sequence multiplication module is used to call multiple groups of multipliers simultaneously within one clock cycle or to call a group of multipliers within one clock cycle.

[0077] The multiplier is used to perform target multiplication operations on the received intermediate key data and authentication data within one clock cycle to generate intermediate multiplication operation results; or to perform target multiplication operations on the received intermediate key data, intermediate multiplication operation results and each intermediate ciphertext data simultaneously within one clock cycle, or to perform target multiplication operations on the received intermediate key data, intermediate multiplication operation results and corresponding intermediate ciphertext data within one clock cycle to generate each SM4-GCM encryption operation result;

[0078] The multiplication result register is used to store the results of intermediate multiplication operations and the results of each SM4-GCM encryption operation;

[0079] The first input register is used to store intermediate key data;

[0080] The second input register is used to store authentication data and intermediate ciphertext data.

[0081] In this invention, the multiplier module 4 includes a hash module, a sequence multiplication module, several sets of multipliers, a multiplication result register, a first input register, and a second input register. The hash module can call the sequence multiplication module, which in turn calls a multiplier to perform target multiplication operations on intermediate key data and authentication data within a second set of clock cycles to generate intermediate multiplication results. When the multiplier module 4 performs target multiplication operations on pairs of intermediate key data, intermediate multiplication results, and each intermediate ciphertext data within a third set of clock cycles—that is, simultaneously completing the multiplication operation on all intermediate ciphertext data within one clock cycle—the hash module needs to call the sequence multiplication module several times within one clock cycle. The sequence multiplication module simultaneously calls each set of multipliers within one clock cycle, and each set of multipliers simultaneously performs target multiplication operations on the intermediate key data, intermediate multiplication results, and a corresponding intermediate ciphertext data, thereby generating the target multiplication results. The SM4-GCM encryption operation result corresponding to the intermediate ciphertext data; similarly, when the multiplier module 4 performs target multiplication operations on the intermediate key data, intermediate multiplication operation results, and corresponding intermediate ciphertext data in several clock cycles starting from the third clock cycle, that is, when performing multiplication operations on each intermediate ciphertext data in sequence in several clock cycles starting from the third clock cycle, the hash module needs to call the sequence multiplication module several times in multiple clock cycles, and the sequence multiplication module will call a set of multipliers in each clock cycle in multiple clock cycles. The set of multipliers in each clock cycle in multiple clock cycles performs the target multiplication operation, and the SM4-GCM encryption operation result corresponding to each intermediate ciphertext data is obtained in the same way, ensuring the integrity of the multiplication operation.

[0082] As an optional embodiment, it also includes:

[0083] The first selector is used to transmit the concatenated vector to the encryption module 3 based on the control of the control module 2 after the key expansion operation is completed;

[0084] The second selector is used to transfer intermediate key data to the first input register in the multiplier module 4 based on the control of the control module 2.

[0085] In this invention, considering that the user's actual needs may change, a first selector and a second selector are added. The first selector can transmit the concatenated vector to the encryption module 3 based on the control of the control module 2 after the key expansion operation is completed. The second selector will transmit the intermediate key data to the first input register in the multiplier module 4 based on the control of the control module 2. That is, the encryption and multiplication operations are controlled in real time based on the user's actual needs, which is convenient for the user's actual operation.

[0086] As an optional embodiment, it also includes:

[0087] Data storage device, used to store received authentication data;

[0088] The third selector is used to receive authentication data transmitted from the data storage device based on the control of the control module 2;

[0089] The fourth selector is used to transfer the authentication data transmitted by the third selector to the second input register in the multiplier module 4 based on the control of the control module 2.

[0090] In this invention, considering that the actual needs of users may change, a data storage device, a third selector, and a fourth selector are added. The data storage device is used to receive and store authentication data. When a multiplication operation is required, the third selector receives the authentication data transmitted by the data storage device under the control of the control module 2. The fourth selector transmits the authentication data transmitted by the third selector to the second input register in the multiplier module 4 under the control of the control module 2. Selection control is added to the original SM4-GCM encryption operation device to facilitate the actual operation of users.

[0091] As an optional embodiment, it also includes:

[0092] The counter module is used to count the SM4 encryption operations.

[0093] In this invention, to distinguish between the received concatenated vector and the data to be encrypted, a counter module is added. Each time the concatenated vector or the data to be encrypted is encrypted using SM4, a counter is added. For example, the first time the concatenated vector is received, the count is 1; the second time the data to be encrypted is received, the count is 2, and so on. This not only facilitates the distinction between the received concatenated vector and the data to be encrypted, but also allows the control module 2 to perform different multiplication operations based on the concatenated vector and the different data to be encrypted, thus improving the accuracy of the solution.

[0094] As an optional embodiment, it also includes:

[0095] The length storage device is used to receive and store the length data corresponding to each piece of data to be encrypted;

[0096] The padding module is used to perform preset padding operations on each intermediate ciphertext data based on each data length within several clock cycles starting from the fourth clock cycle, so as to set the target data position in each padded intermediate ciphertext data to 0.

[0097] Control module 2 is also used for:

[0098] Determine if new data to be encrypted has been received;

[0099] If no new data to be encrypted is received, the filling module is controlled to perform a preset filling operation, and the filling intermediate ciphertext data is stored in the second input register by controlling the third and fourth selectors.

[0100] The control multiplier module 4 performs target multiplication operations on intermediate key data, padded intermediate ciphertext data and SM4-GCM encryption operation results within several clock cycles starting from the fifth clock cycle, so as to generate the padded multiplication operation results corresponding to the padded intermediate ciphertext data.

[0101] Starting from the sixth clock cycle, an XOR operation is performed on the result of each padded multiplication operation and the data of each data length within several clock cycles to generate the intermediate XOR operation result corresponding to each padded multiplication operation result;

[0102] The control multiplier module 4 performs target multiplication operations on each intermediate XOR operation result and intermediate key data within several sets of clock cycles starting from the seventh set of clock cycles, so as to generate the target multiplication operation result corresponding to each intermediate XOR operation result;

[0103] Starting from the eighth clock cycle, XOR operations are performed on the results of each target multiplication operation and the intermediate multiplication operation within several clock cycles to generate and output the target XOR operation result corresponding to each target multiplication operation result, and to control the encryption module 3 and the multiplier module 4 to shut down.

[0104] In this invention, considering that when there are multiple data to be encrypted, it is necessary to perform padding operations on each intermediate ciphertext data after encrypting all the data to be encrypted. Therefore, this solution also includes a length memory and a padding module. The length memory can receive and store the data length data corresponding to each data to be encrypted. The padding module performs a preset padding operation on each intermediate ciphertext data based on the data length data to set the target data position in each padded intermediate ciphertext data to 0. The control module 2 determines whether new data to be encrypted has been received. If no new data to be encrypted has been received, the control module performs the preset padding operation and stores the padded intermediate ciphertext data in the second input register by controlling the third and fourth selectors. The control module 4 performs target multiplication operations on the intermediate key data, the padded intermediate ciphertext data, and the SM4-GCM encryption operation results within several clock cycles starting from the fifth clock cycle to generate the padding multiplication operation results corresponding to each padded intermediate ciphertext data. Starting from the sixth clock cycle, for several clock cycles, an XOR operation is performed on the results of each padded multiplication operation and the data of each data length to generate intermediate XOR results corresponding to each padded multiplication operation. Then, starting from the seventh clock cycle, the multiplier module 4 performs target multiplication operations on each intermediate XOR result and intermediate key data for several clock cycles to generate target multiplication results corresponding to each intermediate XOR result. Finally, starting from the eighth clock cycle, an XOR operation is performed on each target multiplication result and intermediate multiplication result for several clock cycles to generate and output target XOR results corresponding to each target multiplication result, and the encryption module 3 and multiplier module 4 are shut down. In other words, by controlling the corresponding selection module and multiplier module 4 to perform corresponding multiplication and XOR operations on the padded intermediate ciphertext data, accurate final data is obtained, improving the accuracy of the scheme.

[0105] It should be noted that the actual SM4-GCM encryption processing device, such as Figure 2As shown, the circuit includes: Control module 2 for controlling the overall circuit operation; Encryption module 3 (Sm4_enc_core module) for performing SM4 encryption and decryption; Multiplier module 4 (ghash_mult module) for performing multiplication operations in Ghash operations; Padding module (gen_remain_bits module) for performing padded operations on the output; Splicing module 1 for splicing the 96-bit initial vector iv, resulting in 128-bit data {iv, 32'h00000001}, used to generate j0; and Counter module for accumulating the output {iv, 32'h00000001} from the Splicing module. After each data encryption is completed, an increment operation is performed; Selector Sel0 module: Selector used to select the input of sm4_enc_core; Selector sel1 module and Selector sel2 module: Selector used to select the b_buf input of ghash_mult module; Initialization vector memory iv_buf: 96-bit register used to store the initialization vector iv of the input; Key memory key_buf: 128-bit register used to store the key of the input; Data memory data_buf: 128-bit register used to store the data of the input; Length memory len_buf: 128-bit register used to store the length of the data of the input; J0 memory j0_buf: 128-bit register used to store the key intermediate data j0;

[0106] It should also be noted that, such as Figure 3 As shown, encryption module 3 (sm4_enc_core) includes: a round control module (round_ctrl module): used to control sm4_enc_core to perform encryption operations on data enc_data or key expansion operations on key based on the enc_round signal; a round module: used to call 4 S-boxes to perform one round operation of the SM4 algorithm in one clock cycle; an S-box module (s_box module): used to perform 8-bit lookup table operations of the SM4 algorithm; and a round key storage module (ram_sp module): a storage array with a width of 32 bits and a depth of 32 bits, used to store the round key. Encryption module 3 (sm4_enc_core) can complete one round operation per clock cycle, requiring a total of 32 clock cycles (in practical applications, N is generally 32, that is, generally 32 clock cycles are required, but the specific value of the clock cycle can be changed according to the actual encryption needs. This application does not make a special limit on the number of clock cycles here) to complete the key expansion operation or to complete the encryption and decryption of 128-bit input data.

[0107] It should also be noted that, such as Figure 4 As shown, multiplier module 4 (ghash_mult module) includes: a hash module ghash_control module for flow control of ghash operations; a sequence multiplication module serial_mul module that calls four parallel 1-bit multipliers to perform 4-bit multiplication operations in one clock cycle; a multiplication result register rst_buf for storing the result of the multiplication operation; a first input register a_buf: a 128-bit register for storing key intermediate data H as the multiplier, where H is the result of SM4 encryption of 128-bit 0; and a second input register b_buf: a 128-bit register for storing the multiplicand b to be calculated.

[0108] It should also be noted that the advantages of the SM4-GCM encryption processing device provided in this solution are as follows: 1. Encryption module 3 simultaneously possesses round key expansion and data encryption functions. The expanded round key is stored in the ram_sp memory, so for scenarios where the key remains unchanged, subsequent data encryption and decryption do not require further round key expansion operations. 2. Through the control of the selector, encryption module 3 (sm4_enc_core) and multiplier module 4 (ghash_mult) can perform encryption and ghash operations in parallel to improve system execution efficiency.

[0109] Please refer to Figure 5 , Figure 5 This invention provides a flowchart of an SM4-GCM encryption operation method. The method is applied to the SM4-GCM encryption operation device described above, which includes: a data concatenation module 1, a control module 2, an encryption module 3, and a multiplier module 4. The method includes:

[0110] S11: Use data splicing module 1 to splice several initial vectors to obtain the spliced ​​vector;

[0111] S12: Use control module 2 to call encryption module 3 to generate round key, and send some data to be encrypted to encryption module 3 and authentication data to multiplier module 4;

[0112] S13: After being called by the controlled module 2, the encryption module 3 performs a key expansion operation to generate a preset number of round keys; within the first set of clock cycles, the SM4 encryption operation is performed on the concatenated vector according to the preset number of round keys to generate intermediate key data; and within several sets of clock cycles starting from the second set of clock cycles, the SM4 encryption operation of each data to be encrypted is completed to generate intermediate ciphertext data corresponding to each data to be encrypted; wherein, each set of clock cycles contains a preset number of clock cycles;

[0113] S14: Utilize multiplier module 4 to perform target multiplication operations corresponding to the Ghash algorithm on intermediate key data and authentication data during the second set of clock cycles to generate intermediate multiplication operation results; and complete target multiplication operations on intermediate key data, intermediate multiplication operation results and corresponding intermediate ciphertext data during several sets of clock cycles starting from the third set of clock cycles to generate and output the corresponding SM4-GCM encryption operation results.

[0114] The SM4-GCM encryption operation method provided in this embodiment corresponds to the above-described device, and therefore has the same beneficial effects as the above-described device. Therefore, for the embodiment of the SM4-GCM encryption operation method, please refer to the description of the embodiment of the device section, which will not be repeated here.

[0115] It should be noted that the execution flow of the high-efficiency SM4-GCM algorithm provided by this invention is as follows: Figure 6 As shown:

[0116] Step 1: Circuit initialization and start operation. Initialization mainly involves placing the control state machine in control module 2 into a preset start state;

[0117] Step 2, as follows Figure 2 As shown, key, iv, and length are injected and stored in registers key_buf, iv_buf, and len_buf, respectively.

[0118] Step 3: The sm4_enc_core module performs key expansion: Within 32 clock cycles, the round_ctrl calls the round module 32 times, completing 32 rounds of key expansion. The result is 32 32-bit round keys, which are stored in the memory array ram_sp. These stored round keys will be used to perform SM4 encryption operations;

[0119] Step 4: Determine if the key expansion is complete (after 32 clock cycles, 32 rounds of key expansion operations are completed). If not, return to step 3; if yes, proceed to step 5.

[0120] Step 5, Calculate H: At this point, control module 2 inputs 128-bit data 0 (the concatenated data) into the sm4_enc_core module via selector sel0. sm4_enc_core performs encryption using the round key stored in ram_sp. H is output after 32 clock cycles. Control module 2 stores the output H in a_buf of the ghash_mult module via selector sel3.

[0121] Step Six: Determine the input of authentication data AAD (AAD, AADditional Authenticated Data, calculated auxiliary authentication data). If AAD is input, proceed to Step Seven; otherwise, continue waiting for AAD input.

[0122] Step 7: If AAD data input is detected, AAD calculation is performed: AAD is input via the data_i interface and stored in data_buf. Control module 2 transmits AAD to the b_buf module of the ghash_mult module through selectors sel1 and sel2. At this time, rst_buf stores 0 data, and a_buf stores H (intermediate key data). Therefore, AAD is directly multiplied by H. ghash_control calls the serial_mul module, performing a 4-bit multiplication every clock cycle. A 128-bit multiplication requires 32 clock cycles to complete. This ensures that both the multiplication operation and the SM4 encryption operation are performed in parallel, taking 32 clock cycles. The result is stored in rst_buf for use in the next Ghash operation. Simultaneously, control module 2 sel0 selects the output data {iv, 32'h00000001} from the splitting module and inputs this data into the sm4_enc_core module. The sm4_enc_core module performs the encryption operation, which also takes 32 clock cycles to complete the calculation of intermediate data j0. j0 is the result of SM4 encryption of the data {iv, 32'h00000001}. Control module 2 stores j0 in register J0_buf through selector sel3;

[0123] Step 8: Determine whether the new input data_i is encrypted / decrypted data or new AAD data input; if it is AAD, call the ghash_mult module and perform AAD calculation, i.e., execute step 7; if it is data, execute step 9.

[0124] Step 9, ciphertext calculation and multiplication: Control module 2 (sel0) selects the output data {iv, 32'h00000002} from the counter module and inputs it to the sm4_enc_core module. The sm4_enc_core module performs the encryption operation, completing the calculation of the intermediate ciphertext data E after 32 clock cycles. E is XORed with the input data data to complete the calculation of the intermediate data C. C is directly output as the ciphertext. Simultaneously, control module 2 stores C in register b_buf by controlling selectors sel1 and sel2. The counter module performs a +1 operation {iv, 32'h00000003}. Afterwards, the ghash_mult module uses H and C from a_buf. `rst_buf` performs multiplication. `ghash_control` calls the `serial_mul` module, performing 4-bit multiplications per clock cycle. A 128-bit multiplication requires 32 clock cycles to complete. After 32 clock cycles, the result is stored in `rst_buf`. Simultaneously with the `ghash_mul` operation, the `sm4_enc_core` module encrypts `{iv, 32'h00000003}` in parallel, storing the result in the `E_buf` register of `sm4_enc_core`. This completes the pre-computation of the E data required for the next data encryption. Both multiplication and encryption operations take 32 clock cycles and can be performed in parallel without waiting.

[0125] Step 10: Determine if the input data is "data" and if it is the last piece of data.

[0126] If the input data is "data" and it is not the last piece of data, then repeat the above steps, i.e., execute step eight;

[0127] If the input data is data, and it is the last piece of data (last_data), then proceed to step eleven;

[0128] In step eleven, the `gen_remain_bits` module performs padding based on the input length, setting any extra bits to 0. Simultaneously, control module 2 stores C in register `b_buf` via selectors `sel1` and `sel2`. The `ghash_mult` module then uses H and C from `a_buf`. rst_buf performs the multiplication operation. After 32 clock cycles, the result Q is stored in rst_buf.

[0129] Step 12: Finally, control module 2 uses the sel2 selector to perform an XOR operation between the data in rst_buf and the length data len_i. Then, it performs a multiplication operation through the ghash_mult module. The result of the multiplication operation is XORed with the data stored in J0_buf, and the final tag (the result of the target XOR operation) is output.

[0130] It should also be noted that the above design achieves the following beneficial effects: The circuit first completes round key expansion, H-operation, and other operations. During the data encryption phase, data1 is encrypted first, completing the encryption operation after 32 clock cycles. Immediately after completion, the encryption operation for data2 can be executed. Simultaneously, the encryption result of data1 can be multiplied in parallel. Both operations are completed within 32 clock cycles. After completion, the SM4-GCM encryption module 3 outputs the encryption result of data2 and performs the multiplication operation. Simultaneously, the SM4-GCM encryption module 3 begins encrypting data3. Therefore, during the data encryption phase, data encryption and multiplication are executed completely in parallel without waiting for each other, achieving the highest execution efficiency.

[0131] Please refer to Figure 7 , Figure 7 A schematic diagram of the structure of an electronic device provided by the present invention. The electronic device includes:

[0132] Memory 20 is used to store computer programs;

[0133] Processor 21 is used to execute computer programs to implement the SM4-GCM encryption operation method as described above.

[0134] The electronic devices provided in this embodiment may include, but are not limited to, smartphones, tablets, laptops, or desktop computers.

[0135] The processor 21 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 21 may be implemented using at least one of the following hardware forms: Digital Signal Processor (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor, also known as the Central Processing Unit (CPU), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may integrate a Graphics Processing Unit (GPU), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 21 may also include an Artificial Intelligence (AI) processor, which is used to handle computational operations related to machine learning.

[0136] The memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 20 is used to store at least the following computer program 201, which, after being loaded and executed by the processor 21, is capable of implementing the relevant steps of the SM4-GCM encryption operation method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, and the storage method may be temporary or permanent storage. The operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include, but is not limited to, the SM4-GCM encryption operation method.

[0137] In some embodiments, the electronic device may further include a display screen 22, an input / output interface 23, a communication interface 24, a power supply 25, and a communication bus 26.

[0138] Those skilled in the art will understand that Figure 7 The structures shown do not constitute a limitation on electronic devices and may include more or fewer components than those shown.

[0139] The present invention also provides an embodiment of a computer-readable storage medium for storing a computer program, which, when executed by a processor, implements the SM4-GCM encryption operation method as described above.

[0140] It is understood that if the methods in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0141] The computer-readable storage medium provided in this embodiment corresponds to the method described above, and therefore has the same beneficial effects as the method described above. Therefore, for the embodiments of the computer-readable storage medium, please refer to the description of the embodiments in the method section, which will not be repeated here.

[0142] It should be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

[0143] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An SM4-GCM encryption computing device, characterized in that, include: Data splicing module, control module, encryption module, multiplier module; The data splicing module is used to splice several initial vectors to obtain a spliced ​​vector; The control module is used to call the encryption module to generate a round key, and send several data to be encrypted to the encryption module and authentication data to the multiplier module; The encryption module is used to perform a key expansion operation to generate a preset number of round keys after being invoked by the control module; Within the first set of clock cycles, SM4 encryption is performed on the concatenated vector according to the preset number of round keys to generate intermediate key data; And within a number of clock cycles starting from the second set of clock cycles, the SM4 encryption operation of each of the data to be encrypted is completed to generate intermediate ciphertext data corresponding to each of the data to be encrypted; wherein, each set of clock cycles contains the preset number of clock cycles; The multiplier module is used to perform a target multiplication operation corresponding to the Ghash algorithm on the intermediate key data and the authentication data within the second set of clock cycles to generate an intermediate multiplication result; and to complete the target multiplication operation on the intermediate key data, the intermediate multiplication result and the corresponding intermediate ciphertext data within several sets of clock cycles starting from the third set of clock cycles to generate and output the corresponding SM4-GCM encryption operation result.

2. The SM4-GCM encryption processing device as described in claim 1, characterized in that, The encryption module includes: a wheel control module, a wheel module, several sets of S-box modules, and a wheel key storage module, wherein a set of S-box modules includes several S-box modules; The wheel control module is used to call the wheel module a number of times within one clock cycle; The wheel module is used to simultaneously call each group of the S-box modules within one clock cycle or to call a group of the S-box modules within one clock cycle; The S-box module is used to perform the key expansion operation to generate the preset number of round keys; to perform the SM4 encryption operation on the received concatenated vector to generate the intermediate key data; and to perform the SM4 encryption operation on each of the received data to be encrypted simultaneously or to perform the SM4 encryption operation on each of the received data to be encrypted sequentially to generate each of the intermediate ciphertext data. The round key storage module is used to store the preset number of round keys.

3. The SM4-GCM encryption processing device as described in claim 1, characterized in that, The multiplier module includes: a hash module, a sequence multiplication module, several sets of multipliers, a multiplication result register, a first input register, and a second input register; The hash module is used to call the sequence multiplication module a number of times within one clock cycle; The sequential multiplication module is used to simultaneously call each group of multipliers within one clock cycle or to call a group of multipliers within one clock cycle; The multiplier is configured to perform the target multiplication operation on the received intermediate key data and the authentication data within one clock cycle to generate an intermediate multiplication result; or to perform the target multiplication operation on the received intermediate key data, the intermediate multiplication result, and each of the intermediate ciphertext data simultaneously within one clock cycle, or to perform the target multiplication operation on the received intermediate key data, the intermediate multiplication result, and the corresponding intermediate ciphertext data within one clock cycle to generate each of the SM4-GCM encryption operation results; The multiplication result register is used to store the intermediate multiplication results and the results of each SM4-GCM encryption operation; The first input register is used to store the intermediate key data; The second input register is used to store the authentication data and each of the intermediate ciphertext data.

4. The SM4-GCM encryption processing device as described in claim 3, characterized in that, Also includes: A first selector is used to transmit the concatenated vector to the encryption module based on the control of the control module when the control module determines that the key expansion operation has ended. A second selector is used to transmit the intermediate key data to the first input register in the multiplier module based on the control of the control module.

5. The SM4-GCM encryption processing device as described in claim 4, characterized in that, Also includes: A data storage device for storing the received authentication data; A third selector is used to receive the authentication data transmitted by the data storage based on the control of the control module; A fourth selector is used to transmit the authentication data transmitted by the third selector to the second input register in the multiplier module based on the control of the control module.

6. The SM4-GCM encryption processing device as described in claim 1, characterized in that, Also includes: A counter module is used to count the SM4 encryption operations.

7. The SM4-GCM encryption processing device as described in claim 5, characterized in that, Also includes: A length storage device is used to receive and store the data length data corresponding to each of the data to be encrypted; The padding module is used to perform a preset padding operation on each of the intermediate ciphertext data based on the data length data within several sets of clock cycles starting from the fourth set of clock cycles, so as to set the target data position in each of the padded intermediate ciphertext data to 0. The control module is further configured to: Determine if new data to be encrypted has been received; If no new data to be encrypted is received, the filling module is controlled to perform the preset filling operation, and the filling intermediate ciphertext data is stored in the second input register by controlling the third selector and the fourth selector. The multiplier module is controlled to perform the target multiplication operation on the intermediate key data, the padded intermediate ciphertext data and the SM4-GCM encryption operation results within several sets of clock cycles starting from the fifth set of clock cycles, so as to generate the padded multiplication operation results corresponding to the padded intermediate ciphertext data. Starting from the sixth clock cycle, an XOR operation is performed on the result of each of the padded multiplication operations and the data length data to generate an intermediate XOR operation result corresponding to the result of each of the padded multiplication operations. The multiplier module is controlled to perform the target multiplication operation on each intermediate XOR operation result and the intermediate key data within several sets of clock cycles starting from the seventh set of clock cycles, so as to generate the target multiplication operation result corresponding to each intermediate XOR operation result; Starting from the eighth clock cycle, the XOR operation is performed on each target multiplication result and the intermediate multiplication result within several clock cycles to generate and output the target XOR operation result corresponding to each target multiplication result, and to control the encryption module and the multiplier module to shut down.

8. An SM4-GCM encryption operation method, characterized in that, The method is applied to the SM4-GCM encryption processing device as described in any one of claims 1 to 7, wherein the SM4-GCM encryption processing device comprises: a data concatenation module, a control module, an encryption module, and a multiplier module; the method comprises: The data splicing module is used to splice several initial vectors to obtain a spliced ​​vector; The control module calls the encryption module to generate a round key, and sends several data to be encrypted and authentication data to the multiplier module. The encryption module, after being invoked by the control module, performs a key expansion operation to generate a preset number of round keys; within the first set of clock cycles, it performs an SM4 encryption operation on the concatenated vector according to the preset number of round keys to generate intermediate key data; and within several sets of clock cycles starting from the second set of clock cycles, it completes the SM4 encryption operation on each of the data to be encrypted to generate intermediate ciphertext data corresponding to each of the data to be encrypted; wherein, each set of clock cycles contains the preset number of clock cycles; The multiplier module performs a target multiplication operation corresponding to the Ghash algorithm on the intermediate key data and the authentication data within the second set of clock cycles to generate an intermediate multiplication result; and completes the target multiplication operation on the intermediate key data, the intermediate multiplication result and the corresponding intermediate ciphertext data within several sets of clock cycles starting from the third set of clock cycles to generate and output the corresponding SM4-GCM encryption operation result.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the SM4-GCM encryption operation method as described in claim 8.

10. A computer-readable storage medium, characterized in that, Used to store computer programs, which, when executed by a processor, implement the SM4-GCM encryption operation method as described in claim 8.

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