Secondary chamfering method, secondary chamfering system, computing device, and medium
By measuring and adjusting the thickness of the silicon wafer to match the groove shape of the grinding wheel, the problem of inconsistent edge shape of the silicon wafer was solved, and a uniform edge shape of the silicon wafer was achieved after secondary chamfering.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIAN ESWIN MATERIAL TECHNOLOGY CO LTD
- Filing Date
- 2024-12-19
- Publication Date
- 2026-06-26
AI Technical Summary
In the existing technology, due to the inconsistent thickness of the incoming silicon wafers, the edge shape of the silicon wafers after the secondary chamfering process is inconsistent, making it difficult to achieve the desired shape.
By measuring the thickness of the silicon wafer, its thickness is adjusted to the desired value corresponding to the groove shape of the grinding wheel correction groove. The correction groove is used to perform secondary chamfering on the silicon wafer, including etching, grinding, or setting a film layer to achieve the desired thickness, followed by secondary chamfering.
On incoming silicon wafers with varying thickness, the consistency of edge shape and conformity to the desired shape of each wafer after secondary chamfering are ensured.
Smart Images
Figure CN119610427B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor processing technology, and more specifically, to a secondary chamfering method, a secondary chamfering system, a computing device, and a medium. Background Technology
[0002] Silicon wafers are a crucial basic material in the semiconductor field. Existing manufacturing processes mainly include crystal pulling, slicing, primary chamfering, grinding, secondary chamfering, chemical etching, polishing, and cleaning, which result in silicon wafers with smooth surfaces and good edge roughness.
[0003] Secondary chamfering is performed to shape the edges of silicon wafers to a desired form, thereby improving edge utilization. Typically, a grinding wheel is used to perform secondary chamfering on the wafer edges. This grinding wheel includes correction grooves with a specific groove shape, determined based on the thickness of the silicon wafer to be processed and the desired edge shape. By grinding the edges of a silicon wafer of a specific thickness using the correction grooves, the edges can be shaped to the desired form.
[0004] However, in actual production, the thickness of incoming silicon wafers is not completely uniform but fluctuates. Therefore, when the edges of the incoming silicon wafers are chamfered a second time using a correction groove with a fixed groove shape, the shapes of the edges of the resulting silicon wafers may be inconsistent. Summary of the Invention
[0005] This section provides a general overview of this disclosure, rather than a full disclosure of the entire scope or all features of this disclosure.
[0006] The purpose of this disclosure is to provide a secondary chamfering method that enables the edges of incoming silicon wafers with thickness fluctuations to achieve a desired shape after secondary chamfering.
[0007] To achieve the above objectives, according to a first aspect of this disclosure, a secondary chamfering method is provided, comprising:
[0008] The thickness of the silicon wafer to be chamfered is measured to determine whether the measured value is the expected value, wherein the expected value is determined based on the groove shape of the correction groove of the grinding wheel used for the secondary chamfering;
[0009] When the measured value is not the expected value, the thickness of the silicon wafer is adjusted to bring the thickness to the expected value; and
[0010] The adjusted silicon wafer is chamfered a second time using a correction groove.
[0011] In some implementations, adjusting the thickness of the silicon wafer to achieve the desired thickness when the measured value is not the desired value may include etching or polishing the silicon wafer to achieve the desired thickness when the measured value is greater than the desired value.
[0012] In some implementations, adjusting the thickness of the silicon wafer to achieve the desired thickness when the measured value is not the desired value may include: when the measured value is less than the desired value, forming a film layer on the entire surface of the silicon wafer to achieve the desired thickness.
[0013] In some implementations, the film can be obtained by growing, laminating, or spraying on a silicon wafer.
[0014] In some implementations, the film can be obtained by attaching a polymer film onto a silicon wafer.
[0015] In some embodiments, the secondary chamfering method may further include grinding the front and back sides of the silicon wafer after secondary chamfering to remove the film layer.
[0016] In some implementations, the desired value can be a range of values.
[0017] According to another aspect of this disclosure, a secondary chamfering system is also provided, comprising:
[0018] The detection unit is used to measure the thickness of the silicon wafer to be chamfered a second time to determine whether the measured value is the expected value, wherein the expected value is determined according to the groove shape of the correction groove of the grinding wheel used for the second chamfering.
[0019] An adjustment unit is used to adjust the thickness of the silicon wafer when the measured value is not the desired value, so that the thickness reaches the desired value; and
[0020] The processing unit includes a grinding wheel and is used to perform a secondary chamfer on the adjusted silicon wafer through the correction groove of the grinding wheel.
[0021] According to another aspect of this disclosure, a computing device is also provided, the computing device including a processor and a memory, the processor being configured to execute instructions stored in the memory to implement the secondary chamfering method according to any of the above embodiments.
[0022] According to another aspect of this disclosure, a computer-readable storage medium is also provided, which stores at least one instruction for execution by a processor to implement the secondary chamfering method according to any of the above embodiments.
[0023] According to the above embodiment, by adjusting the thickness of the incoming silicon wafer with thickness fluctuations to the desired thickness value determined according to the groove shape of the correction groove of the grinding wheel used for secondary chamfering, the correspondence between the groove shape of the correction groove and the thickness of the silicon wafer can be utilized to perform secondary chamfering on the edge of the silicon wafer whose thickness has been adjusted to the desired value, so that the edge is processed into the desired shape. Attached Figure Description
[0024] The features and advantages of embodiments of the present disclosure will become more readily understood from the following description with reference to the accompanying drawings. The drawings are not drawn to scale and some features may be enlarged or reduced to show detail of specific parts. In the drawings:
[0025] Figure 1 The diagram illustrates the process of performing a secondary chamfering on a silicon wafer.
[0026] Figure 2 This is a flowchart of a secondary chamfering method according to an embodiment of the present disclosure.
[0027] Figure 3 This is a schematic structural diagram of a silicon wafer with a film layer provided according to an embodiment of the present disclosure.
[0028] Figure 4 This is a schematic structural diagram of a secondary chamfering system according to an embodiment of the present disclosure.
[0029] Figure 5 This is a schematic structural diagram of a computing device according to an embodiment of the present disclosure.
[0030] In the accompanying drawings, the same or corresponding technical features, parts or components are represented by the same or corresponding reference numerals. Detailed Implementation
[0031] The present disclosure will now be described in detail with reference to the accompanying drawings and exemplary embodiments. It should be noted that the following detailed description of the present disclosure is for illustrative purposes only and is not intended to limit the scope of the disclosure.
[0032] It should be noted that, for clarity, not all features of a particular embodiment are described or shown in the specification and drawings. Furthermore, to avoid unnecessary details obscuring the technical solutions of interest in this disclosure, only the device structures and parts closely related to the technical solutions of this disclosure are described and shown in the specification and drawings, while other details that are not closely related to the technical content of this disclosure and are known to those skilled in the art are omitted.
[0033] Figure 1 The diagram schematically illustrates the process of secondary chamfering on a silicon wafer. Specifically, in Figure 1 The image shows a silicon wafer W to be subjected to secondary chamfering and a grinding wheel 100 for performing secondary chamfering on the silicon wafer W.
[0034] The grinding wheel 100 includes a correction groove 100a. As previously described, the groove shape of the correction groove 100a is determined based on the thickness of the silicon wafer W to be processed and the desired edge shape. During processing, with the grinding wheel 100 in contact with the silicon wafer W, the correction groove 100a can grind the edge of the silicon wafer W by the relative rotation of the grinding wheel 100 and the silicon wafer W. Thus, the groove shape of the correction groove 100a can be replicated to the edge of the silicon wafer W, thereby obtaining the desired edge shape.
[0035] In actual production, since the thickness of the incoming silicon wafers is not completely consistent, when the edges of the incoming silicon wafers are chamfered twice using the correction groove 100a with a fixed groove shape, the shapes of the edges of the resulting silicon wafers may be inconsistent.
[0036] In response, according to embodiments of this disclosure, a secondary chamfering method is provided. Hereinafter, referring to... Figure 2 The steps of this secondary chamfering method are explained in detail.
[0037] In this secondary chamfering method, firstly, the thickness of the silicon wafer W to be chamfered is measured to determine whether the measured value is the expected value, wherein the expected value is determined according to the groove type of the correction groove 100a of the grinding wheel 100 used for secondary chamfering.
[0038] Since the groove shape of the correction groove 100a is determined based on the thickness of the silicon wafer W to be processed and the desired edge shape, there is a correspondence between the groove shape of the correction groove 100a and the thickness of the silicon wafer W. In other words, the specific thickness of the corresponding silicon wafer W can be determined by the groove shape of the correction groove 100a, i.e., the desired thickness value can be determined.
[0039] If the measured value obtained by measuring the thickness of silicon wafer W is not the expected value, the thickness of silicon wafer W is adjusted to bring the thickness to the expected value.
[0040] If the measured value is not the desired value, and a secondary chamfering process is performed on the silicon wafer W using the correction groove 100a with the specific groove shape, the desired edge shape cannot be obtained. Therefore, in embodiments of this disclosure, the thickness of the silicon wafer W is adjusted based on the difference between the measured value and the desired value. For example, when the measured value is less than the desired value, the silicon wafer W is thickened to achieve the desired thickness; or, when the measured value is greater than the desired value, the silicon wafer W is thinned to achieve the desired thickness.
[0041] Finally, the adjusted silicon wafer W is chamfered a second time using the correction groove 100a.
[0042] Since the thickness of the silicon wafer W has reached the desired value and corresponds to the specific groove type of the correction groove 100a, the edge of the silicon wafer W with the desired thickness can be processed into the desired shape by performing a secondary chamfering process on the edge of the silicon wafer W with the desired thickness through the correction groove 100a.
[0043] In this way, even when the thickness of the incoming silicon wafers is not completely uniform, the edges of each silicon wafer after the second chamfering process can still have the desired shape.
[0044] It is conceivable that this expected value can be a single number or a range of numbers. For example, the single number could be 800um, 810um, or 820um. The range of numbers could be, for example, 785um to 840um.
[0045] When the desired value is a single numerical value, adjusting the thickness of silicon wafer W to that value ensures that the edges of each silicon wafer undergoing secondary chamfering have a consistent desired shape. When the desired value is a range of numerical values, adjusting the thickness of silicon wafer W to fall within that range ensures that the edges of each silicon wafer undergoing secondary chamfering have a desired shape within a specific shape range, where the edge shapes are very similar and all conform to the desired shape.
[0046] Understandably, if the measured value is the desired value, the silicon wafer W can be chamfered twice directly using the correction groove 100a without adjustment, thereby giving the edge of the silicon wafer W the desired shape.
[0047] In some implementations, adjusting the thickness of the silicon wafer W to achieve the desired thickness when the measured value is not the desired value may include etching or polishing the silicon wafer W to achieve the desired thickness when the measured value is greater than the desired value.
[0048] Etching is a chemical process used to remove surface material from silicon wafers, typically using a specific chemical solution (such as a mixture of hydrofluoric acid and nitric acid). By contacting the silicon wafer W with this chemical solution, the surface material can be gradually removed, thereby reducing the wafer's thickness. For example, by controlling the etching time and solution concentration, a desired thickness of surface material (e.g., several micrometers) can be removed, thus achieving the desired thickness for the silicon wafer W.
[0049] Grinding is a physical method of removing surface material from silicon wafers, typically using equipment such as grinding mills. Through the contact and friction between the grinding discs of the grinding mill and the silicon wafer W, the surface material can be gradually removed, thereby reducing the thickness of the silicon wafer. For example, by controlling the grinding depth and speed with the help of a grinding mill, the surface material of the silicon wafer of a desired thickness can be removed, thus achieving the desired thickness of the silicon wafer W.
[0050] In some implementations, refer to Figure 3 Adjusting the thickness of silicon wafer W to achieve the desired thickness when the measured value is not the desired value may include: when the measured value is less than the desired value, setting a film layer S on the entire surface of silicon wafer W to achieve the desired thickness.
[0051] The film layer S can be obtained, for example, by growing, laminating, or spraying on a silicon wafer W.
[0052] For film growth, a film layer S can be grown on the entire surface of a silicon wafer W using deposition processes such as chemical vapor deposition (CVD) or physical vapor deposition (PVD). In this case, the film layer S can be, for example, a film layer made of materials such as silicon dioxide, which have good chemical stability, allowing the thickness of the silicon wafer to be increased without altering its electrical properties. During the film growth process, for example, the desired thickness of the film layer S can be obtained by controlling deposition process parameters such as gas flow rate, temperature, and time, thereby achieving the desired thickness of the silicon wafer W.
[0053] For example, in the case of film lamination, a polymer material film can be adhered to the entire surface of a silicon wafer W to form a film layer S. This polymer material film can be tightly bonded to the surface of the silicon wafer W through a curing process, for example, to give the film layer S high stability. The desired thickness of the film layer S can be obtained by setting the thickness of the polymer material film, thereby achieving the desired thickness of the silicon wafer W.
[0054] For spraying, for example, a specific solution can be sprayed onto the entire surface of a silicon wafer W using spraying equipment to form a film S. After spraying, the film S can be tightly bonded to the surface of the silicon wafer W through processes such as drying and curing. The desired thickness of the film S can be obtained by adjusting conditions such as the concentration of the spraying solution, the number of sprays, and the spraying speed, thereby achieving the desired thickness of the silicon wafer W.
[0055] In some embodiments, the secondary chamfering method may further include grinding the front and back sides of the silicon wafer W after secondary chamfering to remove the film S.
[0056] After the edge of silicon wafer W is chamfered a second time, the edge of silicon wafer W no longer has the film layer S, while the front and back sides of silicon wafer W still retain the film layer S. In this case, it is necessary to remove the film layer S on the front and back sides of silicon wafer W to restore the front and back sides of silicon wafer W to their original state.
[0057] The grinding process following the secondary chamfering process, such as double-sided grinding, can be used to grind away the film S on the front and back sides of the silicon wafer W, so that the front and back sides can be restored to their original state for subsequent processing.
[0058] According to another aspect of this disclosure, referring to Figure 4 A secondary chamfering system 1 is also provided. The secondary chamfering system 1 includes a detection unit 20, an adjustment unit 30, and a processing unit 10.
[0059] The detection unit 20 is used to measure the thickness of the silicon wafer W to be chamfered for the second time, so as to determine whether the measured value is the expected value, wherein the expected value is determined according to the groove type of the correction groove 100a of the grinding wheel 100 used for the second chamfering.
[0060] The adjustment unit 30 is used to adjust the thickness of the silicon wafer W when the measured value is not the expected value, so that the thickness reaches the expected value.
[0061] The processing unit 10 includes a grinding wheel 100 and is used to perform a secondary chamfer on the adjusted silicon wafer W through the correction groove 100a of the grinding wheel 100.
[0062] It is conceivable that the detection unit 20 may be, for example, a thickness measuring instrument capable of measuring thickness and determining size, and the adjustment unit 30 may be, for example, a deposition device, a film application device, or a spraying device.
[0063] In some embodiments, the secondary chamfering system 1 may further include a transfer unit (not shown). This transfer unit is configured to:
[0064] When the detection unit 20 determines that the measured thickness of the silicon wafer W is not the expected value, the silicon wafer W is transferred to the adjustment unit 30 for thickness adjustment. After the thickness adjustment is completed, the silicon wafer W is transferred to the processing unit 10 for secondary chamfering.
[0065] When the detection unit 20 determines that the measured thickness of the silicon wafer W is the expected value, the silicon wafer W is directly transferred to the processing unit 10 for secondary chamfering.
[0066] In some embodiments, the secondary chamfering system 1 may further include a grinding unit (not shown). The grinding unit is configured to grind the front and back sides of the silicon wafer W after the silicon wafer W with the film layer S is subjected to secondary chamfering to remove the film layer S on the front and back sides.
[0067] According to another aspect of this disclosure, referring to Figure 5 It also provides a computing device 4.
[0068] The computing device 4 includes a processor 41 and a memory 42. The processor 41 is used to execute instructions stored in the memory 42 to implement the secondary chamfering method as described in the various embodiments above.
[0069] In some examples, computing device 4 can be at least one of devices such as smartphones, smartwatches, desktop computers, laptops, virtual reality terminals, augmented reality terminals, wireless terminals, and laptop computers. Computing device 4 has communication capabilities and can access wired or wireless networks. Computing device 4 can refer to one of multiple terminals; those skilled in the art will understand that the number of such terminals can be more or less. In some examples, computing device 4 can receive data based on the accessed wired or wireless network. It is understood that computing device 4 undertakes the computation and processing work of the technical solution of this disclosure, and this disclosure does not limit it in this regard.
[0070] Optionally, the processor 41 connects to various parts of the computing device using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 42, and by calling data stored in the memory 42. Optionally, the processor 41 can be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 41 can integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural-network Processing Unit (NPU), and baseband chip. Among them, the CPU mainly handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required to be displayed on the touch screen; the NPU is used to implement artificial intelligence (AI) functions; and the baseband chip is used to handle wireless communication. It is understood that the baseband chip can also be implemented as a separate chip without being integrated into the processor 41.
[0071] The memory 42 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory 42 may include a non-transitory computer-readable storage medium. The memory 42 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 42 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the various method embodiments described above, etc.; the data storage area may store data created according to the use of the computing device, etc.
[0072] In addition, those skilled in the art will understand that the structure of the computing device shown in the above figures does not constitute a limitation on the computing device. The computing device may include more or fewer components than shown, or combine certain components, or have different component arrangements. For example, the computing device may also include a display screen, camera assembly, microphone, speaker, radio frequency circuit, input unit, sensors (such as accelerometer, angular velocity sensor, light sensor, etc.), audio circuit, WiFi module, power supply, Bluetooth module, etc., which will not be described in detail here.
[0073] According to another aspect of this disclosure, a computer-readable storage medium is also provided, which stores at least one instruction for execution by a processor to implement the secondary chamfering method as described in the various embodiments above.
[0074] Those skilled in the art will recognize that the functions described in this disclosure in one or more of the examples above can be implemented using hardware, software, firmware, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium accessible to a general-purpose or special-purpose computer.
[0075] While this disclosure has been described with reference to exemplary embodiments, it should be understood that this disclosure is not limited to the specific embodiments described and shown herein. Various changes to the exemplary embodiments can be made by those skilled in the art without departing from the scope defined by the claims of this disclosure.
[0076] The features mentioned and / or shown in the foregoing description of exemplary embodiments of this disclosure may be combined in the same or similar manner with one or more other embodiments, combined with features in other embodiments, or substituted for corresponding features in other embodiments. Such combinations or substitutions should also be considered as including within the scope of protection of this disclosure.
Claims
1. A method for secondary chamfering, characterized in that, include: The thickness of the silicon wafer to be chamfered a second time is measured to determine whether the measured value is the expected value, wherein the expected value is determined based on the groove shape of the correction groove of the grinding wheel used for the second chamfering. When the measured value is less than the expected value, a film layer is formed on the entire surface of the silicon wafer to make the thickness reach the expected value; The silicon wafer with the film layer is subjected to a secondary chamfering using the correction groove; and The front and back sides of the silicon wafer after the second chamfering are ground to remove the film layer.
2. The secondary chamfering method according to claim 1, characterized in that, The film layer is obtained by growing, attaching, or spraying on the silicon wafer.
3. The secondary chamfering method according to claim 1, characterized in that, The film layer is obtained by attaching a polymer material film onto the silicon wafer.
4. The secondary chamfering method according to claim 1, characterized in that, The expected value is a numerical range.
5. A secondary chamfering system, characterized in that, include: The detection unit is used to measure the thickness of the silicon wafer to be chamfered a second time to determine whether the measured value is the expected value, wherein the expected value is determined according to the groove shape of the correction groove of the grinding wheel used for the second chamfering. An adjustment unit is configured to deposit a film layer on the entire surface of the silicon wafer when the measured value is less than the expected value, so that the thickness reaches the expected value; A processing unit, including the grinding wheel, is used to perform a secondary chamfering on the silicon wafer with the film layer disposed thereon through the correction groove of the grinding wheel; and A grinding unit is used to grind the front and back sides of the silicon wafer after the secondary chamfering to remove the film layer.
6. A computing device, characterized in that, It includes a processor and a memory, the processor being configured to execute instructions stored in the memory to implement the secondary chamfering method according to any one of claims 1 to 4.
7. A computer-readable storage medium, characterized in that, The system stores at least one instruction, which is executed by a processor to implement the secondary chamfering method according to any one of claims 1 to 4.