Signal transmission method and device
By using resistors to identify signal information and processing signals on the processor substrate, the problem of low signal transmission efficiency caused by PCB board loss is solved, and more efficient and stable signal transmission is achieved.
Patent Information
- Application Number
- CN202411648482.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-18
- Publication Date
- 2025-03-14
- Estimated Expiration
- 2044-11-18
AI Technical Summary
In signal transmission scenarios, PCB boards have large losses, resulting in low signal transmission efficiency.
By receiving the first signal from the processor chip and transmitting it to the processor substrate, the resistor on the substrate recognizes the voltage of different devices to distinguish signal information, the processor substrate processes the first signal and transmits it to the application terminal.
Significantly improve signal transmission efficiency, reduce noise and distortion, and ensure that the signal maintains higher integrity and efficiency during transmission.
Smart Images

Figure CN119621633A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of computers, and more specifically, to a signal transmission method and device. Background Art
[0002] In the signal transmission scenario, the high-speed signal of the processor and other chips is usually transmitted to the high-speed link through the PCB board, and then the signal is transmitted to the application end through the cable. However, due to the large loss of PCB board material (LOSS), the signal transmission efficiency is low. Therefore, there is a problem of low signal transmission efficiency.
[0003] To address the above-mentioned problems, no effective solution has been proposed yet. Summary of the invention
[0004] The embodiments of the present application provide a signal transmission method and device to at least solve the problem of low signal transmission efficiency in the related art.
[0005] According to one embodiment of the present application, a signal transmission method is provided, including: receiving a first signal from a processor chip; transmitting the first signal to a processor substrate, wherein the resistors on the processor substrate can identify the voltages of different devices to distinguish the signal information of the first signal; receiving a second signal from the processor substrate, wherein the second signal is a signal obtained by the processor substrate after processing the first signal according to the signal information; and transmitting the second signal to an application end.
[0006] According to another embodiment of the present application, a signal transmission device is provided, including: a first receiving unit, used to receive a first signal from a processor chip; a first transmission unit, used to transmit the above-mentioned first signal to a processor substrate, wherein the resistor on the above-mentioned processor substrate can identify the voltage of different devices to distinguish the signal information of the above-mentioned first signal; a second receiving unit, used to receive a second signal from the above-mentioned processor substrate, wherein the above-mentioned second signal is a signal obtained by the above-mentioned processor substrate after processing the above-mentioned first signal according to the above-mentioned signal information; a second transmission unit, used to transmit the above-mentioned second signal to an application end.
[0007] In an exemplary embodiment, the processor chip contacts the second PIN pin on the adaptive connector through the extended first PIN pin, and the first receiving unit includes: a first receiving module, which is used to receive the first signal from the adaptive connector through the electrical connection formed when the first PIN pin contacts the second PIN pin.
[0008] In an exemplary embodiment, the first transmission unit includes: a first transmission module, used to transmit the first signal to the processor substrate through the electrical connection and the adaptive connector, wherein the processor substrate is located on a processor base, and the processor base is used to accommodate the processor chip.
[0009] In an exemplary embodiment, the second PIN is connected to the application end through a first cable, and the second transmission unit includes: a second transmission module, which is used to transmit the second signal to the application end through the first cable and the adaptive connector.
[0010] In an exemplary embodiment, the second receiving unit includes at least one of the following: a second receiving module for receiving a low-speed signal from the processor substrate; a third receiving module for receiving a high-speed signal from the processor substrate; a fourth receiving module for receiving a mixed signal from the processor substrate, wherein the mixed signal is a signal obtained by mixing the low-speed signal with the high-speed signal.
[0011] In an exemplary embodiment, the above-mentioned second receiving module includes: a first receiving sub-module, used for receiving the above-mentioned low-speed signal by the above-mentioned adaptive connector through a first number of third PIN pins on the multi-layer PIN structure of the adaptive connector; the above-mentioned third receiving module includes: a second receiving sub-module, used for receiving the above-mentioned high-speed signal by the above-mentioned adaptive connector through a second number of fourth PIN pins on the above-mentioned multi-layer PIN structure, wherein the above-mentioned first number is less than the above-mentioned second number.
[0012] In an exemplary embodiment, the above-mentioned device also includes: a power supply module, which is used to supply power to the above-mentioned processor chip through the above-mentioned underlying PIN structure by transmitting the power obtained by the power board through the second cable when the power pin inside the above-mentioned processor chip has been connected to the underlying PIN structure on the above-mentioned multi-layer PIN structure.
[0013] In an exemplary embodiment, the device further includes at least one of the following: a first enhancement unit, for using an amplifier to enhance the strength of the first signal after the first signal is transmitted to the processor substrate; a first processing unit, for pre-processing the first signal after the first signal is transmitted to the processor substrate to improve the purity of the first signal; a first calibration unit, for calibrating and adjusting the first signal in real time according to the signal quality parameters monitored in real time after the first signal is transmitted to the processor substrate; a first inspection unit, for performing an integrity check on the first signal after the first signal is transmitted to the processor substrate, and automatically switching to a backup transmission path or initiating a fault detection if an abnormality or fault is found in the first signal. Fault recovery procedure; the above-mentioned device also includes at least one of the following: a second enhancement unit, which is used to use an amplifier to enhance the strength of the above-mentioned second signal after the above-mentioned second signal from the above-mentioned processor substrate is received; a second processing unit, which is used to pre-process the above-mentioned second signal after the above-mentioned second signal from the above-mentioned processor substrate is received, so as to improve the purity of the above-mentioned first signal; a second calibration unit, which is used to calibrate and adjust the above-mentioned second signal in real time according to the signal quality parameters monitored in real time after the above-mentioned second signal from the above-mentioned processor substrate is received; a second inspection unit, which is used to perform an integrity check on the above-mentioned second signal after the above-mentioned second signal from the above-mentioned processor substrate is received, and if the above-mentioned second signal is found to be abnormal or faulty, automatically switch to a backup transmission path or start a fault recovery procedure.
[0014] The second receiving unit includes: a first adjustment module, used to adjust the PIN structure of the adaptive connector according to the signal information; and a second adjustment module, used to receive the second signal through the adjusted PIN structure of the adaptive connector.
[0015] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any one of the above method embodiments when running.
[0016] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
[0017] Through this application, a new signal processing method is adopted. The method first receives a first signal from a processor chip to ensure the source quality of the signal. Subsequently, the first signal is transmitted to a processor substrate, and the resistors on the substrate can identify the voltages of different devices, thereby accurately identifying the signal information of the first signal. Since this design utilizes the voltage recognition function of the resistor, the accuracy of signal recognition is significantly enhanced.
[0018] Afterwards, the present application receives a second signal from the processor substrate. This second signal is obtained by the processor substrate after accurately processing the first signal based on the previously identified signal information. This processing process effectively improves the signal quality, reduces noise and distortion, and provides a solid foundation for subsequent efficient transmission.
[0019] Finally, the optimized second signal is transmitted to the application end. Since the signal has been accurately processed by the processor substrate, its quality has been significantly improved. Therefore, when passing through PCB boards and cables that may have high losses (LOSS), it can maintain higher signal integrity and transmission efficiency, which can solve the problem of low signal transmission efficiency and achieve the technical effect of improving signal transmission efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 is a schematic diagram of an application environment of a signal transmission method according to an embodiment of the present application;
[0021] Figure 2 is a flow chart of a signal transmission method according to an embodiment of the present application;
[0022] Figure 3 is a schematic diagram of a signal transmission method according to an embodiment of the present application;
[0023] Figure 4 is a schematic diagram of a signal transmission method according to an embodiment of the present application;
[0024] Figure 5 is a schematic diagram of a signal transmission method according to an embodiment of the present application;
[0025] Figure 6 is a schematic diagram of a signal transmission method according to an embodiment of the present application;
[0026] Figure 7 It is a structural block diagram of a signal transmission device according to an embodiment of the present application. DETAILED DESCRIPTION
[0027] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0028] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.
[0029] The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 1 is a hardware structure block diagram of a server device of a signal transmission method according to an embodiment of the present application. Figure 1 As shown, the server device may include one or more ( Figure 1 Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the server device may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above server device. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations are shown.
[0030] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the signal transmission method in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0031] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the server device. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.
[0032] In this embodiment, a signal transmission method is provided. Figure 2 is a flow chart of a signal transmission method according to an embodiment of the present application, such as Figure 2 As shown, the process includes the following steps:
[0033] Step S202, receiving a first signal from a processor chip;
[0034] Step S204, transmitting the first signal to the processor substrate, wherein the resistor on the processor substrate can identify the voltage of different devices to distinguish the signal information of the first signal;
[0035] Step S206, receiving a second signal from the processor substrate, wherein the second signal is a signal obtained by the processor substrate after processing the first signal according to the signal information;
[0036] Step S208: transmitting the second signal to the application end.
[0037] Through the above steps, the problem of low signal transmission efficiency can be solved, thereby achieving the technical purpose of fully utilizing the multi-core processor and parallel computing capabilities of the server, and further achieving the technical effect of improving signal transmission efficiency.
[0038] The execution subject of the above steps may be an adaptive connector, but is not limited thereto.
[0039] In an exemplary embodiment, the first signal refers to an original electrical signal directly sent from a processor (such as a CPU) chip, which contains information that the processor needs to transmit.
[0040] In an exemplary embodiment, a processor substrate is a specially designed circuit board that receives, processes, and forwards electrical signals from a processor chip. It has circuits and components required to process signals, such as resistors.
[0041] In an exemplary embodiment, resistor: An electronic component on a processor substrate that functions to identify voltages from different devices, thereby helping to discern and interpret information contained in the first signal.
[0042] In an exemplary embodiment, the second signal is a signal processed by the processor substrate, which is converted and optimized according to the information in the first signal to better meet the subsequent transmission and application requirements.
[0043] It should be noted that this embodiment describes a process in which a signal starts from a processor chip, is processed and converted, and finally reaches the application end. This process includes several key steps of signal reception, transmission, processing, and retransmission, the purpose of which is to ensure that the signal can be efficiently and accurately transmitted from the source to the destination.
[0044] As a further example, the optional processor chip can be regarded as a digital signal source, and the first signal generated by it represents a specific binary data sequence. These data sequences are similar to undecoded bit streams and need to be further processed and transmitted through a specific interface.
[0045] In this framework, the processor substrate acts as a digital signal processing unit. When the first signal is transmitted to the processor substrate, the resistors, capacitors and other electronic components on the substrate work together to decode, buffer and level-convert the original binary data sequence. These components are like precise logic gates and circuit switches, processing the data stream accurately according to preset rules.
[0046] The processed signal is called the second signal, and its electrical characteristics and data format are more in line with the requirements of the subsequent transmission line. This process is similar to the signal modulation and demodulation in digital communication systems, which is designed to adapt to different transmission media and distances.
[0047] Finally, the second signal is transmitted to the application end, that is, the target device or system. At the application end, the optimized signal can be received and analyzed more efficiently, thereby ensuring accurate data transmission and stable operation of the system.
[0048] Optionally, in this embodiment, the processor chip is the source of signal generation, and the first signal it sends contains detailed data information. These signals have undergone internal processing before being transmitted to the processor substrate, thereby ensuring the stability and accuracy of the signal. Components such as resistors on the processor substrate can accurately capture and interpret the information in these signals, which is achieved by identifying changes in voltages of different devices.
[0049] Optionally, in this embodiment, the processor substrate is not only a signal transmission hub, but also a signal processing center. Here, the first signal will undergo a series of rigorous conversion and optimization processes, including but not limited to signal amplification, filtering and shaping, to ensure that the signal maintains excellent electrical characteristics in subsequent transmission. The processed second signal has significantly improved signal quality and anti-interference ability.
[0050] Optionally, in this embodiment, it is crucial to ensure reliable and efficient signal transmission throughout the entire signal transmission link. With the help of a well-designed processor substrate and an efficient processing algorithm, this embodiment can minimize the attenuation and distortion of the signal during transmission, while significantly improving the transmission rate and stability of the signal.
[0051] Optionally, in this embodiment, in order to achieve efficient signal transmission, not only the refined design of the hardware level is required, but also close integration with the software level is required. The signal transmission and processing between the processor chip, the processor substrate and the application end all rely on specific hardware interfaces and software protocols. Through the deep collaborative design of software and hardware, it is ensured that the entire system exhibits excellent performance in signal transmission.
[0052] Optionally, in this embodiment, modular design plays an important role in modern electronic systems. This embodiment divides the signal transmission and processing functions into multiple independent modules, thereby facilitating flexible expansion and maintenance of the system. For example, the processor substrate can be designed and produced as an independent module, and can be freely combined and connected with other modules according to actual needs.
[0053] Optionally, in this embodiment, in the application scenario of high-performance computing and data processing, the signal transmission efficiency between the processor chip and each component is particularly critical. By finely optimizing the signal transmission link, this embodiment can significantly improve the overall computing performance and data processing capabilities of the system.
[0054] Optionally, in this embodiment, in the field of communication and network technology, accurate transmission and real-time response of signals are crucial. This embodiment can adopt cutting-edge signal processing technology and efficient transmission solutions to ensure that signals can be transmitted stably and quickly in a complex network environment.
[0055] Through this application, a new signal processing method is adopted. The method first receives a first signal from a processor chip to ensure the source quality of the signal. Subsequently, the first signal is transmitted to a processor substrate, and the resistors on the substrate can identify the voltages of different devices, thereby accurately identifying the signal information of the first signal. Since this design utilizes the voltage recognition function of the resistor, the accuracy of signal recognition is significantly enhanced.
[0056] Afterwards, the present application receives a second signal from the processor substrate. This second signal is obtained by the processor substrate after accurately processing the first signal based on the previously identified signal information. This processing process effectively improves the signal quality, reduces noise and distortion, and provides a solid foundation for subsequent efficient transmission.
[0057] Finally, the optimized second signal is transmitted to the application end. Since the signal has been accurately processed by the processor substrate, its quality has been significantly improved. Therefore, when passing through PCB boards and cables that may have high losses (LOSS), it can maintain higher signal integrity and transmission efficiency, which can solve the problem of low signal transmission efficiency and achieve the technical effect of improving signal transmission efficiency.
[0058] As an optional solution, the processor chip contacts the second PIN pin on the adaptive connector through the extended first PIN pin to receive the first signal from the processor chip, including:
[0059] The first signal is received by the adaptive connector through the electrical connection formed when the first PIN pin contacts the second PIN pin.
[0060] In an optional embodiment, the first PIN pin refers to a metal pin extending from the processor chip, which is used to make physical contact with the second PIN pin on the adaptive connector to establish an electrical connection.
[0061] In an optional embodiment, the second PIN pin refers to a metal pin on the adaptive connector corresponding to the first PIN pin, and is used to receive the first signal from the processor chip.
[0062] In an optional embodiment, an adaptive connector: a connector that can automatically adapt to and connect different devices or components, mainly used here to receive and transmit electrical frequency signals from a processor chip.
[0063] It should be noted that this embodiment illustrates how the processor chip transmits the first signal generated by it through physical contact (i.e., contact of PIN pins). Specifically, the first PIN pin on the processor chip contacts the second PIN pin on the adaptive connector, thereby forming an electrical connection, so that the first signal can be received by the adaptive connector from this connection.
[0064] To further illustrate, the connection process between the optional processor chip and the adaptive connector can be likened to the interaction between the circuit board and the connecting wire in an electronic device. Specifically, the processor chip is similar to a circuit board with a specific interface, and the first PIN needle is equivalent to the interface pin on the circuit board. The adaptive connector is like a connecting wire with a corresponding connector, and the second PIN needle on it is the metal connector on the connecting wire. When the connecting wire (adaptive connector) is connected to the circuit board (processor chip), the metal connector (second PIN needle) will fit tightly on the interface pin (first PIN needle), thereby establishing a path for the transmission of electrical signals, ensuring that the current on the circuit board (first signal) can be smoothly transmitted through the connecting wire.
[0065] Optionally, the design of the first PIN and the second PIN needs to take into account various factors, such as electrical performance, mechanical strength, wear resistance, corrosion resistance, and connection stability. In addition, in order to ensure the reliability and stability of signal transmission, it may be necessary to add some additional circuit elements such as resistors, capacitors, or inductors inside the connector for signal conditioning or filtering.
[0066] Through the precise contact between the first PIN and the second PIN, the processor chip can stably transmit the first signal to the adaptive connector. This physical connection method is simple and effective, ensuring the continuity and consistency of the signal during transmission. At the same time, the design of the adaptive connector also enables the system to flexibly adapt to different hardware configurations and connection requirements, thereby improving the scalability and compatibility of the entire system.
[0067] As an optional solution, transmitting the first signal to the processor substrate includes:
[0068] The first signal is transmitted to the processor substrate by the adaptive connector through electrical connection, wherein the processor substrate is located on the processor base, and the processor base is used to accommodate the processor chip.
[0069] In an optional embodiment, the processor base is a hardware structure specially designed to accommodate and support the processor chip, which usually serves as a connecting bridge between the processor chip and the motherboard, providing a stable mechanical support and electrical connection environment.
[0070] In an optional embodiment, a processor substrate: a circuit board located on a processor base, which has the ability to process electrical frequency signals, including identifying voltages of different devices to parse signal information, and performing corresponding processing on the received first signal based on this information.
[0071] It should be noted that this embodiment describes how the first signal is transmitted from the processor chip to the processor substrate through the adaptive connector. Specifically, when the first PIN on the processor chip contacts the second PIN on the adaptive connector to form an electrical connection, the adaptive connector takes on the task of transmitting the received first signal to the processor substrate located on the processor base. The processor base serves as a containing structure that supports and fixes the processor chip, and also provides a stable installation position for the processor substrate.
[0072] To further illustrate, an optional information transmission system, in which the processor chip is equivalent to the information source, generates raw data (first signal). The adaptive connector is similar to a data transmission line, which is responsible for transferring the raw data from the information source to the processing center. In this metaphor, the processor base and the processor substrate together constitute the processing center. The processor base provides the infrastructure of the processing center, and the processor substrate is the core component that actually performs data processing tasks. When the data transmission line (adaptive connector) transmits the raw data (first signal) to the processing center, these data will be received by the processor substrate and further processed.
[0073] Optionally, the design of the processor base and the processor substrate needs to fully consider factors such as electrical performance, heat dissipation, and mechanical stability. In addition, in order to ensure the accuracy and efficiency of signal transmission, it may be necessary to add some auxiliary circuit elements such as filters and amplifiers to the transmission path to optimize the signal transmission quality. At the same time, the connection method between the processor base and the processor substrate also needs to be precisely designed to ensure that a stable connection can be maintained during high-speed data transmission.
[0074] Through precise electrical connection and stable mechanical support, the adaptive connector can reliably transmit the first signal from the processor chip to the processor substrate located on the processor base. This design ensures the integrity and accuracy of the signal during transmission, providing a solid foundation for subsequent signal processing and application. At the same time, the synergy of the processor base and the processor substrate also provides efficient heat dissipation and a stable operating environment for the entire system, thereby ensuring that the performance of the processor chip is fully utilized.
[0075] As an optional solution, the second PIN is connected to the application end through the first cable to transmit the second signal to the application end, including:
[0076] The second signal is transmitted to the application end through the first cable by the adaptive connector.
[0077] In an optional embodiment, the first cable: a wire or cable assembly for transmitting electrical signals, which connects the adaptive connector and the application end and is responsible for transmitting the second signal received by the adaptive connector to the application end.
[0078] In an optional embodiment, the application end: in an electronic system, refers to a device or module that receives and processes electrical frequency signals from a processor substrate or other components to perform specific functions or tasks.
[0079] It should be noted that the description of this embodiment involves the process of transmitting the second signal from the processor substrate to the application end. Specifically, after receiving the second signal from the processor substrate, the adaptive connector transmits the processed signal to the application end through the first cable connected thereto. The first cable here acts as a bridge, connecting the adaptive connector and the application end, ensuring smooth transmission of the signal.
[0080] To further illustrate, an optional audio playback system, in which the processor substrate is equivalent to an audio processor, responsible for processing the original audio signal (first signal) and outputting a processed high-quality audio signal (second signal). The adaptive connector is similar to an audio output interface, and the first cable is equivalent to an audio cable connected to an audio device. When the audio processor outputs the processed audio signal, this signal is transmitted to the audio device (application end) through the audio output interface and the audio cable, and is finally converted into audible sound.
[0081] Optionally, the selection and design of the first cable needs to consider multiple factors, including the signal transmission distance, transmission speed, anti-interference ability, etc. In order to ensure the stability and reliability of signal transmission, it may be necessary to use cable materials with excellent electrical properties and equip both ends of the cable with suitable connector interfaces. In addition, for long-distance or high-speed signal transmission, it may also be necessary to consider signal attenuation and distortion and take corresponding compensation measures.
[0082] Through the reliable connection of the first cable, the adaptive connector can efficiently transmit the second signal from the processor substrate to the application end. This design ensures that the processed signal can reach the application end accurately and be further processed or used there. The stability and efficiency of the entire transmission process provide important guarantees for the normal operation of the electronic system, and also provide a solid foundation for the application end to realize various complex functions.
[0083] As an optional solution, receiving the second signal from the processor substrate includes at least one of the following:
[0084] receiving low-speed signals from a processor substrate;
[0085] receiving high-speed signals from a processor substrate;
[0086] A mixed signal is received from a processor substrate, wherein the mixed signal is a signal obtained by mixing a low-speed signal and a high-speed signal.
[0087] In an optional embodiment, a low-speed signal refers to an electrical frequency signal with a relatively low transmission rate, which is usually used for data transmission or sending control instructions that do not require high transmission speed.
[0088] In an optional embodiment, high-speed signal refers to an electrical frequency signal with a relatively high transmission rate, which is used in scenarios requiring fast and large-scale data transmission, such as high-definition video streaming, big data processing, etc.
[0089] In an optional embodiment, a mixed signal refers to a signal obtained by mixing a low-speed signal with a high-speed signal. This signal contains both low-speed and high-speed data and may be used in complex systems that need to handle multiple data transmission requirements simultaneously.
[0090] It should be noted that this embodiment describes three possible situations in which the adaptive connector receives the second signal from the processor substrate. Specifically, the adaptive connector can receive a low-speed signal, a high-speed signal, or a mixed signal obtained by mixing a low-speed signal with a high-speed signal from the processor substrate. These three signal types represent different data transmission rates and processing requirements, and the adaptive connector needs to be able to flexibly receive and process these different types of signals.
[0091] Optionally, the ability of the adaptive connector to receive different types of signals is critical to the performance and flexibility of the entire system. In order to meet the ever-changing data transmission requirements, the adaptive connector may need to have the ability to dynamically adjust the signal receiving mode to match the different signal types output by the processor substrate.
[0092] Through the embodiments of the present application, the adaptive connector can flexibly receive and process low-speed signals, high-speed signals, and mixed signals from the processor substrate, ensuring that the system can maintain efficient and stable operation under different data transmission requirements. This design not only improves the compatibility and scalability of the system, but also provides strong support for future technology upgrades and diversified applications.
[0093] As an optional solution, receiving a low-speed signal from a processor substrate includes: receiving the low-speed signal by the adaptive connector through a first number of third PIN pins on a multi-layer PIN structure of the adaptive connector;
[0094] Receiving a high-speed signal from a processor substrate includes: receiving the high-speed signal by an adaptive connector through a second number of fourth PIN pins on the multi-layer PIN structure, wherein the first number is smaller than the second number.
[0095] In an optional embodiment, a multi-layer PIN structure refers to a PIN pin structure with multiple levels or arrangements designed on an adaptive connector to meet the reception requirements of different types of signals.
[0096] In an optional embodiment, the third PIN pin: in the multi-layer PIN structure, a PIN pin specifically used for receiving a low-speed signal.
[0097] In an optional embodiment, the fourth PIN pin: in the multi-layer PIN structure, a PIN pin specifically used for receiving high-speed signals.
[0098] In an optional embodiment, the first quantity is: the quantity of third PIN pins for receiving low-speed signals.
[0099] In an optional embodiment, the second number is: the number of fourth PIN pins for receiving high-speed signals.
[0100] It should be noted that this embodiment illustrates how the adaptive connector receives low-speed signals and high-speed signals from the processor substrate. Specifically, the adaptive connector receives different types of signals through different numbers of PIN pins on its multi-layer PIN structure. For low-speed signals, the adaptive connector uses the first number of third PIN pins for reception; and for high-speed signals, the second number of fourth PIN pins for reception. It is also particularly pointed out here that the number of PIN pins used to receive low-speed signals (the first number) is less than the number of PIN pins used to receive high-speed signals (the second number).
[0101] Optionally, the transmission requirements of low-speed signals and high-speed signals are different, so different numbers of PIN pins are required to ensure stable signal transmission. Low-speed signals have low transmission rates and low requirements for transmission bandwidth, so fewer PIN pins can be used for transmission. High-speed signals require more PIN pins to provide greater transmission bandwidth and stability to meet the needs of high-speed data transmission. In addition, the design of the multi-layer PIN structure can also improve the flexibility and scalability of the adaptive connector, enabling it to adapt to a wider variety of signal transmission requirements.
[0102] Through different numbers of third and fourth PIN pins on the multi-layer PIN structure, the adaptive connector can flexibly receive low-speed signals and high-speed signals from the processor substrate. This design ensures the stability and efficiency of different types of signals during transmission, providing an important guarantee for the normal operation of the entire system. At the same time, the design that the first number is less than the second number also reflects the emphasis and optimization of high-speed signal transmission requirements.
[0103] As an optional solution, when the power pin inside the processor chip has been connected to the bottom PIN structure of the multi-layer PIN structure, the method further includes:
[0104] The power obtained by transmitting the power of the power board through the second cable is used to power the processor chip through the bottom PIN structure.
[0105] In an optional embodiment, power pin: a pin on a processor chip specifically used to receive power.
[0106] In an optional embodiment, the bottom PIN structure: a layer in the multi-layer PIN structure of the adaptive connector, is specifically used to connect the power pins of the processor chip to provide power to the processor chip.
[0107] In an optional embodiment, the second cable is a cable used to transmit power from the power board to the adaptive connector.
[0108] It should be noted that the description of this embodiment involves the power supply process of the processor chip. When the power pin of the processor chip has been connected to the bottom PIN structure of the multi-layer PIN structure of the adaptive connector, the power provided by the power board will be transmitted through the second cable and power the processor chip through this bottom PIN structure.
[0109] Optionally, ensuring a stable and reliable power supply is crucial to the normal operation of the processor chip. Therefore, the design of the underlying PIN structure and the selection of materials need to take into account factors such as conductivity, heat resistance and stability. In addition, the quality and connection method of the second cable will also affect the transmission efficiency and stability of the power supply.
[0110] Through the embodiments of the present application, when the power pin of the processor chip is connected to the underlying PIN structure of the adaptive connector, the power of the power board is transmitted to the adaptive connector through the second cable, and then the processor chip is provided with a stable and reliable power supply through the underlying PIN structure. This design ensures that the processor chip can operate normally and exert its due performance. At the same time, this power supply method also has certain flexibility and scalability, and can adapt to processor chips of different models and specifications.
[0111] As an optional solution, after transmitting the first signal to the processor substrate, the method further includes at least one of the following:
[0112] using an amplifier to increase the strength of the first signal;
[0113] Preprocessing the first signal to improve the purity of the first signal;
[0114] Performing real-time calibration and adjustment on the first signal according to the signal quality parameters monitored in real time;
[0115] Performing an integrity check on the first signal, and automatically switching to a backup transmission path or starting a fault recovery procedure if an abnormality or fault is found in the first signal;
[0116] After receiving the second signal from the processor substrate, the method further includes at least one of the following:
[0117] Using an amplifier to increase the strength of the second signal;
[0118] Preprocessing the second signal to improve the purity of the first signal;
[0119] Calibrate and adjust the second signal in real time according to the signal quality parameters monitored in real time;
[0120] The second signal is checked for integrity. If an abnormality or failure is found in the second signal, the backup transmission path is automatically switched or a failure recovery program is started.
[0121] In an optional embodiment, amplifier: a device used to increase the strength of an electrical frequency signal to ensure that the signal does not attenuate too much during transmission.
[0122] In an optional embodiment, preprocessing: preliminary processing of the electric frequency signal to remove noise and interference and improve the purity of the signal.
[0123] In an optional embodiment, real-time monitoring and calibration: by continuously monitoring signal quality parameters and adjusting the signal in real time according to these parameters, the signal is kept in an optimal state.
[0124] In an optional embodiment, integrity check: verifies whether the electrical frequency signal is intact and ensures that the signal does not contain erroneous or missing information.
[0125] In an optional embodiment, the backup transmission path is an alternative path that can be automatically switched to when a main transmission path fails to ensure continuity of signal transmission.
[0126] In an optional embodiment, fault recovery program: a program that is automatically started when a signal anomaly or failure is detected, and is intended to quickly restore normal signal transmission.
[0127] It should be noted that this embodiment supplements a series of operations that may be performed during the transmission of the first signal and the second signal to ensure stable transmission and high-quality processing of the signals. These operations include enhancing signal strength, preprocessing to improve purity, real-time calibration and adjustment of signals, and integrity checks and handling of anomalies or failures.
[0128] Optionally, in the environment of high-speed and large data volume transmission, any small signal interference or loss may lead to serious data errors. Therefore, by means of signal enhancement, preprocessing, real-time monitoring and calibration, and integrity checking, the efficiency and accuracy of data transmission can be greatly improved.
[0129] Through the embodiments of the present application, it is possible to ensure that the first signal and the second signal maintain high strength, high purity and high stability during transmission. At the same time, the real-time monitoring and calibration mechanism can quickly respond to changes in signal quality, while the integrity check and backup transmission path provide additional security to ensure that normal transmission can be quickly restored when the signal is abnormal or fails. These measures work together to provide strong stability and reliability guarantees for the entire data transmission system.
[0130] As an optional solution, the receiving a second signal from the processor substrate includes:
[0131] According to the signal information, adjusting the PIN structure of the adaptive connector;
[0132] The second signal is received through the PIN structure adjusted by the adaptive connector.
[0133] It should be noted that the present embodiment can adjust the PIN structure of the adaptive connector according to the signal information (such as voltage, current, resistance, etc.) of the first signal previously received from the processor chip and processed via the processor substrate. Among them, "adaptive connector" can be understood as a connection device that can automatically adjust its interface configuration according to different signal requirements, and "PIN structure" refers to the pin layout or configuration used for data transmission in the connector. Secondly, through this PIN structure that has been adjusted according to the signal information, the present embodiment can accurately receive the second signal from the processor substrate.
[0134] Through the embodiments of the present application, the accuracy and efficiency of signal transmission can be improved by using an adaptive connector to adjust the PIN structure to receive the second signal. Since the adaptive connector can adjust its interface configuration in real time according to the signal information, it can ensure that it can maintain the best connection state with the processor substrate under any circumstances, thereby avoiding data transmission errors caused by interface mismatch or signal interference.
[0135] As an optional solution, with the emergence and rapid development of AI (artificial intelligence), including the rapid development of robots, language recognition, image recognition, natural language processing, expert systems, machine learning, computer vision and other artificial intelligence directions, the requirements for data transmission and data processing are getting higher and higher. In particular, with the upgrade and iteration of chips by various chip manufacturers, the signal transmission rate has also increased rapidly with the development of demand. However, it is currently difficult for signal transmission to reach a transmission rate of 100G based on PCB board materials, which limits the development and rapid application of AI technology. Therefore, in order to solve the problem that the transmission of high-speed signals in the current server is limited by the board material, this embodiment applies the above-mentioned signal transmission method to the application scenario of adaptive high-speed links to solve the above-mentioned problems.
[0136] Specifically, the technical solution adopted in this embodiment is as follows Figure 3 As shown, by designing an adaptive connector for the processor, the adaptive connector and the device on the application end are connected through a cable, and the cable is inserted into the adaptive connector. The electrical frequency signal transmitted through the cable automatically contacts the corresponding pins of the processor, thereby achieving different signals with different application signals and different signals with different processors.
[0137] To further illustrate, the first option is to design an adaptive connector by dividing the entire adaptive connector into a 3-part design framework:
[0138] 1. Adaptive base design, by extending the PIN pin of the processor chip signal on the processor substrate and contacting it with the connector PIN on the adaptive connector, the processor signal is connected to the processor substrate of the base through this design, wherein the processor substrate is on the base, and the processor substrate PIN pin is extended and contacted with the connector PIN of the adaptive connector. The voltage of different devices is automatically identified by the resistance of the base substrate itself, and the upper and lower eight bits of the signal are identified by the voltage level, so that different devices can be plugged in and the resources required by different devices can be obtained. For example Figure 4 shown.
[0139] 2. Connect all the power pins inside the processor to the bottom layer of the 3-layer PIN of the adaptive connector, and use the power board to convert the power through the power module and plug the cable into the adaptive connector to power the processor.
[0140] 3. Connect all high-speed signals such as CLK, PCIE, UPI, DDR, etc. coming out of the base substrate to the innermost PIN inside the adaptive connector. There are three layers in total. The outermost black one is the power PIN, the middle blue + gray one is the low-speed PIN, and the innermost white + blue one is the high-speed PIN (80% high speed and 20% low speed). Further, insert the corresponding cable directly into the corresponding PIN hole.
[0141] In addition, after the adaptive connector receives the signal transmitted by the processor substrate, this embodiment can also automatically adjust the connection state of the adaptive connector according to the received signal information to maintain a good signal connection.
[0142] Specifically, in order to ensure the stability of signal transmission under different voltage conditions, the adaptive connector can automatically adjust the position of its pins according to the voltage of the received signal. For example, under high voltage conditions, the pins can automatically move downward to ensure close contact with the processor pins; while under low voltage conditions, the pins can automatically move upward to adapt to different voltage environments.
[0143] To further illustrate, the optional adaptive connector adjustment method can be mechanical adjustment, electronic control, or material properties. Specifically, the connector may contain tiny mechanical structures such as springs, sliders, etc., which will physically move under the action of voltage. When the internal voltage changes, these mechanical structures will adjust the position of the pins accordingly so that they contact the corresponding pins on the processor; or, the connector can be integrated with a micro electronic control system such as a micro motor, sensor, and controller. When the internal voltage changes, the electronic control system will drive the micro motor and other devices to accurately adjust the position of the pins; or, in some advanced adaptive connectors, the characteristics of special materials (such as shape memory alloys) are used to achieve automatic adjustment. These materials will deform when the voltage or temperature changes, thereby changing the contact state of the connector.
[0144] Optionally Figure 5 As shown, a cable connection system is integrated with an adaptive connector function, wherein the processor plug-in end of the cable is responsible for connecting to the processor and is the starting transmission point for signals or power, and the connector terminal of the external application end of the cable, as the other end of the cable, is used to connect to an external application device (application end), and then the adaptive connector automatically adjusts its connection state, and uses this connection state to connect the signal of the application end and the signal of the processor end.
[0145] In an optional embodiment, if Figure 6 As shown, the external application end of the cable adopts an integrated terminal, and all signals are integrated into the terminal through the cable. The integrated connector is combined with the connector on the application end to ensure correct signal transmission. The terminal design on the cable processor end adopts a flat single-head design concept, and each signal on the cable end is inserted into the adaptive transceiver connector of the processor with a separate terminal. Among them, each signal on the cable processor end is inserted into the adaptive transceiver connector with a separate terminal, and the capacitor on the adaptive connector bottom plate under the processor automatically identifies the signal according to the voltage level. This will greatly facilitate production and subsequent maintenance without worrying about the problem of incorrect cable insertion.
[0146] Through the embodiments of the present application, the signal attenuation problem caused by excessive loss of PCB board material can be effectively reduced, ensuring that signal transmission meets link requirements. At the same time, the application of adaptive connectors significantly improves the signal transmission rate, thereby improving the efficiency of production line operations. This not only enhances the overall economic benefits, but also further reduces the development cost of cables by reducing the types of cables and improving the versatility of cables.
[0147] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods of each embodiment of the present application.
[0148] In this embodiment, a signal transmission device is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.
[0149] Figure 4 is a structural block diagram of a signal transmission device according to an embodiment of the present application, such as Figure 7 As shown, the device comprises:
[0150] A first receiving unit 702, configured to receive a first signal from a processor chip;
[0151] A first transmission unit 704, configured to transmit the first signal to a processor substrate, wherein the resistor on the processor substrate can identify the voltage of different devices to distinguish the signal information of the first signal;
[0152] A second receiving unit 706 is used to receive a second signal from the processor substrate, wherein the second signal is a signal obtained by the processor substrate after processing the first signal according to the signal information;
[0153] The second transmission unit 708 is used to transmit the second signal to the application end.
[0154] For the specific implementation example, reference may be made to the example shown in the above-mentioned signal transmission method, which will not be described in detail in this example.
[0155] As an optional solution, the processor chip contacts the second PIN pin on the adaptive connector through the extended first PIN pin, and the first receiving unit 702 includes:
[0156] The first receiving module is used to receive the first signal from the adaptive connector through the electrical connection formed when the first PIN needle contacts the second PIN needle.
[0157] For the specific implementation example, reference may be made to the example shown in the above-mentioned signal transmission method, which will not be described in detail in this example.
[0158] As an optional solution, the first transmission unit 704 includes:
[0159] The first transmission module is used to transmit the first signal to the processor substrate through the adaptive connector via electrical connection, wherein the processor substrate is located on the processor base, and the processor base is used to accommodate the processor chip.
[0160] For the specific implementation example, reference may be made to the example shown in the above-mentioned signal transmission method, which will not be described in detail in this example.
[0161] As an optional solution, the second PIN is connected to the application end through the first cable, and the second transmission unit 708 includes:
[0162] The second transmission module is used to transmit the second signal to the application end through the first cable and the adaptive connector.
[0163] For the specific implementation example, reference may be made to the example shown in the above-mentioned signal transmission method, which will not be described in detail in this example.
[0164] As an optional solution, the second receiving unit 706 includes at least one of the following:
[0165] A second receiving module, used for receiving a low-speed signal from a processor substrate;
[0166] A third receiving module, used for receiving a high-speed signal from a processor substrate;
[0167] The fourth receiving module is used to receive a mixed signal from the processor substrate, wherein the mixed signal is a signal obtained by mixing a low-speed signal and a high-speed signal.
[0168] For the specific implementation example, reference may be made to the example shown in the above-mentioned signal transmission method, which will not be described in detail in this example.
[0169] As an optional solution, the second receiving module includes: a first receiving submodule, configured to receive the low-speed signal from the adaptive connector through a first number of third PIN pins on the multi-layer PIN structure of the adaptive connector;
[0170] The third receiving module includes: a second receiving submodule, which is used to receive high-speed signals from the adaptive connector through a second number of fourth PIN pins on the multi-layer PIN structure, wherein the first number is smaller than the second number.
[0171] For the specific implementation example, reference may be made to the example shown in the above-mentioned signal transmission method, which will not be described in detail in this example.
[0172] As an optional solution, the device also includes:
[0173] The power supply module is used to supply power to the processor chip through the bottom PIN structure by transmitting the power from the power board through the second cable when the power pin inside the processor chip has been connected to the bottom PIN structure on the multi-layer PIN structure.
[0174] For the specific implementation example, reference may be made to the example shown in the above-mentioned signal transmission method, which will not be described in detail in this example.
[0175] As an optional solution, the device further includes at least one of the following:
[0176] a first enhancement unit, configured to enhance the strength of the first signal using an amplifier after transmitting the first signal to the processor substrate;
[0177] A first processing unit, configured to pre-process the first signal after transmitting the first signal to the processor substrate, so as to improve the purity of the first signal;
[0178] A first calibration unit, configured to calibrate and adjust the first signal in real time according to the signal quality parameter monitored in real time after the first signal is transmitted to the processor substrate;
[0179] A first checking unit is used to perform an integrity check on the first signal after the first signal is transmitted to the processor substrate, and automatically switch to a backup transmission path or start a fault recovery program if an abnormality or fault is found in the first signal;
[0180] The device also includes at least one of the following:
[0181] a second enhancement unit, configured to enhance the strength of the second signal using an amplifier after receiving the second signal from the processor substrate;
[0182] a second processing unit, configured to pre-process the second signal after receiving the second signal from the processor substrate, so as to improve the purity of the first signal;
[0183] A second calibration unit is used to calibrate and adjust the second signal in real time according to the signal quality parameter monitored in real time after receiving the second signal from the processor substrate;
[0184] The second checking unit is used to perform integrity check on the second signal after receiving the second signal from the processor substrate, and automatically switch to a backup transmission path or start a fault recovery program if an abnormality or failure is found in the second signal.
[0185] For the specific implementation example, reference may be made to the example shown in the above-mentioned signal transmission method, which will not be described in detail in this example.
[0186] As an optional solution, the second receiving unit 706 includes:
[0187] A first adjustment module, used for adjusting the PIN structure of the adaptive connector according to the signal information;
[0188] The second adjustment module is used to receive a second signal through the PIN structure adjusted by the adaptive connector.
[0189] For the specific implementation example, reference may be made to the example shown in the above-mentioned signal transmission method, which will not be described in detail in this example.
[0190] It should be noted that the above-mentioned virtual devices (modules, units, sub-modules, sub-units, components, etc.) can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above-mentioned virtual devices are all located in the same processor; or, the above-mentioned virtual devices are located in different processors in any combination.
[0191] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.
[0192] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.
[0193] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
[0194] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.
[0195] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.
[0196] Obviously, those skilled in the art should understand that the above-mentioned virtual devices or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.
[0197] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.
Claims
1. A signal transmission method, characterized in that: include: receiving a first signal from a processor chip; Transmitting the first signal to a processor substrate, wherein the resistors on the processor substrate can identify voltages of different devices to distinguish signal information of the first signal; receiving a second signal from the processor substrate, wherein the second signal is a signal obtained by the processor substrate after processing the first signal according to the signal information; The second signal is transmitted to the application end.
2. The method according to claim 1, characterized in that: The processor chip contacts the second PIN pin on the adaptive connector through the extended first PIN pin, and the receiving of the first signal from the processor chip includes: The first signal is received by the adaptive connector through the electrical connection formed when the first PIN pin contacts the second PIN pin.
3. The method according to claim 2, characterized in that The step of transmitting the first signal to a processor substrate includes: The first signal is transmitted to the processor substrate by the adaptive connector through the electrical connection, wherein the processor substrate is located on a processor base, and the processor base is used to accommodate the processor chip.
4. The method according to claim 2, characterized in that: The second PIN is connected to the application end through a first cable, and the second signal is transmitted to the application end, including: The second signal is transmitted to the application end by the adaptive connector through the first cable.
5. The method according to claim 1, characterized in that The receiving a second signal from the processor substrate comprises at least one of the following: receiving a low-speed signal from the processor substrate; receiving a high-speed signal from the processor substrate; A mixed signal is received from the processor substrate, wherein the mixed signal is a signal obtained by mixing the low-speed signal and the high-speed signal.
6. The method according to claim 5, characterized in that The receiving of the low-speed signal from the processor substrate comprises: receiving the low-speed signal by the adaptive connector through a first number of third PIN pins on a multi-layer PIN structure of the adaptive connector; The receiving of the high-speed signal from the processor substrate includes: receiving the high-speed signal by the adaptive connector through a second number of fourth PIN pins on the multi-layer PIN structure, wherein the first number is smaller than the second number.
7. The method according to any one of claims 1 to 5, characterized in that The receiving a second signal from the processor substrate comprises: According to the signal information, adjusting the PIN structure of the adaptive connector; The second signal is received through the PIN structure adjusted by the adaptive connector.
8. The method according to any one of claims 1 to 5, characterized in that: After transmitting the first signal to the processor substrate, the method further includes at least one of the following: using an amplifier to increase the strength of the first signal; Preprocessing the first signal to improve the purity of the first signal; Calibrate and adjust the first signal in real time according to the signal quality parameters monitored in real time; Performing an integrity check on the first signal, and automatically switching to an alternate transmission path or starting a fault recovery procedure if an abnormality or fault is found in the first signal; After receiving the second signal from the processor substrate, the method further includes at least one of the following: using an amplifier to increase the strength of the second signal; Preprocessing the second signal to improve the purity of the first signal; calibrating and adjusting the second signal in real time according to the signal quality parameters monitored in real time; An integrity check is performed on the second signal. If an abnormality or failure is found in the second signal, the second signal is automatically switched to a backup transmission path or a failure recovery program is started.
9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 8 when executed by a processor.
10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 8 are implemented.
Citation Information
Patent Citations
Mainboard and server
CN112306952A
Custom interface monitoring method and device
CN113009382A
Computing device, management controller and data processing method
CN117873924A
Computing device
CN117917618A
Server interconnection system, communication method, server, device, medium and product
CN118466709A