Display device and driving method thereof

Abstract

The invention provides a display device and a driving method thereof.The display device comprises a display panel and a time schedule controller electrically connected to the display panel, and the time schedule controller is used for obtaining a first refresh rate and increasing the first refresh rate to a second refresh rate when the first refresh rate is smaller than a preset refresh rate, and the processor is used for acquiring at least part of the first picture information corresponding to the first refresh rate from the storage unit as repeated picture information, and driving the display panel to display pictures at a second refresh rate according to the repeated picture information, so that the power consumption of the display device is reduced, and the risk of picture flicker is reduced.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display device and a driving method thereof. Background Art

[0002] When displaying a still image, the power consumption of the display device can generally be reduced by lowering the refresh rate of the screen. However, when the refresh rate of the screen is too low, flickering may occur. Summary of the invention

[0003] The object of the present invention is to provide a display device and a driving method thereof, so as to solve the problem of flickering caused by too low refresh rate of the screen in the existing PSR technology.

[0004] An embodiment of the present invention provides a display device, including:

[0005] Display panel;

[0006] A timing controller, electrically connected to the display panel, for obtaining a first refresh rate;

[0007] Among them, the timing controller is used to increase the first refresh rate to a second refresh rate when the first refresh rate is less than a preset refresh rate, and to obtain at least part of the first picture information corresponding to the first refresh rate from a storage unit as repeated picture information, and to drive the display panel to display a picture at the second refresh rate according to the repeated picture information.

[0008] In some embodiments, the display device further comprises:

[0009] A source driver electrically connected to the timing controller and the display panel;

[0010] Wherein, the timing controller is used to control the source driver to generate a first data signal according to the first refresh rate, or to control the source driver to generate a second data signal according to the second refresh rate;

[0011] The first data signal includes a first sub-data signal and a first sub-blanking signal in each frame, the second data signal includes a second sub-data signal and a second sub-blanking signal in each frame, and the total duration of the first sub-data signal and the first sub-blanking signal is greater than the total duration of the second sub-data signal and the second sub-blanking signal.

[0012] In some embodiments, a ratio of a duration of the first sub-data signal to a duration of the first sub-blanking signal is the same as a ratio of a duration of the second sub-data signal to a duration of the second sub-blanking signal.

[0013] In some embodiments, the multiple frames include a first type of frame corresponding to the first refresh rate and a second type of frame corresponding to the second refresh rate, the display panel includes a plurality of pixel groups, and the display device further includes:

[0014] A gate driver, configured to output a plurality of gate signals corresponding to the plurality of pixel groups, each of the gate signals comprising a first gate pulse in each of the first type of frames and a second gate pulse in each of the second type of frames;

[0015] Wherein, the pulse width of the first gate pulse is greater than the pulse width of the second gate pulse.

[0016] In some embodiments, the timing controller is used to output a frame start signal to the gate driver, wherein the frame start signal includes a first frame start pulse located in the first type of frame and a second frame start pulse located in the second type of frame;

[0017] The pulse width of the first frame start pulse is greater than the pulse width of the second frame start pulse.

[0018] In some embodiments, the ratio of the duration of the first sub-data signal to the duration of the first sub-blanking signal is smaller than the ratio of the duration of the second sub-data signal to the duration of the second sub-blanking signal, and the duration of the first sub-data signal is equal to the duration of the second sub-data signal.

[0019] In some embodiments, the multiple frames include a first type of frame corresponding to the first refresh rate and a second type of frame corresponding to the second refresh rate, the display panel includes a plurality of pixel groups, and the display device further includes:

[0020] A gate driver, configured to output a plurality of gate signals corresponding to the plurality of pixel groups, each of the gate signals comprising a first gate pulse in each of the first type of frames and a second gate pulse in each of the second type of frames;

[0021] The pulse width of the first gate pulse is equal to the pulse width of the second gate pulse.

[0022] In some embodiments, the timing controller is used to output a frame start signal to the gate driver, wherein the frame start signal includes a first frame start pulse located in the first type of frame and a second frame start pulse located in the second type of frame;

[0023] The pulse width of the first frame start pulse is equal to the pulse width of the second frame start pulse.

[0024] In some embodiments, the plurality of frames includes a first type of frames corresponding to the first refresh rate, and a second type of frames corresponding to the second refresh rate;

[0025] Among them, in the adjacent first-category frames and second-category frames, the first picture information of the first-category frames and the second picture information of the second-category frames both include the repeated picture information.

[0026] In some embodiments, in adjacent first-category frames and second-category frames, the first picture information of the first-category frames and the second picture information of the second-category frames are the same.

[0027] In some embodiments, the timing controller is used to obtain the first refresh rate according to a frame start signal, and the frame start signal includes a frame start pulse in each frame.

[0028] An embodiment of the present invention further provides a method for driving a display device, comprising:

[0029] The timing controller obtains a first refresh rate;

[0030] The timing controller increases the first refresh rate to a second refresh rate when the first refresh rate is less than a preset refresh rate;

[0031] The timing controller obtains at least part of the first picture information corresponding to the first refresh rate from the storage unit as repeated picture information;

[0032] The timing controller drives the display panel to display pictures at the second refresh rate according to the repeated picture information.

[0033] The present invention provides a display device and a driving method thereof. The display device includes a display panel, a timing controller electrically connected to the display panel and used to obtain a first refresh rate, the timing controller increases the first refresh rate to a second refresh rate when the first refresh rate is less than a preset refresh rate to improve the flicker phenomenon, and obtains at least a portion of first picture information corresponding to the first refresh rate from a storage unit as repeated picture information, and drives the display panel to display a picture at the second refresh rate according to the repeated picture information, so that the front end does not need to send repeated picture information to the timing controller, but only sends other picture information (if any) in the second picture information except the repeated picture information, so that the present invention takes into account both reducing the power consumption of the display device and reducing the risk of picture flicker. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 This is a diagram of the architecture of a display device provided by an embodiment of the present invention.

[0035] Figure 2 and Figure 3 A timing diagram of some signals of a display device provided by an embodiment of the present invention.

[0036] Figure 4 for Figure 3 Simulation diagram of some signals in the figure.

[0037] Figure 5 and Figure 6 The present invention provides a flow chart of a method for driving a display device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0038] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0039] In the description of the present invention, the terms "first", "second", etc. are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined, and "electrically connected" means that there is conduction between the two, and is not limited to direct connection or indirect connection.

[0040] In addition, it should be noted that the drawings only provide structures and steps that are closely related to the present invention, and omit some details that are not closely related to the invention. The purpose is to simplify the drawings and make the invention clear at a glance, rather than to indicate that the actual device is exactly the same as the attached drawings. Figure 1 The same is not a limitation of the actual device.

[0041] The present invention provides a display device, which may include but is not limited to the following embodiments and combinations of the following embodiments.

[0042] In some embodiments, Figure 1 As shown, the display device 100 includes: a display panel 60; a timing controller 20, electrically connected to the display panel 60, and used to obtain a first refresh rate; wherein the timing controller 20 is used to increase the first refresh rate to a second refresh rate when the first refresh rate is less than a preset refresh rate, and is used to obtain at least a portion of the first picture information corresponding to the first refresh rate from the storage unit 201 as repeated picture information, and is used to drive the display panel 60 to display a picture at the second refresh rate according to the repeated picture information.

[0043] The display device 100 is, but is not limited to, an organic self-luminous display device, an inorganic self-luminous direct display device, or a liquid crystal display device. Figure 1 As shown, here, the array arrangement of multiple sub-pixels P in the display panel 60 is taken as an example, and the display device 100 may also include multiple gate lines 30, multiple pixel circuits 40 corresponding to the multiple sub-pixels P, a source driver 501 electrically connected to the multiple data lines 10, and a gate driver 502 electrically connected to the multiple gate lines 30. Among them, the multiple gate lines 30, the multiple data lines 10, the multiple sub-pixels P and the multiple pixel circuits 40 may be located on a substrate (i.e., the display panel 60 included in the display device 100), and the gate driver 502 may be a gate driving circuit located on the substrate of the display device 100 or a chip ( Figure 1 Only the former case is taken as an example).

[0044] Specifically, each sub-pixel P is electrically connected to a corresponding pixel circuit 40, each gate line 30 is electrically connected to a plurality of pixel circuits 40 corresponding to a plurality of sub-pixels P located in a corresponding row, and outputs corresponding gate signals (gate / gate', including a first gate signal gateA / gateA' corresponding to a first refresh rate and a second gate signal gateB / gateB' corresponding to a second refresh rate) thereto. Under normal circumstances, in each frame, the gate signal includes a gate pulse p for controlling the opening of the corresponding plurality of pixel circuits 40, and the plurality of rows of pixel circuits 40 are sequentially opened under the control of a plurality of gate pulses p in the plurality of gate signals gate. Each data line 10 is connected to a plurality of pixel circuits 40 corresponding to a plurality of sub-pixels P located in a corresponding column to output corresponding data signals (data / data', including a first data signal dataA / dataA' corresponding to a first refresh rate and a second data signal dataB / dataB' corresponding to a second refresh rate) thereto. The plurality of data signals corresponding to the plurality of columns of sub-pixels P are set so that when each row of sub-pixels P is opened, the corresponding plurality of valid data voltages are respectively transmitted to the plurality of sub-pixels P in the corresponding row through the plurality of data lines 10.

[0045] The timing controller 20 may obtain the current refresh rate of the display panel 60 as the first refresh rate, and the specific method of obtaining the first refresh rate is not limited. The display panel 60 displays the image at the first refresh rate at least according to the first image information, that is, when the display panel 60 displays the image at the first refresh rate, at least one frame of the display image is generated according to the first image information.

[0046] Specifically, the timing controller 20 of the present embodiment increases the first refresh rate to the second refresh rate when the first refresh rate is less than the preset refresh rate, and obtains at least a portion of the first picture information corresponding to the first refresh rate from the storage unit 201 as repeated picture information, and drives the display panel 60 to display the picture at the second refresh rate according to the repeated picture information. That is, when the display panel 60 displays the picture at a larger second refresh rate, the second picture information and the first picture information based on which at least one frame of the displayed picture is based at least include the repeated picture information.

[0047] The storage unit 201 may be included in the timing controller 20 or may be independently provided from the timing controller 20. Figure 1 Only the former is taken as an example.

[0048] It can be understood that the storage unit 201 in this embodiment stores the repeated picture information in the first picture information, and the repeated picture information is also used to constitute the second picture information, so that the front end does not need to send the repeated picture information to the timing controller 20, but only sends other picture information (if any) in the second picture information except the repeated picture information, thereby reducing the power consumption of the display device 100; at the same time, when the first refresh rate is less than the preset refresh rate, the first refresh rate is increased to the second refresh rate, and the picture is displayed according to the second picture information at a larger second refresh rate, which can improve the flickering phenomenon caused by the low refresh rate of the picture. It can be seen that this embodiment can take into account both reducing the power consumption of the display device 100 and reducing the risk of picture flickering.

[0049] In some embodiments, in combination Figure 1 and Figure 2 As shown, multiple frames include a first type of frame corresponding to the first refresh rate and a second type of frame corresponding to the second refresh rate; wherein, in adjacent first type of frames and second type of frames, the first picture information of the first type of frames and the second picture information of the second type of frames both include the repeated picture information.

[0050] In combination with the above discussion, it can be seen that the display panel 60 displays images at a first refresh rate in multiple first-category frames and displays images at a second refresh rate in multiple second-category frames, and in the two frames where the refresh rate is switched (i.e., adjacent first-category frames and second-category frames), the corresponding two image information both include repeated image information, and the repeated image information is stored by the storage unit 201. Therefore, in adjacent first-category frames and second-category frames, in order to display the latter image, the timing controller 20 does not need to obtain the complete second image information from the front end, thereby reducing the power consumption of the display device 100.

[0051] Furthermore, in the adjacent first-type frame and second-type frame, the first picture information of the first-type frame and the second picture information of the second-type frame are the same. That is, the two picture information corresponding to the two frames of the refresh rate switch are the same. At this time, since the first picture information stored in the storage unit 201 is the same as the second picture information required for picture display in the second-type frame, in order to display the latter picture, the timing controller 20 does not need to obtain the second picture information from the front end, but directly uses the first picture information stored in the storage unit 201 as the second picture information for picture display, thereby reducing the power consumption of the display device 100.

[0052] In some embodiments, in combination Figure 1 and Figure 2 As shown, the display device 100 further includes: the above-mentioned source driver 501, which is electrically connected to the timing controller 20 and the display panel 60; wherein the timing controller 20 is used to control the source driver 501 to generate the above-mentioned first data signal dataA / dataA' according to the first refresh rate, or to control the source driver 501 to generate the above-mentioned second data signal dataB / dataB' according to the second refresh rate; wherein the first data signal (here taking dataA as an example) includes the first sub-data signal data1A / data2A in each frame... and the first sub-blanking signal Vblank1A / Vblank2A…, the second data signal (taking dataB as an example here) includes the second sub-data signal data1B / data2B… and the second sub-blanking signal Vblank1B / Vblank2B… in each frame, and the total duration of the first sub-data signal (taking data1A as an example) and the first sub-blanking signal Vblank1 (taking Vblank1A as an example) is greater than the total duration of the second sub-data signal (taking data1B as an example) and the second sub-blanking signal (taking Vblank1B as an example).

[0053] It should be noted that the data signal transmitted by each data line 10 may include sequentially arranged sub-data signals and sub-blanking signals in each frame, the sub-data signal may include sequentially arranged multiple valid data voltages corresponding to multiple sub-pixels P in the column, and the sub-blanking signal may be used to separate two groups of valid data voltages corresponding to the sub-pixels P in the column in two adjacent frames. Wherein, taking multiple sub-pixels P arranged in n rows (n is a positive integer greater than 1) as an example, it can be considered that n gate pulses p among the n gate signals (gate1 / gate1', gate2 / gate2'...gaten / gaten') corresponding to the multiple sub-pixels P in the column are also only within the time period of the sub-data signal, that is, no gate pulse p is set within the time period of the sub-blanking signal, at which time the sub-pixels P in all rows are turned off, and the sub-blanking signal is not transmitted to the sub-pixels P.

[0054] like Figure 2 As shown, here, the first two of the consecutively arranged first frame F1, second frame F2, third frame F3, fourth frame F4 and fifth frame F5 correspond to the smaller first refresh rate, and the latter three correspond to the larger second refresh rate as an example. Among them, the total duration of the first sub-data signal and the first sub-blanking signal of the first data signal dataA in the first frame F1 and the second frame F2 (respectively the total duration of data1A and Vblank1A, the total duration of data2A and Vblank2A) is equal, and the total duration of the second sub-data signal and the second sub-blanking signal of the second data signal dataB in the third frame F3, the fourth frame F4 and the fifth frame F5 (respectively the total duration of data1B and Vblank1B, the total duration of data2B and Vblank2B, the total duration of data3B and Vblank3B) is equal, and the total duration corresponding to each of the former two is less than the total duration corresponding to each of the latter three.

[0055] That is, the total duration of each frame displayed at a smaller first refresh rate (the total duration of the corresponding first sub-data signal and the first sub-blanking signal) is greater than the total duration of each frame displayed at a larger second refresh rate (the total duration of the corresponding second sub-data signal and the second sub-blanking signal).

[0056] In some embodiments, Figure 2 As shown, in the data signal data, the ratio of the duration of the first sub-data signal (data1A / data2A) to the duration of the first sub-blanking signal (Vblank1A / Vblank2A) is the same as the ratio of the duration of the second sub-data signal (data1B / data2B / data3B) to the duration of the second sub-blanking signal (Vblank1B / Vblank2B / Vblank3B).

[0057] Combined with the above discussion, it can be seen that the duration of each frame corresponding to the first refresh rate (first frame F1 / second frame F2) is equal to the sum of the duration of the first sub-data signal and the duration of the first sub-blanking signal, and the duration of each frame corresponding to the second refresh rate (third frame F3 / fourth frame F4 / fifth frame F5) is equal to the sum of the duration of the second sub-data signal and the duration of the second blanking signal.

[0058] Specifically, in this embodiment, the duration ratio of the first sub-data signal (data1A / data2A) in the first data signal dataA corresponding to the first refresh rate in a corresponding frame (first frame F1 / second frame F2) is the same as the duration ratio of the second sub-data signal (data1B / data2B / data3B) in the second data signal dataB corresponding to the second refresh rate in a corresponding frame (third frame F3 / fourth frame F4 / fifth frame F5).

[0059] It can be understood that when the first refresh rate is increased to the second refresh rate, the duration of each frame is reduced. On this basis, the ratio of the duration of the sub-data signal to the duration of the sub-blanking signal is not changed in this embodiment, but the two are reduced in the same proportion, so that the proportion of the total duration of the effective data voltage in a frame corresponding to the first refresh rate and the proportion of the total duration of the effective data voltage in a frame corresponding to the second refresh rate remain the same, that is, the proportion of the charging time of the sub-pixel P in a frame does not change, and correspondingly, the proportion of the leakage time of the sub-pixel P does not change.

[0060] It can be seen that in this embodiment, no matter how the refresh rate changes, the ratio of the charging time and the leakage time of the sub-pixel P in each frame is the same, so that the brightness of the sub-pixel P in each frame can be consistent, further improving the phenomenon of screen flickering.

[0061] Further, combined with Figure 1 and Figure 2 As shown, the multiple frames include a first type of frame corresponding to the first refresh rate (first frame F1 / second frame F2), and a second type of frame corresponding to the second refresh rate (third frame F3 / fourth frame F4 / fifth frame F5), the display panel 60 includes multiple pixel groups (i.e., multiple rows of sub-pixels P, where the number of rows and the number of groups are both n as an example), and the display device 100 also includes: the above-mentioned gate driver 502, which is used to output the above-mentioned multiple gate signals (gate1, gate2...gaten) corresponding to the multiple pixel groups, each of the gate signals includes a first gate pulse p1 in each of the first type of frames, and includes a second gate pulse p2 in each of the second type of frames; wherein the pulse width of the first gate pulse p1 is greater than the pulse width of the second gate pulse p2.

[0062] As discussed above, since the duration of the second sub-data signal (data1B / data2B / data3B) in the second type of frame is equal to the duration of the first sub-data signal (data1A / data2A) in the first type of frame, the duration of the second sub-data signal is shorter than the duration of the first sub-data signal. In order to match the turn-on period of the sub-pixel P with the corresponding time period of the effective data voltage, the pulse width of the second gate pulse p2 can also be set to be smaller, so that each second gate pulse p2 in the second type of frame can overlap with the corresponding time period of the effective data voltage to achieve charging of the corresponding sub-pixel P.

[0063] Further, combined with Figure 1 and Figure 2 As shown, the timing controller 20 is used to output a frame start signal STV to the gate driver 502, and the frame start signal STV includes a first frame start pulse sp1 located in the first type of frame (first frame F1 / second frame F2), and a second frame start pulse sp2 located in the second type of frame (third frame F3 / fourth frame F4 / fifth frame F5); wherein the pulse width of the first frame start pulse sp1 is greater than the pulse width of the second frame start pulse sp2.

[0064] It can be understood that since the multiple gate pulses corresponding to the multiple pixel groups in each frame are formed according to the frame start pulse of the frame start signal STV in the frame, it can be considered that the pulse widths of the two are positively correlated. Therefore, in order to form a second gate pulse p2 with a smaller pulse width, the pulse width of the second frame start pulse sp2 can also be set to be smaller.

[0065] Combined with the above discussion, we can see that Figure 2 and Figure 3As shown, the timing controller 20 outputs a frame start signal STV / STV' to the gate driver 502, and the gate driver 502 generates a plurality of gate signals gate / gate' according to the frame start signal STV / STV', thereby controlling the multiple rows of sub-pixels P to be turned on in sequence. The greater the refresh rate, the smaller the intervals between the plurality of gate pulses in the frame start signal STV / STV'. For example, the intervals between the plurality of first frame start pulses sp1 are relatively large, so the plurality of gate signals gate / gate' generated by the gate driver 502 and the source driver 501 controlled by the data signal data / data' generated by the timing controller 20 drive the first frame F1 and the second frame F2 displayed by the display device 100 to be defined as the first type of frame. For another example, the intervals between the plurality of second frame start pulses sp2 are relatively small, so the plurality of gate signals gate / gate' generated by the gate driver 502 and the source driver 501 controlled by the data signal data / data' generated by the timing controller 20 drive the third frame F3, the fourth frame F4, and the fifth frame F5 displayed by the display device 100 to be defined as the second type of frame.

[0066] In some embodiments, Figure 2 As shown, in the data signal data', the ratio of the duration of the first sub-data signal (data1A' / data2A') to the duration of the first sub-blanking signal (Vblank1A' / Vblank2A') is smaller than the ratio of the duration of the second sub-data signal (data1B' / data2B' / data3B') to the duration of the second sub-blanking signal (Vblank1B' / Vblank2B' / Vblank3B'), and the duration of the first sub-data signal (data1A' / data2A') is equal to the duration of the second sub-data signal (data1B' / data2B' / data3B').

[0067] It can be understood that when the first refresh rate is increased to the second refresh rate, the duration of each frame is reduced. On this basis, unlike the above-mentioned data signal data, in the data signal data' of this embodiment, the duration of the sub-data signal is not changed, but the duration of the first sub-data signal (data1A' / data2A') is set to be equal to the duration of the second sub-data signal (data1B' / data2B' / data3B'), so the latter has a larger proportion in the corresponding frame, that is, by compressing the duration proportion of the sub-blanking signal in a frame, it is achieved that the duration of the sub-data signal can remain unchanged even if the refresh rate is increased.

[0068] It can be seen that in this embodiment, no matter how the refresh rate changes, the charging time of the sub-pixel P in each frame is the same, so that the sub-pixel P in each frame can be charged to a greater extent, thereby improving the overall brightness of the picture.

[0069] Further, based on the first type of frames (first frame F1 / second frame F2), the second type of frames (third frame F3 / fourth frame F4 / fifth frame F5), the gate driver 502, the first gate pulse p1 and the second gate pulse p2 discussed above; wherein the pulse width of the first gate pulse p1 is equal to the pulse width of the second gate pulse p2.

[0070] As discussed above, since the duration of the second sub-data signal (data1B' / data2B' / data3B') in the second type of frame is equal to the duration of the first sub-data signal (data1A' / data2A') in the first type of frame, in order to match the on period of the sub-pixel P with the period of the corresponding effective data voltage, the pulse width of the second gate pulse p2 can also be set equal to the pulse width of the first gate pulse p1. Even if the refresh rate increases, the width of the gate pulse p remains unchanged and the original charging level is maintained.

[0071] Further, combined with Figure 1 and Figure 2 As shown, based on the frame start signal STV', the first frame start pulse sp1 and the second frame start pulse sp2 discussed above; wherein the pulse width of the first frame start pulse sp1 is equal to the pulse width of the second frame start pulse sp2.

[0072] Similarly, since the multiple gate pulses corresponding to the multiple pixel groups in each frame are formed according to the frame start pulse of the frame start signal STV' in the frame, it can be considered that the pulse widths of the two are positively correlated. Therefore, in order to form the first gate pulse p1 and the second gate pulse p2 with the same pulse width, the pulse widths of the first frame start pulse sp1 and the second frame start pulse sp2 can also be set to be equal.

[0073] In some embodiments, in combination Figure 1 and Figure 2 As shown, the timing controller 20 is used to obtain the first refresh rate according to a frame start signal STV / STV', and the frame start signal STV / STV' includes a frame start pulse (a first frame start pulse sp1 or a second frame start pulse sp2) in each frame.

[0074] Combined with the above discussion, it can be known that since the frame start signal STV / STV' includes a frame start pulse in each frame, the first refresh rate can be calculated by calculating the number of frame start pulses of the frame start signal STV / STV' within a unit time length, and the first refresh rate is positively correlated with the number of frame start pulses. For example, if the unit time length is 1 second, the first refresh rate is "1 / the number of frame start pulses".

[0075] Based on the above embodiments, Figure 3 As shown, the first control signal Con1 can be specifically set, and the potential of the first control signal Con1 can jump when the refresh rate needs to be switched for identification by the timing controller 20, thereby changing the interval between two adjacent frame start pulses in the frame start signal STV / STV'. For example, at the end time of the second frame F2 (i.e., the start time of the frame start pulse of the third frame F3), the potential of the first control signal Con1 jumps, and the interval between two adjacent frame start pulses starting from the third frame F3 changes (the specific change needs to be set in advance, that is, the second refresh rate needs to be determined in advance to determine the corresponding interval between two adjacent frame start pulses).

[0076] According to the above discussion, the frame start pulse before the potential jump of the first control signal Con1 can be called the first frame start pulse sp1, and the frame start pulse after the potential jump of the first control signal Con1 can be called the second frame start pulse sp2.

[0077] Further, such as Figure 3 As shown, the second control signal Con2 can be set specifically, and the potential of the second control signal Con2 can also jump when the refresh rate needs to be switched for identification by the timing controller 20, thereby changing the interval between two adjacent sub-data signals in the data signal data / data'. For example, at the end moment of the sub-data signal in the third frame F3, the potential of the second control signal Con2 jumps, and the interval between two adjacent sub-data signals changes from the third frame F3 (the specific change needs to be set in advance, that is, the second refresh rate needs to be determined in advance to determine the interval between the corresponding two adjacent frame start pulses).

[0078] In combination with the above discussion, it can be seen that the sub-data signal before the potential jump of the second control signal Con2 can be called the first sub-data signal (data1A / data2A... or data1A' / data2A'...), and the sub-data signal after the potential jump of the second control signal Con2 can be called the second sub-data signal (data1B / data2B... or data1B' / data2B'...).

[0079] in, Figure 4 for Figure 3The simulation diagram of some signals in Figure 4 The simulation diagram can at least implement the above Figure 3 For the corresponding embodiments, please refer to the above description. Figures 2 to 4 As shown, the first refresh rate and the second refresh rate above can be 20 Hz and 40 Hz respectively, that is, multiple first-type frames (first frame F1 / second frame F2) are displayed at 20 Hz, and multiple second-type frames (third frame F3 / fourth frame F4 / fifth frame F5) are displayed at 40 Hz.

[0080] In order to better illustrate the above display device, the embodiment of the present invention further provides a driving method of the display device, such as Figure 5 As shown, the following steps may be included but not limited to:

[0081] S1, the timing controller obtains a first refresh rate.

[0082] The timing controller 20 may obtain the current refresh rate of the display panel 60 as the first refresh rate, and may obtain the first refresh rate according to the frame start signal STV / STV′. For details, please refer to the above related description.

[0083] S2, the timing controller increases the first refresh rate to a second refresh rate when the first refresh rate is less than a preset refresh rate.

[0084] The timing controller 20 can obtain the current refresh rate of the display panel 60 as the first refresh rate, and can achieve the second refresh rate by changing the interval between two adjacent frame start pulses in the frame start signal STV / STV'. For details, please refer to the above description.

[0085] S3, the timing controller obtains at least part of the first picture information corresponding to the first refresh rate from a storage unit as repeated picture information.

[0086] The storage unit 201 stores the repeated picture information in the first picture information, and the repeated picture information is also used to form the second picture information, so the timing controller 20 does not need to obtain all the second picture information from the front end, and the repeated picture information in the second picture information is directly obtained from the storage unit 201, thereby reducing the power consumption of the display device 100. For details, please refer to the relevant description above.

[0087] S4, the timing controller drives the display panel to display pictures at the second refresh rate according to the repeated picture information.

[0088] The timing controller 20 displays the second picture information at a relatively large second refresh rate, which can improve the flickering phenomenon caused by the low refresh rate of the picture. For details, please refer to the above related description.

[0089] Further, such as Figure 6 As shown, the driving method of the display device can also be understood to include but not limited to the following steps:

[0090] S01, start;

[0091] S02, the timing controller identifies a first refresh rate;

[0092] S03, determining whether the first refresh rate is less than a preset refresh rate;

[0093] If S03 is "yes", execute:

[0094] S04, increasing the first refresh rate to the second refresh rate by reducing the duration of the sub-data signal and the duration of the sub-blanking signal in the data signal by the same proportion;

[0095] or,

[0096] S05, increasing the first refresh rate to a second refresh rate by reducing the duration of the sub-blanking signal in the data signal;

[0097] If S03 is "No", execute:

[0098] S06, maintaining the duration of the sub-data signal and the duration of the sub-blanking signal in the data signal to maintain the first refresh rate.

[0099] Among them, the duration of the sub-data signal and the duration of the sub-blanking signal in the data signal reduced by the same proportion in step S04 can refer to the above discussion on the data signal data, that is, the ratio of the duration of the first sub-data signal (data1A / data2A) to the duration of the first sub-blanking signal (Vblank1A / Vblank2A) is the same as the ratio of the duration of the second sub-data signal (data1B / data2B / data3B) to the duration of the second sub-blanking signal (Vblank1B / Vblank2B / Vblank3B).

[0100] Among them, the proportional reduction of the duration of the sub-data signal and the duration of the sub-blanking signal in the data signal in step S05 can refer to the above discussion on the data signal data', that is, the ratio of the duration of the first sub-data signal (data1A' / data2A') to the duration of the first sub-blanking signal (Vblank1A' / Vblank2A') is smaller than the ratio of the duration of the second sub-data signal (data1B' / data2B' / data3B') to the duration of the second sub-blanking signal (Vblank1B' / Vblank2B' / Vblank3B'), and the duration of the first sub-data signal (data1A' / data2A') is equal to the duration of the second sub-data signal (data1B' / data2B' / data3B').

[0101] In step S06, it is considered that the current first refresh rate is large enough, and there is no need to adjust the duration of the sub-data signal and the duration of the sub-blanking signal in the current data signal, and the current first refresh rate can be directly maintained.

[0102] The structure of a display device and a driving method thereof provided by an embodiment of the present invention is introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present invention. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display device, characterized in that: include: Display panel; A timing controller, electrically connected to the display panel, for obtaining a first refresh rate; Among them, the timing controller is used to increase the first refresh rate to a second refresh rate when the first refresh rate is less than a preset refresh rate, and to obtain at least part of the first picture information corresponding to the first refresh rate from a storage unit as repeated picture information, and to drive the display panel to display a picture at the second refresh rate according to the repeated picture information.

2. The display device according to claim 1, wherein: Also includes: A source driver electrically connected to the timing controller and the display panel; Wherein, the timing controller is used to control the source driver to generate a first data signal according to the first refresh rate, or to control the source driver to generate a second data signal according to the second refresh rate; The first data signal includes a first sub-data signal and a first sub-blanking signal in each frame, the second data signal includes a second sub-data signal and a second sub-blanking signal in each frame, and the total duration of the first sub-data signal and the first sub-blanking signal is greater than the total duration of the second sub-data signal and the second sub-blanking signal.

3. The display device according to claim 2, wherein: The ratio of the duration of the first sub-data signal to the duration of the first sub-blanking signal is the same as the ratio of the duration of the second sub-data signal to the duration of the second sub-blanking signal.

4. The display device according to claim 3, characterized in that The multiple frames include a first type of frame corresponding to the first refresh rate and a second type of frame corresponding to the second refresh rate, the display panel includes a plurality of pixel groups, and the display device further includes: A gate driver, configured to output a plurality of gate signals corresponding to the plurality of pixel groups, each of the gate signals comprising a first gate pulse in each of the first type of frames and a second gate pulse in each of the second type of frames; Wherein, the pulse width of the first gate pulse is greater than the pulse width of the second gate pulse.

5. The display device according to claim 4, characterized in that The timing controller is used to output a frame start signal to the gate driver, wherein the frame start signal includes a first frame start pulse located in the first type of frame and a second frame start pulse located in the second type of frame; The pulse width of the first frame start pulse is greater than the pulse width of the second frame start pulse.

6. The display device according to claim 2, wherein: The ratio of the duration of the first sub-data signal to the duration of the first sub-blanking signal is smaller than the ratio of the duration of the second sub-data signal to the duration of the second sub-blanking signal, and the duration of the first sub-data signal is equal to the duration of the second sub-data signal.

7. The display device according to claim 6, wherein: The multiple frames include a first type of frame corresponding to the first refresh rate and a second type of frame corresponding to the second refresh rate, the display panel includes a plurality of pixel groups, and the display device further includes: A gate driver, configured to output a plurality of gate signals corresponding to the plurality of pixel groups, each of the gate signals comprising a first gate pulse in each of the first type of frames and a second gate pulse in each of the second type of frames; The pulse width of the first gate pulse is equal to the pulse width of the second gate pulse.

8. The display device according to claim 7, characterized in that The timing controller is used to output a frame start signal to the gate driver, wherein the frame start signal includes a first frame start pulse located in the first type of frame and a second frame start pulse located in the second type of frame; The pulse width of the first frame start pulse is equal to the pulse width of the second frame start pulse.

9. The display device according to any one of claims 1 to 8, characterized in that: The multiple frames include a first type of frames corresponding to the first refresh rate and a second type of frames corresponding to the second refresh rate; Among them, in the adjacent first-category frames and second-category frames, the first picture information of the first-category frames and the second picture information of the second-category frames both include the repeated picture information.

10. The display device according to claim 9, characterized in that In adjacent first-category frames and second-category frames, the first picture information of the first-category frames and the second picture information of the second-category frames are the same.

11. The display device according to any one of claims 1 to 8, characterized in that: The timing controller is used to obtain the first refresh rate according to a frame start signal, and the frame start signal includes a frame start pulse in each frame.

12. A method for driving a display device, characterized in that: include: The timing controller obtains a first refresh rate; The timing controller increases the first refresh rate to a second refresh rate when the first refresh rate is less than a preset refresh rate; The timing controller obtains at least part of the first picture information corresponding to the first refresh rate from the storage unit as repeated picture information; The timing controller drives the display panel to display pictures at the second refresh rate according to the repeated picture information.

Images