A method of fabricating a multilayer encapsulation glass substrate and structure

Abstract

The application relates to the technical field of chip packaging, in particular to a manufacturing method and structure of a multilayer packaging glass substrate. The method comprises the following steps: S1, pretreating a glass original embryo; S2, forming a plurality of vertical through holes with a hole diameter of 40-100 um on a glass core plate; S3, forming a horizontal through hole at one end of the vertical through hole to form a T-shaped through hole; S4, performing a hole filling operation on the T-shaped through hole; S5, pasting an adhesive layer; S6, pasting another pretreated glass core plate through the adhesive layer; and S7, repeating steps S2 to S6. Compared with the prior art, the multilayer adhesive lamination technology is used to realize the layer increasing of the high-density and high-precision glass substrate. The WB wire bonding technology of the glass substrate and the packaging chip is combined, and a high-storage chip can be manufactured. The TGV through hole technology and the laser through hole technology are combined, and the existing simple copper electroplating mode is matched, the circuit conduction between layers is realized, the interlayer interconnection is realized, and the cost can be effectively reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, in particular to a manufacturing method and structure of a multi-layer packaging glass substrate. Background Art

[0002] The chip substrate is used to fix the chips cut from the wafer and is the protagonist of the final step of packaging. The more chips fixed to the substrate, the more transistors the entire chip has. The most common one now is the organic material substrate. Organic material substrates are easy to process and can also transmit signals at high speed. They have always been regarded as leaders in the chip field. However, organic material substrates also have some disadvantages. The difference in thermal expansion coefficient between them and the chips is too large. At high temperatures, the connection between the chips and the substrate is easily disconnected, and the chip is burned. The chip temperature needs to be carefully controlled through thermal throttling, which means that the chip can only maintain the highest performance for a limited time and then slow down to a slower speed to reduce the temperature. Therefore, the size of the organic substrate is greatly limited. In order to accommodate more transistors within a limited size, the choice of substrate material is crucial.

[0003] Glass-core substrates offer significantly improved electrical and mechanical properties compared to organic substrates (BT substrates, now collectively referred to as IC substrates). Their adjustable modulus and CTE are closer to those of silicon, resulting in high dimensional stability. They also offer high through-hole density, allowing for more holes to be drilled for interconnection. They also offer low loss, which improves signal transmission speeds. They also offer higher temperature resistance, reducing the risk of burnout of electrical components. Summary of the Invention

[0004] In order to overcome the deficiencies of the prior art, the present invention provides a method for manufacturing a multi-layer encapsulated glass substrate and a structure thereof.

[0005] To achieve the above objectives, a method for manufacturing a multi-layer encapsulation glass substrate is designed, comprising the following steps:

[0006] S1, pre-treating the glass embryo to obtain a glass core board;

[0007] S2, using the TGV through-hole process to form a number of vertical through-holes with a diameter of 40-100 μm on the glass core board;

[0008] S3, performing laser drilling on one side surface of the vertical through hole to form a transverse through hole at one end of the vertical through hole, the vertical through hole and the transverse through hole being connected to form a T-shaped through hole;

[0009] S4, filling the T-shaped through hole by means of capping film, electroplating copper, electroplating hole filling, and etching;

[0010] S5, affixing a layer of adhesive layer on one surface of the glass core board;

[0011] S6, pasting another pre-treated glass core board through the adhesive layer;

[0012] S7, repeating steps S2 to S6 until the required number of glass core board layers are stacked.

[0013] The specific method of step S1 is as follows: S11, grinding the glass embryo, grinding out a 30~50um glass core board under the liquid grinding conditions of the grinder, and the flatness of the surface of the glass core board is 1~3um; S12, etching the glass core board with a mixed acid to form a glass circuit, and the circuit grade is 3-8um.

[0014] The mixed acid agent comprises the following raw materials in percentage by mass: hydrofluoric acid 0.1% to 2%, sulfuric acid 5% to 10%, hydrochloric acid 5% to 10%, nitric acid 5% to 10%, other organic acids 20% to 30%, and etching accelerator additives, the sum of the contents of each component being 100%; wherein the organic acid is a mixture of formic acid and acetic acid; the etching accelerator additive is SiFx and (CH2)3S2(SO 3- ) x mixture.

[0015] In the TGV through-hole process of step S2, the glass core board is etched using perfluorocyclobutane / argon plasma technology.

[0016] In the step S7, the adhesive layer in the T-shaped through hole of the last glass core board is removed so as to connect the T-shaped through hole of the first glass core board.

[0017] The total thickness of the stacked glass core boards in step S7 is controlled to be 90-150 μm.

[0018] After the hole filling is completed in step S3, a protective film is applied to the back of the glass core board. After the stacking is completed in step S6, the protective film on the back of the glass core board is removed. In actual use, only the protective film needs to be applied to the back of the first glass core board; the backs of the other glass core boards stacked on top do not need to be applied with protective films.

[0019] The following steps are also included:

[0020] S8, forming a circuit layer on the surface of the glass core board; S9, forming a solder mask on the back of the glass core board; S10, connecting the control chip on the surface of the glass core board through solder ball 1 and filling glue; S11, mounting a number of memory chips on the surface of the glass core board; S12, plastic sealing; S13, planting solder ball 2 on the glass core board.

[0021] To achieve the above purpose, a multi-layer encapsulated glass substrate structure is designed, including several stacked glass core boards, adjacent glass core boards are connected by an adhesive layer, T-shaped through holes are provided in the glass core boards, and the adhesive layer in the T-shaped through holes is removed to connect the T-shaped through holes of adjacent glass core boards, and electroplated copper is provided in the T-shaped through holes.

[0022] The front of the glass core board is connected to the control chip through solder ball one, and filling glue is provided on the outside of the solder ball one. The front of the glass core board is connected to several storage chips through several gold wires. A plastic sealing layer is provided on the front of the glass core board, and a solder mask protective layer is provided on the back of the glass core board. The electroplated copper on the back of the glass core board passes through the solder mask protective layer to connect to solder ball two.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] 1. Use multi-layer bonding lamination technology to achieve high-density and high-precision glass substrate layering.

[0025] 2. By combining glass substrates and WB bonding technology of packaged chips, high-storage chips can be manufactured.

[0026] 3. By combining TGV through-hole technology and laser through-hole technology with the current simple copper electroplating method, circuit conduction between layers can be achieved to achieve inter-layer interconnection, which can effectively reduce costs.

[0027] 4. Using TGV hole filling technology, the circuit is made into a buried glass substrate. The buried glass substrate can effectively protect the circuit and reduce the abnormal copper migration between the circuits to reduce the risk of b-Hast fail.

[0028] 5. Taking advantage of the high flatness of the glass substrate, the die is directly bonded to the front of the glass to reduce the unevenness of the DAF or die, ultimately reducing the risk of delamination between the glass substrate and the die. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is a schematic diagram of step S1 in the first embodiment of the present invention.

[0030] Figure 2 This is a schematic diagram of step S2 in the first embodiment of the present invention.

[0031] Figure 3 This is a schematic diagram of step S3 in the first embodiment of the present invention.

[0032] Figure 4 This is a schematic diagram of step S4 in the first embodiment of the present invention.

[0033] Figure 5 This is a schematic diagram of step S5 in the first embodiment of the present invention.

[0034] Figure 6 This is a schematic diagram of steps S6 and S7 in the first embodiment of the present invention.

[0035] Figure 7 This is a schematic diagram of step S8 in the first embodiment of the present invention.

[0036] Figure 8 This is a schematic diagram of steps S9 and S10 in the first embodiment of the present invention.

[0037] Figure 9 This is a schematic diagram of step S11 in the first embodiment of the present invention.

[0038] Figure 10 This is a schematic diagram of step S12 in the first embodiment of the present invention.

[0039] Figure 11 This is a schematic diagram of step S13 in the first embodiment of the present invention.

[0040] Figure 12 This is a schematic diagram of step S14 in the first embodiment of the present invention.

[0041] Figure 13 This is a schematic diagram of step S15 in the first embodiment of the present invention.

[0042] Figure 14 This is a schematic diagram of steps S16 and S17 in the first embodiment of the present invention.

[0043] Figure 15 It is a structural schematic diagram of the present invention. DETAILED DESCRIPTION

[0044] The present invention will be further described below with reference to the accompanying drawings.

[0045] like Figures 1 to 14 As shown, the method for manufacturing a multi-layer packaging glass substrate in this embodiment includes the following steps:

[0046] S1, pre-treating the glass embryo to obtain a glass core board 1;

[0047] S2, forming a plurality of vertical through holes 10-1 with a hole diameter of 40-100 μm on the glass core board 1 using the TGV through hole process;

[0048] S3, laser drilling is performed on one side surface of the vertical through hole 10-1 to form a horizontal through hole 10-2 at one end of the vertical through hole 10-1. The vertical through hole 10-1 is connected to the horizontal through hole 10-2 to form a T-shaped through hole 10;

[0049] S4, the T-shaped through hole 10 is filled by covering film, electroplating copper, electroplating filling, and etching, forming electroplated copper 4 in the T-shaped through hole 10, and forming a layer of electroplated copper on the back of the glass core board 1, and the electroplated copper is covered with a covering film;

[0050] S5, affixing a layer of adhesive layer 2 to one surface of the glass core board 1; the adhesive layer 2 can be thermally cured to achieve the function of bonding with the glass and also have a heat dissipation function;

[0051] S6, pasting the second pre-treated glass core board 1 through the adhesive layer 2;

[0052] S7, performing TGV through-hole punching and laser drilling on the second glass core board 1 to form a T-shaped through-hole 10;

[0053] S8, performing a filling operation on the T-shaped through hole 10 of the second glass core board 1;

[0054] S9, pasting the third pre-treated glass core board 1 through the adhesive layer 2;

[0055] S10, performing TGV through-hole drilling and laser drilling on the third glass core board 1 to form a T-shaped through-hole 10;

[0056] S11, performing a filling operation on the T-shaped through hole 10 of the third glass core board 1;

[0057] S12, forming a circuit layer on the surface of the glass core board 1; S13, forming a solder resist protective layer 3 on the back of the glass core board 1; S14, connecting the control chip 12 on the surface of the glass core board 1 through a solder ball 11 and a filling glue 9; S15, mounting a plurality of storage chips 6 on the surface of the glass core board 1; S16, plastic sealing; S17, planting a solder ball 13 on the glass core board 1.

[0058] The specific method of step S1 is as follows: S11, grinding the glass embryo, grinding out a 30~50um glass core board 1 under the liquid grinding conditions of the grinder, and the flatness of the surface of the glass core board 1 is 1~3um; S12, etching the glass core board 1 with a mixed acid to form a glass circuit, and the circuit grade is 3-8um.

[0059] The mixed acid agent includes the following raw materials in the following mass percentages: hydrofluoric acid 0.1%~2%, sulfuric acid 5%~10%, hydrochloric acid 5%~10%, nitric acid 5%~10%, other organic acids 20%~30%, and etching accelerator additives. The sum of the contents of each component is 100%. The organic acid is a mixture of formic acid and acetic acid; the etching accelerator additive is SiFx and (CH2)3S2(SO 3- ) x mixture.

[0060] In the TGV through-hole process of step S2, the glass core board 1 is etched using perfluorocyclobutane / argon plasma technology. Step S2 performs secondary etching to form an irregular shape to meet circuit requirements.

[0061] In step S7 , the adhesive layer in the T-shaped through hole 10 of the next glass core board 1 to be attached is removed so as to connect the T-shaped through hole 10 of the previous glass core board 1 .

[0062] The total thickness of the stacked glass core boards 1 in step S7 is controlled to be 90-150 μm.

[0063] like Figure 10 As shown, before step S13, the excess electroplated copper 4 on the front and back of the stacked glass core boards is etched. Some electroplated copper is retained on the back of the bottom glass core board to connect the electroplated copper 4 in the through hole with the solder ball 13 to ensure electrical connection with the outside world.

[0064] After the hole filling is completed in step S3, a protective film 8 is attached to the back of the glass core board 1. After the stacking is completed in step S11, the protective film on the back of the glass core board 1 is removed. Figure 9 As shown, the protective film 8 protects the copper inside the hole from etching and prevents electroplating with chemicals and scratches on the circuits and glass surface. In practice, only the back surface of the first glass core board 1 needs to be affixed with the protective film 8; the back surfaces of the other glass core boards 1 stacked above do not need to be affixed with the protective film 8.

[0065] The structure obtained by the above-mentioned multi-layer encapsulated glass substrate includes several stacked glass core boards 1, and adjacent glass core boards 1 are connected by an adhesive layer 2. A T-shaped through hole 10 is provided in the glass core board 1, and the adhesive layer 2 in the T-shaped through hole 10 is removed to connect the T-shaped through holes 10 of adjacent glass core boards 1, and electroplated copper 4 is provided in the T-shaped through hole 10.

[0066] The front of the glass core board 1 is connected to the control chip 12 through a solder ball 11, and a filling glue 9 is provided on the outside of the solder ball 11. The front of the glass core board 1 is connected to several storage chips 6 through several gold wires 7. A plastic sealing layer 5 is provided on the front of the glass core board 1, and a solder mask protective layer 3 is provided on the back of the glass core board 1. The electroplated copper on the back of the glass core board 1 passes through the solder mask protective layer 3 to connect to the solder ball 2 13.

Claims

1. A method for manufacturing a multi-layer encapsulation glass substrate, characterized in that: The steps include: S1, pre-treating the glass embryo to obtain a glass core board (1); S2, forming a plurality of vertical through holes (10-1) with a hole diameter of 40 to 100 μm on the glass core board (1) using a TGV through hole process; S3, performing laser drilling on one side surface of the vertical through hole (10-1), forming a transverse through hole (10-2) at one end of the vertical through hole (10-1), and the vertical through hole (10-1) and the transverse through hole (10-2) are connected to form a T-shaped through hole (10); S4, performing a hole filling operation on the T-shaped through hole (10) by means of a cover film, electroplating copper, electroplating hole filling, and etching; S5, affixing a layer of adhesive layer (2) on one surface of the glass core board (1); S6, pasting another pre-treated glass core board (1) through the adhesive layer (2); S7, repeating steps S2 to S6 until the required number of glass core panels (1) are stacked; In step S7, the adhesive layer in the T-shaped through hole (10) of the next glass core board (1) is removed so that the T-shaped through hole (10) is connected to the previous glass core board (1).

2. The method for manufacturing a multi-layer packaging glass substrate according to claim 1, wherein: The specific method of the step S1 is as follows: S11, grinding the glass embryo, grinding a 30-50 μm glass core board (1) under the liquid grinding conditions of the grinder, and the flatness of the surface of the glass core board (1) is 1-3 μm; S12, etching the glass core board (1) with a mixed acid to form a glass circuit, and the circuit grade is 3-8 μm.

3. The method for manufacturing a multi-layer packaging glass substrate according to claim 2, wherein: The mixed acid agent comprises the following raw materials in percentage by mass: hydrofluoric acid 0.1% to 2%, sulfuric acid 5% to 10%, hydrochloric acid 5% to 10%, nitric acid 5% to 10%, organic acid 20% to 30%, and etching accelerator additive, the sum of the contents of each component being 100%; wherein the organic acid is a mixture of formic acid and acetic acid; the etching accelerator additive is SiFx and (CH2)3S2(SO 3- ) x mixture.

4. The method for manufacturing a multi-layer packaging glass substrate according to claim 1, wherein: In the TGV through-hole process of step S2, the glass core board (1) is etched using perfluorocyclobutane / argon plasma technology.

5. The method for manufacturing a multi-layer packaging glass substrate according to claim 1, wherein: The total thickness of the plurality of glass core boards (1) after stacking in step S7 is controlled to be 90-150 μm.

6. The method for manufacturing a multi-layer packaging glass substrate according to claim 1, wherein: After the hole filling in step S3 is completed, a protective film (8) is attached to the back of the glass core board (1). After the stacking in step S6 is completed, the protective film on the back of the glass core board (1) is removed.

7. The method for manufacturing a multi-layer packaging glass substrate according to claim 1, wherein: The following steps are also included: S8, forming a circuit layer on the surface of the glass core board (1); S9, forming a solder resist protective layer (3) on the back of the glass core board (1); S10, connecting a control chip (12) on the surface of the glass core board (1) through a solder ball (11) and a filling glue (9); S11, mounting a plurality of memory chips (6) on the surface of the glass core board (1); S12, plastic encapsulation; S13, planting a solder ball (13) on the glass core board (1).

8. A structure of a multi-layer packaging glass substrate obtained by the manufacturing method according to any one of claims 1 to 7, characterized in that: The invention comprises a plurality of stacked glass core boards (1), wherein adjacent glass core boards (1) are connected by an adhesive layer (2), a T-shaped through hole (10) is provided in the glass core board (1), and the adhesive layer (2) in the T-shaped through hole (10) is removed so that the T-shaped through holes (10) of adjacent glass core boards (1) are connected, and electroplated copper (4) is provided in the T-shaped through hole (10).

9. The structure of a multi-layer packaging glass substrate according to claim 8, characterized in that: The front side of the glass core board (1) is connected to the control chip (12) via a solder ball (11), a filling glue (9) is provided on the outside of the solder ball (11), the front side of the glass core board (1) is connected to a plurality of storage chips (6) via a plurality of gold wires (7), a plastic sealing layer (5) is provided on the front side of the glass core board (1), a solder resist protective layer (3) is provided on the back side of the glass core board (1), and the electroplated copper on the back side of the glass core board (1) passes through the solder resist protective layer (3) to connect to the solder ball (13).

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