Electronic device and method of manufacturing electronic device

By designing an electronic device including a molded radiator, the problem of high electronic packaging cost and low reliability in the prior art is solved, and a more efficient and reliable electronic packaging structure is achieved.

CN119626995APending Publication Date: 2025-03-14AMKOR TECH SINGAPORE HLDG PTE LTD
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Patent Information

Application Number
CN202411263087.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-09-12
Filing Date
2024-09-10
Publication Date
2025-03-14

AI Technical Summary

Technical Problem

Existing electronic packaging methods lead to excessive cost, reduced reliability, low performance or excessive packaging size, which cannot meet the needs of modern electronic devices.

Method used

An electronic device is designed including a substrate, an electronic component, an encapsulation and a molded radiator. The molded radiator consists of a radiator and a molded compound which is disposed around the lateral side of the radiator and coplanar with the lateral side of the encapsulation. This design increases the roughness of the radiator by surface treatment and a plating layer is placed on the radiator to increase bonding strength.

Benefits of technology

By optimizing the packaging structure, the design reduces costs, improves the reliability and performance of electronic devices, while reducing the packaging size, meeting the needs of modern electronic devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

An electronic device and a method of manufacturing the electronic device. In one example, an electronic device includes a substrate, an electronic component disposed over the substrate, and an encapsulant disposed over the substrate and the electronic component. A molded heat sink may be disposed over the encapsulant and may include a heat sink and a molding compound disposed around lateral sides of the heat sink. The lateral sides of the molding compound are coplanar with the lateral sides of the encapsulant. Other examples and related methods are also disclosed herein.
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Description

Technical Field

[0001] The present disclosure relates generally to electronic devices, and more particularly, to electronic devices and methods for making electronic devices. Background Art

[0002] Previous electronic packages and methods of forming electronic packages are inadequate, for example resulting in excessive cost, reduced reliability, relatively low performance, or excessive package size. Other limitations and disadvantages of conventional and traditional methods will become apparent to those skilled in the art by comparing such methods with the present disclosure and referring to the drawings. Summary of the invention

[0003] One aspect of the present invention is an electronic device comprising: a substrate; an electronic component disposed above the substrate; an encapsulant disposed above the substrate and the electronic component; a molded heat sink disposed above the encapsulant, wherein the molded heat sink comprises: a heat sink; and a molding compound disposed around lateral sides of the heat sink, wherein the lateral sides of the molding compound are coplanar with lateral sides of the encapsulant.

[0004] In the electronic device according to an aspect of the present invention, the heat sink includes a first side subjected to surface treatment to increase roughness, wherein the first side is oriented toward the encapsulant.

[0005] The electronic device according to an aspect of the present invention further includes a plating layer disposed on a second side of the heat sink opposite to the first side.

[0006] The electronic device according to aspects of the present invention further comprises: a bonding pad of the electronic component oriented away from the substrate; and a component interconnect coupling the bonding pad to the substrate.

[0007] In the electronic device according to aspects of the present invention, the molding compound is disposed over a portion of the heat sink, around the lateral sides of the heat sink, and over the encapsulant.

[0008] In the electronic device according to an aspect of the present invention, the lower side of the heat sink extends below the lower side of the molding compound.

[0009] In the electronic device according to an aspect of the present invention, the substrate includes a redistribution layer (RDL) substrate.

[0010] In the electronic device described in accordance with an aspect of the present invention, the lateral side of the encapsulant includes a step, wherein a first portion of the lateral side of the encapsulant is coplanar with the lateral side of the molding compound, and wherein a second portion of the lateral side of the encapsulant protrudes from the first portion.

[0011] In the electronic device according to an aspect of the present invention, the lateral side of the heat sink includes a step.

[0012] Another aspect of the present invention is an electronic device, characterized in that it includes: a substrate; an electronic component disposed above the substrate; an insert disposed above the substrate and defining a cavity; a heat sink disposed above the electronic component and in the cavity defined by the insert; and an encapsulant disposed between the heat sink and the electronic component and between the heat sink and the insert.

[0013] The electronic device according to another aspect of the present invention further comprises: a bonding pad of the electronic component oriented away from the substrate; and a component interconnect coupling the bonding pad to the substrate.

[0014] In the electronic device according to another aspect of the present invention, the substrate includes a redistribution layer (RDL) substrate.

[0015] According to another aspect of the present invention, the electronic device further includes an internal interconnect coupling the substrate to the interposer.

[0016] According to another aspect of the present invention, the electronic device further includes a component interconnect disposed between the electronic component and the substrate, wherein the component interconnect couples the electronic component to the substrate.

[0017] Another aspect of the present invention is a method of manufacturing an electronic device, comprising: providing a heat sink; providing a molding compound around the lateral sides of the heat sink; removing a portion of the heat sink to leave a cavity defined by the lateral sides of the heat sink and the upper side of the molding compound; processing the upper side of the heat sink to increase roughness; providing an electronic component and a substrate above the upper side of the heat sink; and providing an encapsulant between the heat sink and the substrate.

[0018] According to yet another aspect of the present invention, the method further includes providing a plating layer over a lower side of the heat sink opposite the upper side of the heat sink.

[0019] In the method according to another aspect of the present invention, providing the molding compound around the lateral sides of the heat sink further includes: removing a portion of the heat sink to define a cavity around the lateral sides of the heat sink; providing the molding compound in the cavity; and removing a portion of the molding compound so that the underside of the heat sink is coplanar with the underside of the molding compound.

[0020] In a method according to yet another aspect of the invention, providing the heat sink further comprises providing heat sink strips coupled together by tie bars, wherein the tie bars are integrally formed with the heat sink.

[0021] According to yet another aspect of the invention, the method further includes cutting through tie bars and the molding compound to singulate the electronic devices.

[0022] In a method according to yet another aspect of the invention, the tie bars and the molding compound define a singulation line between adjacent heat sinks in the heat sink strip. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A cross-sectional view of an example electronic device is shown.

[0024] FIG. 2A to FIG. 2D An example method for manufacturing an electronic device is presented.

[0025] FIG. 3A to FIG. 3F An example method for manufacturing a molded heat sink strip is presented.

[0026] Figure 4 and Figure 4A exhibit Figure 3D A plan view of the molded heat sink strip shown in FIG.

[0027] Figure 5 A cross-sectional view of an example electronic device is shown.

[0028] Figure 5A A cross-sectional view of an example electronic device is shown.

[0029] Figure 6 A cross-sectional view of an example electronic device is shown.

[0030] 7A to 7F An example method for manufacturing an electronic device is presented.

[0031] Figure 8 A cross-sectional view of an example electronic device is shown.

[0032] 9A to 9E An example method for manufacturing an electronic device is presented.

[0033] Fig.10 A cross-sectional view of an example electronic device is shown. DETAILED DESCRIPTION

[0034] An example electronic device may include a substrate, an electronic component disposed over the substrate, and an encapsulant disposed over the substrate and the electronic component. A molded heat sink may be disposed over the encapsulant and may include a heat sink and a molding compound disposed around lateral sides of the heat sink. The lateral sides of the molding compound are coplanar with lateral sides of the encapsulant.

[0035] In various examples, the heat sink may include a first side that is surface treated to increase roughness. The first side is oriented toward the encapsulation. The plating layer is disposed over a second side of the heat sink that is opposite to the first side. The bonding pads of the electronic components are oriented away from the substrate. The component interconnects couple the bonding pads to the substrate. The molding compound is disposed over a portion of the heat sink, around the lateral sides of the heat sink, and over the encapsulation. The lower side of the heat sink extends below the lower side of the molding compound. The substrate includes a redistribution layer (RDL) substrate. The lateral side of the encapsulation includes a step, wherein a first portion of the lateral side of the encapsulation is coplanar with the lateral side of the molding compound. The second portion of the lateral side of the encapsulation protrudes from the first portion. The lateral side of the heat sink may include a step.

[0036] Another example electronic device includes a substrate, an electronic component disposed above the substrate, and an insert disposed above the substrate and defining a cavity. A heat sink may be disposed above the electronic component and in the cavity defined by the insert. An encapsulant is disposed between the heat sink and the electronic component and between the heat sink and the insert.

[0037] In various examples, a bonding pad of an electronic component is oriented away from a substrate. A component interconnect couples the bonding pad to the substrate. The substrate includes a redistribution layer (RDL) substrate. An internal interconnect couples the substrate to an interposer. The component interconnect is disposed between the electronic component and the substrate. The component interconnect couples the electronic component to the substrate.

[0038] An exemplary method includes the following steps: providing a heat sink; providing a molding compound around lateral sides of the heat sink; and removing a portion of the heat sink to leave a cavity defined by the lateral sides of the heat sink and an upper side of the molding compound. Treating the upper side of the heat sink to increase roughness. Providing an electronic component and a substrate over the upper side of the heat sink. Providing an encapsulant between the heat sink and the substrate.

[0039] In various examples, a plating layer is provided over a lower side of the heat sink opposite an upper side of the heat sink. A portion of the heat sink is removed to define a cavity around a lateral side of the heat sink. A molding compound is provided in the cavity. A portion of the molding compound is removed to make the lower side of the heat sink coplanar with the lower side of the molding compound. The heat sink strips may be coupled together by tie bars, and the tie bars may be integrally formed with the heat sink. The method may include cutting through the tie bars and the molding compound to singulate the electronic devices. The tie bars and the molding compound may define a singulation line between adjacent heat sinks in the heat sink strip.

[0040] Other examples are included in the present disclosure. Such examples can be found in the accompanying drawings, claims, or description of the present disclosure.

[0041] Various examples include molded heat sinks or heat sink strips. Heat sink strips may include rows, columns, or arrays of heat sinks connected to each other by molding compound or tie bars. Molded heat sink strips may be aligned, packaged, and singulated over electronic components to manufacture electronic devices.

[0042] In some examples, mold compound or tie bars between heat sinks may define a singulation line. The use of mold compound or tie bars between adjacent heat sinks may reinforce the molded heat sink strips and couple adjacent heat sinks to each other during various processing steps. The use of mold compound or tie bars may also reduce the amount of metal disposed in the singulation line between electronic devices. The electronic devices may be cut, sawed, or otherwise separated along the singulation line including the mold compound or tie bars to reduce burrs or other defects that may occur during singulation through large amounts of metal and other hard materials. The tie bars may also reduce movement or displacement of the heat sink during the application of the mold compound.

[0043] The following discussion provides various examples of electronic devices and methods of making electronic devices. Such examples are non-limiting, and the scope of the appended claims should not be limited to the specific examples disclosed. For example, the steps recited in any of the method or process descriptions can be performed in any order and are not necessarily limited to the order presented. In the following discussion, the terms "example" and "for example" are non-limiting.

[0044] Each figure shows a general construction method, and descriptions and details of well-known features and techniques may be omitted so as not to unnecessarily obscure the present disclosure. In addition, the elements in the drawings are not necessarily drawn to scale. For example, the size of some elements in each figure may be enlarged relative to other elements to help improve the understanding of the examples discussed in the present disclosure. The same reference numerals in different figures represent the same elements.

[0045] The term "or" means any one or more items in a list connected by "or". As an example, "x or y" means any element in the three-element set {(x), (y), (x, y)}. As another example, "x, y or z" means any element in the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.

[0046] The terms “comprises,” “comprising,” “includes,” and “including” are “open” terms and specify the presence of stated features but do not preclude the presence or addition of one or more other features.

[0047] The terms "first", "second", etc. may be used herein to describe various elements, and the elements described should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, the first element discussed in the present disclosure may be referred to as the second element without departing from the teachings of the present disclosure.

[0048] Unless otherwise specified, the term "coupled" may be used to describe two elements that are in direct contact with each other, or to describe two elements that are indirectly coupled through one or more other elements. For example, if element A is coupled to element B, element A may be in direct contact with element B or indirectly coupled to element B through an intervening element C. Similarly, the terms "above" or "on" may be used to describe two elements that are in direct contact with each other, or to describe two elements that are indirectly coupled through one or more other elements. As used herein, the term "coupled" may refer to electrical coupling or mechanical coupling.

[0049] Reference Figure 1 , showing a cross-sectional view of an example electronic device 10. Figure 1 In the example shown in , electronic device 10 may include electronic component 11 , substrate 12 , molded heat sink 13 , device encapsulant 14 , and external interconnects 15 .

[0050] The substrate 12 may include a conductive structure 121 and a dielectric structure 122. The conductive structure 121 may include a substrate inner terminal 121i and a substrate outer terminal 121o. The inner terminal 121i may be located at a first (or inner) side 123 of the substrate 12. The outer terminal 121o may be located at a second (or outer) side 124 of the substrate 12 opposite to the inner side 123. The molded heat sink 13 may include a heat sink 131 and a mold compound 132. In some examples, the electronic component 11 may be coupled to the substrate 12 via a die attach material 115.

[0051] FIG. 2A to FIG. 2D An example method for manufacturing electronic device 10 is presented. Figure 2AA cross-sectional view of electronic device 10 is shown at an early stage of manufacture. Figure 2A In the example shown in , the molded heat sink strip 13A can be placed on the bottom mold groove 1. The molded heat sink strip 13A can also be referred to as a molded substrate strip herein. The bottom mold groove 1 can define a cavity 1a that receives the molded heat sink strip 13A. The molded heat sink strip 13A can be manufactured using the techniques described in more detail below.

[0052] According to various examples, the molded heat sink strip 13A may include a molded heat sink 13. The molded heat sink 13 may include heat sinks 131 and a mold compound 132. The molded heat sink strip 13A includes heat sinks 131 arranged in rows, columns, grids, or arrays. The mold compound 132 may couple adjacent heat sinks 131 to each other. The mold compound 132 may define a single point line between adjacent heat sinks 131.

[0053] In various examples, the upper side of the heat sink 131 can be processed to roughen the exposed mating surface of the heat sink 131. In some examples, the plating layer 133 can be disposed on the lower side of the heat sink 131 opposite the upper side.

[0054] Figure 2B A cross-sectional view of the electronic device 10 is shown in a post-manufacturing stage. Figure 2B In the example shown in , the top mold groove 2 that seats the substrate 12 and the electronic component 11 can be aligned on the upper side of the bottom mold groove 1 that seats the molded heat sink strip 13A. In response to the upper mold groove 2 being aligned above the bottom mold groove 1, the electronic component 11 can be aligned above the heat sink 131.

[0055] According to various examples, the electronic component 11 can be coupled to the substrate 12 before positioning the substrate 12 and the electronic component 11 within the upper mold cavity 2. For example, the electronic component 11 can be disposed on the inner side 123 of the substrate 12. In some examples, the electronic component 11 can be coupled to the inner side 123 via an adhesive or other die attach material 115.

[0056] In some examples, substrate 12 may include or be referred to as a laminate substrate, a redistribution layer (RDL) substrate, a build-up substrate, a coreless substrate, a rigid substrate, a glass substrate, a semiconductor substrate, a printed circuit board, a multilayer substrate, a molded lead frame, or a ceramic substrate. Substrate 12 may include conductive structures 121 and dielectric structures 122. In some examples, substrate 12 may have a thickness of about 0.2 mm to about 4 mm.

[0057] In some examples, the conductive structure 121 may include or be referred to as one or more conductors, conductive materials, conductive paths, conductive layers, RDLs, wiring layers, traces, vias, pads, or under-bump metallization (UBM). The conductive structure 121 may include one or more conductive layers. In some examples, one or more of the conductive layers may be interlaced with the dielectric layers of the dielectric structure 122. The conductive structure 121 may define a conductive path through the dielectric structure 122, the conductive path having elements such as traces, pads, vias, and wiring patterns. In some examples, the conductive structure 121 may include copper, aluminum, palladium, titanium, tungsten, titanium / tungsten, nickel, gold, or silver. In some examples, the conductive structure 121 may be provided by sputtering, electroless plating, electrolytic plating, physical vapor deposition (PVD), chemical vapor deposition (CVD), metal organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), low pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD), or other processes known to those of ordinary skill in the art. In some examples, portions of the conductive structure 121 may be exposed from the inner side 123 of the substrate 12 and the outer side 124 of the substrate 12. The conductive structure 121 may transmit a signal, current, or voltage within the substrate 12. In some examples, the thickness of the conductive structure 121 may be in a range of about 3 μm to about 100 μm. The thickness of the conductive structure 121 may refer to individual layers of the conductive structure 121.

[0058] The conductive structure 121 may include a substrate inner terminal 121i and a substrate outer terminal 121o. The substrate inner terminal 121i may be exposed from the inner side 123 of the substrate 12, and the substrate outer terminal 121o may be exposed from the outer side 124 of the substrate 12. In various examples, the substrate inner terminal 121i and the substrate outer terminal 121o may be arranged in a matrix form having rows or columns on the inner side 123 of the substrate 12 and the outer side 124 of the substrate 12, respectively. In some examples, the substrate inner terminal 121i and the substrate outer terminal 121o may include or be referred to as a conductor, a conductive material, a substrate pad, a conductive pad, a substrate pad, a wiring pad, a connection pad, a micro pad, or an under-bump metallization layer (UBM). In some examples, the thickness of the substrate inner terminal 121i and the substrate outer terminal 121o may each be in the range of about 3 μm to about 100 μm. The conductive structure 121 may be coupled to the electronic component 11 and the external interconnect 15 ( Figure 1 ). For example, the electronic component 11 may be coupled to the substrate internal terminal 121i, and the external interconnect 15 ( Figure 1 ) can be coupled to the substrate external terminal 121o.

[0059] In some examples, the dielectric structure 122 may include or be referred to as one or more dielectrics, dielectric materials, dielectric layers, passivation layers, insulating layers, or protective layers. In some examples, the dielectric structure 122 may have a structure in which one or more dielectric layers are stacked. In some examples, the dielectric structure 122 may include a polymer, polyimide (PI), benzocyclobutene (BCB), polybenzoxazole (PBO), bismaleimide triazine (BT), a molding material, a phenolic resin, an epoxy resin, a silicone resin, or an acrylate polymer. The dielectric structure 122 may contact the conductive structure 121. The dielectric structure 122 may expose a portion of the conductive structure 121. In some examples, the dielectric structure 122 may maintain the outer shape of the substrate 12 and may structurally support the conductive structure 121 and the electronic component 11. In some examples, the dielectric structure 122 can be provided by spin coating, spray coating, printing, oxidation, PVD, CVD, MOCVD, ALD, LPCVD, PECVD, or other processes known to those of ordinary skill in the art. The upper side and the lower side of the dielectric structure 122 can be a portion of the inner side 123 of the substrate 12 and the outer side 124 of the substrate 12, respectively. In some examples, the thickness of the individual layers of the dielectric structure 122 can be in the range of about 3 μm to about 100 μm. The combined thickness of all layers of the dielectric structure 122 can define the thickness of the substrate 12.

[0060] In some examples, the substrate 12 may be an RDL substrate. The RDL substrate may include one or more conductive redistribution layers and one or more dielectric layers, and (a) may be formed layer by layer over an electronic device to be coupled to the RDL substrate, or (b) may be formed layer by layer over a carrier, and may be completely or at least partially removed after the electronic device and the RDL substrate are coupled together. The RDL substrate may be manufactured layer by layer as a wafer-level substrate on a circular wafer with a wafer-level process, or may be manufactured layer by layer as a panel-level substrate on a rectangular or square panel carrier with a panel-level process. The RDL substrate may be formed by an additive stacking process, and may include one or more dielectric layers alternately stacked with one or more conductive layers, and define corresponding conductive redistribution patterns or traces, which are configured to collectively (a) fan the electrical traces out of the footprint of the electronic device, or (b) fan the electrical traces into the footprint of the electronic device. The conductive pattern may be formed using a plating process such as an electroplating process or an electroless plating process. The conductive pattern may include a conductive material such as copper or other plateable metals. The location of the conductive pattern may be made using a photo-patterning process, such as a photolithography process and a photoresist material used to form a photolithography mask.

[0061] In some examples, the dielectric layer of the RDL substrate may be patterned with a photopatterning process and may include a photolithographic mask through which light is passed to expose desired features of the photopattern, such as vias in the dielectric layer. The dielectric layer may be made of a photo-definable organic dielectric material such as polyimide (PI), benzocyclobutene (BCB), or polybenzoxazole (PBO). Such dielectric materials may be spin-coated or otherwise applied in liquid form rather than attached in the form of a preformed film. In order to permit the desired photo-defined features to be properly formed, such photo-definable dielectric materials may omit structural reinforcements, or may be filler-free, without strands, woven fabrics, or other particles that may interfere with light from the photopatterning process. In some examples, such filler-free properties of filler-free dielectric materials may permit the thickness of the resulting dielectric layer to be reduced.

[0062] Although the photo-definable dielectric material described above may be an organic material, in some instances, the dielectric material of the RDL substrate may include one or more inorganic dielectric layers. Some examples of inorganic dielectric layers may include silicon nitride (Si3N4), silicon oxide (SiO2) and / or silicon oxynitride (SiON). The inorganic dielectric layer may be formed by growing the inorganic dielectric layer using an oxidation or nitridation process instead of using a photo-definable organic dielectric material. Such an inorganic dielectric layer may be filler-free, without strands, woven fabrics, or other different inorganic particles. In some instances, the RDL substrate may omit a permanent core structure or carrier, such as a dielectric material including bismaleimide triazine (BT) or FR4, and these types of RDL substrates may include or be referred to as a coreless substrate. A substrate as disclosed herein may include an RDL substrate.

[0063] In various examples, substrate 12 can be a preformed substrate. The preformed substrate can be manufactured before being attached to the electronic device, and can include a dielectric layer between the corresponding conductive layers. The conductive layer can include copper and can be formed using an electroplating process. The dielectric layer can be a relatively thick non-photodefinable layer and can be attached as a preformed film rather than as a liquid, and can include a resin with fillers such as strands, woven fabrics and / or other inorganic particles for rigidity and / or structural support. Since the dielectric layer is non-photodefinable, features such as through holes or openings can be formed by using drilling or lasers. In some examples, the dielectric layer can include prepreg materials or Ajinomoto Buildup Film (ABF).

[0064] In various examples, the preformed substrate may include a permanent core structure or carrier, such as a dielectric material including bismaleimide triazine (BT) or FR4, and the dielectric layer and the conductive layer may be formed on the permanent core structure. In other examples, the preformed substrate may be a coreless substrate and the permanent core structure is omitted, and the dielectric layer and the conductive layer may be formed on a sacrificial carrier and removed after the dielectric layer and the conductive layer are formed and before being attached to an electronic device. The preformed substrate may be referred to as a printed circuit board (PCB) or a laminated substrate. Such preformed substrates may be formed by a semi-additive process or a modified semi-additive process. A substrate as disclosed herein may include a preformed substrate.

[0065] According to various examples, the electronic component 11 may be disposed on the inner side 123 of the substrate 12. The electronic component 11 may include a first (or upper) side 112, a second side 113 opposite the first side 112, and a lateral side 114 connecting the first side 112 to the second side 113. In some examples, the first side 112 of the electronic component 11 may include or be referred to as an active side or front side in which circuit elements may be formed, and the second side 113 of the electronic component 11 may include or be referred to as an inactive side or back side. In some examples, the electronic component 11 may include contact pads 11a proximate to the first side 112, which may be coupled to circuit elements within or on the electronic component 11. In this example, the second side 113 of the electronic component 11 is proximate to the inner side 123 of the substrate 12, and the second side 113 of the electronic component 11 is away from or oriented to be away from the inner side 123 of the substrate 12. In some examples, the electronic component 11 may include or be referred to as a die, a chip, or a package.

[0066] The electronic component 11 may be coupled to the inner side 123 of the substrate 12 via an adhesive or other die attach material. For example, the adhesive may be applied to the inner side 123 of the substrate 12 or the second side 113 of the electronic component 11. With the adhesive in place, a pick-and-place device may pick up the electronic component 11 and place the electronic component 11 on the inner side 123 of the substrate 12 such that the adhesive is located between the second side 113 of the electronic component 11 and the inner side 123 of the substrate 12 and couples the electronic component 11 to the substrate 12.

[0067] The electronic component 11 may include a contact pad 11a disposed on the first side 112. The contact pad 11a may be an input / output terminal of the electronic component 11. In some examples, the contact pad 11a may include or be referred to as a die pad or a bonding pad. In some examples, the contact pad 11a includes a conductive material, such as aluminum, copper, an aluminum alloy, or a copper alloy.

[0068] According to various examples, the electronic component 11 may include a component interconnect 111 coupled between the contact pad 11a and the inner terminal 121i of the substrate 12. In some examples, the component interconnect 111 may include or be referred to as a wire or a bonding wire. In some examples, the component interconnect 111 may include gold, copper, aluminum, copper coated with palladium, or any other suitable conductive material. The diameter of the component interconnect 111 may be in the range of about 15 μm to about 30 μm.

[0069] Although the electronic components 11 are shown as being coupled to the substrate 12 via wire bonds, it is further contemplated and understood that in various examples, one or more of the electronic components 11 may be coupled to the substrate 12 as a flip chip. For example, the first side 112 of the electronic component 11 may be oriented toward the inner side 123 of the substrate 12, and the contact pads 11a may be coupled to the inner terminals 121i via solder bumps, copper pillars, solder-capped copper pillars, or any other suitable interconnect structure that may be vertically positioned between the contact pads 11a and the inner terminals 121i.

[0070] In various examples, the overall thickness of the electronic component 11 may be in a range of about 50 μm to about 350 μm. In some examples, the area of ​​the electronic component 11 may be smaller than the area of ​​the inside of the heat sink 131. In some examples, the area of ​​the electronic component 11 may be in a range of about 4 mm×4 mm to about 25 mm×25 mm.

[0071] The substrate 12 having the electronic component 11 coupled thereto may be located in the top mold recess 2 such that the outer side 124 of the substrate 12 is coupled to or in contact with the top mold recess 2 and the inner side 123 of the substrate 12 (e.g., the side to which the electronic component 11 is coupled) is oriented toward the bottom mold recess 1 and the molded substrate strip 13A. The top mold recess 2 may include a flat mold top plate and mold sidewalls extending downward from the edge of the top plate. The top mold recess 2 may have a cavity 2a defined by the mold top plate and the mold sidewalls inside. The top mold recess 2 may be picked up by a pick-and-place device and aligned with the bottom mold recess 1 such that the heat sink 131 is positioned below the electronic component 11.

[0072] Figure 2C A cross-sectional view of the electronic device 10 is shown in a post-manufacturing stage. Figure 2C In the example shown in , the device encapsulant 14 may be disposed between the substrate 12 and the molded heat sink strip 13A and between the electronic component 11 and the molded heat sink strip 13A. The device encapsulant 14 may be disposed within the cavity defined by the bottom mold recess 1 and the top mold recess 2 and may fill the cavity.

[0073] In some examples, the device encapsulant 14 may be provided in powder form and may fill the cavity 1a of the bottom mold recess 1. Heat may then be provided to melt the powder of the device encapsulant 14, wherein the sidewalls of the top mold recess 2 and the sidewalls of the bottom mold recess 1 are in contact and pressed tightly toward each other. The melted device encapsulant 14 may fill the volume between the substrate 12 and the molded heat sink strip 13A and between the electronic component 11 and the molded heat sink strip 13A. In some examples, the device encapsulant 14 may be provided by transfer molding, which may avoid or reduce the occurrence of deformation or damage to the component interconnects 111.

[0074] In various examples, the device encapsulant 14 may include or be referred to as a body or a molding. For example, the device encapsulant 14 may include an epoxy molding compound (EMC), a filler-reinforced polymer, a B-staged pressed film, or a gel. In some examples, the device encapsulant 14 may contact the first side 112 and the lateral side 114 of the electronic component 11, the component interconnect 111, the inner side 123 of the substrate 12, the inner side of the heat sink 131 (i.e., the side of the heat sink 131 that is oriented toward the electronic component 11), a portion of the lateral side of the heat sink 131, or the inner side of the molding compound 132 (i.e., the side of the molding compound 132 that is oriented toward the electronic component 11). Surface treatment may increase the roughness of the inner side of the heat sink 131. The roughened surface may improve the bonding of the device encapsulant 14 to the heat sink 131. After providing the device encapsulant 14, the top mold groove 2 and the bottom mold groove 1 may be separated. The thickness of the device encapsulant 14 may be in a range of about 100 μm to about 1000 μm. The device encapsulant 14 may protect the electronic components 11 from external elements and other environmental factors. Figures 2A-2C Molded heat sink strip 13A is shown in bottom mold recess 1 and substrate 12 in top mold recess 2 , but it is contemplated and understood that in some examples, molded substrate strip 13A may be located in top mold recess 2 and substrate 12 in bottom mold recess 1 .

[0075] Figure 2D A cross-sectional view of the electronic device 10 is shown in a post-manufacturing stage. Figure 2DIn the example shown in , the encapsulated electronic component 11 and the molded substrate strip 13A can be removed from the mold recesses 1 and 2, and an external interconnect 15 can be provided on the outer side 124 of the substrate 12. The external interconnect 15 can be coupled to the substrate external terminal 121o. In some examples, the external interconnect 15 may include tin (Sn), silver (Ag), lead (Pb), copper (Cu), Sn-Pb, Sn37-Pb, Sn95-Pb, Sn-Pb-Ag, Sn-Cu, Sn-Ag, Sn-Au, Sn-Bi, or Sn-Ag-Cu. For example, the external interconnect 15 can be provided by a reflow process after a conductive material including solder is formed on the substrate external terminal 121o by a ball drop process. The external interconnect 15 may include or be referred to as a conductive ball such as a solder ball, a conductive pillar such as a κ pillar, a conductive pillar with a solder cap provided on the κ pillar, a bump, or a pad. In some examples, the size of the external interconnect 15 may be in the range of about 25 μm to about 500 μm. In some examples, the external interconnect 15 may be referred to as an external input / output terminal of the electronic device 10. In some examples, the electronic device 10 may be a land grid array package (LGA), in which the substrate external terminal 121o serves as an external input / output terminal without the external interconnect 15.

[0076] In various examples, after providing the external interconnect 15, the substrate 12, the mold compound 132 of the molded heat sink 13, and the device encapsulant 14 may be sawed to separate the strip-type electronic devices 10 into individual electronic devices 10. The sawing process of separating each of the electronic devices 10 may be referred to as a singulation process. For example, a diamond wheel, a laser beam, or an etching process may be used to separate the substrate 12, the mold compound 132, and the device encapsulant 14 into individual electronic devices 10. In some examples, during singulation, sawing is performed through the dielectric structure 122 of the substrate 12, the device encapsulant 14, the mold compound 132 of the molded heat sink 13, and the tie bars of the molded heat sink 13, as discussed in further detail below. In some examples, the tie bars of the molded heat sink 13 may be the only conductive (e.g., metal) structures through which sawing is performed. In some examples, sawing may also expose portions of the conductive structure 121 at the lateral sides of the substrate 12. Reducing the volume of metal structures, and in particular heat sink material, that are sawed during singulation tends to prevent or reduce the generation of conductive foreign matter and can reduce wear on sawing equipment. Molding the heat sink 131 allows the heat sink 131 to be handled as a panel or strip during placement in the bottom mold recess 1. In some examples, the singulation process can eliminate tie bars of the molded heat sink 13.

[0077] In various examples, the electronic device 10 may include an electronic component 11, a substrate 12, a molded heat sink 13, a device encapsulation 14, and an external interconnection 15. A heat sink 131 of the molded heat sink 13 may be disposed above the electronic component 11. The heat sink 131 may dissipate heat generated in the electronic component 11 to the outside from the electronic device 10.

[0078] FIG. 3A to FIG. 3F A cross-sectional view of an example method for manufacturing a molded heat sink strip 13A in an electronic device 10 is shown. Figure 3A A cross-sectional view of a molded heat sink strip 13A is shown at an early stage of manufacture. Figure 3A In the example shown in , a heat sink substrate 131s may be provided. In some examples, the heat sink substrate 131s is a substantially flat plate having a first (or upper) side 135 and a second (or lower) side 136, both of which are substantially flat / planar. The heat sink substrate 131s may be in the form of a strip or a panel. In some examples, the heat sink substrate 131s may be made of a material having thermal conductivity, such as a copper alloy (at least one of Ni, Si, P, and Ti is contained in Cu), an iron-nickel alloy, or a Cu / SUS / Cu clad metal. The thickness of the heat sink substrate 131s may be in the range of about 100 μm (micrometer) to about 381 μm.

[0079] Figure 3B A cross-sectional view of the molded heat sink strip 13A is shown at a later stage of manufacture. Figure 3BIn the example shown in , a portion of the heat sink substrate 131s may be removed from the second side 136 to leave a cavity 131a defined by the lateral side (or sidewall) 137 of the heat sink 131. The cavity 131a may have a rectangular or square ring shape in a plane, and may surround a protruding portion of each heat sink 131 (the protruding portion may include the lateral side 137 and the second side 136). The cavity 131a may partially extend through each heat sink 131 so that a portion of the heat sink 131 remains between the floor of the cavity 131a and the first side 135. In some examples, the cavity 131a may be formed by etching. For example, a mask pattern may be provided on the second side 136 of the heat sink substrate 131s, and the cavity 131a may be provided by etching through the portion of the second side 136 exposed from the mask pattern to remove a certain volume of the heat sink substrate 131s from the exposed portion of the second side 136. For example, a photoresist may be used as the mask pattern. In some examples, the depth of cavity 131a may be about half the thickness of heat sink substrate 131s. In some examples, the depth of cavity 131a may be greater than half the thickness of heat sink substrate 131s. The depth of cavity 131a may be in the range of about 50 μm to about 127 μm. The width W1 of cavity 131a may be in the range of about 425 μm to about 500 μm. As used herein with reference to a length, the term approximately may mean + / -5%, + / -10%, + / -15%, + / -20%, or + / -25%.

[0080] Figure 3C A cross-sectional view of the molded heat sink strip 13A is shown at a later stage of manufacture. Figure 3C In the example shown in , the mold compound 132 can be disposed in the cavity 131a of the heat sink 131. In some examples, the mold compound 132 can fill the cavity 131a. The mold compound 132 can be disposed around the lateral side 137 of the heat sink 131. In some examples, the mold compound 132 can cover the second side 136 of the heat sink 131. The portion of the mold compound 132 covering the second side 136 can be removed by grinding. In some examples, the second side 136 can also be ground during the grinding of the mold compound 132 (in this regard, Figure 3C According to various examples, the lower (or first) side of the mold compound 132 and the second side 136 of the heat sink 131 may be coplanar.

[0081] In some examples, the molding compound 132 may include or be referred to as a dielectric material, a dielectric layer, an insulating layer, a protective layer, or an encapsulant. In some cases, the molding compound 132 may include or be referred to as a pre-molded or preformed mold. In some examples, the molding compound 132 may be made of an epoxy molding compound (EMC), a resin, a filler-reinforced polymer, a B-stage pressed film, or a gel. In some examples, the molding compound 132 may be provided in any of a variety of ways. For example, the molding compound 132 may be provided by compression molding, transfer molding, liquid encapsulant molding, vacuum lamination, paste printing, screen printing, or film-assisted molding.

[0082] When viewed in a plan view, the mold compound 132 may have a rectangular or square ring shape around the perimeter of the second side 136. The thickness of the mold compound 132 may be less than the thickness of the heat sink 131. In some examples, the thickness of the mold compound 132 may be equal to or greater than half the thickness of the heat sink 131.

[0083] Figure 3D A cross-sectional view of the molded heat sink strip 13A is shown at a later stage of manufacture. Figure 3D In the example shown in , a cavity 131b is defined in the first side 135. According to various examples, the cavity 131b can be provided by removing a portion of the heat sink substrate 131s from the first side 135. The cavity 131b can be defined by the sidewalls (or lateral sides) 138 of the heat sink 131 and the upper side of the mold compound 132 between adjacent heat sinks 131. In some examples, the width W2 of the cavity 131b can be smaller than the width W1 of the mold compound 132 in the cavity 131a ( Figure 3B ). The molding compound 132 may be exposed from the heat sink 131 through the cavity 131b. In some instances, the width W2 of the cavity 131b may be in a range of about 100 μm to about 125 μm. In some instances, the depth of the cavity 131b may be about half the thickness of the heat sink 131, and may be in a range of about 50 μm to about 127 μm. In some instances, the inner area (or "coverage area") of the first side 135 may be determined based on the size of the electronic component 11 and the substrate 12. For example, the area of ​​the first side 135 may be equal to or greater than the area (or coverage area) of the first side 112 of the electronic component 11, and equal to or less than the area of ​​the inner side 123 of the substrate 12, temporarily referring to Figure 2D In some examples, the area of ​​the first side 135 of the heat sink 131 can be in a range of about 0.1 mm×0.1 mm to about 500 mm×500 mm.

[0084] In various examples, the techniques used to form cavity 131b can be similar or the same as the techniques used to form cavity 131a.

[0085] Brief reference Figure 4 and Figure 4A , shows a plan view of a portion of a heat sink strip 13A according to various examples. Figure 4A Show in more detail Figure 4 Zone A. Figure 4 and 4A In the example shown in FIG. 1 , region R1 of heat spreader strip 13A includes a region where mold compound 132 is formed by ( Figure 3D Region R2 of heat sink strip 13A includes the area where heat sink 131 is located above (eg, vertically overlaps) mold compound 132. For clarity only, in Figure 4 and 4A , region R2 is shown as having a different cross-hashing than other portions of the first side 135 of the heat sink 131. Region R2 can include a shelf or ledge portion 139 of the heat sink 131. The ledge portion 139 of the heat sink 131 can be disposed above (e.g., vertically overlapping) the mold compound 132 (also in FIG. Figure 3D Depicted in cross section). Return to Figure 3D , the ledge portion 139 may include a sidewall 138 and may define at least a portion of the cavity 131b. The lower side of the ledge portion 139 opposite the first side 135 of the heat sink 131 (ie, oriented away from the first side) may define a portion of the floor of the cavity 131a.

[0086] Return to Figure 4 and Figure 4A In some examples, the heat sink 131 may include tie bars 134. Tie bars 134 may connect adjacent heat sinks 131 to each other. Tie bars 134 may extend between ledge portions 139 of adjacent heat sinks 131 and be connected to the ledge portions. Tie bars 134 may be integrally formed with the heat sink 131. Tie bars 134 may be located above the mold compound 132 and may be included in region R2. In various examples, each of the heat sinks 131 includes at least one tie bar 134 on each lateral side. In some examples, there are at least two tie bars 134 extending from each lateral side (e.g., sidewall 138) of the heat sink 131. Tie bars 134 may prevent or reduce displacement of the heat sink during application of the mold compound 132. Tie bars 134 may also reinforce the molded heat sink strip 13A to prevent or reduce deformation of the molded heat sink strip 13A, which may occur in the manufacturing process, for example, due to handling, or in the device encapsulation 14 ( Figure 2C ) occurs during deposition of , as previously described.

[0087] Figure 3E A molded heat sink strip 13A is shown at a post-manufacturing stage according to various examples. Figure 3EIn the example shown in , the plating layer 133 may be disposed on the second side 136 of the heat sink 131. The plating layer 133 may contact and thermally couple to the second side 136 of the heat sink 131. The plating layer 133 may be provided to prevent or reduce the occurrence of surface oxidation or damage to the second side 136 of the heat sink 131. The plating layer 133 may facilitate surface mounting. In some examples, the plating layer 133 may be provided by plating. The plating layer 133 may include tin, nickel, palladium, gold, or silver. The thickness of the plating layer 133 may be in the range of about 1 μm to about 10 μm.

[0088] Figure 3F A cross-sectional view of the molded heat sink strip 13A is shown at a later stage of manufacture. Figure 3F In the example shown in , the first side 135 of the heat sink 131 may be subjected to a surface treatment to change the characteristics of the first side 135. The surface treatment may increase the roughness of the mating surface of the first side 135 of the heat sink 131. In some examples, the surface treatment may include providing a photoresist pattern on the first side 135 of the heat sink 131, removing portions of the heat sink 131 by etching portions of the first side 135 exposed from the photoresist, thereby making the surface of the first side 135 uneven, rough, or non-planar. For example, after the surface treatment, the first side 135 may include a plurality of pits or grooves. In some examples, the surface treatment may include plating a material on the first side 135 so that the plated material produces an uneven surface on the first side 135. It should be understood that the uneven or roughened surface of the first side 135 may have a fine pattern that is not visible to the naked eye. Roughening the first side 135 tends to increase the contact between the heat sink 131 and the device encapsulation 14 ( Figure 1 ) between the heat sink 131, thereby reducing or preventing the device package from separating from the heat sink 131. Figure 3E and 3F The plating layer 133 is depicted as being provided prior to surface treating the first side 135 , but it is contemplated and understood that in various examples, the plating layer 133 may be provided on the second side 136 after surface treating the first side 135 .

[0089] In various examples, the molded heat sink strip 13A may include a heat sink 131 in the form of a strip and a mold compound 132. In some examples, the molded heat sink strip 13A may include a plating layer 133. The molded heat sink strip 13A may be flipped so that a second side 136 having the plating layer 133 may be aligned with the bottom mold groove 1 ( Figure 2A ) contacts and is placed on the bottom mold groove. Figure 2A, the bottom mold recess 1 may include a flat bottom surface and side walls extending upward from the edge of the bottom surface. The bottom mold recess 1 may include a cavity 1a defined by the bottom surface and the side walls of the bottom mold recess 1. In some examples, the molded heat sink strip 13A may be picked up by a pick-and-place device and placed in the cavity 1a of the bottom mold recess 1. The side walls of the molded heat sink strip 13A may contact or be close to the inner side of the side walls of the bottom mold recess 1 defining the cavity 1a.

[0090] Figure 5 A cross-sectional view of an example electronic device 20 is shown according to various examples. Figure 5 In the example shown in , electronic device 20 may include electronic component 11 , substrate 12 , molded heat sink 13 , device encapsulant 24 , and external interconnects 15 .

[0091] According to various examples, the electronic device 20 may be similar to the electronic device 10. For example, the electronic device 20 may be similar or identical to the electronic device 10 in terms of the electronic component 11, the substrate 12, the heat sink 13, and the external interconnect 15. In the electronic device 20, the width of the lower portion 241 of the device encapsulant 24 may be greater than the width of the upper portion 242 of the device encapsulant 24. The upper portion 242 of the device encapsulant 24 may surround or contact the lateral side 138 of the heat sink 131. The larger width of the lower portion 241 may create a step on the sidewall of the device encapsulant 24. The width of the lower portion 241 may be equal to the width of the substrate 12. In various examples, the lateral sides of the mold compound 132 may be coplanar with the lateral sides of the upper portion 242 of the device encapsulant 24.

[0092] In some examples, steps along the sidewalls of the device encapsulant 24 may be formed during singulation. For example, during a first sawing or singulation process, the electronic device 20 may be sawn by cutting through the mold compound 132 in a downward direction and partially through the device encapsulant 24. In a second sawing or singulation process, the device encapsulant 24 and the remaining portion of the substrate 12 may be cut in a downward direction. The width of the cut or groove (i.e., the sawing area) produced by the first sawing process may be greater than the width of the cut or groove (i.e., the sawing area) produced by the second sawing process.

[0093] Figure 5A A cross-sectional view of an example electronic device 25 is shown according to various examples. Figure 5A In the example shown in , electronic device 25 may include electronic component 11 , substrate 12 , molded heat sink 13 , device encapsulant 14 , and external interconnects 15 .

[0094] According to various examples, electronic device 25 may be similar to electronic device 10. For example, electronic device 20 may be similar or identical to electronic device 10 in terms of electronic component 11, substrate 12, heat sink 13, and external interconnect 15. In electronic device 25, tie bar 134 may be removed from heat sink 131 during singulation. Figure 4A ), and the sidewall of the device encapsulation 14 may be coplanar with the sidewall 138 of the heat sink 131.

[0095] Figure 6 A cross-sectional view of an example electronic device 30 is shown. Figure 6 In the example shown in , electronic device 30 may include electronic component 11, substrate 12, molded heat sink 33, device encapsulant 14, and external interconnect 15. Electronic device 30 may be similar to electronic device 10. For example, electronic device 30 may be similar or identical to electronic device 10 in terms of electronic component 11, substrate 12, device encapsulant 14, and external interconnect 15. Electronic device 30 may include molded heat sink 33. Molded heat sink 33 may include heat sink 331 and mold compound 332. Heat sink 331 and mold compound 332 may have similar or identical thicknesses (e.g., the thickness of heat sink 331 may be approximately equal to the thickness of mold compound 332). As used herein to describe the relative thickness of two components, the term "approximately equal" may mean that the thickness is the same, or that the thickness of the thinner component is within 1%, within 2%, within 3%, within 4%, or within 5% of the thickness of the thicker component. The undersides of the mold compound 332 and the heat sink 331 may be coplanar, and the upper sides of the mold compound 332 and the heat sink 331 may be coplanar.

[0096] 7A to 7E An example method for manufacturing electronic device 30 is shown. Fig. 7A A cross-sectional view of an electronic device 30 is shown at an early stage of manufacture. Fig. 7A In the example shown in , the heat sink 331 may be disposed on the upper side of the carrier 3. In various examples, the carrier 3 may be a substantially planar plate. In some examples, the carrier 3 may include or be referred to as a plate, a single plate, a wafer, a panel, or a strip. The carrier 3 may be made of, for example, steel, stainless steel, aluminum, copper, ceramic, glass, or a wafer material (e.g., Si). In some examples, the thickness of the carrier 3 may be in the range of about 300 μm to about 2000 μm, and the width of the carrier 3 may be in the range of about 100 mm to about 1000 mm. The carrier 3 may be used to implement and support the processing of multiple components during the process of providing the heat sink 331.

[0097] In some examples, the carrier 3 may include a temporary bonding layer 3A disposed on the upper side of the carrier 3, and the heat sink 331 may be disposed on the upper side of the temporary bonding layer 3A. The temporary bonding layer 3A may include or may be referred to as a temporary adhesive film, a temporary adhesive tape, or a temporary adhesive coating. For example, the temporary bonding layer 3A may be a thermal release tape (film) or an optical release tape (film), wherein the adhesive strength is weakened or removed by heat or light, respectively. In some examples, the adhesive strength of the temporary bonding layer 3A may be weakened or removed by physical and / or chemical forces. Before the molded heat sink 33 is placed in the bottom mold groove 1, the temporary bonding layer 3A may be separated from the carrier 3, thereby separating the molded heat sink 33 from the carrier 3, as described in further detail below.

[0098] In various examples, the heat sink 331 can be coupled to the upper side of the carrier 3. In some examples, the heat sinks 331 are discrete from each other and can be spaced apart in rows, columns, grids, or arrays above the carrier 3. For example, the heat sink 331 can be picked up by a pick-and-place device and coupled to the upper side of the carrier 3 through a temporary bonding layer. In some examples, adjacent heat sinks 331 can be similar to Figure 4 and 4A The heat sink 131 in the embodiment of the present invention is coupled together via tie rods and can be coupled to the carrier 3 as a single integrated component.

[0099] Figure 7B A cross-sectional view of an electronic device 30 is shown at a later stage of manufacturing. Figure 7B In the example shown in , the mold compound 332 may be disposed above the upper side of the carrier 3 and around the heat sink 331. In some examples, the mold compound 332 may be disposed above the upper side of the heat sink 331. Then, any portion of the mold compound 332 above the heat sink 331 may be removed by grinding (in some examples, a portion of the upper side of the heat sink 331 may also be removed during grinding). The upper side of the heat sink 331 and the upper side of the mold compound 332 may be coplanar. According to various examples, the elements, features, materials, or manufacturing methods of the mold compound 332 may be similar or identical to the elements, features, materials, or manufacturing methods of the mold compound 132. The height of the mold compound 332 and the height of the heat sink 331 may be approximately equal. In some examples, the height of the mold compound 332 and the height of the heat sink 331 may be in the range of about 10μm to about 1000μm.

[0100] Figure 7C A cross-sectional view of an electronic device 30 is shown at a later stage of manufacturing. Figure 7CIn the example shown in , the molded heat sink 33 may be placed in the bottom mold recess 1. After being separated from the carrier 3, the molded heat sink 33 may be placed in the cavity 1a of the bottom mold recess 1. In some examples, the side of the heat sink 331 that is oriented toward the bottom plate of the bottom mold recess 1 may include a plating layer, which is similar to the plating layer 133 of the electronic device 10. In some examples, similar to the first side 135 of the heat sink 131 in the semiconductor device 10, the side of the heat sink 331 that is oriented away from the bottom plate of the bottom mold recess 1 may be roughened (e.g., may be subjected to a surface treatment).

[0101] Fig.7D A cross-sectional view of an electronic device 30 is shown at a post-manufacturing stage according to various examples. Fig.7D In the example of , the top mold groove 2 can hold the substrate 12 and the electronic component 11 placed in the cavity 2a. The top mold groove 2 that accommodates the substrate 12 and the electronic component 11 can be aligned above the bottom mold groove 1 so that the first side 112 of the electronic component 11 is vertically aligned with the heat sink 331. The area (or coverage area) of the heat sink 331 can be selected based on the size of the electronic component 11 and the substrate 12. For example, the area (or coverage area) of the heat sink 331 can be greater than or equal to the area (or coverage area) of the electronic component 11 and less than the area (or coverage area) of the substrate 12. In some examples, the area of ​​the heat sink 331 can be in the range of about 0.1 mm×0.1 mm to about 500 mm×500 mm.

[0102] The alignment of the top mold recess 2 over the bottom mold recess 1 may be similar or identical to the alignment of the bottom mold recess 1 and the top mold recess 2 of the electronic device 10. The top mold recess 2, substrate 12, and electronic component 11 of the electronic device 30 may have elements, features, materials, or manufacturing methods similar or identical to those of the top mold recess 2, substrate 12, and electronic component 11 of the electronic device 10.

[0103] Fig. 7E A cross-sectional view of an electronic device 30 is shown at a post-manufacturing stage according to various examples. Fig. 7E In the example shown in , the device encapsulant 14 may be disposed between the substrate 12 and the molded heat sink 33 and between the electronic component 11 and the molded heat sink 33. The device encapsulant 14 may be provided to fill the open space in the cavity 1a of the bottom mold recess 1 and in the cavity 2a of the top mold recess 2. According to various examples, the elements, features, materials, or manufacturing methods of the device encapsulant 14 may be similar or identical to those of the device encapsulant 14 of the electronic device 10.

[0104] Figure 7FA cross-sectional view of an electronic device 30 is shown at a post-manufacturing stage according to various examples. Figure 7F In the example shown in FIG. 1 , the external interconnect 15 may be disposed on the substrate external terminal 121o of the substrate 12. The external interconnect 15 may have elements, features, materials, or manufacturing methods similar to or the same as those of the external interconnect 15 of the electronic device 10.

[0105] After providing the external interconnect 15, the substrate 12, the mold compound 332 of the molded heat sink 33, and the device encapsulant 14 may be sawed to separate the strip-type electronic device 30 into individual electronic devices 30. For example, the substrate 12, the mold compound 332, and the device encapsulant 14 may be separated into individual electronic devices 30 by singulation using a diamond wheel, a laser beam, or an etching process. In some examples, the above-described method may be performed. Figure 5 The two-step singulation described for the electronic device 20 in FIG. 1 and the device package may include stepped lateral sides similar or identical to the device package 24 of the electronic device 20 .

[0106] Figure 8 A cross-sectional view of an example electronic device 40 is shown according to various examples. Figure 8 In the example shown in , the electronic device 40 may include an electronic component 11 , a substrate 12 , a heat sink 43 , a device encapsulant 44 , an external interconnect 15 , a cavity insert 46 , and an internal interconnect 47 .

[0107] The electronic device 40 may be similar to the electronic device 10. For example, the electronic device 40 may be similar or identical to the electronic device 10 in terms of the electronic component 11, the substrate 12, and the external interconnect 15. The electronic device 40 may include a heat sink 43, a device encapsulation 44, a cavity insert 46, and an internal interconnect 47. The cavity insert 46 may include an insert conductive structure 461 and an insert dielectric structure 462. The cavity insert 46 may include a cavity 463. The insert conductive structure 461 may include an inner terminal 461i and an outer terminal 461o. The internal interconnect 47 may be coupled to the inner terminal 461i of the cavity insert 46 and the inner terminal 121i of the substrate 12.

[0108] 9A to 9E A cross-sectional view of an example method for manufacturing an example electronic device 40 is shown. Fig. 9A A cross-sectional view of an electronic device 40 is shown at an early stage of manufacture according to various examples. Fig. 9A In the example shown in , the cavity insert 46 may be arranged on the upper side of the carrier 3. In some examples, the carrier 3 may include a temporary bonding layer 3A, as previously described.

[0109] In various examples, the cavity insert 46 may include and define a cavity 463 extending through the cavity insert 46. For example, the cavity 463 may extend from a first (or inner) side 464 of the cavity insert 46 to a second (or outer) side 465 of the cavity insert 46. In some examples, the cavity 463 may include or be referred to as an opening or an orifice. The cavity insert 46 may include an insert conductive structure 461 and an insert dielectric structure 462. The insert conductive structure 461 may include an inner terminal 461i located at an inner side 464 of the cavity insert 46 and an outer terminal 461o located at an outer side 465 of the cavity insert 46. According to various embodiments, the elements, features, materials, or manufacturing methods of the insert conductive structure 461 may be similar or identical to the elements, features, materials, or manufacturing methods of the conductive structure 121 of the substrate 12 as previously described. Similarly, the elements, features, materials, or manufacturing methods of the insert dielectric structure 462 can be similar or identical to the elements, features, materials, or manufacturing methods of the dielectric structure 122 of the substrate 12 as previously described. In some examples, the cavity insert 46 can be formed (e.g., deposited) on the carrier 3. In other examples, the cavity insert 46 can be formed separately from the carrier 3 and can be positioned on the carrier 3 using, for example, a pick-and-place device. In some examples, the cavity insert 46 can have a thickness of approximately 0.2 mm to 4 mm.

[0110] Fig. 9B A cross-sectional view of an electronic device 40 is shown at a post-manufacturing stage according to various embodiments. Fig. 9B In the example shown in , the heat sink 43 may be disposed in the cavity 463 of the cavity insert 46. The heat sink 43 may be a substantially planar plate. The outer side of the heat sink 43 may be coupled to the carrier 3 via a temporary bonding layer 3A. The area (or coverage area) of the heat sink 43 may be smaller than the area of ​​the cavity 463. The sidewalls of the heat sink 43 may be spaced apart from the sidewalls of the cavity insert 46 that define the cavity 463. The sidewalls may also be referred to herein as lateral sides. In various examples, the elements, features, materials, or manufacturing methods of the heat sink 43 may be similar or identical to the elements, features, materials, or manufacturing methods of the heat sink 331.

[0111] Fig. 9C A cross-sectional view of an electronic device 40 is shown at a post-manufacturing stage according to various examples. Fig. 9C In the example shown in , the substrate 12 having the electronic component 11 coupled to the inner side 123 can be disposed over the cavity insert 46 and the heat sink 43. In various examples, the substrate 12 and the electronic component 11 can have elements, features, materials, or manufacturing methods that are similar or identical to those of the substrate 12 and the electronic component 11 of the electronic device 10, respectively.

[0112] The internal interconnect 47 may be coupled to the inner terminal 121i of the substrate 12. The internal interconnect 47 may be aligned with and coupled to the inner terminal 461i of the cavity insert 46. The internal interconnect 47 may couple the conductive structure 121 of the substrate 12 to the insert conductive structure 461 of the cavity insert 46. The internal interconnect 47 may be spaced apart from the sidewall of the electronic component 11. According to various examples, the internal interconnect 47 may include a column, a pillar, a vertical wire, a bump, or a metal core ball coated with solder. In some examples, the internal interconnect 47 may be provided by ball dropping, electroplating, electroless plating, sputtering, physical vapor deposition (PVD), chemical vapor deposition (CVD), metal organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), low pressure chemical vapor deposition (LPCVD), or plasma enhanced chemical vapor deposition (PECVD). In some examples, the internal interconnect 47 may be made of solder, copper, gold, silver, palladium, or nickel. In some examples, the thickness (or height) of internal interconnect 47 may be from about 0.3 mm to about 3 mm.

[0113] According to various examples, the electronic component 11 may be located above the upper (or inner) side of the heat sink 43. For example, the electronic component 11 may overlap the heat sink 43 vertically. In some examples, the area of ​​the heat sink 43 may be determined according to the size of the electronic component 11 and the substrate 12. For example, the area of ​​the heat sink 331 may be greater than or equal to the area of ​​the electronic component 11 and less than the area of ​​the substrate 12. In some examples, the area of ​​the heat sink 43 may be in the range of about 0.1 mm×0.1 mm to about 500 mm×500 mm. In some examples, the side of the heat sink 43 that is oriented away from the electronic component 11 may include a plating layer, which is similar to the plating layer 133 of the electronic device 10. In some examples, similar to the first side 135 of the heat sink 131 in the semiconductor device 10, the side of the heat sink 43 that is oriented toward the electronic component 11 may be roughened (e.g., may be subjected to surface treatment).

[0114] Fig.9D A cross-sectional view of an electronic device 40 is shown at a post-manufacturing stage according to various examples. Fig.9D In the example shown in , the device encapsulant 44 may be disposed between the substrate 12 and the carrier 3. The device encapsulant 44 may be in contact with the inner side 123 of the substrate 12, the sidewalls of the internal interconnect 47, the inner side 464 of the cavity insert 46, the sidewalls of the cavity insert 46 defining the cavity 463, the inner side and sidewalls of the heat sink 43, and the upper side of the carrier 3 (or the temporary bonding layer 3A). In some examples, the elements, features, materials, or manufacturing methods of the device encapsulant 44 may be similar or identical to those of the device encapsulant 14 of the electronic device 10. For example, the device encapsulant 44 may be provided by transfer molding.

[0115] Fig.9E A cross-sectional view of an electronic device 40 is shown at a post-manufacturing stage according to various examples. Fig.9E In the example shown in FIG. 1 , the external interconnect 15 may be disposed on the external terminal 121o of the substrate 12. The external interconnect 15 may have elements, features, materials, or manufacturing methods similar to or the same as those of the external interconnect 15 of the electronic device 10.

[0116] Before providing the external interconnect 15, the carrier 3 may be removed from the heat sink 43 and the cavity insert 46. In some examples, after removing the carrier 3, a plating layer may be provided to the outside of the heat sink 43. After providing the external interconnect 15, a singulation process may be performed. For example, during singulation, the device encapsulant 44, the substrate 12, or the cavity insert 46 may be sawed to provide individual electronic devices 40.

[0117] Fig.10 A cross-sectional view of an example electronic device 50 is shown according to various examples. Fig.10 In the example shown in , the electronic device 50 may include an electronic component 51 , a substrate 12 , a heat sink 43 , a device encapsulant 44 , an external interconnect 15 , a cavity insert 46 , and an internal interconnect 47 .

[0118] In various examples, electronic device 50 can be similar to electronic device 40. For example, electronic device 50 can be similar or identical to electronic device 40 in terms of substrate 12, heat sink 43, device encapsulation 44, external interconnect 15, cavity insert 46, and internal interconnect 47. Electronic device 50 can include electronic component 51.

[0119] In various examples, the electronic component 51 may include a component interconnect 511 and a bottom filler 512. The side 513 of the electronic component 51 may include or be referred to as an active side, and the opposite side 514 of the electronic component 51 may include or be referred to as an inactive side. The electronic component 51 may include contact pads spaced apart from each other in a row or column direction above the side 513. The component interconnect 511 may be coupled to the contact pads of the electronic component 51. In some examples, the component interconnect 511 may include or be referred to as a bump, a SnPb bump, a lead-free bump, a CuP, a pillar bump, a pillar, or a pillar. In some examples, the component interconnect 511 may be provided on the contact pads of the electronic component 51 by electroplating, electroless plating, sputtering, deposition (e.g., PVD, CVD, MOCVD, ALD, LPCVD, or PECVD).

[0120] In some examples, the electronic component 51 may be positioned on the inner side 123 of the substrate 12 using a pick-and-place device. The component interconnects 511 of the electronic component 51 may be positioned over the inner terminals 121i of the substrate 12. Subsequently, the component interconnects 511 of the electronic component 51 may be coupled to the inner terminals 121i of the substrate 12 by a reflow process or a thermal compression bonding process. The electronic component 51 may be electrically coupled to the conductive structure 121 of the substrate 12 through the component interconnects 511. In some examples, the overall thickness of the electronic component 51 may be in the range of about 0.3 mm to about 9 mm, and the area of ​​the electronic component 51 may be in the range of about 0.5 mm×0.5 mm to about 70 mm×70 mm.

[0121] In various examples, the bottom filler 512 may be disposed between the electronic component 51 and the substrate 12. The bottom filler 512 may contact the side 513 of the electronic component 51 and the inner side 123 of the substrate 12. In some examples, the bottom filler 512 may contact the component interconnect 511 of the electronic component 51. The bottom filler 512 may include or be referred to as a dielectric layer or a non-conductive paste, and may not contain an inorganic filler. In some examples, the bottom filler 512 may include or be referred to as a capillary bottom filler (CUF), a non-conductive paste (NCP), a non-conductive film (NCF), an anisotropic conductive film (ACF), or an anisotropic conductive paste (ACP). In some examples, the device encapsulant 44 may include a molded underfill (MUF), so that the underfill 512 may be considered as a part of the device encapsulant 44 (e.g., the device encapsulant 44 may be located between the side 513 of the electronic component 51 and the inner side 123 of the substrate 12, or may contact the side 513 of the electronic component 51, the inner side 123 of the substrate 12, or the component interconnect 511). In some examples, the underfill 512 may be cured after being inserted between the electronic component 51 and the substrate 12. The underfill 512 may prevent the electronic component 51 from being separated from the substrate 12 due to physical and chemical influences.

[0122] The molded heat sink strip may be manufactured and used as described above. The molded heat sink may be in the form of a strip including rows, columns, grids, or arrays of heat sinks coupled to each other. The molding compound may couple adjacent heat sinks to each other. The tie bars may couple adjacent heat sinks to each other. The molding compound and tie bars may define singulation lines. The molding compound and tie bars coupling adjacent heat sinks tend to maintain the flatness of the molded heat sink strip during processing steps. Cutting along the singulation lines tends to reduce the generation of burrs, flaking, or other artifacts caused by cutting hard materials such as metals.

[0123] The present disclosure includes reference to certain examples; however, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the present disclosure. In addition, modifications may be made to the disclosed examples without departing from the scope of the present disclosure. Therefore, it is intended that the present disclosure is not limited to the disclosed examples, but that the present disclosure will include all examples that fall within the scope of the appended claims.

Claims

1. An electronic device, characterized in that: include: substrate; an electronic component disposed over the substrate; an encapsulant disposed over the substrate and the electronic component; a molded heat sink disposed over the encapsulant, wherein the molded heat sink comprises: heat sink; as well as A molding compound is disposed around lateral sides of the heat spreader, wherein the lateral sides of the molding compound are coplanar with lateral sides of the encapsulant.

2. The electronic device according to claim 1, characterized in that: The heat sink includes a first side subjected to a surface treatment to increase roughness, wherein the first side is oriented toward the encapsulant.

3. The electronic device according to claim 2, characterized in that: Further included is a plating layer disposed over a second side of the heat sink opposite the first side.

4. The electronic device according to claim 1, characterized in that: Further including: a bonding pad of the electronic component oriented away from the substrate; as well as A component interconnect couples the bond pad to the substrate.

5. The electronic device according to claim 1, characterized in that: The molding compound is disposed over a portion of the heat sink, around the lateral sides of the heat sink, and over the encapsulant.

6. The electronic device according to claim 1, characterized in that: An underside of the heat sink extends below an underside of the molding compound.

7. The electronic device according to claim 1, characterized in that: The substrate includes a redistribution layer (RDL) substrate.

8. The electronic device according to claim 1, characterized in that: The lateral side of the encapsulant includes a step, wherein a first portion of the lateral side of the encapsulant is coplanar with the lateral side of the mold compound, wherein a second portion of the lateral side of the encapsulant protrudes from the first portion.

9. The electronic device according to claim 1, characterized in that: The lateral side of the heat sink includes a step.

10. An electronic device, characterized in that: include: substrate; an electronic component disposed over the substrate; an insert disposed over the substrate and defining a cavity; a heat sink disposed above the electronic component and within the cavity defined by the insert; as well as An encapsulant is disposed between the heat sink and the electronic component and between the heat sink and the interposer.

11. The electronic device according to claim 10, characterized in that: Further including: a bonding pad of the electronic component oriented away from the substrate; as well as A component interconnect couples the bond pad to the substrate.

12. The electronic device according to claim 10, characterized in that: The substrate includes a redistribution layer (RDL) substrate.

13. The electronic device according to claim 10, characterized in that: Further included is an internal interconnect coupling the substrate to the interposer.

14. The electronic device according to claim 10, characterized in that: Further included is a component interconnect disposed between the electronic component and the substrate, wherein the component interconnect couples the electronic component to the substrate.

15. A method for manufacturing an electronic device, characterized in that: include: Provide radiator; providing a molding compound around lateral sides of the heat sink; removing a portion of the heat sink to leave a cavity defined by the lateral sides of the heat sink and an upper side of the molding compound; treating an upper side of the heat sink to increase roughness; providing an electronic component and a substrate over the upper side of the heat sink; as well as An encapsulant is provided between the heat sink and the substrate.

16. The method according to claim 15, characterized in that Further included is providing a plating layer over a lower side of the heat sink opposite the upper side of the heat sink.

17. The method according to claim 15, characterized in that Providing the molding compound around the lateral sides of the heat sink further comprises: removing a portion of the heat sink to define a cavity around the lateral side of the heat sink; providing the molding compound in the cavity; and A portion of the mold compound is removed to make the underside of the heat sink coplanar with the underside of the mold compound.

18. The method according to claim 15, characterized in that Providing the heat sink further includes providing heat sink strips coupled together by tie bars, wherein the tie bars are integrally formed with the heat sink.

19. The method according to claim 18, characterized in that Further comprising cutting through the tie bars and the molding compound to singulate the electronic devices.

20. The method according to claim 19, characterized in that The tie bars and the molding compound define a singulation line between adjacent heat sinks in the heat sink strip.