Linear biasing circuit and radio frequency power amplification circuit

Abstract

The invention provides a linear biasing circuit and a radio frequency power amplification circuit, the linear biasing circuit comprises a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor and a second capacitor, a second end of the first resistor is used as an output end of the linear biasing circuit, and a second end of the second resistor is used as an output end of the second current mirror. The circuit is connected to a radio frequency power amplification circuit. According to the linear bias circuit, the input impedance can be controlled to improve the linear compensation effect, and in addition, after the linear bias circuit is applied to the radio frequency power amplification circuit, the efficiency and the linearity of the radio frequency power amplification circuit under the working power can reach the optimal state.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and in particular to a linear bias circuit and a radio frequency power amplifier circuit. Background Art

[0002] GaAs HBT (Gallium Arsenide Heterojunction Bipolar Transistor) has been widely used in microwave power amplifiers, especially mobile phone power amplifiers, due to its advantages such as high power density and high linearity.

[0003] In a power amplifier based on GaAs HBT design, the design of the static bias point is very important for the performance of the power amplifier: on the one hand, when the input RF power increases, due to the clamping effect of the transistor, the excessive forward voltage and negative current applied to the base-emitter transistor will be limited, resulting in a decrease in the DC voltage of its base-emitter junction and an increase in the collector current, which ultimately leads to a decrease in transconductance, a decrease in gain and phase distortion, which will lead to a deterioration in linearity; on the other hand, since the thermal conductivity of GaAs (gallium arsenide) material itself is very low, and its thermal conductivity will continue to decrease with increasing temperature, at higher temperatures, the self-heating effect of GaAs HBT will lead to a series of problems such as increased transistor junction temperature, decreased emitter junction turn-on voltage and reduced device gain; in addition, due to the decrease in carrier mobility, the parasitic impedance will also increase.

[0004] In order to stabilize the static bias point of the power amplifier and achieve the temperature stabilization effect to a certain extent, the prior art Figure 1 As shown, an active linear bias circuit is provided, which includes a transistor Q1, a transistor Q2, a transistor Q3, a resistor R1, a resistor R2 and a capacitor C1, wherein one end of the resistor R1, i.e., the collector of the transistor, is respectively connected to a voltage VBB; the output end of the active linear bias circuit is connected to a power amplifier, i.e., one end of the resistor R2 serves as the output end of the active linear bias circuit. The power amplifier includes a capacitor Cin and a transistor Q0, wherein a first end of the capacitor Cin is connected to a radio frequency signal RFin, a second end of the capacitor Cin is connected to a base of the transistor Q0, and the output end of the active linear bias circuit is connected to the base of the transistor Q0.

[0005] The capacitance of capacitor C1 in the above active linear bias circuit needs to be set large enough so that almost all RF signals passing through the Y connection point will be bypassed to the ground by capacitor C1, thereby ensuring the voltage stability of the Y connection point. When the input RF signal power increases, part of the RF signal will leak into the bias circuit, and Vbe1 (base-emitter junction DC voltage drop) after rectification by transistor Q1 will decrease, while Vbe0 (base-emitter junction voltage of the transistor in the power amplifier) ​​will increase due to the decrease in Vbe1, thereby compensating Vbe0 and stabilizing the static operating point of the power amplifier. In addition, when the temperature rises, due to the presence of resistor R2, the increased current of transistors Q1 and Q2 can be suppressed to a certain extent, achieving a temperature stabilization effect to a certain extent.

[0006] Although the above active linear bias circuit can stabilize the static bias point of the power amplifier and achieve temperature stabilization to a certain extent, in communication technology, complex modulation signals will have a large PAPR (peak-to-average ratio). For the power amplifier with inherent bias such as the above active linear bias circuit, it will reach the peak efficiency when it is close to saturation, and the linearity of the power amplifier will deteriorate when it is close to saturation. Therefore, the above active linear bias circuit cannot make the efficiency and linearity of the power amplifier reach the optimal state at the working power; in addition, the existence of resistor R2 will increase the input impedance of the active linear bias circuit, which will reduce the linear compensation effect of the bias circuit. Summary of the invention

[0007] In view of the above deficiencies in the prior art, the present invention proposes a linear bias circuit and a radio frequency power amplifier circuit to solve the problem that the active linear bias circuit in the prior art will cause the efficiency and linearity of the power amplifier to fail to reach the optimal state at the operating power, and its input impedance will increase, resulting in a decrease in the linear compensation effect of the bias circuit.

[0008] In order to solve the above technical problems, the present invention adopts the following technical solutions: In a first aspect, the present invention provides a linear bias circuit, which includes a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor and a second capacitor; The negative electrode of the first power supply is grounded; An input terminal of the first current mirror is connected to the positive electrode of the first power supply; The negative electrode of the second power supply is grounded; The first input terminal of the second current mirror is connected to the output terminal of the first current mirror, the second input terminal of the second current mirror is connected to the positive electrode of the second power supply, and the third input terminal of the second current mirror is used to connect to the working voltage; A first end of the first capacitor is connected to the positive electrode of the second power supply, and a second end of the first capacitor is grounded; The first input terminal of the first transistor is connected to the positive electrode of the second power supply, the second input terminal of the first transistor is used to connect to the working voltage, and the output terminal of the first transistor is connected to the output terminal of the second current mirror; The first resistor is connected to the output end of the second current mirror, and the second end of the first resistor serves as the output end of the linear bias circuit and is used to be connected to the radio frequency power amplifier circuit; A first end of the second capacitor is connected to a first end of the first resistor, and a second end of the second capacitor is connected to a second end of the first resistor.

[0009] Preferably, both the first power supply and the second power supply are current sources.

[0010] Preferably, the first transistor is a first triode; the base of the first triode serves as the first input terminal of the first transistor, the collector of the first triode serves as the second input terminal of the first transistor, and the emitter of the first triode serves as the output terminal of the first transistor.

[0011] Preferably, the first current mirror includes a second triode and a third triode; The collector of the second triode serves as the input terminal of the first current mirror, the base of the second triode is connected to the collector of the second triode, and the emitter of the second triode is grounded; The base of the third transistor is connected to the base of the second transistor, the collector of the third transistor serves as the output end of the first current mirror, and the emitter of the third transistor is grounded.

[0012] Preferably, the second current mirror comprises a fourth transistor, a second resistor, a fifth transistor and a sixth transistor; The base of the fourth transistor serves as the first input terminal of the second current mirror, the collector of the fourth transistor serves as the second input terminal of the second current mirror, and the emitter of the fourth transistor is grounded; The first end of the second resistor is connected to the collector of the fourth transistor; The base of the fifth transistor is connected to the second end of the second resistor, the collector of the fifth transistor serves as the third input end of the second current mirror, and the emitter of the fifth transistor is connected to the base of the fourth transistor; The base of the sixth transistor is connected to the base of the fourth transistor, the collector of the sixth transistor serves as the output end of the second current mirror, and the emitter of the sixth transistor is grounded.

[0013] Preferably, the first power source and the second power source are both voltage sources.

[0014] Preferably, the first transistor is a first field effect transistor; the gate of the first field effect transistor serves as the first input terminal of the first transistor, the drain of the first field effect transistor serves as the second input terminal of the first transistor, and the source of the first field effect transistor serves as the output terminal of the first transistor.

[0015] Preferably, the first current mirror includes a second field effect transistor and a third field effect transistor; The drain of the second field effect transistor serves as the input terminal of the first current mirror, the gate of the second field effect transistor is connected to the drain of the second field effect transistor, and the source of the second field effect transistor is grounded; The gate of the third field effect tube is connected to the gate of the second field effect tube, the drain of the third field effect tube serves as the output end of the first current mirror, and the source of the third field effect tube is grounded.

[0016] Preferably, the second current mirror comprises a fourth field effect transistor, a second resistor, a fifth field effect transistor and a sixth field effect transistor; The gate of the fourth field effect transistor serves as the first input terminal of the second current mirror, the drain of the fourth field effect transistor serves as the second input terminal of the second current mirror, and the source of the fourth field effect transistor is grounded; The first end of the second resistor is connected to the drain of the fourth field effect transistor; The gate of the fifth field effect transistor is connected to the second end of the second resistor, the drain of the fifth field effect transistor serves as the third input end of the second current mirror, and the source of the fifth field effect transistor is connected to the gate of the fourth field effect transistor; The gate of the sixth field effect tube is connected to the gate of the fourth field effect tube, the drain of the sixth field effect tube serves as the output end of the second current mirror, and the source of the sixth field effect tube is grounded.

[0017] In a second aspect, the present invention provides a radio frequency power amplifier circuit, which includes an input matching network, a power amplifier, and the linear bias circuit as described above; The input end of the input matching network is used to connect the radio frequency signal; The input end of the power amplifier is connected to the output end of the input matching network, and the output end of the power amplifier is used to output the radio frequency signal after power amplification; The output end of the linear bias circuit is connected to the input end of the power amplifier.

[0018] Compared with the prior art, the linear bias circuit in the present invention designs a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor and a second capacitor, and limits the connection method of each device, so as to control the input impedance of the linear bias circuit to improve its linear compensation effect. In addition, after the linear bias circuit is applied to the radio frequency power amplifier circuit, the efficiency and linearity of the radio frequency power amplifier circuit at the working power can be optimized. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings: Figure 1 A circuit schematic diagram of an active linear bias circuit provided in the prior art after being applied to a power amplifier; Figure 2 A circuit schematic diagram of a linear bias circuit provided in an embodiment of the present invention after being applied to a radio frequency power amplifier circuit. DETAILED DESCRIPTION

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.

[0021] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] Embodiment 1 The embodiment of the present invention provides a linear bias circuit 100, combined with Figure 2 As shown, it includes a first power supply 1, a first current mirror 2, a second power supply 4, a second current mirror 3, a first capacitor Cb1, a first transistor 5, a first resistor Rb1 and a second capacitor Cb2.

[0024] The negative electrode of the first power source 1 is grounded.

[0025] An input terminal of the first current mirror 2 is connected to the positive electrode of the first power supply 1 .

[0026] The negative electrode of the second power supply 4 is grounded.

[0027] The first input terminal of the second current mirror 3 is connected to the output terminal of the first current mirror 2 , the second input terminal of the second current mirror 3 is connected to the positive electrode of the second power supply 4 , and the third input terminal of the second current mirror 3 is used to connect to the working voltage VCC.

[0028] A first end of the first capacitor Cb1 is connected to the positive electrode of the second power supply 4 , and a second end of the first capacitor Cb1 is grounded.

[0029] The first input terminal of the first transistor 5 is connected to the positive electrode of the second power supply 4 , the second input terminal of the first transistor 5 is used to connect to the working voltage VCC, and the output terminal of the first transistor 5 is connected to the output terminal of the second current mirror 3 .

[0030] The first resistor Rb1 is connected to the output end of the second current mirror 3 , and the second end of the first resistor Rb1 serves as the output end of the linear bias circuit 100 , and is used to be connected to the RF power amplifier circuit 200 .

[0031] A first end of the second capacitor Cb2 is connected to a first end of the first resistor Rb1 , and a second end of the second capacitor Cb2 is connected to a second end of the first resistor Rb1 .

[0032] Wherein, the first power source 1 and the second power source 4 are both current sources.

[0033] The first transistor 5 is a first triode HBT1 ; the base of the first triode HBT1 serves as the first input terminal of the first transistor 5 , the collector of the first triode HBT1 serves as the second input terminal of the first transistor 5 , and the emitter of the first triode HBT1 serves as the output terminal of the first transistor 5 .

[0034] The first current mirror 2 includes a second transistor HBT2 and a third transistor HBT3.

[0035] The collector of the second transistor HBT2 serves as the input terminal of the first current mirror 2 , the base of the second transistor HBT2 is connected to the collector of the second transistor HBT2 , and the emitter of the second transistor HBT2 is grounded.

[0036] The base of the third transistor HBT3 is connected to the base of the second transistor HBT2 , the collector of the third transistor HBT3 serves as the output end of the first current mirror 2 , and the emitter of the third transistor HBT3 is grounded.

[0037] The second current mirror 3 includes a fourth transistor HBT4 , a second resistor Rb2 , a fifth transistor HBT5 and a sixth transistor HBT6 .

[0038] The base of the fourth transistor HBT4 serves as the first input terminal of the second current mirror 3, the collector of the fourth transistor HBT4 serves as the second input terminal of the second current mirror 3, and the emitter of the fourth transistor HBT4 is grounded; The resistance value of the second resistor Rb2 is the same as the resistance value of the first resistor Rb1 , and a first end of the second resistor Rb2 is connected to the collector of the fourth transistor HBT4 .

[0039] The base of the fifth transistor HBT5 is connected to the second end of the second resistor Rb2 , the collector of the fifth transistor HBT5 serves as the third input end of the second current mirror 3 , and the emitter of the fifth transistor HBT5 is connected to the base of the fourth transistor HBT4 .

[0040] The base of the sixth transistor HBT6 is connected to the base of the fourth transistor HBT4 , the collector of the sixth transistor HBT6 serves as the output end of the second current mirror 3 , and the emitter of the sixth transistor HBT6 is grounded.

[0041] After the linear bias circuit 100 of this embodiment is applied to the RF power amplifier circuit 200 (such as Figure 2 As shown in FIG. 1 ), the first transistor HBT1 and the bypassed first capacitor Cb1 jointly realize the linearization effect of the linear bias circuit 100; the capacitance value of the first capacitor Cb1 needs to be set large enough so that almost all the RF signals passing through the Y connection point will be bypassed to the ground by the first capacitor Cb1, thereby ensuring the voltage stability of the Y connection point. When the input RF signal power increases, part of the RF signal will leak into the linear bias circuit 100, and the base-emitter DC voltage drop after rectification by the first transistor HBT1 will decrease. At this time, the base-emitter voltage of the seventh transistor HBT7 of the power amplifier 202 of the RF power amplifier circuit 200 will increase accordingly, so that the base-emitter voltage of the seventh transistor HBT7 is compensated to suppress the decrease of the base-emitter voltage under high power; in addition, by designing the second capacitor Cb2 connected in parallel with the first resistor Rb1, more RF energy can be prevented from passing through the first resistor Rb1.

[0042] When the linear bias circuit 100 of this embodiment is applied to the radio frequency power amplifier circuit 200 (such as Figure 2 As shown), ignoring the base current, the following expression can be obtained: Vbe(HBT1)+Vbe(HBT7)+V(Rb1)=Vbe(HBT6)+Vbe(HBT5)+V(Rb2); Wherein, Vbe represents the base-emitter junction voltage of the transistor, and V represents the resistance value of the resistor.

[0043] Since the collector current of the sixth transistor HBT6 is the same as that of the first transistor HBT1, Vbe(HBT1)=Vbe(HBT6). At the same time, a suitable resistance value can be selected so that V(Rb1)=V(Rb2). In this case, Vbe(HBT7)=Vbe(HBT5). The current of the first current source I1 controls the current passing through the second transistor HBT2. Under the action of the first current mirror 2, the current of the second transistor HBT2 is the same as that of the third transistor HBT3. At the same time, the current of the fifth transistor HBT5 is the same as that of the third transistor HBT3. In addition, Vbe( The second current source I2 can indirectly control the current in the seventh transistor HBT7 of the power tube under the limiting condition that Vbe(HBT7)=Vbe(HBT4); the second current source I2 can control the quiescent current of the first transistor HBT1 and the sixth transistor HBT6, and the quiescent current of the first transistor HBT1 determines the impedance of its emitter; for the seventh transistor HBT7, the input impedance of the linear bias circuit 100 is the resistance value of the first resistor Rb1 and the second capacitor Cb2 in parallel plus the impedance of the emitter of the first transistor HBT1, so the second current source I2 can control the input impedance of the linear bias circuit 100.

[0044] Based on the above analysis, it can be known that by selecting the appropriate emitter area of ​​the transistor and the parameters of the first resistor Rb1 and the second capacitor Cb2, the quiescent current of the seventh transistor HBT7 and the impedance control of the linear bias circuit 100 can be achieved, which brings greater flexibility to the design of the RF power amplifier circuit 200. It helps to optimize its efficiency while maintaining a certain linearity.

[0045] In the actual application process of the linear bias circuit 100 in this embodiment: the capacitance of the bypass first capacitor Cb1 needs to be set large enough so that almost all the RF signals passing through the Y connection point will be bypassed to the ground by the first capacitor Cb1, thereby ensuring the voltage stability of the Y connection point and the first transistor HBT1 can play the best linearization effect; select a suitable resistance value so that V(Rb1)=V(Rb2), then the first current source I1 can control the static current in the seventh transistor HBT7, and during the operation of the RF power amplifier circuit 200, as the input power increases, the current of the first current source I1 can be dynamically adjusted, so that the RF power amplifier circuit 200 achieves the best efficiency and linearity; the current of the second current source I2 can also be dynamically adjusted, thereby adjusting the emitter impedance of the first transistor HBT1, and then controlling the input impedance of the entire linear bias circuit 100, bringing greater flexibility to the design of the RF power amplifier circuit 200, helping to optimize the efficiency of the RF power amplifier circuit 200 while maintaining a certain linearity.

[0046] The effect of the linear bias circuit 100 in this embodiment can be summarized as controllable impedance. By connecting the first resistor Rb1 and the second capacitor Cb2 in parallel, the linearization effect of the linear bias circuit 100 on the RF power amplifier circuit 200 can be maximized while compensating for the self-heating effect of the transistor; at the same time, by controlling the first current source I1, the static current of the seventh transistor HBT7 can be independently controlled, and the working state of the RF power amplifier circuit 200 can be flexibly adjusted with the power change; by controlling the second current source I2, the input impedance of the linear bias circuit 100 can be controlled, which can improve the design freedom of the RF power amplifier circuit 200, and at the same time, the memory effect of the RF power amplifier circuit 200 can be independently intervened and suppressed to improve the performance of the RF power amplifier circuit 200.

[0047] Compared with the prior art, the linear bias circuit 100 in this embodiment designs the first power supply 1, the first current mirror 2, the second power supply 4, the second current mirror 3, the first capacitor Cb1, the first transistor 5, the first resistor Rb1 and the second capacitor Cb2, and limits the connection method of each device, so as to control the input impedance of the linear bias circuit 100 to improve its linear compensation effect. In addition, after the linear bias circuit 100 is applied to the RF power amplifier circuit 200, the efficiency and linearity of the RF power amplifier circuit 200 at the working power can be optimized.

[0048] Embodiment 2 The present embodiment is different from the first embodiment in that the first power source 1 and the second power source 4 are both voltage sources.

[0049] The first transistor 5 is a first field effect transistor; the gate of the first field effect transistor serves as the first input terminal of the first transistor 5 , the drain of the first field effect transistor serves as the second input terminal of the first transistor 5 , and the source of the first field effect transistor serves as the output terminal of the first transistor 5 .

[0050] The first current mirror 2 includes a second field effect transistor and a third field effect transistor; The drain of the second field effect transistor serves as the input terminal of the first current mirror 2, the gate of the second field effect transistor is connected to the drain of the second field effect transistor, and the source of the second field effect transistor is grounded; The gate of the third field effect tube is connected to the gate of the second field effect tube, the drain of the third field effect tube serves as the output end of the first current mirror 2, and the source of the third field effect tube is grounded.

[0051] The second current mirror 3 includes a fourth field effect transistor, a second resistor, a fifth field effect transistor and a sixth field effect transistor; The gate of the fourth field effect tube serves as the first input terminal of the second current mirror 3, the drain of the fourth field effect tube serves as the second input terminal of the second current mirror 3, and the source of the fourth field effect tube is grounded; A first end of the second resistor is connected to a drain of the fourth field effect transistor; The gate of the fifth field effect transistor is connected to the second end of the second resistor, the drain of the fifth field effect transistor serves as the third input end of the second current mirror 3, and the source of the fifth field effect transistor is connected to the gate of the fourth field effect transistor; The gate of the sixth field effect tube is connected to the gate of the fourth field effect tube, the drain of the sixth field effect tube serves as the output end of the second current mirror 3, and the source of the sixth field effect tube is grounded.

[0052] The difference between this embodiment and the above-mentioned embodiment 1 is that the triode is replaced by a field effect transistor, and the current source is replaced by a voltage source. Therefore, it can be seen that the linear bias circuit in this embodiment is basically the same as the linear bias circuit 100 in the above-mentioned embodiment 1. Therefore, the working principle and technical effect achieved by the linear bias circuit in this embodiment are the same as those of the linear bias circuit 100 in the above-mentioned embodiment 1, and are not elaborated here.

[0053] Embodiment 3 This embodiment provides a radio frequency power amplifier circuit 200, combined with Figure 2 As shown, it includes an input matching network 201, a power amplifier 202 and the linear bias circuit 100 in the above-mentioned embodiment 1.

[0054] The input end of the input matching network 201 is used to connect the radio frequency signal RFin.

[0055] The input end of the power amplifier 202 is connected to the output end of the input matching network 201 , and the output end of the power amplifier 202 is used to output the radio frequency signal RFout after power amplification.

[0056] The output terminal of the linear bias circuit 100 is connected to the input terminal of the power amplifier 202 .

[0057] In this embodiment, the input matching network 201 includes a third capacitor Cb3 , a first end of the third capacitor Cb3 serves as an input end of the input matching network 201 , and a second end of the third capacitor Cb3 serves as an output end of the input matching network 201 .

[0058] The power amplifier 202 includes a seventh transistor HBT7, the base of the seventh transistor HBT7 serves as the input terminal of the power amplifier 202, the collector of the seventh transistor HBT7 serves as the output terminal of the power amplifier 202, and the emitter of the seventh transistor HBT7 is grounded. Of course, according to actual needs, the seventh transistor HBT7 can also be replaced with a seventh field effect transistor, in which case the gate of the seventh field effect transistor serves as the input terminal of the power amplifier 202, the drain of the seventh field effect transistor serves as the output terminal of the power amplifier 202, and the source of the seventh field effect transistor is grounded.

[0059] Since the working principle and technical effects achieved by the linear bias circuit in the second embodiment are the same as those of the linear bias circuit 100 in the first embodiment, the linear bias circuit 100 in the first embodiment to which this embodiment is applied can be replaced with the linear bias circuit in the second embodiment according to actual needs.

[0060] Since the RF power amplifier circuit 200 in this embodiment uses the linear bias circuit 100 in the above-mentioned embodiment 1, it can also achieve the technical effect achieved by the linear bias circuit 100 in the above-mentioned embodiment 1, which will not be described in detail here.

[0061] It should be noted that the various embodiments described above with reference to the accompanying drawings are only used to illustrate the present invention rather than to limit the scope of the present invention. Those skilled in the art should understand that any modification or equivalent substitution of the present invention without departing from the spirit and scope of the present invention should be included within the scope of the present invention. In addition, unless otherwise indicated by the context, words appearing in the singular include the plural form, and vice versa. In addition, unless otherwise specified, all or part of any embodiment may be used in combination with all or part of any other embodiment.

Claims

1. A linear bias circuit, characterized in that: The linear bias circuit includes a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor and a second capacitor; The negative electrode of the first power supply is grounded; An input terminal of the first current mirror is connected to the positive electrode of the first power supply; The negative electrode of the second power supply is grounded; The first input terminal of the second current mirror is connected to the output terminal of the first current mirror, the second input terminal of the second current mirror is connected to the positive electrode of the second power supply, and the third input terminal of the second current mirror is used to connect to the working voltage; A first end of the first capacitor is connected to the positive electrode of the second power supply, and a second end of the first capacitor is grounded; The first input terminal of the first transistor is connected to the positive electrode of the second power supply, the second input terminal of the first transistor is used to connect to the working voltage, and the output terminal of the first transistor is connected to the output terminal of the second current mirror; The first resistor is connected to the output end of the second current mirror, and the second end of the first resistor serves as the output end of the linear bias circuit and is used to be connected to the radio frequency power amplifier circuit; A first end of the second capacitor is connected to a first end of the first resistor, and a second end of the second capacitor is connected to a second end of the first resistor.

2. The linear bias circuit according to claim 1, characterized in that: The first power source and the second power source are both current sources.

3. The linear bias circuit according to claim 2, characterized in that: The first transistor is a first triode; the base of the first triode serves as the first input end of the first transistor, the collector of the first triode serves as the second input end of the first transistor, and the emitter of the first triode serves as the output end of the first transistor.

4. The linear bias circuit according to claim 3, characterized in that: The first current mirror includes a second triode and a third triode; The collector of the second triode serves as the input terminal of the first current mirror, the base of the second triode is connected to the collector of the second triode, and the emitter of the second triode is grounded; The base of the third transistor is connected to the base of the second transistor, the collector of the third transistor serves as the output end of the first current mirror, and the emitter of the third transistor is grounded.

5. The linear bias circuit according to claim 4, characterized in that: The second current mirror includes a fourth transistor, a second resistor, a fifth transistor and a sixth transistor; The base of the fourth transistor serves as the first input terminal of the second current mirror, the collector of the fourth transistor serves as the second input terminal of the second current mirror, and the emitter of the fourth transistor is grounded; The first end of the second resistor is connected to the collector of the fourth transistor; The base of the fifth transistor is connected to the second end of the second resistor, the collector of the fifth transistor serves as the third input end of the second current mirror, and the emitter of the fifth transistor is connected to the base of the fourth transistor; The base of the sixth transistor is connected to the base of the fourth transistor, the collector of the sixth transistor serves as the output end of the second current mirror, and the emitter of the sixth transistor is grounded.

6. The linear bias circuit according to claim 1, wherein: The first power source and the second power source are both voltage sources.

7. The linear bias circuit according to claim 6, characterized in that: The first transistor is a first field effect transistor; the gate of the first field effect transistor serves as the first input terminal of the first transistor, the drain of the first field effect transistor serves as the second input terminal of the first transistor, and the source of the first field effect transistor serves as the output terminal of the first transistor.

8. The linear bias circuit according to claim 7, characterized in that: The first current mirror includes a second field effect transistor and a third field effect transistor; The drain of the second field effect transistor serves as the input terminal of the first current mirror, the gate of the second field effect transistor is connected to the drain of the second field effect transistor, and the source of the second field effect transistor is grounded; The gate of the third field effect tube is connected to the gate of the second field effect tube, the drain of the third field effect tube serves as the output end of the first current mirror, and the source of the third field effect tube is grounded.

9. The linear bias circuit according to claim 8, characterized in that: The second current mirror includes a fourth field effect transistor, a second resistor, a fifth field effect transistor and a sixth field effect transistor; The gate of the fourth field effect transistor serves as the first input terminal of the second current mirror, the drain of the fourth field effect transistor serves as the second input terminal of the second current mirror, and the source of the fourth field effect transistor is grounded; The first end of the second resistor is connected to the drain of the fourth field effect transistor; The gate of the fifth field effect transistor is connected to the second end of the second resistor, the drain of the fifth field effect transistor serves as the third input end of the second current mirror, and the source of the fifth field effect transistor is connected to the gate of the fourth field effect transistor; The gate of the sixth field effect tube is connected to the gate of the fourth field effect tube, the drain of the sixth field effect tube serves as the output end of the second current mirror, and the source of the sixth field effect tube is grounded.

10. A radio frequency power amplifier circuit, characterized in that: The radio frequency power amplifier circuit comprises an input matching network, a power amplifier and a linear bias circuit as claimed in any one of claims 1 to 9; The input end of the input matching network is used to connect the radio frequency signal; The input end of the power amplifier is connected to the output end of the input matching network, and the output end of the power amplifier is used to output the radio frequency signal after power amplification; The output end of the linear bias circuit is connected to the input end of the power amplifier.

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