Linear Biasing Circuit and Radio Frequency Power Amplification Circuit

Abstract

The present invention provides a linear biasing circuit and a radio frequency power amplifier circuit. Among them, the linear biasing circuit includes a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor, and a second capacitor. The second end of the first resistor serves as the output end of the linear biasing circuit and is used to connect to the radio frequency power amplifier circuit. The linear biasing circuit in the present invention can control its input impedance to improve its linear compensation effect. In addition, after applying this linear biasing circuit to the radio frequency power amplifier circuit, it can also make the efficiency and linearity of the radio frequency power amplifier circuit reach the optimal state under the working power.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technologies, and particularly to a linear biasing circuit and a radio frequency power amplifier circuit. Background Art

[0002] GaAs HBT (gallium arsenide heterojunction bipolar transistor) has been widely used in microwave power amplifiers, especially in the field of mobile phone power amplifiers, due to its advantages such as high power density and high linearity.

[0003] In a power amplifier designed based on GaAs HBT, the design of the static bias point is very important for the performance of the power amplifier: on the one hand, when the input radio frequency power increases, due to the clamping effect of the transistor, the excessive forward voltage and negative current applied to the base-emitter transistor will be limited, resulting in a decrease in the DC voltage of the base-emitter junction and an increase in the collector current, ultimately leading to a decrease in transconductance, a decrease in gain, and phase distortion, which will cause deterioration of linearity; on the other hand, due to the very low thermal conductivity of GaAs (gallium arsenide) itself, and as the temperature increases, its thermal conductivity will continue to decrease. At higher temperatures, the self-heating effect of GaAs HBT will cause a series of problems such as an increase in the transistor junction temperature, a decrease in the turn-on voltage of the emitter junction, and a decrease in the gain of the device; in addition, due to the decrease in carrier mobility, it will also cause an increase in parasitic impedance.

[0004] In order to stabilize the static bias point of the above power amplifier and achieve a certain temperature stabilization effect to a certain extent, the prior art, as Figure 1 shown, provides an active linear biasing circuit, which includes a triode Q1, a triode Q2, a triode Q3, a resistor R1, a resistor R2, and a capacitor C1. Among them, one end of the resistor R1, that is, the collector of the triode, is respectively connected to the voltage VBB; the output end of the active linear biasing circuit is connected to the power amplifier, that is, one end of the resistor R2 serves as the output end of the active linear biasing circuit. The power amplifier includes a capacitor Cin and a triode Q0. The first end of the capacitor Cin is connected to the radio frequency signal RFin, the second end of the capacitor Cin is connected to the base of the triode Q0, and the output end of the active linear biasing circuit is connected to the base of the triode Q0.

[0005] In the above-mentioned active linear biasing circuit, the capacitance value of capacitor C1 needs to be set large enough so that almost all radio frequency signals passing through the Y connection point will be bypassed to ground by capacitor C1, thereby ensuring the voltage stability at the Y connection point. When the power of the input radio frequency signal increases, part of the radio frequency signal will leak into the biasing circuit. After being rectified by transistor Q1, Vbe1 (the DC voltage drop across the base-emitter junction) decreases, while Vbe0 (the base-emitter voltage of the transistor in the power amplifier) will increase due to the decrease of Vbe1, so that Vbe0 is compensated and the quiescent operating point of the power amplifier is stabilized. In addition, when the temperature rises, due to the existence of resistor R2, the increased currents of transistors Q1 and Q2 can be suppressed to a certain extent, achieving a temperature stabilization effect to a certain extent.

[0006] Although the above-mentioned active linear biasing circuit can stabilize the quiescent bias point of the power amplifier and achieve a temperature stabilization effect to a certain extent, in communication technologies, complex modulation signals will have a large PAPR (peak-to-average power ratio). For power amplifiers with such inherent biasing as the above-mentioned active linear biasing circuit, their efficiency will reach the peak value when approaching saturation, while the linearity of the power amplifier will deteriorate when approaching saturation. Therefore, the above-mentioned active linear biasing circuit cannot make the efficiency and linearity of the power amplifier reach the best state under the operating power; in addition, the existence of resistor R2 will increase the input impedance of the active linear biasing circuit, which will reduce the linear compensation effect of the biasing circuit. Summary of the Invention

[0007] In view of the above deficiencies of the prior art, the present invention proposes a linear biasing circuit and a radio frequency power amplifier circuit to solve the problems that the active linear biasing circuit in the prior art cannot make the efficiency and linearity of the power amplifier reach the best state under the operating power, and its input impedance will increase, resulting in a reduction in the linear compensation effect of the biasing circuit.

[0008] To solve the above technical problems, the present invention adopts the following technical solutions:

[0009] In a first aspect, the present invention provides a linear biasing circuit, which includes a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor, and a second capacitor;

[0010] The negative electrode of the first power supply is grounded;

[0011] The input end of the first current mirror is connected to the positive electrode of the first power supply;

[0012] The negative electrode of the second power supply is grounded;

[0013] The first input terminal of the second current mirror is connected to the output terminal of the first current mirror, the second input terminal of the second current mirror is connected to the positive electrode of the second power supply, and the third input terminal of the second current mirror is used for connecting a working voltage;

[0014] The first end of the first capacitor is connected to the positive electrode of the second power supply, and the second end of the first capacitor is grounded;

[0015] The first input terminal of the first transistor is connected to the positive electrode of the second power supply, the second input terminal of the first transistor is used for connecting a working voltage, and the output terminal of the first transistor is connected to the output terminal of the second current mirror;

[0016] The first resistor is connected to the output terminal of the second current mirror, and the second end of the first resistor serves as the output terminal of the linear bias circuit for connecting to a radio frequency power amplifier circuit;

[0017] The first end of the second capacitor is connected to the first end of the first resistor, and the second end of the second capacitor is connected to the second end of the first resistor.

[0018] Preferably, both the first power supply and the second power supply are current sources.

[0019] Preferably, the first transistor is a first triode; the base of the first triode serves as the first input terminal of the first transistor, the collector of the first triode serves as the second input terminal of the first transistor, and the emitter of the first triode serves as the output terminal of the first transistor.

[0020] Preferably, the first current mirror includes a second triode and a third triode;

[0021] The collector of the second triode serves as the input terminal of the first current mirror, the base of the second triode is connected to the collector of the second triode, and the emitter of the second triode is grounded;

[0022] The base of the third triode is connected to the base of the second triode, the collector of the third triode serves as the output terminal of the first current mirror, and the emitter of the third triode is grounded.

[0023] Preferably, the second current mirror includes a fourth triode, a second resistor, a fifth triode, and a sixth triode;

[0024] The base of the fourth triode serves as the first input terminal of the second current mirror, the collector of the fourth triode serves as the second input terminal of the second current mirror, and the emitter of the fourth triode is grounded;

[0025] The first end of the second resistor is connected to the collector of the fourth triode;

[0026] The base of the fifth triode is connected to the second end of the second resistor. The collector of the fifth triode serves as the third input terminal of the second current mirror, and the emitter of the fifth triode is connected to the base of the fourth triode;

[0027] The base of the sixth triode is connected to the base of the fourth triode. The collector of the sixth triode serves as the output terminal of the second current mirror, and the emitter of the sixth triode is grounded.

[0028] Preferably, both the first power supply and the second power supply are voltage sources.

[0029] Preferably, the first transistor is a first field-effect transistor; the gate of the first field-effect transistor serves as the first input terminal of the first transistor, the drain of the first field-effect transistor serves as the second input terminal of the first transistor, and the source of the first field-effect transistor serves as the output terminal of the first transistor.

[0030] Preferably, the first current mirror includes a second field-effect transistor and a third field-effect transistor;

[0031] The drain of the second field-effect transistor serves as the input terminal of the first current mirror. The gate of the second field-effect transistor is connected to the drain of the second field-effect transistor, and the source of the second field-effect transistor is grounded;

[0032] The gate of the third field-effect transistor is connected to the gate of the second field-effect transistor. The drain of the third field-effect transistor serves as the output terminal of the first current mirror, and the source of the third field-effect transistor is grounded.

[0033] Preferably, the second current mirror includes a fourth field-effect transistor, a second resistor, a fifth field-effect transistor, and a sixth field-effect transistor;

[0034] The gate of the fourth field-effect transistor serves as the first input terminal of the second current mirror. The drain of the fourth field-effect transistor serves as the second input terminal of the second current mirror, and the source of the fourth field-effect transistor is grounded;

[0035] The first end of the second resistor is connected to the drain of the fourth field-effect transistor;

[0036] The gate of the fifth field-effect transistor is connected to the second end of the second resistor. The drain of the fifth field-effect transistor serves as the third input terminal of the second current mirror, and the source of the fifth field-effect transistor is connected to the gate of the fourth field-effect transistor;

[0037] The gate of the sixth field effect transistor is connected to the gate of the fourth field effect transistor. The drain of the sixth field effect transistor serves as the output terminal of the second current mirror, and the source of the sixth field effect transistor is grounded.

[0038] In a second aspect, the present invention provides a radio frequency power amplifier circuit, which includes an input matching network, a power amplifier, and the linear biasing circuit as described above;

[0039] The input end of the input matching network is used to connect a radio frequency signal;

[0040] The input end of the power amplifier is connected to the output end of the input matching network, and the output end of the power amplifier is used to output a radio frequency signal after power amplification;

[0041] The output end of the linear biasing circuit is connected to the input end of the power amplifier.

[0042] Compared with the prior art, in the linear biasing circuit of the present invention, by designing a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor, and a second capacitor, and defining the connection manners of each device, the input impedance of the linear biasing circuit can be controlled to improve its linear compensation effect. In addition, after applying this linear biasing circuit to a radio frequency power amplifier circuit, the efficiency and linearity of the radio frequency power amplifier circuit can reach the optimal state at the operating power. Description of the Drawings

[0043] The present invention will be described in detail below with reference to the drawings. Through the detailed description in combination with the following drawings, the above or other aspects of the present invention will become clearer and easier to understand. In the drawings:

[0044] Figure 1 It is the circuit schematic diagram of an active linear biasing circuit provided by the prior art applied to a power amplifier;

[0045] Figure 2 It is the circuit schematic diagram of the linear biasing circuit provided by the embodiment of the present invention applied to a radio frequency power amplifier circuit. Detailed Embodiments

[0046] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs; the terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" and any variations thereof in the specification and claims of this application and the above drawings are intended to cover non-exclusive inclusion. The terms "first", "second", etc. in the specification and claims of this application or the above drawings are used to distinguish different objects and not to describe a specific order.

[0047] Reference to "embodiment" herein means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of this application. The phrase appearing in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0048] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts belong to the scope of protection of the present invention.

[0049] Embodiment 1

[0050] An embodiment of the present invention provides a linear biasing circuit 100, as shown in combination with Figure 2 which includes a first power supply 1, a first current mirror 2, a second power supply 4, a second current mirror 3, a first capacitor Cb1, a first transistor 5, a first resistor Rb1, and a second capacitor Cb2.

[0051] The negative electrode of the first power supply 1 is grounded.

[0052] The input end of the first current mirror 2 is connected to the positive electrode of the first power supply 1.

[0053] The negative electrode of the second power supply 4 is grounded.

[0054] The first input end of the second current mirror 3 is connected to the output end of the first current mirror 2, the second input end of the second current mirror 3 is connected to the positive electrode of the second power supply 4, and the third input end of the second current mirror 3 is used to connect to the working voltage VCC.

[0055] The first end of the first capacitor Cb1 is connected to the positive electrode of the second power supply 4, and the second end of the first capacitor Cb1 is grounded.

[0056] The first input terminal of the first transistor 5 is connected to the positive pole of the second power supply 4, the second input terminal of the first transistor 5 is used to connect to the operating voltage VCC, and the output terminal of the first transistor 5 is connected to the output terminal of the second current mirror 3.

[0057] The first resistor Rb1 is connected to the output terminal of the second current mirror 3, and the second terminal of the first resistor Rb1 serves as the output terminal of the linear bias circuit 100 for connection to the RF power amplifier circuit 200.

[0058] The first terminal of the second capacitor Cb2 is connected to the first terminal of the first resistor Rb1, and the second terminal of the second capacitor Cb2 is connected to the second terminal of the first resistor Rb1.

[0059] Wherein, both the first power supply 1 and the second power supply 4 are current sources.

[0060] The first transistor 5 is the first triode HBT1; the base of the first triode HBT1 serves as the first input terminal of the first transistor 5, the collector of the first triode HBT1 serves as the second input terminal of the first transistor 5, and the emitter of the first triode HBT1 serves as the output terminal of the first transistor 5.

[0061] The first current mirror 2 includes a second triode HBT2 and a third triode HBT3.

[0062] The collector of the second triode HBT2 serves as the input terminal of the first current mirror 2, the base of the second triode HBT2 is connected to the collector of the second triode HBT2, and the emitter of the second triode HBT2 is grounded.

[0063] The base of the third triode HBT3 is connected to the base of the second triode HBT2, the collector of the third triode HBT3 serves as the output terminal of the first current mirror 2, and the emitter of the third triode HBT3 is grounded.

[0064] The second current mirror 3 includes a fourth triode HBT4, a second resistor Rb2, a fifth triode HBT5, and a sixth triode HBT6.

[0065] The base of the fourth triode HBT4 serves as the first input terminal of the second current mirror 3, the collector of the fourth triode HBT4 serves as the second input terminal of the second current mirror 3, and the emitter of the fourth triode HBT4 is grounded;

[0066] The resistance value of the second resistor Rb2 is the same as that of the first resistor Rb1, and the first terminal of the second resistor Rb2 is connected to the collector of the fourth triode HBT4.

[0067] The base of the fifth triode HBT5 is connected to the second end of the second resistor Rb2. The collector of the fifth triode HBT5 serves as the third input terminal of the second current mirror 3. The emitter of the fifth triode HBT5 is connected to the base of the fourth triode HBT4.

[0068] The base of the sixth triode HBT6 is connected to the base of the fourth triode HBT4. The collector of the sixth triode HBT6 serves as the output terminal of the second current mirror 3. The emitter of the sixth triode HBT6 is grounded.

[0069] After the linear bias circuit 100 in this embodiment is applied to the radio frequency power amplifier circuit 200 (as Figure 2 shown), the first triode HBT1 and the bypassed first capacitor Cb1 together achieve the linearization effect of the linear bias circuit 100. The capacitance value of the first capacitor Cb1 needs to be set large enough so that almost all radio frequency signals passing through the Y connection point will be bypassed to the ground by the first capacitor Cb1, thereby ensuring the voltage stability at the Y connection point. When the power of the input radio frequency signal increases, part of the radio frequency signal will leak into the linear bias circuit 100. The base-emitter junction DC voltage drop after rectification by the first triode HBT1 decreases. At this time, the base-emitter voltage of the seventh triode HBT7, which is the power amplifier 202 of the radio frequency power amplifier circuit 200, will increase accordingly, so as to compensate the base-emitter voltage of the seventh triode HBT7 and suppress the decrease of its base-emitter voltage at high power. In addition, by designing the second capacitor Cb2 in parallel with the first resistor Rb1, more radio frequency energy can be prevented from passing through the first resistor Rb1.

[0070] When the linear bias circuit 100 in this embodiment is applied to the radio frequency power amplifier circuit 200 (as Figure 2 shown), in the case of ignoring the base current, the following expression can be obtained:

[0071] Vbe(HBT1)+Vbe(HBT7)+V(Rb1)=Vbe(HBT6)+Vbe(HBT5)+V(Rb2);

[0072] Among them, Vbe represents the base-emitter voltage of the triode, and V represents the resistance value of the resistor.

[0073] Since the collector currents of the sixth transistor HBT6 and the first transistor HBT1 are the same, Vbe(HBT1) = Vbe(HBT6). Meanwhile, appropriate resistor values can be selected such that V(Rb1) = V(Rb2). In this case: Vbe(HBT7) = Vbe(HBT5). The current of the first current source I1 controls the current through the second transistor HBT2. Under the action of the first current mirror 2, the currents of the second transistor HBT2 and the third transistor HBT3 are the same. At the same time, the current of the fifth transistor HBT5 is the same as that of the third transistor HBT3. With the additional condition of Vbe(HBT7) = Vbe(HBT4), the second current source I2 can indirectly control the current in the power transistor, the seventh transistor HBT7. The second current source I2 can control the quiescent currents of the first transistor HBT1 and the sixth transistor HBT6, and the quiescent current of the first transistor HBT1 determines the impedance of its emitter. For the seventh transistor HBT7, the input impedance of the linear biasing circuit 100 is the value of the first resistor Rb1 in parallel with the second capacitor Cb2 plus the impedance of the emitter of the first transistor HBT1. Therefore, the second current source I2 can control the input impedance of the linear biasing circuit 100.

[0074] Based on the above analysis, by selecting appropriate emitter areas of the transistors and the parameters of the first resistor Rb1 and the second capacitor Cb2, the quiescent current of the seventh transistor HBT7 and the impedance of the linear biasing circuit 100 can be controlled, bringing greater flexibility to the design of the RF power amplifier circuit 200. This helps to optimize its efficiency while maintaining a certain linearity.

[0075] In the actual application process of the linear biasing circuit 100 in this embodiment: the capacitance value of the bypass first capacitor Cb1 needs to be set large enough so that almost all RF signals passing through the Y connection point will be bypassed to ground by the first capacitor Cb1, thus ensuring the voltage stability at the Y connection point and enabling the first transistor HBT1 to achieve the best linearization effect. Appropriate resistance values are selected such that V(Rb1) = V(Rb2). At this time, the first current source I1 can control the quiescent current in the seventh transistor HBT7. During the operation of the RF power amplifier circuit 200, as the input power increases, the current magnitude of the first current source I1 can be dynamically adjusted, enabling the RF power amplifier circuit 200 to achieve the best efficiency and linearity. The current magnitude of the second current source I2 can also be dynamically adjusted to adjust the emitter impedance of the first transistor HBT1, and further control the input impedance of the entire linear biasing circuit 100, bringing greater flexibility to the design of the RF power amplifier circuit 200, helping to optimize the efficiency of the RF power amplifier circuit 200 while maintaining a certain linearity.

[0076] The effects of the linear biasing circuit 100 in this embodiment are summarized as impedance controllability. By connecting the first resistor Rb1 in parallel with the second capacitor Cb2, the self-heating effect of the triode can be compensated while maximizing the linearization effect of the linear biasing circuit 100 on the RF power amplifier circuit 200. At the same time, by controlling the first current source I1, the quiescent current of the seventh transistor HBT7 can be independently controlled, and the operating state of the RF power amplifier circuit 200 can be flexibly adjusted according to the power change. By controlling the second current source I2, the input impedance of the linear biasing circuit 100 can be controlled, which can improve the design freedom of the RF power amplifier circuit 200. At the same time, the memory effect of the RF power amplifier circuit 200 can be independently intervened and suppressed to improve the performance of the RF power amplifier circuit 200.

[0077] Compared with the prior art, the linear biasing circuit 100 in this embodiment controls the input impedance of the linear biasing circuit 100 by designing the first power supply 1, the first current mirror 2, the second power supply 4, the second current mirror 3, the first capacitor Cb1, the first transistor 5, the first resistor Rb1, and the second capacitor Cb2 and defining the connection methods of each device, so as to improve its linear compensation effect. In addition, after applying the linear biasing circuit 100 to the RF power amplifier circuit 200, the efficiency and linearity of the RF power amplifier circuit 200 at the operating power can reach the best state.

[0078] Embodiment 2

[0079] The difference between this embodiment and Embodiment 1 is that both the first power supply 1 and the second power supply 4 are voltage sources.

[0080] The first transistor 5 is a first field-effect transistor; the gate of the first field-effect transistor serves as the first input terminal of the first transistor 5, the drain of the first field-effect transistor serves as the second input terminal of the first transistor 5, and the source of the first field-effect transistor serves as the output terminal of the first transistor 5.

[0081] The first current mirror 2 includes a second field-effect transistor and a third field-effect transistor;

[0082] The drain of the second field-effect transistor serves as the input terminal of the first current mirror 2, the gate of the second field-effect transistor is connected to the drain of the second field-effect transistor, and the source of the second field-effect transistor is grounded;

[0083] The gate of the third field-effect transistor is connected to the gate of the second field-effect transistor, the drain of the third field-effect transistor serves as the output terminal of the first current mirror 2, and the source of the third field-effect transistor is grounded.

[0084] The second current mirror 3 includes a fourth field-effect transistor, a second resistor, a fifth field-effect transistor, and a sixth field-effect transistor;

[0085] The gate of the fourth field-effect transistor serves as the first input terminal of the second current mirror 3, the drain of the fourth field-effect transistor serves as the second input terminal of the second current mirror 3, and the source of the fourth field-effect transistor is grounded;

[0086] The first end of the second resistor is connected to the drain of the fourth field-effect transistor;

[0087] The gate of the fifth field-effect transistor is connected to the second end of the second resistor, the drain of the fifth field-effect transistor serves as the third input terminal of the second current mirror 3, and the source of the fifth field-effect transistor is connected to the gate of the fourth field-effect transistor;

[0088] The gate of the sixth field-effect transistor is connected to the gate of the fourth field-effect transistor, the drain of the sixth field-effect transistor serves as the output terminal of the second current mirror 3, and the source of the sixth field-effect transistor is grounded.

[0089] The difference between this embodiment and the above-mentioned Embodiment 1 is that the triode is replaced by a field-effect transistor, and at the same time the current source is replaced by a voltage source. It can be seen that the linear biasing circuit in this embodiment is basically the same as the linear biasing circuit 100 in the above-mentioned Embodiment 1. Therefore, the working principle and the achieved technical effects of the linear biasing circuit in this embodiment are the same as those of the linear biasing circuit 100 in the above-mentioned Embodiment 1, and will not be elaborated here.

[0090] Embodiment 3

[0091] This embodiment provides a radio frequency power amplifier circuit 200, as shown in combination with Figure 2 shown, which includes an input matching network 201, a power amplifier 202, and the linear biasing circuit 100 in the above-mentioned Embodiment 1.

[0092] The input end of the input matching network 201 is used to connect to the radio frequency signal RFin.

[0093] The input end of the power amplifier 202 is connected to the output end of the input matching network 201, and the output end of the power amplifier 202 is used to output the radio frequency signal RFout after power amplification.

[0094] The output end of the linear biasing circuit 100 is connected to the input end of the power amplifier 202.

[0095] In this embodiment, the input matching network 201 includes a third capacitor Cb3. The first end of the third capacitor Cb3 serves as the input end of the input matching network 201, and the second end of the third capacitor Cb3 serves as the output end of the input matching network 201.

[0096] The power amplifier 202 includes a seventh triode HBT7. The base of the seventh triode HBT7 serves as the input terminal of the power amplifier 202, the collector of the seventh triode HBT7 serves as the output terminal of the power amplifier 202, and the emitter of the seventh triode HBT7 is grounded. Of course, according to actual requirements, the seventh triode HBT7 can also be replaced with a seventh field effect transistor. In this case, the gate of the seventh field effect transistor serves as the input terminal of the power amplifier 202, the drain of the seventh field effect transistor serves as the output terminal of the power amplifier 202, and the source of the seventh field effect transistor is grounded.

[0097] Since the working principle and the achieved technical effects of the linear biasing circuit in the second embodiment are the same as those of the linear biasing circuit 100 in the first embodiment above, according to actual requirements, the linear biasing circuit 100 in the first embodiment applied in this embodiment can also be replaced with the linear biasing circuit in the second embodiment.

[0098] Since the RF power amplifier circuit 200 in this embodiment uses the linear biasing circuit 100 in the first embodiment above, it can also achieve the technical effects achieved by the linear biasing circuit 100 in the first embodiment above, which will not be elaborated here.

[0099] It should be noted that each of the embodiments described above with reference to the drawings is only used to illustrate the present invention and not to limit the scope of the present invention. Those of ordinary skill in the art should understand that any modification or equivalent replacement made to the present invention without departing from the spirit and scope of the present invention should be covered within the scope of the present invention. In addition, unless otherwise indicated in the context, words in the singular form include the plural form and vice versa. Additionally, unless otherwise specified, all or part of any embodiment can be used in combination with all or part of any other embodiment.

Claims

1. A linear bias circuit, characterized in that: The linear bias circuit includes a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor and a second capacitor; The negative electrode of the first power supply is grounded; An input terminal of the first current mirror is connected to the positive electrode of the first power supply; The negative electrode of the second power supply is grounded; The first input terminal of the second current mirror is connected to the output terminal of the first current mirror, the second input terminal of the second current mirror is connected to the positive electrode of the second power supply, and the third input terminal of the second current mirror is used to connect to the working voltage; A first end of the first capacitor is connected to the positive electrode of the second power supply, and a second end of the first capacitor is grounded; The first input terminal of the first transistor is connected to the positive electrode of the second power supply, the second input terminal of the first transistor is used to connect to the working voltage, and the output terminal of the first transistor is connected to the output terminal of the second current mirror; The first end of the first resistor is connected to the output end of the second current mirror, and the second end of the first resistor serves as the output end of the linear bias circuit and is used to be connected to the radio frequency power amplifier circuit; A first end of the second capacitor is connected to a first end of the first resistor, and a second end of the second capacitor is connected to a second end of the first resistor; The second current mirror includes a fourth transistor, a second resistor, a fifth transistor and a sixth transistor; The input end of the fourth transistor serves as the second input end of the second current mirror, the first output end of the fourth transistor is grounded, and the second output end of the fourth transistor serves as the first input end of the second current mirror; A first end of the second resistor is connected to an input end of the fourth transistor; The first input terminal of the fifth transistor is connected to the second terminal of the second resistor, the second input terminal of the fifth transistor serves as the third input terminal of the second current mirror, and the output terminal of the fifth transistor is connected to the output terminal of the fourth transistor; The input end of the sixth transistor is connected to the output end of the fourth transistor, the first output end of the sixth transistor is grounded, and the second output end of the sixth transistor serves as the output end of the second current mirror.

2. The linear bias circuit according to claim 1, characterized in that: The first power source and the second power source are both current sources.

3. The linear bias circuit according to claim 2, characterized in that: The first transistor is a first triode; the base of the first triode serves as the first input end of the first transistor, the collector of the first triode serves as the second input end of the first transistor, and the emitter of the first triode serves as the output end of the first transistor.

4. The linear bias circuit according to claim 3, characterized in that: The first current mirror includes a second triode and a third triode; The collector of the second triode serves as the input terminal of the first current mirror, the base of the second triode is connected to the collector of the second triode, and the emitter of the second triode is grounded; The base of the third transistor is connected to the base of the second transistor, the collector of the third transistor serves as the output end of the first current mirror, and the emitter of the third transistor is grounded.

5. The linear bias circuit according to claim 4, characterized in that: The fourth transistor is a fourth triode, the fifth transistor is a fifth triode, and the sixth transistor is a sixth triode; The collector of the fourth triode serves as the input terminal of the fourth transistor, the reflector of the fourth triode serves as the first output terminal of the fourth transistor, and the base of the fourth triode serves as the second output terminal of the fourth transistor; The base of the fifth triode is connected to the first input terminal of the fifth transistor, the collector of the fifth triode serves as the second input terminal of the fifth transistor, and the emitter of the fifth triode serves as the output terminal of the fifth transistor; The base of the sixth triode is connected to the input end of the sixth transistor, the emitter of the sixth triode serves as the first output end of the sixth transistor, and the collector of the sixth triode serves as the second output end of the sixth transistor.

6. The linear bias circuit according to claim 1, wherein: The first power source and the second power source are both voltage sources.

7. The linear bias circuit according to claim 6, characterized in that: The first transistor is a first field effect transistor; the gate of the first field effect transistor serves as the first input terminal of the first transistor, the drain of the first field effect transistor serves as the second input terminal of the first transistor, and the source of the first field effect transistor serves as the output terminal of the first transistor.

8. The linear bias circuit according to claim 7, characterized in that: The first current mirror includes a second field effect transistor and a third field effect transistor; The drain of the second field effect transistor serves as the input terminal of the first current mirror, the gate of the second field effect transistor is connected to the drain of the second field effect transistor, and the source of the second field effect transistor is grounded; The gate of the third field effect tube is connected to the gate of the second field effect tube, the drain of the third field effect tube serves as the output end of the first current mirror, and the source of the third field effect tube is grounded.

9. The linear bias circuit according to claim 8, characterized in that: The fourth transistor is a fourth field effect transistor, the fifth transistor is a fifth field effect transistor, and the sixth transistor is a sixth field effect transistor; The drain of the fourth field effect transistor serves as the input terminal of the fourth transistor, the source of the fourth field effect transistor serves as the first output terminal of the fourth transistor, and the gate of the fourth field effect transistor serves as the second output terminal of the fourth transistor; The gate of the fifth field effect transistor is connected to the first input terminal of the fifth transistor, the drain of the fifth field effect transistor serves as the second input terminal of the fifth transistor, and the source of the fifth field effect transistor is connected to the output terminal of the fifth transistor; The gate of the sixth field effect tube is connected to the input end of the sixth transistor, the source of the sixth field effect tube serves as the first output end of the sixth transistor, and the drain of the sixth field effect tube serves as the second output end of the sixth transistor.

10. A radio frequency power amplifier circuit, characterized in that: The radio frequency power amplifier circuit comprises an input matching network, a power amplifier and a linear bias circuit as claimed in any one of claims 1 to 9; The input end of the input matching network is used to connect the radio frequency signal; The input end of the power amplifier is connected to the output end of the input matching network, and the output end of the power amplifier is used to output the radio frequency signal after power amplification; The output end of the linear bias circuit is connected to the input end of the power amplifier.

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