Wide-angle intra prediction and location-dependent intra prediction combination

By using reference sample points of non-square video blocks for prediction in video encoding and decoding, the problem of mismatch between the intra prediction direction and the block shape in the prior art is solved, and the prediction accuracy and compression efficiency are improved.

CN119629341APending Publication Date: 2025-03-14INTERDIGITAL VC HOLDINGS INC
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Patent Information

Application Number
CN202411704316.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2018-09-21
Filing Date
2019-06-14
Publication Date
2025-03-14

AI Technical Summary

Technical Problem

When existing video encoding and decoding technologies deal with non-square video blocks, the definition of intra prediction direction does not match the block shape, resulting in inaccurate prediction and low compression efficiency.

Method used

A method is proposed to predict the sample points of a video block by using the reference sample points from the row above the non-square video block or the reference sample points in the left column and encode or decode in intra-code mode.

Benefits of technology

By adapting the intra prediction direction to match the shape of the video block, the accuracy of prediction and the efficiency of video compression are improved.

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Abstract

The present disclosure describes a wide angle intra prediction and position dependent intra prediction combination. There is provided a method comprising: predicting a sample point of a non-square video block using at least one of N reference sample points from a row above the non-square video block, or at least one of M reference sample points from a left column of the non-square video block; and encoding the non-square video block using the prediction in an intra coding and decoding mode.
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Description

[0001] This application is a divisional application of the Chinese invention patent application with application date of June 14, 2019 and application number 201980046981.4. Technical Field

[0002] At least one of the present embodiments generally relates to a method or apparatus for video encoding or decoding. Background Art

[0003] To achieve high compression efficiency, image and video coding schemes typically use predictions including motion vector predictions, and transforms to take advantage of spatial and temporal redundancy in video content. In general, intra-frame or inter-frame predictions are used to exploit intra-frame or inter-frame correlations, and then the difference between the original image and the predicted image (often expressed as a prediction error or prediction residual) is transformed, quantized, and entropy coded. To reconstruct the video, the compressed data is decoded by the inverse process corresponding to entropy coding, quantization, transformation, and prediction. Summary of the invention

[0004] The deficiencies and drawbacks of the prior art may be addressed by the general aspects described herein, which are directed to block shape adaptive intra prediction direction in encoding and decoding.

[0005] According to a first aspect, a method is provided. The method comprises the following steps: predicting samples of a non-square video block using at least one of N reference samples from a row above the non-square video block or at least one of M reference samples from a left column of the non-square video block; and encoding the non-square video block using the prediction in intra-frame coding mode.

[0006] According to another aspect, another method is provided. The method includes the steps of predicting samples of the non-square video block using at least one of N reference samples from a row above the non-square video block or at least one of M reference samples from a left column of the non-square video block; and decoding the non-square video block using the prediction in intra-frame coding mode.

[0007] According to another aspect, a device is provided. The device includes a processor. The processor can be configured to encode a block of a video or decode a bitstream by executing any of the above-mentioned methods.

[0008] According to another general aspect of at least one embodiment, there is provided a device comprising an apparatus according to any decoding embodiment; and at least one of: (i) an antenna configured to receive a signal comprising a video block; (ii) a band limiter configured to limit the received signal to a frequency band comprising the video block, or (iii) a display configured to display an output representing the video block.

[0009] According to another general aspect of at least one embodiment, a non-transitory computer-readable medium containing data content generated according to any described encoding embodiment or variant is provided.

[0010] According to another general aspect of at least one embodiment, there is provided a signal comprising video data generated according to any described encoding embodiment or variant.

[0011] According to another general aspect of at least one embodiment, a bitstream is formatted to include data content generated according to any described encoding embodiment or variant.

[0012] According to another general aspect of at least one embodiment, there is provided a computer program product comprising instructions which, when executed by a computer, cause the computer to perform any of the described decoding embodiments or variants.

[0013] These and other aspects, features and advantages of the general aspects will become apparent from the following detailed description of exemplary embodiments taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A square block with an extended reference array for intra prediction is shown.

[0015] Figure 2 A top and left reference array of length W+H+1 are shown.

[0016] Figure 3 A rectangular target block is shown (flat block on the left, tall block on the right) along with its top and left reference arrays.

[0017] Figure 4 The definition of the samples used for the extension of PDPC to diagonal and adjacent corner intra modes is shown.

[0018] Figure 5 A rectangular block is shown along with the definition of various intra prediction modes.

[0019] Figure 6 The top reference array is shown to have a length of 2W+1, while the left reference array has a length of 2H+1.

[0020] Figure 7 An example of two rectangles is shown that have similar aspect ratios but equal angles from the center to the corners.

[0021] Figure 8 An example of an intra-directional mode suitable for use with the general aspects described is shown.

[0022] Fig. 9 Another example of an intra-directional mode suitable for use with the general aspects described is shown.

[0023] Fig.10 An embodiment of a method for encoding using loop filtering with multiple regions is shown.

[0024] Fig.11 An embodiment of another method for decoding using loop filtering with multiple regions is shown.

[0025] Fig.12 Embodiments of an apparatus for encoding or decoding using loop filtering with multiple regions are shown.

[0026] Fig.13 A common standard encoding scheme is shown.

[0027] Fig.14 A common standard decoding scheme is shown.

[0028] Fig.15 A typical processor arrangement is shown in which the described embodiments may be implemented. DETAILED DESCRIPTION

[0029] The embodiments described herein are in the field of video compression and relate to video compression as well as video encoding and decoding.

[0030] In the HEVC (High Efficiency Video Coding, ISO / IEC 23008-2, ITU-T H.265) video compression standard, motion compensated temporal prediction is used to exploit the redundancy existing between subsequent pictures of a video.

[0031] To do this, a motion vector is associated with each prediction unit (PU). Each coding tree unit (CTU) is represented by a coding tree in the compressed domain. This is a quadtree partition of the CTU, where each leaf is called a coding unit (CU).

[0032] Each CU is then provided with some intra or inter prediction parameters (prediction information). To do this, it is spatially split into one or more prediction units (PUs), each of which is assigned some prediction information. Intra or inter coding modes are assigned at the CU level.

[0033] In the JVET (Joint Video Exploration Team) proposal for a new video compression standard called the Joint Exploration Model (JEM), it has been proposed to accept a quadtree-binary tree (QTBT) block partitioning structure due to high compression performance. A block in a binary tree (BT) can be split into two equal-sized sub-blocks by splitting it horizontally or vertically in the middle. Therefore, a BT block can have a rectangular shape with unequal width and height, unlike in QT where the blocks always have a square shape with equal height and width. In HEVC, the angular intra-frame prediction direction is defined from 45 degrees to -135 degrees over a 180-degree angle and has been maintained in JEM, which makes the definition of the angular direction independent of the shape of the target block.

[0034] To encode these blocks, intra prediction is used to provide an estimated version of the block using previously reconstructed neighbor samples. The difference between the source block and the prediction is then encoded. In the classic codec above, a single row of reference samples is used to the left and top of the current block.

[0035] In recent work, wide-angle intra prediction is proposed, which enables intra prediction direction angles higher than the conventional 45 degrees. Moreover, in the current specification, position dependent intra prediction combination (PDPC) is used in the next generation video codec H.266 / VVC.

[0036] In the described embodiments, it is proposed to address the interaction between wide angle mode and PDPC applied to diagonal and adjacent diagonal modes.The problem addressed by the described general aspect is how to efficiently combine wide angle intra prediction and position dependent intra prediction combination (PDPC).

[0037] In the JVET (Joint Video Exploration Team) proposal for a new video compression standard, called the Joint Exploration Model (JEM), it has been proposed to accept a quadtree-binary tree (QTBT) block partitioning structure due to high compression performance. A block in a binary tree (BT) can be split into two equal-sized sub-blocks by splitting it horizontally or vertically in the middle. Therefore, a BT block can have a rectangular shape with unequal width and height, unlike in a quadtree (QT) where the block always has a square shape with equal height and width. In HEVC, the angular intra-frame prediction direction is defined from 45 degrees to -135 degrees over a 180-degree angle and has been maintained in JEM, which makes the definition of the angular direction independent of the shape of the target block. However, since the idea of ​​partitioning a codec tree unit (CTU) into CUs is to capture an object or part of an object, and the shape of a block is associated with the directionality of the object, it makes sense to adapt the prediction direction defined according to the shape of the block for higher compression efficiency. In this context, the general aspects described propose to redefine the intra-frame prediction direction for rectangular target blocks.

[0038] The embodiment described herein aims to improve the compression performance of conventional video by improving intra prediction with a QTBT structure. It proposes to adapt the intra prediction direction according to the shape of the CU. If the shape of the CU is a square, the directions already defined in JEM remain unchanged. Otherwise, the search direction is modified according to the shape of the CU. However, the total number of angular directions for any CU remains unchanged. The purpose of adapting the prediction direction to the block shape is to improve the prediction accuracy over a currently defined set of prediction directions that are independent of the block shape.

[0039] In addition, since the total number of prediction directions for the target CU remains unchanged, the encoding and decoding of prediction modes using the MPM (most probable mode) set remains unchanged. However, since CUs with different shapes have different defined sets of directions, the prediction modes of neighbor blocks are mapped to the prediction modes of the target block. The mapping is just a re-indexing of the mode, but the actual prediction direction does not change.

[0040] In HEVC (High Efficiency Video Codec, H.265), the encoding of frames of a video sequence is based on a quadtree (QT) block partitioning structure. Frames are divided into square codec tree units (CTUs), all of which undergo quadtree-based splitting into multiple codec units (CUs) based on the rate-distortion (RD) criterion. Each CU is either intra-predicted, i.e., spatially predicted from causal neighbor CUs, or inter-predicted, i.e., temporally predicted from an already decoded reference frame. In I slices, all CUs are intra-predicted, while in P and B slices, CUs can be intra- or inter-predicted. For intra prediction, HEVC defines 35 prediction modes, including one plane mode (indexed as mode 0), one DC mode (indexed as mode 1), and 33 angular modes (indexed as modes 2-34). The angular mode is associated with a prediction direction ranging from 45 degrees to -135 degrees in a clockwise direction. Since HEVC supports a quadtree (QT) block partitioning structure, all prediction units (PUs) have a square shape. Therefore, from the perspective of the PU (prediction unit) shape, the definition of prediction angles from 45 degrees to -135 degrees is reasonable. For a target prediction unit of size NxN pixels, the top reference array and the left reference array are each 2N+1 samples in size, which is required to cover the above-mentioned angle range for all target pixels. Considering that the height and width of the PU have equal lengths, it also makes sense that the lengths of the two reference arrays are equal.

[0041] For the next video coding standard, JVET, an attempt at a Joint Exploration Model (JEM), proposes the use of 65 angular intra prediction modes in addition to planar and DC modes. However, the prediction directions are defined within the same angular range, i.e., from 45 degrees to -135 degrees in a clockwise direction. For a target block of size WxH pixels, the top reference array and the left reference array are each of size (W+H+1) pixels, which is required to cover the above-mentioned angular range for all target pixels. This definition of angles in JEM is done for simplicity more than any other specific reason. However, doing so introduces some inefficiencies.

[0042] In JEM, due to higher compression performance, the use of a quadtree-binary tree (QTBT) block partitioning structure instead of only the quadtree structure has been proposed. Different from QT blocks which are always square-shaped, BT blocks can have a rectangular shape with unequal width and height due to horizontal or vertical binary splitting. In the current JEM code, the aspect ratio of the rectangular blocks can vary from 2:1 to 8:1. Therefore, the concept of different angular prediction modes is to capture different object directions, while the concept of splitting a CTU into CUs is to capture an object or a part of an object with such a direction. Therefore, the shape of the target block is structurally related to the directionality of the object within the block. If the shape of the block is rectangular, then some prediction directions may be more likely to occur than others. Therefore, the definition of the prediction direction should not be independent of the target block shape, as is the case in JEM.

[0043] In the case of square blocks, there is structural symmetry. Square blocks are symmetric not only along the height and width but also symmetrically placed with respect to the two reference arrays, as Figure 1 seen in.

[0044] Figure 1 shows a square target block and its top and left reference arrays. The target block is symmetrically placed with respect to the two reference arrays. The prediction directions are defined as 45 degrees to -135 degrees in the clockwise direction, where mode 2 corresponds to the 45-degree angle and mode 66 corresponds to the -135-degree angle.

[0045] In the case of rectangular blocks, the currently defined directions are not like this. When the block is flat (i.e., W > H), it is placed closer to the top reference array but not symmetrically. Similarly, when the block is tall (i.e., W < H), it is placed closer to the left reference array but not symmetrically. This asymmetry is shown in Figure 2 in.

[0046] Figure 2 shows rectangular target blocks (a flat block on the left, a tall block on the right) and their top and left reference arrays. The target blocks are not symmetrically placed with respect to the two reference arrays.

[0047] The result of this asymmetry is that for some prediction modes, the target pixel will be predicted based on the farther reference array, while the closer reference array will be excluded due to the defined angles. This is shown in Figure 3 in.

[0048] Figure 3Rectangular target blocks are shown (flat block on the left, tall block on the right) and their top and left reference arrays. On the left, target pixel A has a predictor sample L on the left reference array with a horizontal prediction direction. Although sample T on the top reference array is closer, vertical prediction directions are not allowed in JEM (so that T can be a predictor sample for A). The right figure shows a similar situation for a target pixel in the tall block.

[0049] The flatter or taller the block (ie, the higher the ratio of long side to short side), the more pronounced this asymmetry is. Due to the inaccuracy of the prediction, this predicted pattern becomes unlikely as can be seen from actual test results.

[0050] Another argument for inefficiency in the currently defined directions is the equal number of horizontal and vertical prediction directions. In JEM, there are 32 modes in both horizontal and vertical directions, except for the diagonal mode (mode 34). For square CUs with equal height and width, it makes sense to have the same number of prediction modes along the horizontal and vertical directions. When the block is rectangular and one side is longer than the other, the number of prediction directions in the long side should be higher, simply because the number of structural directions in that side may be higher. For flat blocks, the ratio of the number of vertical to horizontal modes should be approximately the ratio of width to height. Similarly, for tall blocks, the ratio of the number of horizontal to vertical modes should be approximately the ratio of height to width. A related point to consider is the length of the reference array. For square CUs, the height and width are equal, and it makes sense for the length of the reference arrays to be the same. However, for rectangular blocks, intuitively, if the width is greater than the height, then the top reference array should have more samples than the left reference array.

[0051] Similarly, for blocks that are taller than they are wide, the left reference array should have more samples than the top reference array. This intuition is based on the fact that flat (tall) rectangular blocks have more samples or information in the horizontal (vertical) direction. Likewise, tall rectangular blocks have more samples or information in the vertical direction. Therefore, the currently defined directions from 45 degrees to -135 degrees, which result in an equal number of prediction modes in the horizontal and vertical directions, and reference arrays of equal length, are inefficient for rectangular blocks.

[0052] In JEM, a BT (binary tree) target block can have different shapes depending on the length of its width and height. A rectangle is defined by its width W and height H, such as Figure 7 As shown in the figure, if A, B, C and D represent its four vertices, then AC is its main diagonal and BD is its secondary diagonal. When W = H, the square is a special rectangle. Figure 7 The properties of the rectangular block are shown.

[0053] For any target block of width W and height H, mode 2 will be associated with the direction from vertex D towards vertex B along the minor diagonal, and mode 66 will be associated with the direction from vertex B towards vertex D, as Figure 5 As shown in . The diagonal mode is associated with the direction along the main diagonal from vertex A toward vertex C. All modes from mode 2 to the diagonal mode will be referred to as the left mode. Similarly, all modes from the diagonal mode to mode 66, including the diagonal mode, will be referred to as the top mode. The left mode is associated with the horizontal direction. Similarly, the top mode is associated with the vertical direction. The horizontal mode or pure horizontal mode is the left mode corresponding to the zero degree angle. The vertical mode or pure vertical mode is the top mode corresponding to the -90 degree angle.

[0054] Figure 5 The definition of the prediction direction of the rectangular block is shown. Mode 2 is along the minor diagonal from vertex D towards vertex B. Mode 66 is along the opposite direction of Mode 2. Diagonal mode is along the major diagonal from vertex A towards vertex C.

[0055] Figure 6 The top reference array is shown to have a length of 2W+1 and the left reference array has a length of 2H+1. The width W and height H are Figure 6 Dimensions of the medium white block.

[0056] To support these prediction directions, a top reference of length 2W+1 and a left reference of length 2H+1 are defined, as Figure 6 In the case of square blocks, this diagram will be similar to Figure 1 is exactly the same as in, where W=H=N.

[0057] Note that for the flat block, the length of the top reference is greater than the length of the left reference array. The same is true for the number of top patterns compared to the left patterns. Similarly, for the tall block, the reverse is true. In this case, the length of the left reference is greater than the length of the top reference array.

[0058] Moreover, the position of the blocks is symmetric with respect to the reference array. When the target blocks are square, there is perfect symmetry and the prediction direction and the length of the reference array exactly match the JEM definition, as Figure 1 Like in.

[0059] The advantage of the above definition is the adaptability of the prediction direction to the block shape. Note that here, modes 2 and 66 are not defined to correspond to directions along angles of 45 degrees and -135 degrees, but to directions along the secondary diagonal. In the case of flat blocks, some directions close to 45 degrees (including 45 degrees) are removed, but an equal number of directions are added exactly in the opposite direction exceeding the -135 degree angle. Similarly, in the case of tall blocks, some directions close to -135 degrees (including -135 degrees) are removed, but an equal number of directions are added exactly in the opposite direction exceeding the 45 degree angle. We call the offset of mode 2 from the 45 degree angle "modeShift", which is defined as the number of modes deleted (between mode 2 and the 45 degree angle), or equivalently, the number of modes added (between the angle -135 degrees and mode 66). Flat blocks have positive modeShift, while tall blocks will have negative modeShift. For square blocks, modeShift is equal to 0.

[0060] The modeShift of a block represents the offset of its starting mode (i.e., mode 2) relative to the starting mode of a square block. Obviously, it is a function of the shape of the block. An important observation to make is that the modeShift of a block does not depend on the absolute values ​​of its width and height, but on their ratio. This is in Figure 7 . Rectangle ABCD (width W1 and height H1) and rectangle EFGH (width W2 and height H2) have the same prediction direction (thus, the same modeShift). Using the similarity of triangles, it can be shown that W1 / W2=H1 / H2. Therefore, W1 / H1=W2 / H2. Therefore, blocks with the same aspect ratio (and vice versa) will have the same prediction mode in both horizontal and vertical directions.

[0061] Figure 7 It is shown that blocks with the same aspect ratio (width-to-height ratio) have the same prediction direction and therefore the same modeShift.

[0062] When the blocks are rectangular, wide-angle intra prediction aims to define a better set of intra prediction directions.

[0063] In the case of non-square blocks, for some prediction modes, the target pixel will be predicted from the more distant reference arrays, while the closer reference arrays will be excluded due to the defined angle. Figure 3 Shown in.

[0064] Figure 3Rectangular target blocks are depicted (flat block on the left, tall block on the right) and their top and left reference arrays. On the left, target pixel A has a predictor sample L on the left reference array with a horizontal prediction direction. Although sample T on the top reference array is closer, a vertical prediction direction is not allowed in VTM / BMS (so that T can be a predictor sample for A). The right figure shows a similar situation for a target pixel in the tall block.

[0065] For non-square blocks, it is proposed to replace several conventional angular intra prediction modes with wide-angle directional modes. The replaced modes are signaled using the original method and remapped to the index of the wide-angle mode after parsing. The total number of intra prediction modes remains unchanged, and the intra mode codec remains unchanged.

[0066] To support these prediction directions, it is proposed to define a top reference of length 2W+1, and a left reference of length 2H+1.

[0067] Figure 6 It is depicted that the top reference array has a length of 2W + 1 and the left reference array has a length of 2H + 1. In the case of square blocks, the orientation and length of the reference arrays are exactly the same as in VTM / BMS.

[0068] Figure 8 The intra prediction directions when 65 intra directional modes are used are shown. The diagonal modes correspond to mode #2 (-135 degrees) and mode #66 (45 degrees). Even though some examples are shown with 35 intra directional modes, the embodiments described herein are also applicable to this case.

[0069] Fig. 9 An example of how to replace the angular intra mode with the wide angle mode for non-square blocks in the case of 35 intra directional modes is shown. In this example, mode 2 and mode 3 are replaced with wide angle modes 35 and 36, where the direction of mode 35 points in the opposite direction of mode 3, and the direction of mode 36 points in the opposite direction of mode 4.

[0070] Fig. 9 Shown is the replacement of intra-directions in the case of a flat rectangle (width>height). In this example, 2 modes (#2 and #3) are replaced by wide angle modes (35 and 36).

[0071] for Figure 8 In the case of 65 intra-directional modes, wide-angle intra prediction can transmit up to 10 modes. If the width of the block is greater than the height, then, for example, under the general embodiment described herein, modes #2 to #11 are removed and modes #67 to #76 are added.

[0072] PDPC, currently adopted in draft for the future H.266 / VVC standard, applies to several intra modes: planar, DC, horizontal, vertical, diagonal modes, and so-called adjacent diagonal modes (i.e., directions close to a diagonal). Figure 3 In the example of , the diagonal patterns correspond to patterns 2 and 34. If two adjacent patterns are added in each diagonal direction, the adjacent patterns may include, for example, patterns 3, 4, 32, 33. In the current design of the PDPC employed, 8 patterns are considered per diagonal, i.e., a total of 16 adjacent diagonal patterns. The PDPC for diagonal and adjacent diagonal patterns is described in detail below.

[0073] Figure 4 (a) illustrates the reference sample R used to extend the PDPC to the upper right diagonal pattern. x,-1 , R -1,y and R -1,-1 The prediction sample pred(x',y') is located at (x',y') in the prediction block. The reference sample R x,-1 The coordinate x of is given by: x = x' + y' + 1, with reference to the sample point R -1,y The coordinate y of is similarly given by: y=x'+y'+1.

[0074] The PDPC weights for the upper right diagonal pattern are:

[0075] wT=16>>((y'<<1)>>shift), wL=16>>((x'<<1)>>shift), wTL=0.

[0076] Figure 4 The definition of the samples used by the PDPC extension to diagonal and adjacent angle intra modes is shown.

[0077] Similarly, Figure 4 (b) illustrates the reference sample R used to extend the PDPC to the lower left diagonal pattern. x,-1 , R -1,y and R -1,-1 The definition of reference point R x,-1 The coordinate x of is given by: x = x' + y' + 1, with reference to the sample point R -1,y The coordinate y is: y = x' + y' + 1. The PDPC weights for the upper right diagonal pattern are: wT = 16 >> ((y' << 1) >> shift), wL = 16 >> ((x' << 1) >> shift), wTL = 0. The adjacent upper right diagonal pattern is Figure 4(c) shows the PDPC weights for the adjacent upper right diagonal pattern: wT=32>>((y'<<1)>>shift), wL=0, wTL=0. Similarly, Figure 4 The case of the adjacent lower left diagonal mode is illustrated in (d). The PDPC weights for the adjacent lower left diagonal mode are: wL=32>>((x'<<1)>>shift), wT=0, wTL=0. The reference sample coordinates for the last two cases are calculated using the table already used for angular mode intra prediction. If fractional reference sample coordinates are calculated, linear interpolation of the reference samples is used.

[0078] In the case of diagonal mode and adjacent diagonal mode, there is an interaction with wide angle intra prediction.

[0079] First, in the current JEM design, for any block, the available reference points are located in the top and left segments of size width+heigh+1, as Figure 1 . In the case of diagonal corners, PDPC can be applied to any pixel in the block because R(x, -1) and R(-1, y) are always available. This is not the case for adjacent diagonal corners where a line through the lower right pixel of the block may not intersect an available sample segment. In that case, PDPC is partially applied to the block, which requires a pixel-by-pixel test of the availability of reference samples. This can be considered an implementation complexity issue.

[0080] Some embodiments of the described general aspect are also aimed at solving this problem.

[0081] In the described embodiment, it is proposed to modify the set of modes to which PDPC is applied in case of non-square blocks.

[0082] In the current JEM design, the set of adjacent patterns does not include extended patterns. Figure 3 In the above example, modes #35 and #36 cannot benefit from PDPC.

[0083] It is proposed to extend the adjacent diagonal mode to an increased wide angle mode.

[0084] Variant 1:

[0085] In addition to the diagonal and adjacent diagonal modes, PDPC is also applied to all wide-angle modes.

[0086] Variant 2:

[0087] Apply PDPC to as many adjacent patterns as possible from each side of the diagonal pattern.

[0088] Variant 3:

[0089] Since neighboring patterns raise the problem of partially applying PDPC on a block, since reference samples are not always available, it is proposed not to apply PDPC to existing neighboring patterns (e.g. Figure 3 33) in , but rather applies it to the extended directions, since reference samples are available on both sides for these directions.

[0090] Variant 4:

[0091] In the case of non-square blocks, instead of considering the diagonal pattern as 45 degrees or -135 degrees as in the current case, the last extended wide angle direction is considered as a diagonal, and the adjacent angles to this new direction are taken as the adjacent diagonal patterns for PDPC.

[0092] like Figure 4 As described in , in the case of adjacent diagonal patterns, PDPC requires the availability of both top and left reference samples.

[0093] As given in JVET-K0500, wide angle intra prediction modifies the size of the reference sample buffer from width + height + 1 to 2*height + 1 and 2*height + 1 for the left and top rows, for the left and right reference buffers, respectively. This modifies the available samples for PDPC.

[0094] Variant 5:

[0095] It is proposed not to reduce the size of the reference sample buffer associated with the minimum side. Figure 2 The flat block in (left) uses width+height+1 samples instead of 2*height+1 samples. This solves the case of diagonal PDPC, which can be applied to the entire block in the current design, but cannot be applied to the bottom right sample of the current block if the size is changed to 2*height+1. In that case, all wide angle modes can also fully benefit from PDPC, i.e., all samples of the block can be processed.

[0096] Variant 6:

[0097] If the reference buffer size is not extended, then when no reference samples are available, the use of PDPC is not restricted and the value of the last reference sample in the row is obtained.

[0098] Fig.10One embodiment of a method 1000 for encoding a block of video data using the general aspects described herein is shown in FIG. 1001. The method begins at a START block 1001 and control proceeds to a function block 1010 for predicting samples of a non-square video block using at least one of N reference samples from a row above the non-square video block or at least one of M reference samples from a column to the left of the non-square video block. Control then proceeds from block 1010 to block 1020 to encode the non-square video block using the prediction in an intra-coding mode.

[0099] Fig.11 One embodiment of a method 1100 for decoding a block of video data using the general aspects described herein is shown in FIG. The method begins at a START block 1101 and control proceeds to a function block 1110 for predicting samples of a non-square video block using at least one of N reference samples in a row above the non-square video block or at least one of M reference samples in a column to the left of the non-square video block. Control then proceeds from block 1110 to block 1120 to decode the non-square video block using the prediction in an intra-coding mode.

[0100] Fig.12 One embodiment of an apparatus 1200 for encoding or decoding a block of video data is shown. The apparatus includes a processor 1210 and may be interconnected to a memory 1220 via at least one port. Both the processor 1210 and the memory 1220 may have one or more additional interconnects to connect to the outside.

[0101] Processor 1210 is configured to encode or decode video data by predicting samples of the non-square video block using at least one of N reference samples from a row above the non-square video block or at least one of M reference samples from a column to the left of the non-square video block, and either encoding or decoding the non-square video block using prediction in an intra-coding mode.

[0102] This document describes various aspects including tools, features, embodiments, models, methods, etc. Many of these aspects are described specifically and at least for the purpose of illustrating individual features, and are often described in a manner that may sound restrictive. However, this is for clarity of description and does not limit the application or scope of those aspects. In fact, all of the different aspects can be combined and interchanged to provide additional aspects. Moreover, these aspects can also be combined and interchanged with aspects described in previous applications.

[0103] The embodiments described and contemplated in this embodiment can be implemented in many different forms. Fig.13 ,14 15 provide some embodiments, but other embodiments are contemplated and are Fig.13 , 14 The discussion of 15 does not limit the breadth of the embodiments. At least one of these aspects generally relates to video encoding and decoding, and at least another aspect generally relates to transmitting a generated or encoded bitstream. These and other aspects can be implemented as methods, apparatus, a computer-readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the methods described, and / or a computer-readable storage medium having stored thereon a bitstream generated according to any of the methods described.

[0104] In this application, the terms "reconstructed" and "decoded" are used interchangeably, the terms "pixel" and "sample" are used interchangeably, and the terms "image", "picture" and "frame" are used interchangeably. Usually, but not necessarily, the term "reconstructed" is used on the encoder side, while "decoded" is used on the decoder side.

[0105] Various methods are described herein, and each method includes one or more steps or actions for implementing the described method. Unless a specific order of steps or actions is required for proper operation of the method, the order and / or use of specific steps and / or actions may be modified or combined.

[0106] The various methods and other aspects described in this document can be used to modify Fig.13 and Fig.14 Modules of the video encoder 100 and decoder 200 shown, for example, intra prediction, entropy coding and / or decoding modules (160, 260, 145, 230). Moreover, the present aspects are not limited to VVC or HEVC, and may be applied to, for example, other standards and recommendations (whether pre-existing or developed in the future), as well as extensions of any such standards and recommendations (including VVC and HEVC). Unless otherwise indicated or technically prohibited, the various aspects described in this document may be used alone or in combination.

[0107] Various numerical values ​​are used in this document, such as {{1,0}, {3,1}, {1,1}}. The specific values ​​are for example purposes, and the described aspects are not limited to these specific values.

[0108] Fig.13 An encoder 100 is illustrated. Variations of this encoder 100 are contemplated, but for clarity, the encoder 100 is described below without describing all contemplated variations.

[0109] Before being encoded, the video sequence may be processed by pre-encoding (101), for example, applying a color transform to an input color picture (e.g., conversion from RGB 4:4:4 to YCbCr 4:2:0), or performing a remapping of the input picture components in order to obtain a signal distribution that is more resilient to compression (e.g., using histogram equalization of one of the color components). Metadata may be associated with the pre-processing and appended to the bitstream.

[0110] In encoder 100, a picture is encoded by encoder elements as described below. The picture to be encoded is segmented (102) and processed in units such as CUs. Each unit is encoded using, for example, either intra or inter mode. When the unit is encoded in intra mode, it performs intra prediction (160). In inter mode, motion estimation (175) and compensation (170) are performed. The encoder decides (105) which of intra mode or inter mode to use to encode the unit, and indicates the intra / inter decision by, for example, a prediction mode flag. The prediction residual is calculated, for example, by subtracting (110) the predicted block from the original image block.

[0111] The prediction residual is then transformed (125) and quantized (130). The quantized transform coefficients, along with motion vectors and other syntax elements, are entropy encoded (145) to output a bitstream. The encoder may skip the transform and apply quantization directly to the untransformed residual signal. The encoder may bypass both the transform and quantization, i.e., the residual is directly encoded and decoded without applying a transform or quantization process.

[0112] The encoder decodes the encoded block to provide a reference for further prediction. The quantized transform coefficients are dequantized (140) and inverse transformed (150) to decode the prediction residual. The image block is reconstructed by combining (155) the decoded prediction residual and the predicted block. A loop filter (165) is applied to the reconstructed picture to perform, for example, deblocking / SAO (sample adaptive offset) filtering to reduce coding artifacts. The filtered image is stored in a reference picture buffer (180).

[0113] Fig.14 FIG. 2 shows a block diagram of a video decoder 200. In the decoder 200, a bitstream is decoded by decoder elements as described below. The video decoder 200 generally performs a decoding pass corresponding to an encoding pass, such as Fig.13 The encoder 100 also typically performs video decoding as part of encoding the video data.

[0114] In particular, the input to the decoder includes a video bitstream, which may be generated by the video encoder 100. The bitstream is first entropy decoded (230) to obtain transform coefficients, motion vectors, and other coded information. Picture segmentation information indicates how the picture is segmented. Thus, the decoder can divide (235) the picture according to the decoded picture segmentation information. The transform coefficients are dequantized (240) and inverse transformed (250) to decode the prediction residual. The decoded prediction residual and the prediction block are combined (255) to reconstruct the image block. The prediction block can be obtained (270) from an intra-frame prediction (260) or a motion compensated prediction (i.e., inter-frame prediction) (275). A loop filter (265) is applied to the reconstructed image. The filtered image is stored in a reference picture buffer (280).

[0115] The decoded picture may also undergo post-decoding processing (285), such as performing an inverse color transform (e.g., conversion from YCbCr 4:2:0 to RGB 4:4:4) or inverse remapping that is the inverse of the remapping process performed in the pre-encoding process (101). The post-decoding processing may use metadata derived in the pre-encoding process and signaled in the bitstream.

[0116] Fig.15 The block diagram of the example of the system in which various embodiments are implemented is illustrated.System 1000 can be implemented as the equipment including various components described below, and is configured to perform one or more aspects described in this document.The example of such equipment includes but is not limited to various electronic devices, such as personal computers, laptop computers, smart phones, tablet computers, digital multimedia set-top boxes, digital television receivers, personal video recording systems, networked household appliances, and servers.The elements of system 1000 can be implemented in a single integrated circuit, multiple ICs and / or discrete components individually or in combination.For example, in at least one embodiment, the processing and encoder / decoder elements of system 1000 are distributed on multiple ICs and / or discrete components.In various embodiments, system 1000 is coupled to other similar systems or other electronic devices via, for example, a communication bus or by dedicated input and / or output port communication.In various embodiments, system 1000 is configured to realize one or more aspects described in this document.

[0117] The system 1000 includes at least one processor 1010, which is configured to execute instructions loaded therein to implement various aspects described in this document, for example. The processor 1010 may include embedded memory, input and output interfaces, and various other circuit systems known in the art. The system 1000 includes at least one memory 1020 (e.g., a volatile memory device, and / or a non-volatile memory device). The system 1000 includes a storage device 1040, which may include a non-volatile memory and / or a volatile memory, including but not limited to an EEPROM, a ROM, a PROM, a RAM, a DRAM, an SRAM, a flash memory, a disk drive, and / or an optical drive. As a non-limiting example, the storage device 1040 may include an internal storage device, an attached storage device, and / or a network accessible storage device.

[0118] The system 1000 includes an encoder / decoder module 1030, which is configured to process data to provide encoded video or decoded video, for example, and the encoder / decoder module 1030 may include its own processor and memory. The encoder / decoder module 1030 represents a module (one or more) that can be included in a device to perform encoding and / or decoding functions. As is known, a device may include one or both of the encoding and decoding modules. In addition, the encoder / decoder module 1030 can be implemented as a separate element of the system 1000, or can be combined in the processor 1010 as a combination of hardware and software, as known to those skilled in the art.

[0119] Program code to be loaded onto the processor 1010 or the encoder / decoder 1030 to perform various embodiments described in this document may be stored in the storage device 1040 and subsequently loaded onto the memory 1020 for execution by the processor 1010. According to various embodiments, during execution of the processes described in this document, one or more of the processor 1010, the memory 1020, the storage device 1040, and the encoder / decoder module 1030 may store one or more of various items. Such stored items may include, but are not limited to, input video, decoded video or a portion of decoded video, bitstreams, matrices, variables, and intermediate or final results of equations, formulas, operations, and operation logic.

[0120] In several embodiments, memory within the processor 1010 and / or encoder / decoder module 1030 is used to store instructions and provide working memory for processing required during encoding or decoding. However, in other embodiments, memory external to the processing device (e.g., the processing device may be either the processor 1010 or the encoder / decoder module 1030) is used for one or more of these functions. The external memory may be memory 1020 and / or storage device 1040, such as dynamic volatile memory and / or non-volatile flash memory. In several embodiments, external non-volatile flash memory is used to store the operating system of the television. In at least one embodiment, a fast external dynamic volatile memory (such as RAM) is used as working memory for video encoding and decoding operations, such as for MPEG-2, HEVC, or VVC (universal video codec).

[0121] As shown in block 1130, input to the elements of system 1000 may be provided through various input devices. Such input devices include, but are not limited to, (i) an RF section that receives an RF signal transmitted over the air, for example, by a broadcaster, (ii) a composite input terminal, (iii) a USB input terminal, and / or (iv) an HDMI input terminal.

[0122] In various embodiments, the input device of block 1130 has associated corresponding input processing elements, as known in the art. For example, the RF portion may be associated with the following elements: (i) selecting a desired frequency (also referred to as selecting a signal, or band limiting a signal within a frequency band), (ii) down-converting the selected signal, (iii) again band-limiting to a narrower frequency band to select a signal band that may be referred to as a channel in some embodiments, (iv) demodulating the down-converted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select a desired data packet stream. The RF portion of various embodiments includes one or more elements that perform these functions, such as a frequency selector, a signal selector, a band limiter, a channel selector, a filter, a down-converter, a demodulator, an error corrector, and a demultiplexer. The RF portion may include a tuner that performs various of these functions, including, for example, down-converting a received signal to a lower frequency (e.g., an intermediate frequency or near baseband frequency) or baseband. In a set-top box embodiment, the RF part and its associated input processing element receive the RF signal transmitted on wired (for example, cable) medium, and filter to the frequency band of expectation again by filtering, down-conversion and perform frequency selection.Various embodiments rearrange the order of above-mentioned (and other) elements, remove some in these elements, and / or add other elements of similar or different functions.Adding element can include inserting element between existing element, for example, inserting amplifier and analog-to-digital converter.In various embodiments, the RF part comprises antenna.

[0123] In addition, the USB and / or HDMI terminals may include corresponding interface processors for connecting the system 1000 to other electronic devices across the USB and / or HDMI connections. It should be understood that various aspects of input processing (e.g., Reed-Solomon error correction) may be implemented, for example, within a separate input processing IC or within the processor 1010. Similarly, various aspects of USB or HDMI interface processing may be implemented within a separate interface IC or within the processor 1010. The demodulated, error corrected, and demultiplexed streams are provided to various processing elements, including, for example, the processor 1010, and an encoder / decoder 1030 operating in conjunction with memory and storage elements to process the data stream for presentation on an output device.

[0124] The various elements of the system 1000 may be provided within an integrated housing. Within the integrated housing, the various elements may be interconnected and data may be transferred between them using a suitable connection arrangement 1140 (eg, an internal bus known in the art, including an I2C bus, wiring, and printed circuit boards).

[0125] The system 1000 includes a communication interface 1050 that enables communication with other devices via a communication channel 1060. The communication interface 1050 may include, but is not limited to, a transceiver configured to transmit and receive data through the communication channel 1060. The communication interface 1050 may include, but is not limited to, a modem or a network card, and the communication channel 1060 may be implemented, for example, within a wired and / or wireless medium.

[0126] In various embodiments, a wireless network such as IEEE 802.11 is used to transmit data streams to the system 1000. The wireless signals of these embodiments are received on a communication channel 1060 and a communication interface 1050, for example, suitable for Wi-Fi communication. The communication channel 1060 of these embodiments is usually connected to an access point or a router, which provides access to an external network including the Internet to allow streaming applications and other air communications. Other embodiments use a set-top box to provide streaming data to the system 1000, which is connected to the HDMI of an input block 1130 to deliver data. Still other embodiments use the RF connection of an input block 1130 to provide streaming data to the system 1000.

[0127] The system 1000 can provide output signals to various output devices including a display 1100, a speaker 1110, and other peripherals 1120. In various examples of embodiments, the other peripherals 1120 include one or more of a stand-alone DVR, a disc player, a stereo system, a lighting system, and other devices that provide functions based on the output of the system 1000. In various embodiments, control signals are transmitted between the system 1000 and the display 1100, the speaker 1110, or other peripherals 1120 using signaling such as AV.Link, CEC, or other communication protocols that enable device-to-device control, with or without user intervention. The output devices can be communicatively coupled to the system 1000 via dedicated connections through the respective interfaces 1070, 1080, and 1090. Alternatively, the output devices can be connected to the system 1000 using a communication channel 1060 via a communication interface 1050. In an electronic device (e.g., a television), the display 1100 and the speaker 1110 can be integrated into a single unit with the other components of the system 1000. In various embodiments, the display interface 1070 includes a display driver, such as a timing controller (T Con) chip.

[0128] For example, if the RF portion of input 1130 is part of a separate set-top box, then the display 1100 and speaker 1110 may alternatively be separate from one or more of the other components. In various embodiments where the display 1100 and speaker 1110 are external components, the output signals may be provided via dedicated output connections including, for example, an HDMI port, a USB port, or a COMP output.

[0129] The embodiments may be implemented by computer software implemented by the processor 1010 or by hardware or by a combination of hardware and software. As a non-limiting example, the embodiments may be implemented by one or more integrated circuits. The memory 1020 may be of any type suitable for the technical environment and may be implemented using any appropriate data storage technology, such as, as a non-limiting example, optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory. The processor 1010 may be of any type suitable for the technical environment and, as a non-limiting example, may include one or more of a microprocessor, a general-purpose computer, a special-purpose computer, and a processor based on a multi-core architecture.

[0130] Various embodiments relate to decoding. As used in this application, "decoding" can encompass, for example, all or part of the processing performed on a received encoded sequence to produce a final output suitable for display. In various embodiments, such processing includes one or more of the processing typically performed by a decoder, such as entropy decoding, inverse quantization, inverse transform, and differential decoding. In various embodiments, such processing also, or alternatively, includes processing performed by a decoder of various embodiments described in this application, such as extracting indices of weights to be used for various intra-frame prediction reference arrays.

[0131] As another example, in one embodiment, "decoding" refers only to entropy decoding, in another embodiment, "decoding" refers only to differential decoding, and in another embodiment, "decoding" refers to a combination of entropy decoding and differential decoding. Whether the phrase "decoding process" is intended to refer specifically to a subset of operations or broadly to a broader decoding process will be apparent based on the context of the particular description and is believed to be well understood by those skilled in the art.

[0132] Various embodiments relate to encoding. In a manner similar to the discussion above about "decoding", as used in this application, "encoding" can cover, for example, all or part of the processing performed on an input video sequence to produce an encoded bitstream. In various embodiments, such processing includes one or more of the processing typically performed by an encoder, such as segmentation, differential encoding, transforms, quantization, and entropy encoding. In various embodiments, such processing also, or alternatively, includes processing performed by the encoder of the various embodiments described in this application, such as weighting of an intra-frame prediction reference array.

[0133] As another example, in one embodiment, "encoding" refers only to entropy encoding, in another embodiment, "encoding" refers only to differential encoding, and in another embodiment, "encoding" refers to a combination of differential encoding and entropy encoding. Whether the phrase "encoding process" is intended to refer specifically to a subset of operations or broadly to a broader encoding process will be apparent based on the context of the particular description and will be well understood by those skilled in the art.

[0134] Note that the grammatical elements used herein are descriptive terms. As such, they do not exclude the use of other grammatical element names.

[0135] When a figure is presented as a flow chart, it should be understood that it also provides a block diagram of the corresponding apparatus. Similarly, when a figure is presented as a block diagram, it should be understood that it also provides a flow chart of the corresponding method / process.

[0136] Various embodiments relate to rate-distortion calculation or rate-distortion optimization. In particular, during the encoding process, constraints on computational complexity are often given, and a balance or trade-off between rate and distortion is usually considered. Rate-distortion optimization is usually formulated as minimizing a rate-distortion function, which is a weighted sum of rate and distortion. There are different methods for solving the rate-distortion optimization problem. For example, these methods can be based on extensive testing of all coding options, including all considered modes or codec parameter values, and a complete evaluation of their coding and decoding costs and the associated distortion of the reconstructed signal after coding and decoding. Faster methods can also be used to save coding complexity, in particular, to calculate approximate distortion based on prediction or prediction residual signals rather than reconstructed signals. A mixture of these two methods can also be used, such as by using approximate distortion only for some possible coding options and using full distortion for other coding options. Other methods only evaluate a subset of possible coding options. More generally, many methods use any of a variety of techniques to perform optimization, but optimization is not necessarily a complete evaluation of both coding and decoding costs and associated distortions.

[0137] The embodiments and aspects described herein can be implemented, for example, in methods or processes, devices, software programs, data streams or signals. Even if only discussed in the context of a single form of embodiment (e.g., discussed only as a method), the embodiments of the features discussed can also be implemented in other forms (e.g., devices or programs). The device can be implemented, for example, with appropriate hardware, software and firmware. The method can be implemented in, for example, a processor, which generally refers to a processing device, including, for example, a computer, a microprocessor, an integrated circuit or a programmable logic device. The processor also includes a communication device, such as, for example, a computer, a mobile phone, a portable / personal digital assistant ("PDA") and other devices that contribute to information communication between end users.

[0138] References to "one embodiment" or "an embodiment" or "one implementation" or "an implementation" and other variations thereof mean that a particular feature, structure, characteristic, etc. described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" or "in one implementation" or "in an implementation" and any other variations throughout this document are not necessarily all referring to the same embodiment.

[0139] Additionally, this document may refer to "determining" various information. Determining information may include, for example, one or more of: estimating information, calculating information, predicting information, or retrieving information from a memory.

[0140] Additionally, this document may refer to "accessing" various information. Accessing information may include, for example, one or more of: receiving information, retrieving information (e.g., from a memory), storing information, moving information, copying information, calculating information, determining information, predicting information, or estimating information.

[0141] Additionally, this document may refer to "receiving" various information. Like "accessing," receiving is a broad term. Receiving information may include one or more of: for example, accessing information or retrieving information (e.g., from storage). Additionally, in one way or another, during operations such as, for example: storing information, processing information, sending information, moving information, copying information, erasing information, calculating information, determining information, predicting information, or estimating information, "receiving" is generally involved.

[0142] It should be appreciated that use of any of the following “ / ”, “and / or”, and “at least one of”, for example, in the context of “A / B”, “A and / or B”, and “at least one of A and B” is intended to encompass selection of only the first listed option (A), or only the second listed option (B), or both options (A and B). As a further example, in the context of “A, B, and / or C” and “at least one of A, B, and C”, such wording is intended to encompass selection of only the first listed option (A), or only the second listed option (B), or only the third listed option (C), or only the first and second listed options (A and B), or only the first and third listed options (A and C), or only the second and third listed options (B and C), or all three options (A and B and C). This may be extended to multiple items listed, as will be apparent to one of ordinary skill in this and related arts.

[0143] Moreover, as used herein, the word "signal" especially refers to a corresponding decoder indicating something. For example, in some embodiments, the encoder signals a specific weight to be used for the intra-frame prediction reference array in a plurality of weights. In this way, in an embodiment, the same parameters are used on both the encoder side and the decoder side. Therefore, for example, the encoder can transmit (explicitly signal) specific parameters to the decoder so that the decoder can use the same specific parameters. On the contrary, if the decoder already has specific parameters and other parameters, signaling can be used without transmission (implicit signaling) to simply allow the decoder to know and select specific parameters. By avoiding the transmission of any actual function, bit saving is achieved in various embodiments. It should be recognized that signaling can be completed in a variety of ways. For example, in various embodiments, one or more syntax elements, flags, etc. are used to signal information to the corresponding decoder. Although the verb form of the word "signaling" is mentioned above, the word "signaling" can also be used as a noun signaling in this article.

[0144] As will be apparent to one of ordinary skill in the art, embodiments may generate various signals formatted to carry information that may be stored or transmitted, for example. The information may include, for example, instructions for executing a method or data generated by one of the described embodiments. For example, a signal may be formatted to carry a bit stream of the described embodiments. Such a signal may be formatted as, for example, an electromagnetic wave (e.g., using a radio frequency portion of a spectrum) or a baseband signal. Formatting may include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information carried by the signal may be, for example, analog or digital information. As is known, the signal may be transmitted over a variety of different wired or wireless links. The signal may be stored on a processor readable medium.

[0145] The foregoing description has described a number of embodiments. These and other embodiments include the following optional features, alone or in any combination, in various claim categories and types:

[0146] - Use prediction directions during intra prediction for encoding and decoding over -135 degrees and 45 degrees

[0147] -Extended interaction between wide angle mode and PDPC

[0148] - Expand the prediction directions horizontally or vertically while removing some directions in the opposite direction to maintain the same number of total directions

[0149] - The number of directions extended beyond -135 degrees and beyond 45 degrees

[0150] - Combine PDPC and wide angle intra prediction into samples in the block

[0151] - Signaling from encoder to decoder which prediction directions are being used

[0152] -Use a subset of prediction directions

[0153] - A block is a CU with a rectangular shape

[0154] - The other block is a neighboring block

[0155] - a bitstream or signal comprising one or more of the described syntax elements or variations thereof.

[0156] - Insertion of signalling syntax elements that enable the decoder to process the bitstream in the opposite way to what the encoder did.

[0157] - creating and / or sending and / or receiving and / or decoding a bitstream or signal comprising one or more of the described syntax elements or variations thereof.

[0158] - A TV, set-top box, mobile phone, tablet or other electronic device implementing any of the described embodiments.

[0159] - A TV, set-top box, mobile phone, tablet or other electronic device that executes any of the described embodiments and displays (eg using a monitor, screen or other type of display) the resulting images.

[0160] - A TV, set-top box, mobile phone, tablet or other electronic device that tunes (eg, using a tuner) to a channel to receive a signal comprising an encoded image and performs any of the described embodiments.

[0161] - A TV, set-top box, mobile phone, tablet or other electronic device that receives (eg using an antenna) a signal comprising the encoded image and performs any of the described embodiments.

[0162] - Various other broad and characterizing inventions and features are also supported and contemplated throughout this disclosure.

Claims

1. A method comprising: predicting samples of the non-square video block using at least one of N reference samples from a row above the non-square video block or at least one of M reference samples from a left column of the non-square video block; as well as The non-square video block is encoded using the prediction in intra coding mode.

2. A device comprising: The processor is configured as: predicting samples of the non-square video block using at least one of N reference samples from a row above the non-square video block or at least one of M reference samples from a left column of the non-square video block; as well as The non-square video block is encoded using the prediction in intra coding mode.

3. A method comprising: predicting samples of the non-square video block using at least one of N reference samples from a row above the non-square video block or at least one of M reference samples from a left column of the non-square video block; as well as The non-square video block is decoded using the prediction in intra coding mode.

4. A device comprising: The processor is configured as: predicting samples of the non-square video block using at least one of N reference samples from a row above the non-square video block or at least one of M reference samples from a left column of the non-square video block; as well as The non-square video block is decoded using the prediction in intra coding mode.

5. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein the prediction comprises a weighted combination of the reference samples.

6. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein a ratio of N to M is substantially equal to a ratio of a width to a height of the non-square video block.

7. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein the intra-frame coding mode uses reference samples from the N reference samples above the non-square video block and the M reference samples from the left side of the non-square video block.

8. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein N is twice the width of the non-square video block, and M is twice the height of the non-square video block.

9. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein the intra prediction mode extends beyond angles of 45 degrees and -135 degrees.

10. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein the N is greater than the width of the non-square block, and wherein the N reference samples extend beyond the right edge of the non-square block.

11. The method of claim 1 or 3, or the apparatus of claim 2 or 4, wherein the M is greater than the height of the non-square block, and wherein the M reference samples extend beyond the bottom edge of the non-square block.

12. A device comprising: An apparatus according to any one of claims 4 to 11; as well as At least one of: (i) an antenna configured to receive a signal, the signal comprising a video block; (ii) a frequency band limiter configured to limit the received signal to a frequency band comprising the video block, and (iii) a display configured to display an output representing the video block.

13. A non-transitory computer-readable medium comprising data content generated by the method according to any one of claims 1 and 5 to 11 or by the apparatus according to any one of claims 2 and 5 to 11 for playback using a processor.

14. A signal comprising video data generated by a method according to any one of claims 1 and 5 to 11 or by an apparatus according to any one of claims 2 and 5 to 11 for playback using a processor.

15. A computer program product comprising instructions which, when executed by a computer, cause the computer to perform the method of any one of claims 1, 3 and 5 to 11.