Light emitting diode and light emitting device
By inserting a dielectric layer containing aluminum into the structure of the light emitting diode, the problems of many defects, congested carriers and poor ESD performance of the small-sized light emitting diode are solved, and higher luminous efficiency and chip reliability are achieved.
Patent Information
- Application Number
- CN202411675756.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-21
- Publication Date
- 2025-03-14
AI Technical Summary
The existing small-size light-emitting diodes have problems such as many defects, congested carriers, and poor ESD performance.
Defect shielding and electron blocking are achieved, and ESD performance and luminous efficiency are improved by inserting a high aluminum-containing first dielectric layer between the unintentionally doped layer and the highly doped first n-type layer, and a low aluminum-containing second dielectric layer between the low doped second n-type layer and the light emitting layer.
It effectively reduces carrier congestion, improves the luminous efficiency and overall quality of the light emitting diode, and improves the reliability of the chip.
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Figure CN119630137A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a light emitting diode and a light emitting device. Background Art
[0002] Light Emitting Diode (LED) is a semiconductor light-emitting element, usually made of semiconductors such as GaN, GaAs, GaP, GaAsP, etc., and its core is a PN junction with light-emitting characteristics. LED has the advantages of high luminous intensity, high efficiency, small size, and long service life, and is considered to be one of the most promising light sources at present. LED has been widely used in lighting, monitoring and command, high-definition broadcasting, high-end cinemas, office displays, conference interaction, virtual reality and other fields.
[0003] At present, small-sized light-emitting diodes (such as Mini LEDs) are widely used in backlight displays to achieve more precise dynamic backlight effects. However, existing small-sized light-emitting diodes generally have many defects, carrier crowding, and poor ESD performance. Therefore, how to solve the above problems has become one of the technical problems that technicians in this field need to solve urgently.
[0004] It should be noted that the information disclosed in this background technology section is only intended to increase the understanding of the overall background of the present invention, and should not be regarded as acknowledging or suggesting in any form that the information constitutes prior art already known to a person skilled in the art. Summary of the invention
[0005] The present invention provides a light emitting diode, which includes a semiconductor stack, wherein the semiconductor stack includes at least an unintentionally doped layer, a first dielectric layer, a first n-type layer, a second n-type layer, a second dielectric layer, a light emitting layer and a p-type layer stacked in sequence. The doping concentration of the first n-type layer is higher than the doping concentration of the second n-type layer, and the materials in the first dielectric layer and the second dielectric layer include an aluminum component, and the aluminum component in the first dielectric layer is higher than the aluminum component in the second dielectric layer.
[0006] The present invention also provides a light-emitting diode, which includes a semiconductor stack, wherein the semiconductor stack includes at least a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence. The first semiconductor layer includes at least an unintentionally doped layer, a first n-type layer, and a second n-type layer, wherein the doping concentration of the first n-type layer is higher than the doping concentration of the second n-type layer, and the first semiconductor layer has an aluminum concentration curve, wherein the aluminum concentration curve includes at least a first peak and a second peak, wherein the first peak is located on a side of the first n-type layer away from the light-emitting layer, and the second peak is located on a side of the first n-type layer close to the light-emitting layer.
[0007] The present invention further provides a light emitting device, which includes a light emitting diode. The light emitting diode is the light emitting diode provided by any of the above embodiments.
[0008] A light-emitting diode and a light-emitting device provided by an embodiment of the present invention can solve the problems of many defects, carrier crowding, and poor ESD performance of the light-emitting diode by inserting aluminum-containing dielectric layers before and after the highly doped first n-type layer, thereby improving the quality of the light-emitting diode. Specifically, by inserting a highly aluminum-containing first dielectric layer between the unintentionally doped layer and the highly doped first n-type layer, the defect shielding effect can be achieved, the ESD performance can be improved, and then the chip reliability can be improved; by inserting a low aluminum-containing second dielectric layer between the low-doped second n-type layer and the light-emitting layer, on the one hand, the defect shielding effect is also achieved, and on the other hand, the wide energy gap material characteristics can be used to play an electron blocking effect, effectively reducing the phenomenon of carrier crowding, and at the same time, the composite luminescence efficiency of electrons and holes in the light-emitting layer can be improved, thereby improving the luminescence efficiency of the light-emitting diode.
[0009] Other features and beneficial effects of the present invention will be described in the following description, and some of the technical features and beneficial effects can be obviously derived from the description or understood by implementing the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, some of the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0011] Figure 1 is a schematic structural diagram of a light emitting diode provided by a first embodiment of the present invention; Figure 2 is a schematic structural diagram of a composite layer provided by an embodiment of the present invention; Figure 3 is a schematic structural diagram of a light emitting diode provided by a second embodiment of the present invention; Figure 4 It is a schematic diagram of an aluminum concentration curve of a light-emitting diode provided by an embodiment of the present invention.
[0012] Reference numerals: 10-substrate; 12-unintentionally doped layer; 14-first dielectric layer; 16-first n-type layer; 18-second n-type layer; 20-second dielectric layer; 22-composite layer; 221-GaN layer; 222-InGaN layer; 24-light-emitting layer; 26-p-type layer; 30-n-type electrode; 32-p-type electrode; n1-first peak shape; n2-second peak shape. DETAILED DESCRIPTION
[0013] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments; the technical features designed in different implementation modes of the present invention described below can be combined with each other as long as they do not conflict with each other; based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0014] In the description of the present invention, it should be understood that the terms "center", "lateral", "up", "down", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more. In addition, the term "including" and any variation thereof all mean "at least including".
[0015] An embodiment of the present invention provides a light-emitting diode, which includes a semiconductor stack, which includes at least an unintentionally doped layer, a first dielectric layer, a first n-type layer, a second n-type layer, a second dielectric layer, a light-emitting layer, and a p-type layer stacked in sequence. The doping concentration of the first n-type layer is higher than the doping concentration of the second n-type layer, the first dielectric layer and the second dielectric layer include aluminum components, and the aluminum component in the first dielectric layer is higher than the aluminum component in the second dielectric layer. By inserting a high aluminum-containing first dielectric layer between the unintentional doping layer and the highly doped first n-type layer, the defect shielding effect is achieved. Specifically, the small volume of Al atoms in the first dielectric layer is used to fill the defects generated during the growth of the unintentional doping layer, which will be beneficial to the growth of subsequent structural layers, thereby improving the lattice quality, reducing the risk of leakage, and improving the ESD performance, thereby improving the chip reliability; by inserting a low aluminum-containing second dielectric layer between the low-doped second n-type layer and the light-emitting layer, on the one hand, the defect shielding effect is also achieved, which can further block the defects formed during the growth of the unintentional doping layer, and can also block the new defects generated during the growth of the highly doped first n-type layer. On the other hand, its wide energy gap material characteristics can also be used to play an electron blocking effect, which can improve the carrier space distribution density and effectively reduce the phenomenon of carrier crowding. At the same time, the composite luminescence efficiency of electrons and holes in the light-emitting layer can be improved, thereby improving the luminescence efficiency, thereby improving the overall quality of the light-emitting diode. At the same time, the aluminum component in the first dielectric layer is controlled to be higher than the aluminum component in the second dielectric layer, which can ensure that the first dielectric layer effectively blocks dislocation defects and avoid the possibility of lattice mismatch between the active layer and the second dielectric layer.
[0016] In some embodiments, the materials of the first dielectric layer and the second dielectric layer include Al x Ga (1-x) N material, where 0<x≤1. The material of the first dielectric layer and the second dielectric layer can be AlN or AlGaN. The wide energy gap characteristics of AlN or AlGaN can effectively isolate electrons, which can not only improve the spatial distribution density of carriers and effectively reduce the phenomenon of carrier crowding, but also prevent excessive and too fast transition of electrons to the p-type layer for non-radiative recombination with holes, which is conducive to the combination of electrons and holes in the light-emitting layer, and improve the composite luminescence efficiency of electrons and holes in the light-emitting layer, thereby improving the luminescence efficiency.
[0017] In some embodiments, the aluminum component in the first dielectric layer accounts for 5% to 50%, thereby improving the effect of the first dielectric layer in blocking dislocation defects. If the aluminum component in the first dielectric layer is too high (e.g., greater than 50%), there will be a lattice mismatch problem, such as a lattice mismatch between the unintentionally doped layer and the first n-type layer; if the aluminum component in the first dielectric layer is too low (e.g., less than 5%), it will not be able to effectively block dislocation defects. Optionally, the aluminum component in the first dielectric layer accounts for 15% to 30%, preferably 20% to 25%.
[0018] In some embodiments, the second dielectric layer is doped with n-type impurities, and the doping concentration of the second dielectric layer is less than 1E19 atoms / cm 3 The second dielectric layer is doped with a low concentration of n-type impurities, which will be beneficial to current diffusion and reduce the operating voltage.
[0019] In some embodiments, the doping concentration of the first n-type layer is greater than 1E19 atoms / cm 3 In some embodiments, the doping concentration of the second n-type layer is less than 1E19 atoms / cm 3 The first n-type layer is doped with a high concentration of n-type impurities, which will be beneficial to current diffusion and reduce the operating voltage. This is because the current flows horizontally in the first n-type layer. When the Si doping concentration is high, the resistance can be effectively reduced. Therefore, the highly doped first n-type layer is more conducive to current diffusion. The second n-type layer is a low-doped layer. This is because the current flows vertically from the light-emitting layer to the second n-type layer, and the Si doping concentration is low, which can form a high resistance. Therefore, low doping in the second n-type layer will be more conducive to current diffusion.
[0020] In some embodiments, the semiconductor stack further includes a composite layer, which is located between the second dielectric layer and the light-emitting layer, and the composite layer mainly serves as a transition layer.
[0021] In some embodiments, the thickness of the first dielectric layer is greater than that of the second dielectric layer. A thicker first dielectric layer can ensure the effect of effectively blocking dislocation defects, while a thinner second dielectric layer can reduce the possibility of lattice mismatch.
[0022] In some embodiments, the thickness of the first dielectric layer ranges from 20 to 50 nm, and the thickness of the second dielectric layer ranges from 15 to 45 nm. If the first dielectric layer is too thick (e.g., greater than 50 nm), there will be a lattice mismatch problem, and if the second dielectric layer is too thin (e.g., less than 15 nm), it may not be able to effectively block dislocation defects.
[0023] An embodiment of the present invention provides a light-emitting diode, which includes a semiconductor stack, and the semiconductor stack includes at least a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence. The first semiconductor layer includes at least an unintentionally doped layer, a first n-type layer, and a second n-type layer, wherein the doping concentration of the first n-type layer is higher than the doping concentration of the second n-type layer, and the first semiconductor layer has an aluminum concentration curve, wherein the aluminum concentration curve includes at least a first peak and a second peak, wherein the first peak is located on the side of the first n-type layer away from the light-emitting layer, and the second peak is located on the side of the first n-type layer close to the light-emitting layer, and by forming an Al-containing peak before and after the highly doped first n-type layer, Al atoms are used to fill the defects generated during the growth of the unintentionally doped layer and the first n-type layer, which will be beneficial to the growth of subsequent structural layers, thereby improving the lattice quality, reducing the risk of leakage, improving the ESD performance, and thus improving the chip reliability; at the same time, the second Al peak can also play an electron blocking effect, which can not only improve the carrier spatial distribution density, effectively reduce the phenomenon of carrier crowding, but also improve the composite luminescence efficiency of electrons and holes in the light-emitting layer, thereby improving the luminescence efficiency, and thus improving the overall quality of the light-emitting diode.
[0024] In some embodiments, the doping concentration of the first n-type layer is greater than 1E19 atoms / cm 3 In some embodiments, the doping concentration of the second n-type layer is less than 1E19 atoms / cm 3 This setting will facilitate current diffusion and reduce the operating voltage.
[0025] In some embodiments, the maximum value of the first peak is greater than the maximum value of the second peak. Setting the first peak to have a higher Al concentration can ensure the effect of effectively blocking defects formed during the growth of unintentional doping layers, and setting the second peak to have a lower Al concentration can avoid lattice mismatch problems with the light-emitting layer.
[0026] In some embodiments, the maximum value of the first peak is not less than 1.5 times the maximum value of the second peak, thereby further improving the overall quality of the light emitting diode.
[0027] In some embodiments, the first peak is located between the unintentional doping layer and the first n-type layer, and the second peak is located between the first n-type layer and the light-emitting layer. By forming the first peak between the unintentional doping layer and the highly doped first n-type layer, defects generated during the growth of the unintentional doping layer can be blocked, thereby achieving a defect shielding effect. By forming the second peak between the highly doped first n-type layer and the light-emitting layer, on the one hand, defects formed during the growth of the unintentional doping layer and new defects generated during the growth of the highly doped first n-type layer can be further blocked. On the other hand, it can also have an electron blocking effect, effectively reducing the phenomenon of carrier crowding, and at the same time can improve the composite luminescence efficiency of electrons and holes in the light-emitting layer, thereby improving the luminescence efficiency.
[0028] In some embodiments, the semiconductor stack further includes a composite layer, the composite layer is located between the second n-type layer and the light-emitting layer, and the second peak is located between the first n-type layer and the composite layer. The second peak can be formed between the first n-type layer and the composite layer, and the composite layer acts as a transition layer, which can reduce the possibility of lattice mismatch with the light-emitting layer.
[0029] In some embodiments, the second peak is located between the second n-type layer and the composite layer. The second peak can be formed between the low-doped second n-type layer and the composite layer, which can further reduce the possibility of lattice mismatch with the light-emitting layer.
[0030] In some embodiments, the side length of the light emitting diode is no greater than 200 μm, and the light emitting diode is a small-sized light emitting diode.
[0031] An embodiment of the present invention provides a light emitting device, characterized in that the light emitting device includes a light emitting diode, and the light emitting diode is any one of the light emitting diodes described above.
[0032] See also Figure 1 , Figure 1 1 is a schematic diagram of the structure of a light emitting diode provided by the first embodiment of the present invention. In order to achieve at least one of the above advantages or other advantages, the first embodiment of the present invention provides a light emitting diode. As shown in the figure, the light emitting diode includes a semiconductor stack, which at least includes an unintentionally doped layer 12, a first dielectric layer 14, a first n-type layer 16, a second n-type layer 18, a second dielectric layer 20, a light emitting layer 24 and a p-type layer 26 stacked in sequence.
[0033] The unintentionally doped layer 12 is disposed on the substrate 10. The substrate 10 may be a transparent substrate 10 or a semi-transparent substrate 10, wherein the transparent substrate 10 or the semi-transparent substrate 10 may allow the light radiated by the light emitting layer 24 to pass through the substrate 10 to reach the side of the substrate 10 away from the semiconductor stack. For example, the substrate 10 may be any one of a sapphire flat substrate 10, a sapphire patterned substrate 10, a silicon substrate 10, a silicon carbide substrate 10, a gallium nitride substrate 10, and a glass substrate 10. In some embodiments, the substrate 10 may be thinned or removed to form a thin film type chip.
[0034] The material of the unintentionally doped layer 12 may include GaN, which mainly plays a buffer role and can be used to adjust the lattice difference between the substrate 10 and the first n-type layer 16 .
[0035] The materials of the first n-type layer 16 and the second n-type layer 18 can both be N-type doped nitride material layers, such as GaN layers, which provide electrons by doping N-type impurities, and the N-type impurities can include one or a combination of Si, Ge, Sn, Se and Te. Optionally, in this embodiment, the ions doped in the first n-type layer 16 and the second n-type layer 18 include silicon. Compared with the first n-type layer 16 and the second n-type layer 18, the first n-type layer 16 is a highly doped layer and the second n-type layer 18 is a low doped layer, that is, the doping concentration of the first n-type layer 16 is higher than the doping concentration of the second n-type layer 18. Since the first dielectric layer 14 is provided to shield defects, the lattice quality can be improved, so there is no need to firstly form a low-doped n-type layer and then gradually change to a highly doped n-type layer; instead, the highly doped first n-type layer 16 is directly used. Due to the high doping concentration, it is conducive to current diffusion and reduces the operating voltage. This is because the Si doping concentration is high, which can effectively reduce the resistance. Since the current flows in the first n-type layer 16 in a horizontal direction (for example, flowing from left to right in the figure), low resistance is conducive to current diffusion. In addition, the second n-type layer 18 is a low-doped layer, which is conducive to current diffusion and reduces the operating voltage. The Si doping concentration is low, which can form a high resistance. Since the current flows in the direction from the light-emitting layer 24 to the second n-type layer 18 in a vertical direction (for example, flowing from top to bottom in the figure), low doping is used in the second n-type layer 18, and high resistance will be more conducive to current diffusion.
[0036] The materials in the first dielectric layer 14 and the second dielectric layer 20 include aluminum components. The first dielectric layer 14 mainly plays a defect shielding effect, for example, blocking the defects generated during the growth of the unintentionally doped layer 12. Since Al atoms are relatively small, Al atoms can be used to fill the defects, which is beneficial to the growth of subsequent structural layers, thereby improving the lattice quality, reducing the risk of leakage, and enhancing the ESD capability and chip reliability. On the one hand, the second dielectric layer 20 can further block the defects formed during the growth of the unintentionally doped layer 12; on the other hand, the highly doped first n-type layer 16 will also generate new defects during the growth process. The second dielectric layer 20 can be used to block the new defects formed during the growth of the first n-type layer 16 to prevent the defects from extending to the light-emitting layer 24. In some embodiments, its wide energy gap characteristic can also be utilized to effectively isolate electrons, thereby improving the spatial distribution density of carriers and effectively reducing the phenomenon of carrier crowding. At the same time, it can prevent excessive and rapid transition of electrons to the p-type layer 26 for non-radiative recombination with holes, which will be beneficial to the combination of electrons and holes in the light-emitting layer 24, thereby improving the composite luminescence efficiency of electrons and holes in the light-emitting layer 24, thereby improving the luminescence efficiency, and further improving the overall quality of the light-emitting diode.
[0037] The aluminum component in the first dielectric layer 14 is higher than the aluminum component in the second dielectric layer 20. By inserting the first dielectric layer 14 with a high aluminum content between the unintentionally doped layer 12 and the highly doped first n-type layer 16, the defect shielding effect is achieved. The relatively high aluminum component in the first dielectric layer 14 can enhance the defect blocking capability. By inserting the second dielectric layer 20 with a low aluminum content between the low-doped second n-type layer 18 and the light-emitting layer 24, the pit density is reduced and the wide energy gap material characteristics are utilized to achieve the effect of electron blocking, which can improve the carrier spatial distribution density, effectively reduce carrier crowding, improve ESD performance, and improve the quality of the light-emitting diode. The relatively low aluminum component in the second dielectric layer 20 is to avoid the problem of lattice mismatch between the light-emitting layer 24 and the second dielectric layer 20. Considering that the well layer of the light-emitting layer 24 is lnGaN and the second dielectric layer 20 is AlGaN, the In atom is relatively large and the Al atom is relatively small. If the Al component is too high, the light-emitting layer 24 and the second dielectric layer 20 will have a lattice mismatch.
[0038] The light-emitting layer 24 may be a quantum well structure (Quantum Well, referred to as QW). In some embodiments, the light-emitting layer 24 may also be a multiple quantum well structure (Multiple Quantum Well, referred to as MQW), wherein the multiple quantum well structure includes multiple quantum well layers (Well) and multiple quantum barrier layers (Barrier) alternately arranged in a repeated manner, for example, it may be a multiple quantum well structure of GaN / AlGaN, InAlGaN / InAlGaN, InGaN / AlGaN or InGaN / GaN. In addition, the composition and thickness of the well layer in the light-emitting layer 24 determine the wavelength of the generated light. In order to improve the luminous efficiency of the light-emitting layer 24, it can be achieved by changing the depth of the quantum well, the number of layers, thickness and / or other characteristics of the paired quantum wells and quantum barriers in the light-emitting layer 24.
[0039] The p-type layer 26 can provide holes to the light-emitting layer 24 under the action of a power source. In some embodiments, the p-type layer 26 includes a p-type doped nitride layer. The p-type doped nitride layer may include one or more p-type impurities. The p-type impurity may include one or a combination of Mg, Zn, Be, Ca, Sr and Ba. In this embodiment, the preferred p-type impurity is Mg. The p-type layer 26 may be a single-layer structure or a multi-layer structure, and the multi-layer structure has different compositions.
[0040] In some embodiments, the aluminum component in the first dielectric layer 14 accounts for 5% to 50%, thereby improving the effect of blocking dislocation defects of the first dielectric layer 14. If the aluminum component in the first dielectric layer 14 is too high (such as greater than 50%), there will be a lattice mismatch problem, such as a lattice mismatch between the unintentionally doped layer 12 and the first n-type layer 16; if the aluminum component in the first dielectric layer 14 is too low (such as less than 5%), it will not be able to effectively block dislocation defects. Optionally, the aluminum component in the first dielectric layer 14 accounts for 15% to 30%, preferably 20% to 25%.
[0041] In some embodiments, the materials of the first dielectric layer 14 and the second dielectric layer 20 include Al x Ga( 1-x) N material, where 0<x≤1. For example, the material of the first dielectric layer 14 and the second dielectric layer 20 is AlN or AlGaN material, and the wide energy gap characteristics of AlN or AlGaN are utilized to effectively isolate electrons, which can not only improve the spatial distribution density of carriers and effectively reduce the phenomenon of carrier crowding, but also prevent excessive and too fast transition of electrons to the p-type layer 26 for non-radiative recombination with holes, which is beneficial to the combination of electrons and holes in the light-emitting layer 24, and improve the composite luminescence efficiency of electrons and holes in the light-emitting layer 24, thereby improving the luminescence efficiency.
[0042] In some embodiments, the second dielectric layer 20 is doped with n-type impurities, such as silicon. The first dielectric layer 14 is unintentionally doped.
[0043] In some embodiments, the doping concentration of the second dielectric layer 20 is less than 1E19 atoms / cm 3 Optionally, in some preferred embodiments, the doping concentration of the second dielectric layer 20 is in the range of 1E18 atoms / cm 3 ~1E19atoms / cm 3 The second dielectric layer 20 is doped with low concentration of n-type impurities, which is beneficial to current diffusion and reduces the operating voltage.
[0044] The doping concentration of the first n-type layer 16 is greater than 1E19 atoms / cm 3 The doping concentration of the second n-type layer 18 is less than 1E19 atoms / cm 3 Optionally, in some preferred embodiments, the doping concentration of the first n-type layer 16 is in the range of 1E19 atoms / cm 3 ~1E20atoms / cm 3 ; The doping concentration of the second n-type layer 18 is less than 5E18atoms / cm 3 . Directly using the highly doped first n-type layer 16, due to the high doping concentration, is conducive to current diffusion and reduces the operating voltage. This is because the Si doping concentration is high, which can effectively reduce the resistance. Since the current flows in the first n-type layer 16 in a horizontal direction (for example, flowing from left to right in the figure), low resistance is conducive to current diffusion. In addition, the second n-type layer 18 is a low-doped layer, which is conducive to current diffusion and reduces the operating voltage. The Si doping concentration is low, which can form a high resistance. Since the current flows in the vertical direction from the light-emitting layer 24 to the second n-type layer 18 (for example, flowing from top to bottom in the figure), low doping is used in the second n-type layer 18, and high resistance will be more conducive to current diffusion.
[0045] In some embodiments, the thickness of the first dielectric layer 14 is greater than the thickness of the second dielectric layer 20 to reduce the possibility of lattice mismatch. In addition, a thicker first dielectric layer 14 can ensure the effect of effectively blocking dislocation defects, and a thinner second dielectric layer 20 can effectively avoid lattice mismatch. Optionally, the thickness of the first dielectric layer 14 ranges from 20 to 50 nm, and the thickness of the second dielectric layer 20 ranges from 15 to 45 nm. If the first dielectric layer 14 is too thick (such as greater than 50 nm), there will also be a lattice mismatch problem, and if the second dielectric layer 20 is too thin (such as less than 15 nm), it may not be able to effectively block dislocation defects.
[0046] In some embodiments, the semiconductor stack further includes a composite layer 22, and the composite layer 22 is located between the second dielectric layer 20 and the light emitting layer 24. The composite layer 22 mainly functions as a transition layer.
[0047] In some embodiments, the light emitting diode is a small-sized light emitting diode, and the side length of the light emitting diode is not greater than 200 μm. Generally, in order to improve the ESD performance, the existing light emitting diode is usually achieved by doping more Si in the epitaxial structure or reducing defects. However, in order to avoid excessive capacitance, small-sized light emitting diodes are more suitable for improving ESD performance by reducing defects. Therefore, this embodiment can achieve the improvement of ESD performance while being applied to small-sized light emitting diodes. However, the present case is not limited to this, and the present embodiment can also be applied to light emitting diodes of various sizes.
[0048] See also Figure 2 , Figure 2 2 is a schematic diagram of the structure of the composite layer 22 provided in one embodiment of the present invention. As shown in the figure, the composite layer 22 includes a multilayer structure composed of GaN layers 221 and InGaN layers 222 arranged alternately, so as to effectively act as a transition layer. For example, the transition from the second n-type layer 18 to the light-emitting layer 24, and the transition from GaN material to InGaN material. In some embodiments, the In component in the composite layer 22 is lower than that in the light-emitting layer 24. However, the present case is not limited to this, and the composite layer 22 can also be a multilayer structure composed of AlGaN layers and InGaN layers 222 arranged alternately.
[0049] See also Figure 3 , Figure 3 1 is a schematic diagram of the structure of the light emitting diode provided by the second embodiment of the present invention. Compared with the light emitting diode of the first embodiment, the main difference of this embodiment is that the light emitting diode further includes an n-type electrode 30 and a p-type electrode 32. The n-type electrode 30 is connected to the first n-type layer 16, and the p-type electrode 32 is connected to the p-type layer 26.
[0050] The n-type electrode 30 may be a single-layer, double-layer or multi-layer structure, for example, a stacked structure of Ti / Al, Ti / Al / Ti / Au, Ti / Al / Ni / Au, V / Al / Pt / Au, etc. In some embodiments, the n-type electrode 30 may be directly formed on the mesa of the epitaxial structure.
[0051] The p-type electrode 32 may be made of a transparent conductive material or a metal material, and may be adaptively selected according to the doping condition of the p-type layer 26 (such as a p-type GaN surface layer). In some embodiments, the p-type electrode 32 is made of a transparent conductive material, and the material may include indium tin oxide (ITO), indium zinc oxide (IZO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium doped zinc oxide (GZO), tungsten doped indium oxide (IWO) or zinc oxide (ZnO), but the embodiments of the present disclosure are not limited thereto.
[0052] Combination Figure 1 See also Figure 4 In this embodiment, the semiconductor stack at least includes a first semiconductor layer, a light emitting layer 24, and a second semiconductor layer stacked in sequence. The second semiconductor layer is a p-type layer 26. The first semiconductor layer at least includes an unintentionally doped layer 12, a first n-type layer 16, and a second n-type layer 18. The doping concentration of the first n-type layer p-type layer is higher than the doping concentration of the second n-type layer 18.
[0053] like Figure 4 As shown, the first semiconductor layer has an aluminum concentration profile that is substantially along Figure 1 The top-down structural order. Figure 4 The blue curve shows the aluminum concentration curve. Figure 4The structures from left to right in the figure are p-type layer 26, light-emitting layer 24, second n-type layer 18, first n-type layer 16 and unintentionally doped layer 12. The concentration curve of aluminum includes at least a first peak n1 and a second peak n2. The first peak n1 is located on the side of the first n-type layer 16 away from the light-emitting layer 24, and the second peak n2 is located on the side of the first n-type layer 16 close to the light-emitting layer 24. By forming a peak containing Al before and after the highly doped first n-type layer 16, the defects generated during the growth of the unintentionally doped layer 12 and the first n-type layer 16 are filled with Al atoms, which will be beneficial to the growth of subsequent structural layers, thereby improving the lattice quality, reducing the risk of leakage, improving the ESD performance, and thus improving the chip reliability; at the same time, the second peak n2 of Al can also play the role of electron blocking, which can not only improve the spatial distribution density of carriers, effectively reduce the phenomenon of carrier crowding, but also improve the composite luminescence efficiency of electrons and holes in the light-emitting layer 24, thereby improving the luminescence efficiency, and thus improving the overall quality of the light-emitting diode.
[0054] In some embodiments, the maximum value of the first peak n1 is greater than the maximum value of the second peak n2. Setting the first peak n1 to have a higher Al concentration can ensure the effect of effectively blocking defects formed during the growth of the unintentionally doped layer 12, and setting the second peak n2 to have a lower Al concentration can avoid the problem of lattice mismatch with the light-emitting layer 24. Optionally, the maximum value of the first peak n1 is not less than 1.5 times the maximum value of the second peak n2, thereby further improving the overall quality of the light-emitting diode. Preferably, the maximum value of the first peak n1 is 1.5 to 4 times the maximum value of the second peak n2, for example: the maximum value of the first peak n1 is 1.6 times, 2 times, 2.5 times, 3 times, 3.5 times, etc., of the maximum value of the second peak n2.
[0055] In some embodiments, the doping concentration of the first n-type layer 16 is greater than 1E19 atoms / cm 3 The doping concentration of the second n-type layer 18 is less than 1E19 atoms / cm 3 Optionally, in some preferred embodiments, the doping concentration of the first n-type layer 16 is in the range of 1E19 atoms / cm 3 ~1E20atoms / cm 3 ; The doping concentration of the second n-type layer 18 is less than 5E18atoms / cm 3 This arrangement will facilitate current diffusion and reduce operating voltage.
[0056] In some embodiments, the first peak n1 is located between the unintentionally doped layer 12 and the first n-type layer 16, and the second peak n2 is located between the first n-type layer 16 and the light-emitting layer 24. By forming the first peak n1 between the unintentionally doped layer 12 and the highly doped first n-type layer 16, defects generated during the growth of the unintentionally doped layer 12 can be blocked, thereby achieving a defect shielding effect; by forming the second peak n2 between the highly doped first n-type layer 16 and the light-emitting layer 24, on the one hand, defects formed during the growth of the unintentionally doped layer 12 and new defects generated during the growth of the highly doped first n-type layer 16 can be further blocked, and on the other hand, it can also have an electron blocking effect, effectively reducing the phenomenon of carrier crowding, and at the same time can improve the composite luminescence efficiency of electrons and holes in the light-emitting layer 24, thereby improving the luminescence efficiency.
[0057] In some embodiments, the semiconductor stack further includes a composite layer 22, the composite layer 22 is located between the second n-type layer 18 and the light-emitting layer 24, and the second peak n2 is located between the first n-type layer 16 and the composite layer 22. The composite layer 22 acts as a transition layer, which can reduce the possibility of lattice mismatch with the light-emitting layer 24.
[0058] However, the present invention is not limited thereto, in some embodiments, the second peak n2 is located between the second n-type layer 18 and the composite layer 22. The second peak n2 can be formed between the low-doped second n-type layer 18 and the composite layer 22, which can further reduce the possibility of lattice mismatch with the light-emitting layer 24.
[0059] The present invention further provides a light emitting device, which includes a light emitting diode. The light emitting diode adopts the light emitting diode provided by any of the above embodiments, and its specific structure and technical effects are not described in detail.
[0060] In summary, a light-emitting diode and a light-emitting device provided by an embodiment of the present invention achieve a defect shielding effect by inserting a first dielectric layer 14 with a high aluminum content between an unintentionally doped layer 12 and a highly doped first n-type layer 16; and by inserting a second dielectric layer 20 with a low aluminum content between a low-doped second n-type layer 18 and a light-emitting layer 24, thereby reducing the pit density and utilizing the characteristics of a wide bandgap material to achieve an electron blocking effect, thereby improving the spatial distribution density of carriers, effectively reducing carrier crowding, improving ESD performance, and improving the quality of the light-emitting diode.
[0061] In addition, those skilled in the art should understand that, although there are many problems in the prior art, each embodiment or technical solution of the present invention can be improved in only one or several aspects, without having to solve all the technical problems listed in the prior art or background technology at the same time. Those skilled in the art should understand that the content not mentioned in a claim should not be used as a limitation on the claim.
[0062] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A light emitting diode, comprising a semiconductor stack, characterized in that: The semiconductor stack at least includes an unintentionally doped layer, a first dielectric layer, a first n-type layer, a second n-type layer, a second dielectric layer, a light-emitting layer and a p-type layer stacked in sequence; The doping concentration of the first n-type layer is higher than that of the second n-type layer, the first dielectric layer and the second dielectric layer include aluminum components, and the aluminum component in the first dielectric layer is higher than that in the second dielectric layer.
2. The light emitting diode according to claim 1, characterized in that: The materials of the first dielectric layer and the second dielectric layer include Al x Ga (1-x) N material, where 0<x≤1.
3. The light emitting diode according to claim 1, characterized in that: The aluminum component in the first dielectric layer accounts for 5% to 50%.
4. The light emitting diode according to claim 1, characterized in that: The second dielectric layer is doped with n-type impurities, and the doping concentration of the second dielectric layer is less than 1E19atoms / cm 3 .
5. The light emitting diode according to claim 1, characterized in that: The doping concentration of the first n-type layer is greater than 1E19 atoms / cm 3 .
6. The light emitting diode according to claim 1, characterized in that: The doping concentration of the second n-type layer is less than 1E19 atoms / cm 3 .
7. The light emitting diode according to claim 1, characterized in that: The semiconductor stack further includes a composite layer, and the composite layer is located between the second medium layer and the light-emitting layer.
8. The light emitting diode according to claim 1, characterized in that: The thickness of the first dielectric layer is greater than the thickness of the second dielectric layer.
9. The light emitting diode according to claim 1, characterized in that: The thickness of the first dielectric layer is in the range of 20-50 nm, and the thickness of the second dielectric layer is in the range of 15-45 nm.
10. A light emitting diode, comprising a semiconductor stack, wherein the semiconductor stack comprises at least a first semiconductor layer, a light emitting layer and a second semiconductor layer stacked in sequence; Features: The first semiconductor layer includes at least an unintentionally doped layer, a first n-type layer and a second n-type layer, the doping concentration of the first n-type layer is higher than the doping concentration of the second n-type layer, the first semiconductor layer has an aluminum concentration curve, the aluminum concentration curve includes at least a first peak and a second peak, wherein the first peak is located on a side of the first n-type layer away from the light-emitting layer, and the second peak is located on a side of the first n-type layer close to the light-emitting layer.
11. The light emitting diode according to claim 10, characterized in that: The doping concentration of the first n-type layer is greater than 1E19 atoms / cm 3 .
12. The light emitting diode according to claim 10, characterized in that: The doping concentration of the second n-type layer is less than 1E19 atoms / cm 3 .
13. The light emitting diode according to claim 10, characterized in that: The maximum value of the first peak shape is greater than the maximum value of the second peak shape.
14. The light emitting diode according to claim 13, characterized in that: The maximum value of the first peak shape is not less than 1.5 times the maximum value of the second peak shape.
15. The light emitting diode according to claim 10, characterized in that: The first peak is located between the unintentionally doped layer and the first n-type layer, and the second peak is located between the first n-type layer and the light emitting layer.
16. The light emitting diode according to claim 10, characterized in that: The semiconductor stack further includes a composite layer, wherein the composite layer is located between the second n-type layer and the light-emitting layer, and the second peak is located between the first n-type layer and the composite layer.
17. The light emitting diode according to claim 16, characterized in that: The second peak is located between the second n-type layer and the composite layer.
18. The light emitting diode according to claim 1 or 10, characterized in that: The side length of the light emitting diode is no more than 200 μm.
19. A light emitting device, characterized in that: The light emitting device comprises a light emitting diode, and the light emitting diode is a light emitting diode as claimed in any one of claims 1 to 18.