A phase detection and regulation system for extremely narrowband Ku-band signals

Abstract

The present invention provides a phase detection and regulation system for extremely narrowband Ku-band signals, which includes a PL end for preprocessing the input multiple Ku-band signals; a PS end for detecting the phases of the multiple final baseband signals obtained through preprocessing to obtain phase detection results and sending them to the host computer; the host computer for generating phase regulation instructions according to the phase detection results; and a phase shift control module for adjusting the phases of the corresponding path of Ku-band signals. The present invention can synchronously extract multiple narrowband signals and analyze their phases, can achieve a detection efficiency at the microsecond level, and introduces the LMS algorithm in the processing of the PL end to extract narrowband target signals, and an adaptive step size adjustment filter is introduced in the LMS algorithm to improve the detection accuracy. The present invention has higher flexibility and adaptability, can effectively meet the processing requirements of different signal types in complex environments, and improves the versatility and applicability of the signal detection system.

Description

Technical Field

[0001] The present invention belongs to the technical field of signal detection, and particularly relates to a phase detection and regulation system for extremely narrowband Ku-band signals. Background Art

[0002] With the rapid development of wireless communication technology, the phase detection of radio frequency signals plays an increasingly important role in fields such as radar, communication, and electronic countermeasures. Ku-band signals have high frequencies and short wavelengths, can provide higher data transmission rates and communication bandwidths, have strong anti-interference capabilities during transmission, and can maintain signal stability and reliability in complex channel environments. In practice, due to complex external environments and interference from enemy systems, signals will generate varying degrees of phase jitter at the receiving terminal, which has a great impact on the subsequent stages. Therefore, prior art has proposed technical solutions for detecting signal phases.

[0003] Tsinghua University applied for a patent named "Signal Detection Method and System". This solution repeatedly triggers the target signal in the system to be measured and changes the modulation phase of the modulation signal at each trigger moment, thereby improving the bandwidth and sensitivity of signal detection. This technological innovation provides new ideas and methods for the field of signal detection. However, this solution does not fully address the limitations of traditional phase detection methods for detecting long continuous and long pulse signals. For short pulse, non-continuous signals or application scenarios that require fast response, its detection efficiency and flexibility may be insufficient.

[0004] The currently widely used traditional digital frequency characteristic tester, as a mainstream means for detecting signal phases, usually integrates a single-chip microcomputer and a field programmable gate array in its core control architecture. This tester uses direct digital frequency synthesis (DDFS) technology to generate frequency sweep signals. This process ensures the precise generation and flexible regulation of signals, greatly improving the accuracy and flexibility of testing. In the signal amplitude measurement section, the tester uses a high-precision true RMS detection device AD637, which can accurately measure the RMS value of the signal, laying a solid data foundation for the subsequent signal processing process.

[0005] The design structure diagram of the traditional digital frequency characteristic tester is as Figure 1As shown, this traditional instrument uses a single-chip microcomputer and FPGA (Field Programmable Gate Array) as the control core, generates a frequency sweep signal using DDFS technology, and measures the signal amplitude using the effective value detection chip AD637; in the FPGA, the phase difference is measured by the method of high-frequency pulse counting, and the amplitude-frequency characteristic curve of the signal is obtained through the operation of the single-chip microcomputer. However, this traditional tester will cause large deviations in the results in high-temperature and strong electromagnetic interference environments, and there are certain limitations in frequency.

[0006] Traditional phase testers are mainly applicable to continuous wave or long pulse signals. When faced with narrowband pulse signals, such testers often cannot work properly, showing obvious limitations. In addition, under extreme environmental conditions, such as high temperature or strong electromagnetic interference environments, the measurement results of traditional testers may show large deviations. This is mainly due to the performance decline of electronic components in high-temperature environments and the serious interference of strong electromagnetic interference on the signal transmission path. Traditional testers also have certain limitations in frequency resolution and are difficult to meet the test requirements of certain specific frequency bands or special application scenarios. Summary of the Invention

[0007] In order to solve the above problems existing in the prior art, the present invention provides a phase detection and regulation system for extremely narrowband Ku-band signals. The technical problems to be solved by the present invention are realized through the following technical solutions:

[0008] A phase detection and regulation system for extremely narrowband Ku-band signals includes:

[0009] The PL end is used to preprocess the input multiple Ku-band signals to obtain multiple final baseband signals;

[0010] The PS end is used to detect the phase of the multiple final baseband signals to obtain a phase detection result, and send the phase detection result to the host computer;

[0011] The host computer is used to generate a phase regulation instruction according to the phase detection result;

[0012] The phase shift control module is used to adjust the phase of the corresponding Ku-band signal according to the phase regulation instruction.

[0013] Advantages:

[0014] 1. The present invention provides a phase detection and regulation system for extremely narrowband Ku-band signals. This system has the ability to extract effective information from narrowband microwave signals and perform digital signal processing, ensuring the real-time nature of the processing and solving the limitation in traditional radar detection technology that long-time signal monitoring is required.

[0015] 2. The present invention performs parallel processing on multiple Ku-band signals, enhancing the system's throughput and comprehensive processing capabilities. Given the high complexity of the current phase discrimination system, the present invention can analyze multiple signals simultaneously and synchronously, greatly accelerating the data processing flow, thereby optimizing the system's efficiency, real-time performance, and response speed. In addition, the present invention takes an extremely short time (millisecond level) for a single detection, and can complete multiple phase discrimination operations in an extremely short time, ensuring high-efficient data processing capabilities and resource utilization.

[0016] 3. The present invention realizes the function of calibrating the signal phase, and can independently adjust the phase of a certain Ku-band signal, improving the accuracy and stability of radar detection technology.

[0017] 4. The present invention introduces the LMS algorithm in the process of detecting narrowband pulses of multiple Ku-band signals, and introduces an adaptive step size adjustment mechanism in the LMS algorithm, further improving the LMS filter, thereby enhancing the detection and optimization effects.

[0018] The following will further elaborate on the present invention in conjunction with the drawings and embodiments. Brief Description of the Drawings

[0019] Figure 1 is the design structure diagram of a traditional digital frequency characteristic tester of the prior art;

[0020] Figure 2 is a schematic diagram of a phase detection and regulation system for extremely narrowband Ku-band signals provided by the present invention;

[0021] Figure 3 is a schematic diagram of the hardware structure of the PL side provided by the present invention;

[0022] Figure 4 is a schematic diagram of the processing flow of the PL side provided by the present invention;

[0023] Figure 5 is a schematic diagram of phase feedback control provided by the present invention;

[0024] Figure 6 is a schematic diagram of the principle of the LMS algorithm provided by the present invention. Detailed Embodiments

[0025] The following will further elaborate on the present invention in conjunction with specific embodiments, but the implementation manners of the present invention are not limited thereto.

[0026] As Figure 2 shown, the present invention provides a phase detection and regulation system for extremely narrowband Ku-band signals, including:

[0027] The PL side is used to preprocess the input multiple Ku-band signals to obtain multiple final baseband signals;

[0028] Among them, the PL side uses an FPGA development board, and the FPGA development board integrates 16 channels for receiving 16 Ku-band signals one-to-one.

[0029] Reference Figure 3 shown Figure 3 is the hardware schematic diagram of the PL side of this application. This application uses the Zynq UltraScale+ Gen3 RFSoC ZU47DR chip of Xilinx Corporation. This chip integrates radio frequency analog (RF-Analog), soft decision forward error correction (SD-FEC), and field programmable gate array (FPGA) logic. This application uses this chip to construct the PL side. The PL side of this application uses two radio frequency chips RFSoC to complete the preprocessing process of the input multiple Ku-band signals; the two radio frequency chips use the FIFO data synchronization module to complete the clock synchronization of the data to obtain multiple final baseband signals. In Figure 3 the two radio frequency chips are RF SoC ZU47DR chips. In Figure 3 RF SoC ZU47DR chips are respectively externally connected to DDR (Double Data Rate) memories, Flash (flash memories), and PHY (port physical layer), further enhancing their processing capabilities. Two RFSoC ZU47DR chips can process 16 radio frequency signals. The PL side of this application adopts a 6U VPX (VITA 46) standard structure at the hardware architecture level and integrates a total of 16 dedicated data acquisition channels, which are represented by IPEX in Figure 3 In Figure 3 the power supply of the two RFSoC ZU47DR chips is 12V. The PL side uses the LMK04828 chip, which is used to perform clock synchronization on the data of the two RF SoC ZU47DR chips using a reference clock. The core function of the 16 data acquisition channels is to accurately capture 16 Ku-band signals, then preprocess them through the RF SoC ZU47DR chips, and then forward them to the main control circuit board in an efficient data stream format for storage. The main control circuit board can respond to demands and implement the retrieval function of these data. Each data acquisition board is designed with a reserved network interface to facilitate connection with a network switch and transmit key information such as working status monitoring and data processing results through the Ethernet protocol.

[0030] Combined with Figure 2 and Figure 4, the PL side of this application includes: a narrowband pulse extraction and optimization module, a first DDC module, a first ADC module, a second DDC module, a FIFO bit-width conversion module, a FIR low-pass filter, and a FIFO data synchronization module;

[0031] Among them, the PL side uses two radio frequency chips to complete the processing of the narrowband pulse extraction and optimization module, the first DDC module, the first ADC module, the second DDC module, the FIFO bit-width conversion module, and the FIR low-pass filter, and uses the LMK04828 chip to complete the function of the FIFO data synchronization module, and synchronizes the data clocks of the two radio frequency chips to obtain multiple final baseband signals.

[0032] The narrowband pulse extraction and optimization module is used to extract the narrowband pulses in each Ku-band signal and optimize the extracted narrowband pulses to obtain narrow pulse target signals;

[0033] The narrowband pulse extraction and optimization module collects 16 Ku-band signals containing complex background noise from the radio frequency interface, and then identifies and separates the narrow pulse target signals from the 16 Ku-band signals. The main steps of the narrowband pulse extraction and optimization module include: signal acquisition, filtering processing, narrow pulse detection, and signal extraction, and then narrow pulse target signals are obtained.

[0034] In an optional implementation manner of this application, the narrowband pulse extraction and optimization module is used to extract the narrowband pulses in each Ku-band signal by using the LMS algorithm and optimize the extracted narrowband pulses to obtain narrow pulse target signals.

[0035] The following describes the specific processing principle of the LMS algorithm.

[0036] In the initial stage of the signal processing flow, the core task is to accurately and effectively detect and extract specific narrowband pulse signals. However, in actual application scenarios, the system is usually in a complex environment full of strong electromagnetic interference. These electromagnetic interferences may come from various sources, including but not limited to surrounding electronic devices, radio communications, and natural electromagnetic phenomena, etc. And these electromagnetic phenomena cause certain difficulties in the accurate detection and extraction of narrowband pulse signals.

[0037] This application uses the least mean square (LMS) algorithm to construct an adaptive filter and dynamically adjusts the parameters of the adaptive filter. Set the initial coefficients (weight vectors) of the filter as a random vector and set the step size factor . The step size factor is used to control the update speed of the weight vector. The larger its value, the greater the adjustment amplitude of the weight vector, but too large a step size may lead to algorithm instability. As Figure 6 shown, there are a total of elements of … As the input, it is processed with a linear combination, that is, weighted summation is performed on it to obtain the result , compared with the desired response to obtain an error signal , and the weights are corrected accordingly. Figure 6 This is the basic principle of the LMS algorithm, expressed as:

[0038] (1);

[0039] In the formula, represents the number of iterations, is the weight vector of the th element in the th iteration, is the th element of the input in the th iteration, is the output result of the th iteration;

[0040] The above formula (1) is written in vector form:

[0041] (2);

[0042] In the formula, represents the transpose.

[0043] Next, calculate the error signal, which is the difference between the desired output and the actual output:

[0044] (3);

[0045] In the formula, is the desired output of the th iteration;

[0046] According to the error signal and the input sample update the coefficients (weight vector) of the filter , and the update rule is:

[0047] (4);

[0048] This step is the core of the LMS algorithm. By continuously iterating and updating the weight vector, the output error gradually decreases. The larger the step size factor, the larger the step size of the weight update, and the usually faster the convergence speed of the algorithm. However, too large a step size may also cause the algorithm to be unstable or even diverge. If the step size factor is too small, although the algorithm is stable, the convergence speed is too slow.

[0049] The LMS algorithm is based on the stochastic gradient descent method, and its convergence depends on the choice of the step size factor and the statistical characteristics of the input signal. In some cases, the algorithm may not converge to the global optimal solution but converge to a local optimal solution or a saddle point. Although the convergence performance of the algorithm can be improved by adjusting the step size factor and introducing regularization terms, etc., it cannot be guaranteed to find the global optimal solution in all cases. However, the following methods can be adopted to improve and avoid this problem as much as possible:

[0050] The present invention introduces an adaptive step size adjustment mechanism, such as a step size adjustment method based on the statistical characteristics of the error signal. This method can dynamically adjust the step size factor according to the change of the error signal, thereby optimizing the convergence performance of the algorithm.

[0051] Assume the error signal is , the step size factor is , the weights of the FIR filter are , the input signal is , and the desired output is .

[0052] First, in each iteration step, calculate the error signal between the current filter output and the desired output.

[0053] (5);

[0054] Then, perform statistical analysis on the error signal, such as calculating the mean, variance, autocorrelation function, etc. of the error signal. These statistical characteristics can reflect the change trend and fluctuation of the error signal.

[0055] (6);

[0056] In the formula, is the number of samples used when calculating the variance, is the serial number of the sample, is the variance of the error signal;

[0057] According to the statistical characteristics of the error signal, design an adjustment rule or function to adjust the step size factor. For example, when the variance of the error signal is large, the step size factor can be increased to accelerate the convergence speed; when the variance of the error signal is small, the step size factor can be decreased to improve the stability.

[0058] (7);

[0059] Among them, is a constant factor, is a small positive number used to avoid the case of a zero denominator. Formula (7) indicates that the step size factor is proportional to the reciprocal of the variance of the error signal. When the variance of the error signal increases, the step size factor decreases; when the variance of the error signal decreases, the step size factor increases.

[0060] Use the adjusted step size factor and the current error signal to update the weights of the filter. Repeat the above steps until the filter weights converge to a stable value or reach a preset number of iterations.

[0061] The first DDC module is used to down-convert the narrow pulse target signal to obtain an intermediate frequency signal;

[0062] The multi-channel Ku-band signals of this application first undergo down-conversion processing through the first DDC module, thereby being converted into intermediate frequency signals. This process not only reduces the frequency of the signals but also improves the processability and stability of the signals.

[0063] The first ADC module is used to perform analog-to-digital conversion on the intermediate frequency signal to obtain a first digital signal;

[0064] The second DDC module is used to down-convert the first digital signal to obtain a baseband signal;

[0065] The intermediate frequency signal of this application passes through the first ADC module and the second DDC module, and the frequency of the intermediate frequency signal is shifted to the baseband to obtain a baseband signal. This process can flexibly select and process signals in different frequency bands according to different communication protocols and requirements.

[0066] The FIFO bit-width conversion module is used to split the baseband signal according to a predetermined bit width and transmit it to the FIR low-pass filter;

[0067] The FIR low-pass filter is used to perform low-pass filtering on the split baseband signal to obtain a filtered baseband signal;

[0068] Pass the split baseband signal through the FIR low-pass filter to remove the high-frequency signals generated during the mixing process for the next step of signal processing.

[0069] The FIFO data synchronization module is used to perform clock synchronization on the filtered baseband signal to obtain multiple final baseband signals and transmit them to the PS side.

[0070] At Figure 3Among them, the FIFO data synchronization module uses the LMK04828 chip to implement the function of clock synchronization for the filtered baseband signal, and obtains multiple final baseband signals which are transmitted to the PS end through VPX. The multiple final baseband signals finally output by the PL end are transmitted to the PS end through operations such as BRAM and AXI_DMA. BRAM (Block RAM) is a dedicated random access memory resource in the FPGA, mainly used for storing data. AXI_DMA is an IP core at the PL end, which allows data to be directly and rapidly transmitted between the memory of the central processor and the peripherals at the PL end without the intervention of the central processor.

[0071] The first digital signal of this application is finally output to the PS end through the FIFO bit width conversion module, the FIR low-pass filter, and the FIFO data synchronization module. The FIFO bit width conversion module is used to split data for AURORA transmission; the FIR low-pass filter is used to process the difference frequency components brought about in mixing; the FIFO data synchronization module has two functions: one is to synchronize data. The process data collected and processed by the two RFSoC chips cannot reach the required synchronization, and the FIFO data synchronization module is required to perform cross-clock synchronization processing; the other is to place all the data transmitted by the second chip's AURORA in the first chip, which will make the data processing more synchronous and consistent. AURORA is a scalable lightweight link layer protocol used to move data between point-to-point serial links.

[0072] The PS end performs the final signal processing part. It detects the narrowband pulses transmitted from the PL end through interrupts, performs FFT processing on them, detects the peaks of the obtained data, finds the maximum value, and performs Atan2 processing to obtain the phase information of the signal.

[0073] The PS end is used to detect the phase of the multiple final baseband signals to obtain a phase detection result, and send it to the host computer according to the phase detection result; PS represents the programmable logic end.

[0074] Among them, the PS end uses an ARM or DSP development board.

[0075] Reference Figure 2 , the PS end of this application includes: a detection module, an FFT processing module, and an Atan2 module;

[0076] The detection module is used to detect the narrowband pulses of each path in the multiple final baseband signals;

[0077] The FFT processing module is used to perform FFT processing on the narrowband pulses detected by the detection module for each path to obtain the phase amplitude of the narrowband pulses;

[0078] The Atan2 module is used to perform Atan2 processing on the phase amplitude of the narrowband pulse to obtain the phase of each narrowband pulse, and transmit the phase of each narrowband pulse as a phase detection result to the host computer.

[0079] The host computer is used to generate a phase regulation instruction according to the phase detection result;

[0080] Combined Figure 2 and Figure 5 , the host computer of the present application is specifically used for:

[0081] Display the phase detection result, and calculate the phase difference of each path by using the phase detection result, where the phase difference is the phase difference between the narrowband pulse and the external reference source;

[0082] Receive the user operation generated by the user according to the phase difference of each path, and generate a phase regulation instruction according to the user operation;

[0083] Send the phase regulation instruction and the phase difference of each path to the phase shift control module.

[0084] The phase detection result output by the PS side transmits the result and the collected signal waveform to the host computer through methods such as Ethernet communication and serial communication. The waveforms and phase detection results of 16 channels of signals are displayed on the host computer interface.

[0085] The phase shift control module is used to adjust the phase of the Ku-band signal of the corresponding path according to the phase regulation instruction.

[0086] Refer to Figure 5 As shown, the phase shift control module includes: a signal acquisition and preprocessing module, a second ADC module, a phase adjustment module, an inverse domain transformation module, and a DAC module;

[0087] The signal acquisition and preprocessing module is used to collect the Ku-band signal whose phase needs to be adjusted from the input multiple Ku-band signals once receiving the phase regulation instruction;

[0088] The second ADC module is used to convert the Ku-band signal whose phase needs to be adjusted into a second digital signal;

[0089] The phase adjustment module is used to rotate the phase of each frequency point of the second digital signal according to the corresponding phase difference to obtain a phase-adjusted digital signal;

[0090] The inverse domain transformation module is used to perform an inverse FFT transformation on the phase-adjusted digital signal to obtain a transformed digital signal;

[0091] The DAC module is used to convert the transformed digital signal into an analog signal and feedback it to the PL side.

[0092] The phase shift control module can perform operations such as stability evaluation and error correction on the phase to improve the accuracy and reliability of phase detection.

[0093] The principle of the phase shift control module is described below.

[0094] The phase error analysis of multiple channels is as follows:

[0095] Reference Figure 5 , for different frequencies, the relative relationship between receiving channels is different. Since the 16-channel Ku-band signal input to the system has a narrow bandwidth, its response at each frequency point within the band can be approximately considered to be the same. Therefore, the response at each frequency point within the band can be considered to be replaced by that at the center of the bandwidth:

[0096] (8);

[0097] In the formula, is a complex function in the frequency domain, represents the spectrum of the narrow pulse target signal of the first channel output by the narrowband pulse extraction and optimization module, represents the th channel of the narrow pulse target signal output by the narrowband pulse extraction and optimization module, represents amplitude spectrum of, represents amplitude spectrum of, exp is the complex exponential function, is phase of, is phase of, is expressed as amplitude of, is expressed as phase of, , is the total number of channels.

[0098] Formula (8) represents the complex constant expression form of the reciprocal estimation of the phase error between channels of the 16-channel Ku-band signal. When the phase shift control module is working properly, multiplying this complex constant by the narrow pulse target signal of the th channel output by the narrowband pulse extraction and optimization module can complete the calibration of the Ku-band signal of the th channel. The calibration here is different from the calibration of the phase shift control module in Figure 5 . This calibration is for the phase error analysis and calibration of the narrowband signals of 16 channels, aiming to improve the accuracy of multi-channel analysis and reduce errors. Figure 5The phase shift control module in it determines whether the offset of a certain path of signal is too large based on an external reference source, and then performs active phase shift to calibrate it.

[0099] The calibration of the Ku-band signal of the

[0100] th channel can be expressed as:

[0101] In the formula, represents the output after calibration of the narrow pulse target signal of the th channel, represents at time the narrow pulse target signal of the

[0102] th channel. The phase consistency of the th channel can be calibrated by multiplying the narrow pulse target signal of the

[0103] th channel output by the narrowband pulse extraction and optimization module with the complex constant Figure 5 estimated from the reciprocal of the phase error.

[0104] As shown in the reference

[0105] th, the phase shift control module generates a single-frequency signal from an external reference source and connects it to each receiving channel through a cable. The internal calibration source is provided by an external signal. The calibrated signal output by the phase shift control module is fed back to the receiving channel. The PL end preprocesses each path of the Ku-band signal, and then the PS end performs phase detection to obtain the detection result. During the detection process, the PS end performs a fast Fourier transform (FFT) on the data of each channel to accumulate the calibrated signal, finds the peak of each channel, calculates the amplitude-phase error between multiple channels, and reports or stores the amplitude-phase error of each channel for subsequent normal operation.

[0104] Among them, when the phase shift control module detects that the phase value deviation of a certain channel is greater than the threshold, this module will collect the signal of this channel and perform a phase shift operation. In the phase adjustment step, the phase of the signal is rotated:

[0105] th;

[0106] The frequency domain representation of the second digital signal output by the second ADC module is , where is the frequency index, is the phase rotation angle to be adjusted. After completing the phase adjustment, it is necessary to convert the signal from the frequency domain back to the time domain, which is achieved through the inverse fast Fourier transform (IFFT). The signal after the inverse transform is the digital signal with the adjusted phase.

[0107] The present invention can extract and analyze narrowband signals. Different from the previous systems that can only analyze continuous signals or long pulses, this system can analyze and detect pulse signals at the nanosecond level. Moreover, the detection results of the present invention have high precision and fast speed. According to the sampling rate of the FPGA, the estimated detection precision can reach ±0.001°, and the processing can be completed within dozens of microseconds. The present invention can perform synchronous real-time analysis on multiple Ku-band signals. Through the synchronous processing of multiple Ku-band signals, the differences and quality of the signals can be intuitively compared; the present invention can achieve parallel operation, improve throughput and processing capabilities, accelerate data processing, and enhance the system efficiency, real-time response, stability, and reliability. This method also endows the system with higher flexibility and adaptability, enabling it to effectively cope with different signal types and processing requirements in complex environments, and improving the versatility and applicability of the system. In addition, the synchronous processing of multiple signals can optimize resource utilization, reduce resource idleness, and improve the overall resource utilization efficiency. And the processing flow on the PL side can achieve high-speed and stable data transmission between chips. The present invention introduces the LMS algorithm to detect multiple Ku-band signals, and introduces an adaptive step adjustment mechanism to dynamically adjust the step factor according to the change of the error signal, thereby optimizing the convergence performance of the algorithm, improving the problem that the algorithm cannot converge to the global optimal solution, and enhancing the detection effect.

[0108] It should be noted that the terms "first" and "second" in the present invention are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "a plurality" means two or more, unless otherwise specifically defined.

[0109] Although the present application has been described in conjunction with various embodiments herein, however, in the process of implementing the claimed present application, those skilled in the art can understand and realize other variations of the disclosed embodiments by viewing the accompanying drawings, the disclosed content, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "one" does not exclude a plurality of cases.

[0110] The above content is a further detailed description of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can still be made, and all should be regarded as belonging to the protection scope of the present invention.

Claims

1. A phase detection control system for an extremely narrowband Ku-band signal, characterized in that: include: The PL end is used to pre-process the input multi-channel Ku-band signals to obtain multiple final baseband signals; The PS end is used to detect the phase of the multiple final baseband signals to obtain a phase detection result, and send the phase detection result to the host computer; The host computer is used to generate a phase control instruction according to the phase detection result; A phase shift control module, used to adjust the phase of the Ku-band signal of the corresponding path according to the phase control instruction; The PL end includes: a narrowband pulse extraction and optimization module, a first DDC module, a first ADC module, a second DDC module, a FIFO bit width conversion module, a FIR low-pass filter and a FIFO data synchronization module; The narrowband pulse extraction and optimization module is used to extract the narrowband pulses in each Ku-band signal and optimize the extracted narrowband pulses to obtain narrow pulse target signals; The first DDC module is used to down-convert the narrow pulse target signal to obtain an intermediate frequency signal; The first ADC module is used to perform analog-to-digital conversion on the intermediate frequency signal to obtain a first digital signal; The second DDC module is used to down-convert the first digital signal to obtain a baseband signal; The FIFO bit width conversion module is used to split the baseband signal according to a predetermined bit width and transmit it to the FIR low-pass filter; The FIR low-pass filter is used to perform low-pass filtering on the split baseband signal to obtain a filtered baseband signal; The FIFO data synchronization module is used to perform clock synchronization on the filtered baseband signal to obtain multiple final baseband signals and transmit them to the PS end; The PS end includes: a detection module, an FFT processing module and an Atan2 module; The detection module is used to detect the narrowband pulse of each channel of the multiple final baseband signals; The FFT processing module is used to perform FFT processing on each narrowband pulse detected by the detection module to obtain the phase amplitude of the narrowband pulse; The Atan2 module is used to perform Atan2 processing on the phase amplitude of the narrowband pulse to obtain the phase of each narrowband pulse, and transmit the phase of each narrowband pulse as a phase detection result to the host computer; The phase shift control module includes: a signal acquisition preprocessing module, a second ADC module, a phase adjustment module, an inverse domain transformation module and a DAC module; The signal acquisition preprocessing module is used to acquire the Ku-band signal whose phase needs to be adjusted from the input multiple Ku-band signals once the phase control instruction is received; The second ADC module is used to convert the Ku-band signal that needs phase adjustment into a second digital signal; The phase adjustment module is used to rotate the phase of each frequency point of the second digital signal according to the corresponding phase difference value to obtain a phase-adjusted digital signal; The inverse domain transformation module is used to perform an inverse FFT transformation on the phase-adjusted digital signal to obtain a transformed digital signal; The DAC module is used to convert the transformed digital signal into an analog signal and feed it back to the PL terminal; 2. The phase detection control system for ultra-narrowband Ku-band signals according to claim 1, characterized in that: The PL end uses two RF chips to complete the processing of the narrowband pulse extraction and optimization module, the first DDC module, the first ADC module, the second DDC module, the FIFO bit width conversion module, and the FIR low-pass filter, and uses the LMK04828 chip to complete the function of the FIFO data synchronization module, and synchronizes the data clocks of the two RF chips to obtain multiple final baseband signals.

3. The phase detection control system for the ultra-narrowband Ku-band signal according to claim 1, characterized in that: The narrowband pulse extraction and optimization module is used to extract the narrowband pulses in each Ku-band signal using the LMS algorithm, and optimize the extracted narrowband pulses to obtain narrow pulse target signals.

4. The phase detection control system for ultra-narrowband Ku-band signals according to claim 1, characterized in that: The host computer is specifically used for: Display the phase detection result, and use the phase detection result to calculate the phase difference value of each path, where the phase difference value is the phase difference between the narrowband pulse and the external reference source; receiving a user operation generated by a user according to the phase difference value of each path, and generating a phase control instruction according to the user operation; The phase control instruction and the phase difference value of each path are sent to the phase shift control module.

5. The phase detection and control system for ultra-narrowband Ku-band signals according to claim 1, characterized in that: The PL end adopts an FPGA development board, and the PS end adopts an ARM or DSP development board. The FPGA development board integrates 16 channels for one-to-one reception of 16 Ku-band signals.

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