Coded multilayer film filter array structure, spectral imaging chip and preparation method thereof

Abstract

The present application discloses a coded multilayer film filter array structure, a spectral imaging chip, and a method for preparing the same. The coded multilayer film filter array structure includes a plurality of filter units arranged in an array along a working plane, wherein the filter units include a plurality of dielectric layers and metal layers stacked along a specified direction, with at least one dielectric layer distributed between two adjacent metal layers; different filter units have different codes, and each code is related to the number of metal layers contained in the corresponding filter unit and / or the position of the metal layers contained in the specified direction; and different filter units contain the same number of dielectric layers, and each dielectric layer in each filter unit is distributed on the same layer plane as the corresponding dielectric layer in the other filter units; the specified direction is perpendicular to the working plane and the layer plane. The coded multilayer film filter array structure has a flattened structural feature, is easy to process, and can effectively improve the spatial resolution and spectral resolution of the spectral imaging chip.

Description

Technical Field

[0001] The present application relates to a spectral imaging chip, specifically to a spectral imaging chip with a coded multilayer film filter, a preparation method thereof, and an application thereof. The chip utilizes a coded multilayer film filter array structure to realize on-chip integrated spectral imaging, and belongs to the technical field of optoelectronic devices. Background Art

[0002] Spectral imaging technology, with its ability to acquire unique information in both spatial and spectral domains, has a wide range of applications in remote sensing, such as medical diagnosis, biomedical engineering, archaeology, and food inspection. This technology combines spectroscopy and imaging techniques to simultaneously acquire two-dimensional spatial information and one-dimensional spectral information. Traditional spectral imaging techniques typically employ spatial scanning or wavelength scanning, often relying on hardware to simultaneously capture spatial and spectral information. This makes them difficult to apply to dynamic scenarios, and they are also costly, bulky, require large amounts of data, and have slow acquisition speeds. To address these shortcomings, on-chip integrated spectral imaging technology has garnered widespread attention in recent years.

[0003] Currently reported on-chip integrated spectroscopy technologies commonly suffer from difficulties in fabricating on-chip dispersion structures and the difficulty in achieving both high spatial and spectral resolutions. Bandpass filtering based on Fabry-Perot cavities is the most common technique for on-chip integrated spectral detection. By adjusting the cavity thickness between two parallel mirrors, the center wavelength of the transmission band can be altered, enabling spectral sampling within a specific wavelength range through a series of filter arrays with varying cavity thicknesses. The mirrors typically consist of metal or Bragg reflectors. Fabricating these devices requires a single alignment lithography and deposition / etching process for each cavity of varying thickness. Since spectral detection typically requires dozens or even hundreds of spectral channels, fabrication is extremely challenging. To improve alignment tolerance, each pixel size is larger. For example, IMEC's ​​visible light products require 5μm pixels per pixel. This means that a single spectral sampling unit requires 25 1μm detector pixels, significantly reducing spatial imaging resolution. In addition, in this type of design, long-wavelength sampling corresponds to a thick cavity, and short-wavelength sampling corresponds to a thin cavity. The height of the entire filter array is inconsistent, with the maximum drop reaching the micron level, forming periodic fluctuations on the chip surface. This increases the difficulty of each step of deposition and etching processes, and also causes scattering and diffraction effects on the incident light, affecting the results of spectral sampling. Summary of the Invention

[0004] The main purpose of this application is to provide a coded multilayer film filter array structure, a spectral imaging chip and a preparation method thereof, in order to overcome the deficiencies of the prior art.

[0005] To achieve the aforementioned invention objectives, the technical solutions adopted in this application include:

[0006] The first aspect of the present application provides a coded multilayer film filter array structure, which includes a plurality of filter units arranged in an array along a working plane, wherein the filter units include a plurality of dielectric layers and a plurality of metal layers stacked along a specified direction, wherein at least one dielectric layer is distributed between two adjacent metal layers; different filter units have different first codes, and each first code is related to the number of metal layers contained in the corresponding filter unit and / or the position of the metal layers contained in the specified direction; and different filter units contain the same number of dielectric layers, wherein each dielectric layer in each filter unit is distributed on the same layer plane as the corresponding dielectric layer in the remaining filter units; the specified direction is perpendicular to the working plane and the layer plane.

[0007] In one embodiment, the plurality of dielectric layers and the plurality of metal layers in the filtering unit cooperate to form a plurality of cascade-coupled Fabry-Pérot optical cavities.

[0008] In one embodiment, the spectral correlation of the plurality of filtering units is c<0.5, preferably, c<0.3.

[0009] Furthermore, if two of the plurality of filtering units are defined to correspond to spectrum A and spectrum B respectively, the calculation formula of C is as follows:

[0010]

[0011] Among them A i 、B i are the intensities of spectrum A and spectrum B at the i-th wavelength, represents the average value of spectrum A, represents the average value of spectrum B, n is the number of wavelengths of spectrum A and spectrum B in the wavelength range under discussion, and i ≥ 1.

[0012] In one embodiment, the thicknesses of the plurality of dielectric layers in the same layer plane are the same.

[0013] Furthermore, the thicknesses of the multiple dielectric layers in different planes are the same or different.

[0014] Furthermore, the thickness of the dielectric layer is 50-500 nm.

[0015] Furthermore, the material of the dielectric layer may include but is not limited to one or more combinations of SiO2, SiN, ZnS, Al2O3 or TiO2.

[0016] In one embodiment, the thickness of the metal layers in the plurality of filter units are the same.

[0017] Furthermore, the thickness of the metal layer may be 10-30 nm.

[0018] Furthermore, the material of the metal layer may include but is not limited to one or more combinations of gold, silver, aluminum or copper.

[0019] Furthermore, the surface undulation of the coded multilayer film filter array structure is below 90 nm, preferably below 60 nm, and more preferably below 40 nm.

[0020] Furthermore, each of the multiple metal layers on the same plane is spliced ​​together with one or more other metal layers. Preferably, one metal layer is spliced ​​together with two or more other metal layers. For example, one metal layer may be spliced ​​together with three other metal layers. The term "splicing" refers to joining two adjacent metal layers edge to edge.

[0021] Furthermore, the outermost layer of the filter unit is a dielectric layer.

[0022] In one embodiment, the filter unit further includes a substrate, and the dielectric layer and the metal layer are stacked on the substrate.

[0023] The second aspect of the present application provides a spectral imaging chip, comprising a plurality of supercells arranged in an array, wherein the supercell comprises a detector array and a filter array, each filter array being arranged on a corresponding detector array and cooperating with each other to form a spectral sampling unit, and the filter array comprising the coded multilayer film filter array structure.

[0024] A third aspect of the present application provides a method for manufacturing a mask set, wherein the mask set is used to prepare the spectral imaging chip, and the method comprises:

[0025] The coded multilayer film filter array structure is assumed to include x×y filter units arranged in an array of x rows and y columns along a working plane, and the plurality of metal layers are distributed on z layer planes;

[0026] On each of the z layer planes, x×y coding bits are defined and arranged in an array of x rows and y columns, and a plurality of the coding bits are set as valid coding bits, each valid coding bit is used to set a metal layer, and the remaining coding bits are blank coding bits;

[0027] Combining and optimizing the arrangement positions of multiple valid coding bits and blank coding bits on the corresponding layer plane so that each valid coding bit is spliced ​​with one or more other valid coding bits, thereby obtaining an optimized two-dimensional coding bit matrix corresponding to the layer plane;

[0028] After matrix expansion and transformation are performed on the optimized two-dimensional coding bit matrix, a coding array pattern is obtained, and then a corresponding mask is produced based on the coding array pattern.

[0029] In this application, x and y are both positive integers ≥2.

[0030] In one embodiment, the manufacturing method specifically includes: performing combinatorial optimization on the arrangement positions of multiple valid coding bits and blank coding bits on the corresponding layer planes through random arrangement and sub-matrix condition checking, thereby obtaining the optimized two-dimensional coding bit matrix.

[0031] Furthermore, the production method specifically includes:

[0032] For a two-dimensional coding bit array containing x×y coding bits, the valid coding bits and blank coding bits are randomly arranged, and the codes 1 and 0 are assigned to the valid coding bits and the blank coding bits respectively;

[0033] Eliminating the code bits located at the outermost circle of the two-dimensional code bit array, and checking the remaining code bit array according to the sub-matrix condition, thereby screening out the optimized two-dimensional code bit matrix;

[0034] The submatrix condition includes: for each valid coding bit in the remaining coding bit array, analyzing the four 2×2 coding bit matrices where the valid coding bit is located, and if at least one of the four coding bit matrices contains two valid coding bits in non-diagonal positions, marking it as meeting the screening condition; otherwise, marking it as not meeting the screening condition.

[0035] In some preferred cases, the submatrix condition includes: if the codes on the diagonal of a 2×2 coding bit matrix to which each valid coding bit belongs are [1, 1; 1, 1], it is marked as meeting the screening condition.

[0036] In one embodiment, the matrix expansion and transformation specifically includes: flipping each optimized two-dimensional coding bit matrix according to its two orthogonal sides, and then rotating it 180° around the intersection of the two sides to obtain an extended coding bit matrix containing 4x×4y coding bits, and periodically arranging multiple extended coding bit matrices on the corresponding layer plane to obtain the coding array pattern.

[0037] The fourth aspect of the present application provides a mask set designed by the manufacturing method.

[0038] The fifth aspect of the present application provides a method for preparing the spectral imaging chip, which includes: alternately depositing dielectric materials and metal materials on a substrate to form multiple dielectric layers and multiple metal material layers, and during or after the formation of each metal material layer, using a corresponding mask to perform graphical processing on the metal material layer.

[0039] For example, the patterning process may be achieved through processes such as metal etching, metal stripping, and metal mask deposition.

[0040] The sixth aspect of the present application provides a use of the spectral imaging chip in spectral imaging.

[0041] Compared with the prior art, this application has at least the following beneficial effects:

[0042] First, the provided coded multilayer film filter array structure has a flattened structural feature, is easy to process, can effectively avoid problems such as surface scattering, and when applied to spectral imaging chips, can effectively improve the spatial resolution and spectral resolution of the spectral imaging chip.

[0043] Secondly, the provided coded multilayer film filter array structure can be designed and manufactured in a coding manner, which greatly reduces the difficulty of the processing technology, can significantly save costs, and is conducive to the promotion and application of high-resolution spectral imaging chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 This is a top view of a coding multilayer film filter array structure in a typical embodiment of the present application;

[0045] Figure 2 is a cross-sectional view of a coding multilayer film filter array structure in a typical embodiment of the present application;

[0046] Figure 3 This is a transmission spectrum diagram of 25 spectral sampling channels of a coded multilayer film filter array structure in a typical embodiment of the present application;

[0047] Figure 4 This is a spectral correlation statistical graph of 25 spectral sampling channels of a coded multilayer film filter array structure in one embodiment of the present application;

[0048] Figure 5 yes Figure 4 Spectral reconstruction of 25 spectral sampling channels;

[0049] Figure 6 This is a schematic diagram of metal layer coding on five planes within a coded multilayer film filter array structure in one embodiment of the present application;

[0050] Figure 7This is a schematic diagram of a 5×5 spectral sampling unit array structure in one embodiment of the present application;

[0051] Figure 8 This is a design layout of a mask set in one embodiment of the present application. DETAILED DESCRIPTION

[0052] In view of these shortcomings of the prior art, the inventors of this case have proposed the technical solution of this application after long-term research and extensive practice. It mainly relates to a spectral imaging chip based on a coded metal-dielectric multilayer filter array. The chip uses a metal-dielectric multilayer film (i.e., the aforementioned coded multilayer filter array structure) to realize a sampling channel with low spectral correlation, thereby improving the spectral sampling efficiency and resolution. One spectral sampling channel corresponds to a pixel on the detector array, thereby achieving high spatial resolution. In addition, this coded multilayer filter array structure also has the structural characteristics of flattening, is easy to process, and can effectively avoid problems such as surface scattering.

[0053] The technical solution of this application, its implementation process and principles are further explained below.

[0054] See also Figure 1 As shown, in a typical embodiment of the present application, a coded multilayer film filter array structure (hereinafter referred to as the filter array) includes M×N filter units (hereinafter referred to as units, i.e., filters) arranged in an array along the horizontal direction, where M and N are both positive integers ≥ 2, and can include, for example, 5×5 units. Each filter array corresponds to a pixel of a detector array, that is, a filter array and a corresponding detector array constitute a spectral sampling unit. The detector array can be arranged directly below the corresponding filter array. M×N spectral sampling units constitute an equivalent imaging pixel.

[0055] Furthermore, the filter array is a metal-dielectric multilayer film architecture, in which L layers of metal and dielectric are stacked at intervals, and all metal layers can have the same thickness. If the dielectric layers in each filter are sorted in order from bottom to top or from top to bottom, the dielectric layers with the same serial number can have the same thickness in different filters, and the dielectric layers with different serial numbers can have different thicknesses. Moreover, the dielectric layers with the same serial number are basically distributed on the same horizontally arranged plane. Generally speaking, the thickness of the metal layer has a relatively small effect on the spectral shape of the filter, but mainly affects its transmittance. For example, the thickness of the metal layer can be 10-30nm. The thickness of the dielectric layer mainly determines the optical path and will affect the transmission spectrum of the filter. The thickness of different dielectric layers varies, which can increase the design freedom of the filter.

[0056] Multiple filters in the same filter array are different from each other. If each filter is assigned a first code, then different filter units will have different first codes. The first code is related to the number of metal layers contained in the corresponding filter unit and / or the position of the metal layers in a specified direction. In other words, the structure of the dielectric / metal layers of each filter can be understood as the corresponding first code.

[0057] For example, each filter includes L dielectric layers, but the number of metal layers K ranges from 1 to L-1 layers. The difference between different filters lies in the number of metal layers and their positions. Specifically, in the initial design architecture of each filter, there are L metal layers, that is, L positions, but the actual number of metal layers in each filter is not L. Different filters may lack corresponding metal layers in different positions (mainly in the thickness direction of the filter array). Each filter should have at least 1 metal layer to form interference, and there can be a maximum of (L-1) metal layers. In a filter containing multiple metal layers, multiple dielectric layers and multiple metal layers cooperate to form multiple Fabry-Perot optical cavities with cascade coupling. If all L metal layers exist, one more filter is inevitably required, but this filter structure is the thickest, which will significantly increase the height difference between the filters, so it is generally not selected. Therefore, the number of metal layers K for each filter is limited to between 1 and L-1, and K is generally preferred to be between 1-4. A larger K will result in lower transmittance.

[0058] For example, Figure 2 The following diagram shows the expanded layer structure of an optimized 5×5 filter array. The filter layer structure in this filter array is primarily composed of five metal layers and five dielectric layers (L = 5), stacked alternately. Theoretically, there are 32 possible designs (C(5,0) + C(5,1) + C(5,2) + C(5,3) + C(5,4) + C(5,5) = 32). If L = 5 and K = 1-4, the total possible combinations are C(5,1) + C(5,2) + C(5,3) + C(5,4) = 30. If L = 6 and K = 1-5, the total possible combinations are C(6,1) + C(6,2) + C(6,3) + C(6,4) + C(6,4) = 62. This represents the total number of possible filter designs. In practice, you don't need to select all of them.

[0059] Please continue reading Figure 2, taking the case of L = 5 and K = 1 - 5 as an example, according to the preset selection principle, only a part can be taken. For example, 25 designs. These 25 different designs all include five dielectric layers, but the number and position of the metal layers are different. Only 5 photolithography processes are required to achieve 32 different spectral sampling channels. While using the conventional manufacturing method of the FP cavity, 32 photolithography processes are required to achieve 32 different thicknesses. In contrast, the method of this application significantly reduces the process difficulty. In actual work, a part of the structures (which can be 10, 15, 18...) can be preferably selected. For example, 25 with relatively low spectral correlation are selected as the filter array units.

[0060] In Figure 2 the filter array shown, the number of dielectric layers of each filter and their positions in the vertical direction are the same. The difference is whether there is a metal layer between every two adjacent dielectric layers. If there is a metal layer, its code is set to 1, otherwise, its code is set to 0. Thus, if the filters in the filter array shown in Figure 2 are sorted from left to right, and the metal layer codes in the first filter are set in the order from top to bottom, the first code of the first filter obtained can be expressed as (0, 0, 0, 1, 1). By analogy, the first code of the second filter can be expressed as (0, 0, 1, 0, 1).

[0061] In this typical embodiment, the material of the metal layer can be selected from gold, silver, aluminum, copper, etc., or their alloys or single-metal laminated structures, and the material of the dielectric layer can be SiO2, SiN, ZnS, Al2O3, TiO2, etc., or their composite structures.

[0062] Further, in Figure 2 the filter array shown, the bottom layer can be a substrate such as quartz glass for integration with the detector array patch, or it can be the detector array, that is, the filter array is directly integrated on the surface of the detector array.

[0063] In this application, the definition of spectral correlation is as follows: Spectral correlation is usually used to measure the similarity between two spectra. The higher the spectral correlation, the more similar the two spectra are. The calculation formula of spectral correlation is as described above. Generally speaking, c < 0.3 is weakly correlated, 0.3 < c < 0.5 is lowly correlated, 0.5 < c < 0.8 is significantly correlated, and 0.8 < c < 1 is highly correlated. From the perspective of spectral reconstruction, the lower the correlation between spectral sampling channels (filters), the more effective the sampling, the more information is included, and the more accurate the spectral detection. In this typical embodiment, c is preferably < 0.5, and more preferably < 0.3.

[0064] The following is a more specific implementation example to illustrate the technical solution of this application. In this embodiment, the metal layer is made of Ag, the dielectric layer is made of SiO2, and the substrate is quartz glass. From bottom to top, the thicknesses of the five dielectric layers are approximately 230 nm, 80 nm, 300 nm, 270 nm, and 80 nm, respectively. The thickness of each metal layer is approximately 20 nm.

[0065] In this embodiment, 25 spectrum sampling channels with low average spectrum correlation are selected by encoding the metal layer, and their transmission spectra are as follows: Figure 3 As shown in Figure 2, it can be seen that these spectral sampling channels have obvious distinctions between each other. The correlation coefficients between these 25 spectral sampling channels are as follows: Figure 4 As shown in Figure 2, the average correlation is 0.28, which is in the low correlation range and the spectral sampling efficiency is high. Based on the sampling of these 25 spectral sampling channels, the spectral reconstruction results obtained by using the compressed sensing algorithm are shown in Figure 2. Figure 5 Compared to the original spectrum, the peak deviation of the reconstructed spectrum is less than 1 nm. Furthermore, the maximum height difference of these 25 filters is only 40 μm, less than 4% of the 1-2 μm pixel size of conventional image sensors, making it process-friendly for thin film deposition, lift-off, and etching processes.

[0066] In this embodiment, the metal layers of the 25 filters are positionally encoded within a two-dimensional plane, and the optimal metal layer arrangement on each plane is optimized by combination to further reduce the process difficulty. If the multiple filters in the filter array are defined as being arranged in an array along the working plane, there are five first-layer planes and five second-layer planes in the filter array. The five first-layer planes are used to set the metal layers at different heights, and the five second-layer planes are used to set the dielectric layers at different heights. And each metal layer is defined as a small metal block of size 1×1. Then, in this embodiment, the arrangement principle of the metal layer on each first-layer plane is to allow small metal blocks to be merged as much as possible to form large metal blocks, thereby improving the integrity of the metal layer structure and improving the tolerance of the patterning, deposition, stripping and etching processes. The 25 positions arranged in the array on each first-layer plane (i.e., the aforementioned coding bits) can be encoded with 0 and 1, 0 represents the absence of a metal layer and corresponds to the aforementioned blank coding bit, and 1 represents the presence of a metal layer and corresponds to the aforementioned valid coding bit. These codes can be defined as the second code. The effective coding bits on the five first-layer planes are basically gathered together, that is, the metal layers on each first-layer plane are basically gathered together, and multiple optimized two-dimensional coding bit matrices can be obtained, such as Figure 6 As shown, they can be named as matrix 1, matrix 2, matrix 3, matrix 4, and matrix 5. Then, corresponding multiple masks can be made based on these optimized two-dimensional coding bit matrices.

[0067] Combining the five first-layer planes with metal layers and the five second-layer planes with fixed-thickness dielectric layers, we can get Figure 7 The 5×5 spectral sampling unit array shown is a filter array.

[0068] The combination optimization scheme employed in this embodiment may include screening for qualified permutations and combinations through randomization and submatrix condition checking. The submatrix condition determines whether the randomization meets the requirements. The basic principle of the submatrix condition in this embodiment is to avoid designing combinations with isolated metal layers, that is, to splice at least two metal layers side by side to reduce processing difficulty.

[0069] Furthermore, for each 5×5 coding bit array on the first plane, only the middle 3×3 coding bit array (referred to as the middle array) can be selected for evaluation. This is because when the 5×5 coding bit array is subsequently converted into a mask suitable for actual production, the outermost ring of coding bits generally needs to be mirrored. That is, no matter which coding bit in the outermost ring of the 5×5 coding bit array is a valid coding bit, its mirror image position must also be a valid coding bit, and the two mirrored valid coding bits must be side by side. For the aforementioned middle array, first find each valid coding bit. If there are four 2×2 matrix cells containing this valid coding bit, at least one of these four matrix cells contains two 1s in non-diagonal positions, then the filter condition is met and can be retained. Otherwise, it does not meet the filter condition. For example, if the diagonal lines are [0, 1; 1, 0] or [1, 0; 0, 1], that is, two 1s in the diagonal position, and an isolated metal layer appear, it is marked as not meeting the filter condition. When all valid coding bits satisfy the above conditions, this combination design is applicable, that is, an optimized two-dimensional coding bit matrix is ​​obtained.

[0070] As one of the preferred implementations, the sub-matrix condition can be further improved, or made more process-friendly. For example, it can be stipulated that all valid coding bits must belong to a 2×2 matrix unit consisting entirely of valid coding bits, that is, at least four metal layers are stitched together.

[0071] After completing the above-mentioned combinatorial optimization work, multiple corresponding masks, i.e., a mask set, can be further produced based on the multiple optimized two-dimensional coding bit matrices obtained. There are various ways to convert the aforementioned coding array pattern into the corresponding mask, such as printing, photolithography, etc. For example, if the mask is produced based on a photolithography process, the pattern can be defined by first performing exposure and development operations on the photoresist based on the coding array pattern. Then, metal deposition, etching / stripping, and other processes can be performed to convert it into a patterned mask. In some cases, the mask can be quartz glass with a metal pattern.

[0072] Considering that spectral imaging chips typically consist of multiple supercells arranged in an array, each supercell includes a detector array and a corresponding filter array. To simplify the spectral imaging chip manufacturing process, it is often necessary to complete the production of multiple filter arrays at once. In this case, based on each of the aforementioned optimized two-dimensional encoding bit matrices, matrix expansion and transformation operations can be performed on them, and then converted into a corresponding mask suitable for actual production.

[0073] Specifically, the filter array of this embodiment can be tiled in the pixel plane of the image sensor to form a spectral imaging chip. In order to further improve process friendliness, the tiled expansion can adopt the principle of symmetry, that is, Figure 8 The five optimized two-dimensional coding bit matrices are flipped according to their two orthogonal sides, and then rotated 180° around the intersection of the two sides to obtain a combined array structure with twice the side length. This combined array structure is then arranged periodically to form the final coding array pattern, which can then be transformed into Figure 8 The five reticles shown are Mask 1, Mask 2, Mask 3, Mask 4, and Mask 5. Each reticle can have multiple mask bit matrices arranged in an array. Each mask bit matrix can include 5×5 mask bits arranged in an array. These mask bits include active mask bits and blank mask bits, with each active mask bit corresponding to a valid coding bit. By adopting the aforementioned scheme, the active mask bits corresponding to the metal layer in the reticle obtained in this embodiment are more concentrated, facilitating processing.

[0074] Furthermore, these masks can be used to quickly and efficiently prepare spectral imaging chips.

[0075] For example, in this embodiment, multiple dielectric layers and multiple metal material layers are formed by alternately depositing dielectric materials and metal materials on a substrate, and during or after the formation of each metal material layer, the corresponding mask and conventional processes such as metal etching, metal stripping, and metal mask deposition can be used to achieve graphical processing of the metal material layer.

[0076] For example, if a metal mask deposition process is used, mask one can be first covered on a quartz glass substrate to deposit metal materials, wherein the effective mask position is a through-hole structure, so that the metal material at the corresponding position is directly bonded to the substrate, and then the first continuous dielectric layer is deposited. After that, mask two is covered on the first continuous dielectric layer, and the metal material is continued to be deposited, and then the second continuous dielectric layer is deposited, and so on, until the deposition of the metal material is completed using mask five, and finally the fifth continuous dielectric layer is deposited, thereby completing the production of the coded multilayer film filter array structure in a spectral imaging chip.

[0077] By adopting the aforementioned coding design method, this embodiment can greatly reduce the difficulty of processing the filter array in the on-chip integrated spectral imaging chip, and can achieve a one-to-one correspondence between a single filter channel and a single pixel of the image sensor, thereby improving the spatial resolution. In addition, the spectral correlation of the coding filter array is low, which effectively improves the spectral resolution.

[0078] It should be understood that the above embodiments are merely illustrative of the technical concepts and features of this application. Their purpose is to enable those familiar with the art to understand the content of this application and implement it accordingly. They are not intended to limit the scope of protection of this application. Any equivalent changes or modifications made in accordance with the spirit and substance of this application shall be included within the scope of protection of this application.

Claims

1. A coded multilayer film filter array structure, characterized in that: It comprises a plurality of filter units arranged in an array along a working plane, wherein the filter units comprise a plurality of dielectric layers and a plurality of metal layers stacked along a specified direction, wherein at least one dielectric layer is distributed between two adjacent metal layers; different filter units have different first codes, and each first code is related to the number of metal layers contained in the corresponding filter unit and / or the position of the metal layers contained in the specified direction; and different filter units contain the same number of dielectric layers, wherein each dielectric layer in each filter unit is distributed on the same layer plane as the corresponding dielectric layer in the remaining filter units; the specified direction is perpendicular to the working plane and the layer plane; the thickness of the plurality of dielectric layers in the same layer plane is the same, and the thickness of the metal layers in the plurality of filter units is the same.

2. The coded multilayer film filter array structure according to claim 1, characterized in that: The plurality of dielectric layers and the plurality of metal layers in the filtering unit cooperate to form a plurality of cascade-coupled Fabry-Perot optical cavities.

3. The coded multilayer film filter array structure according to claim 1, characterized in that: The spectral correlation c of the plurality of filter units is less than 0.

5. If two of the filter units are defined as corresponding to spectrum A and spectrum B respectively, the calculation formula for c is as follows: Among them A i 、B i are the intensities of spectrum A and spectrum B at the i-th wavelength, represents the average value of spectrum A, represents the average value of spectrum B, n is the number of wavelengths of spectrum A and spectrum B in the wavelength range under discussion, and i ≥ 1.

4. The coded multilayer film filter array structure according to claim 3, characterized in that: c<0.3。 5. The coded multilayer film filter array structure according to claim 1, characterized in that: The thicknesses of the multiple dielectric layers in different layer planes are the same or different.

6. The coded multilayer film filter array structure according to claim 1, characterized in that: The thickness of the dielectric layer is 50-500 nm.

7. The coded multilayer film filter array structure according to claim 1, characterized in that: The thickness of the metal layer is 10-30 nm.

8. The coded multilayer film filter array structure according to claim 1, characterized in that: The material of the metal layer includes gold, silver, aluminum or copper.

9. The coded multilayer film filter array structure according to claim 1, characterized in that: The material of the dielectric layer includes SiO2, SiN, ZnS, Al2O3 or TiO2.

10. The coded multilayer film filter array structure according to claim 1, characterized in that: The surface undulation of the coding multilayer film filter array structure is below 90nm.

11. The coded multilayer film filter array structure according to claim 1, characterized in that: Each of the multiple metal layers on the same plane is spliced ​​together with one or more other metal layers into one whole.

12. The coded multilayer film filter array structure according to claim 1, characterized in that: The outermost layer of the filter unit is a dielectric layer.

13. The coded multilayer film filter array structure according to claim 1, characterized in that: The filter unit further includes a substrate, and the dielectric layer and the metal layer are stacked on the substrate.

14. A spectral imaging chip comprising a plurality of supercells arranged in an array, wherein the supercell comprises a detector array and a filter array, each filter array being disposed on a corresponding detector array and cooperating with each other to form a spectral sampling unit, characterized in that: The filter array comprises the coded multilayer film filter array structure according to any one of claims 1 to 13.

15. A method for manufacturing a mask set, characterized in that: The mask set is used to prepare the spectral imaging chip according to claim 14, and the method includes: The coded multilayer film filter array structure is assumed to include x×y filter units arranged in an array of x rows and y columns along a working plane, and the plurality of metal layers are distributed on z layer planes, where x and y are both positive integers ≥ 2; On each of the z layer planes, x×y coding bits are defined and arranged in an array of x rows and y columns, and a plurality of the coding bits are set as valid coding bits, each valid coding bit is used to set a metal layer, and the remaining coding bits are blank coding bits; Combining and optimizing the arrangement positions of multiple valid coding bits and blank coding bits on the corresponding layer plane so that each valid coding bit is spliced ​​with one or more other valid coding bits, thereby obtaining an optimized two-dimensional coding bit matrix corresponding to the layer plane; After matrix expansion and transformation are performed on the optimized two-dimensional coding bit matrix, a coding array pattern is obtained, and then a corresponding mask is produced based on the coding array pattern.

16. The manufacturing method according to claim 15, characterized in that: Specifically include: The arrangement positions of the plurality of valid coding bits and blank coding bits on the corresponding layer planes are combined and optimized through random arrangement and sub-matrix condition checking, thereby obtaining the optimized two-dimensional coding bit matrix.

17. The manufacturing method according to claim 16, characterized in that: Specifically include: For a two-dimensional coding bit array containing x×y coding bits, the valid coding bits and blank coding bits are randomly arranged, and the codes 1 and 0 are assigned to the valid coding bits and the blank coding bits respectively; Eliminating the code bits located at the outermost circle of the two-dimensional code bit array, and checking the remaining code bit array according to the sub-matrix condition, thereby screening out the optimized two-dimensional code bit matrix; The submatrix condition includes: for each valid coding bit in the remaining coding bit array, analyzing the four 2×2 coding bit matrices where the valid coding bit is located, and if at least one of the four coding bit matrices contains two valid coding bits in non-diagonal positions, marking it as meeting the screening condition; otherwise, marking it as not meeting the screening condition.

18. The manufacturing method according to claim 15, characterized in that: The matrix expansion and transformation specifically includes: flipping each optimized two-dimensional coding bit matrix according to its two orthogonal sides, and then rotating it 180° around the intersection of the two sides to obtain an extended coding bit matrix containing 4x×4y coding bits, and periodically arranging multiple extended coding bit matrices on the corresponding layer plane to obtain the coding array pattern.

19. A mask set designed by the method according to any one of claims 15 to 18.

20. The method for preparing the spectral imaging chip according to claim 14, wherein: include: Dielectric materials and metal materials are alternately deposited on a substrate to form multiple dielectric layers and multiple metal material layers. During or after the formation of each metal material layer, a corresponding mask is used to implement patterning of the metal material layer.

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