Display device and method of manufacturing same

Abstract

The invention discloses a method of manufacturing a display device and a display device. The method includes: manufacturing an electronic component; and attaching the electronic component to a display panel using a conductive adhesive member. The manufacturing of the electronic component includes: providing a substrate and a conductive layer disposed on the substrate; performing primary etching of the conductive layer to form a preliminary bump electrode; and performing secondary etching of the preliminary bump electrode to form a bump electrode.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2023-0123355 filed in the Korean Intellectual Property Office on September 15, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Embodiments described in the present disclosure relate to a display device, and more particularly, to a display device in which a display panel and an electronic component are more reliably bonded, and also to a method of manufacturing the display device. Background Art

[0004] The display device generally includes a display area activated by an electrical signal. The display device can detect input applied to the display area from an external unit, and at the same time detect that the display area displays various images and thus provides information to the user. The display device may include a display panel and a circuit board. The display panel may be connected to the main board through the circuit board. The drive circuit chip may be mounted on the display panel. Summary of the invention

[0005] Embodiments of the present disclosure may provide a display device having improved bonding reliability and a method of manufacturing the display device.

[0006] According to an embodiment, a method for manufacturing a display device includes: manufacturing an electronic component; and attaching the electronic component to a display panel using a conductive adhesive member. The manufacturing of the electronic component may include: providing a substrate and a conductive layer disposed on the substrate; performing a primary etching of the conductive layer to form a preliminary bump electrode; and performing a secondary etching of the preliminary bump electrode to form a bump electrode.

[0007] The preliminary bump electrode may include a protrusion protruding in a lateral direction, and in the secondary etching of the preliminary bump electrode, the protrusion may be removed.

[0008] The primary etching of the conductive layer may be performed during a first etching time, the secondary etching of the preliminary bump electrode may be performed during a second etching time, and the second etching time may be shorter than the first etching time.

[0009] The manufacturing of the electronic component may further include: after the providing of the substrate and the conductive layer and before the primary etching of the conductive layer, forming a first photoresist pattern on the conductive layer using a half-tone mask.

[0010] The method may further include: removing a portion of the first photoresist pattern to form a second photoresist pattern after the first etching of the conductive layer and before the second etching of the preliminary bump electrode; and removing the second photoresist pattern after the second etching of the preliminary bump electrode.

[0011] The first photoresist pattern may include a first pattern portion and a second pattern portion thinner than the first pattern portion, and upon the removing of the portion of the first photoresist pattern, the second pattern portion may be removed and an upper portion of the preliminary bump electrode may be exposed.

[0012] The manufacturing of the electronic component may also include: forming a photoresist pattern using a mask defining an exposure opening therein after the providing of the substrate and the conductive layer and before the primary etching of the conductive layer; and removing the photoresist pattern after the secondary etching of the preliminary bump electrode.

[0013] The photoresist pattern may be used as the mask in both the primary etching of the conductive layer and the secondary etching of the preliminary bump electrode.

[0014] The manufacture of the electronic component may also include: after the provision of the substrate and the conductive layer and before the first etching of the conductive layer, forming a first photoresist pattern using a first mask in which a first exposure opening is defined; and after the first etching of the conductive layer and before the second etching of the preliminary bump electrode, forming a second photoresist pattern using a second mask in which a second exposure opening is defined, and the width of the second photoresist pattern may be smaller than the width of the first photoresist pattern.

[0015] The bump electrode may not include a portion having a width that widens in a direction from a lower surface of the bump electrode to an upper surface of the bump electrode.

[0016] In the attaching of the electronic component to the display panel, the conductive adhesive member may be in contact with an upper surface and a side surface of the bump electrode.

[0017] The side surface of the bump electrode may include: a first side surface portion extending from a lower surface of the bump electrode; and a second side surface portion extending from the first side surface portion to an upper surface of the bump electrode and defining a bending point with the first side surface portion.

[0018] A side surface of the bump electrode may have a substantially constant inclination.

[0019] The electronic component may be any one of the flexible circuit board and a driving circuit chip.

[0020] According to an embodiment, a display device includes: a display panel, including a base layer and a display pad arranged on the base layer; an electronic component, arranged on the display panel and including a substrate and a bump electrode arranged under the substrate; and a conductive adhesive member, electrically connecting the display panel and the electronic component, wherein the side surface of the bump electrode includes: a first side surface portion, extending from the lower surface of the bump electrode; and a second side surface portion, extending from the first side surface portion to the upper surface of the bump electrode and configured to define a bending point with the first side surface portion, and the conductive adhesive member can contact the first side surface portion and the second side surface portion.

[0021] An inclination of the second side surface portion may be smaller than an inclination of the first side surface portion.

[0022] The second side surface portion may define a recessed portion.

[0023] The bump electrode may not include a portion having a width that widens in a direction from the lower surface of the bump electrode to the upper surface of the bump electrode.

[0024] The conductive adhesive member may include an adhesive resin and conductive balls dispersed in the adhesive resin.

[0025] The electronic component may be any one of a flexible circuit board and a driving circuit chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other objects and features of the present disclosure will become apparent by describing in detail embodiments of the present disclosure with reference to the accompanying drawings.

[0027] Figure 1 is a perspective view of a display device according to an embodiment of the present disclosure.

[0028] Figure 2A and Figure 2B is an exploded perspective view of a display device according to an embodiment of the present disclosure.

[0029] Figure 3 is a cross-sectional view of a display module according to an embodiment of the present disclosure including a display panel and an input sensor.

[0030] Figure 4 is a plan view of a display panel according to an embodiment of the present disclosure.

[0031] Figure 5 is a cross-sectional view of a display panel according to an embodiment of the present disclosure.

[0032] Figure 6 is an enlarged exploded view of a portion of a display device according to an embodiment of the present disclosure.

[0033] Figure 7 is an enlarged cross-sectional view of a portion of a display device according to an embodiment of the present disclosure.

[0034] Figure 8 is an enlarged cross-sectional view of a portion of a display device according to an embodiment of the present disclosure.

[0035] Fig. 9 is an enlarged cross-sectional view of a portion of a display device according to an embodiment of the present disclosure.

[0036] Fig.10 is an enlarged cross-sectional view of a portion of a display device according to an embodiment of the present disclosure.

[0037] Fig.11 is a plan view showing a flexible circuit board according to an embodiment of the present disclosure.

[0038] Fig.12 is a flowchart illustrating a method of manufacturing a display device according to an embodiment of the present disclosure.

[0039] Fig.13 is a flowchart illustrating some operations of a method of manufacturing a display device according to an embodiment of the present disclosure.

[0040] Fig.14A , Fig. 14B , Fig. 14C , Fig.14D , Fig.14E , Fig.14F , Figure 14G , Fig.14H , Fig.14I and Fig.14J are cross-sectional views sequentially illustrating some structures formed by a method of manufacturing a display device according to an embodiment of the present disclosure.

[0041] Fig.15A , Fig. 15B and Fig. 15C are cross-sectional views of some structures formed by a method of manufacturing a display device according to an embodiment of the present disclosure.

[0042] Fig.16 is a flowchart illustrating some operations of a method of manufacturing a display device according to an embodiment of the present disclosure.

[0043] Fig.17A , Fig. 17B , Fig. 17C and Fig.17Dare cross-sectional views of some structures formed by a method of manufacturing a display device according to an embodiment of the present disclosure.

[0044] Fig.18 is a flowchart illustrating some operations of a method of manufacturing a display device according to an embodiment of the present disclosure.

[0045] Fig.19A , Fig.19B , Fig.19C and Fig.19D are cross-sectional views of some structures formed by a method of manufacturing a display device according to an embodiment of the present disclosure.

[0046] Fig. 20 is an enlarged cross-sectional view of a portion of a display device according to a comparative example. DETAILED DESCRIPTION

[0047] In this specification, a first component (or region, layer, part, portion, etc.) is referred to as being "disposed on", "connected to" or "coupled to" a second component, which means that the first component is directly disposed on / directly connected to / directly coupled to the second component, or that a third component is between the first component and the second component.

[0048] The term "and / or" used herein includes all combinations of one or more components that can be defined by the associated components.

[0049] Although the terms "first", "second", etc. can be used to describe various components, the components should not be limited by these terms. These terms are only used to distinguish one component from another component. For example, without departing from the correct scope of the present disclosure, a first component can be referred to as a second component, and similarly, a second component can also be referred to as a first component. Unless otherwise clearly stated in the context, a singular expression includes a plural expression.

[0050] In addition, the terms "below", "beneath", "on", "over", etc. are used to describe the correlation or relationship of components shown in the drawings. Conceptually relative terms are described based on the directions shown in the drawings.

[0051] It will be understood that the terms “comprising,” “including,” “having,” etc. indicate the presence of the described features, numbers, steps, operations, elements or components, or a combination thereof, in the specification, and do not exclude the possibility of the presence or addition of one or more other features, numbers, steps, operations, elements or components, or a combination thereof.

[0052] Unless otherwise defined, all terms (including technical and scientific terms) used in this specification have the same meaning as those commonly understood by those of ordinary skill in the art to which the present disclosure belongs. In addition, unless explicitly defined herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with that in the context of the relevant technology and should not be interpreted in an idealized or overly formal sense.

[0053] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. The same reference numerals or characters used to identify components in multiple drawings refer to similar or identical components. In addition, in the drawings, the thickness, proportion, and size of the components may be exaggerated or otherwise changed for the effective description of the technical content.

[0054] Figure 1 is a perspective view of a display device DD according to an embodiment of the present disclosure. Figure 2A and Figure 2B is an exploded perspective view of a display device DD according to an embodiment of the present disclosure. Figure 2A Specifically, the display device DD is shown in a state where the bending area BA of the display panel DP is not bent, and Figure 2B The bending area BA of the display panel DP is shown in a bent state.

[0055] Figure 1 An example in which the display device DD is a mobile phone terminal is shown. The display device DD according to the present disclosure can be more generally applied to other applications (including small and medium-sized electronic devices such as tablet computers, car navigation systems, game consoles, and smart watches, and large electronic devices such as televisions and monitors).

[0056] The display device DD may have a rectangular planar shape having long sides extending in a first direction DR1 and short sides extending in a second direction DR2 at an angle to the first direction DR1. However, the present disclosure is not limited thereto, and the display device DD may have various planar shapes such as a circle and other polygons.

[0057] The display device DD also has a thickness extending in a third direction DR3. Hereinafter, the third direction DR3 is defined as a direction substantially perpendicular to a plane defined by the first direction DR1 and the second direction DR2. In this specification, the wording "when viewed on a plane" means when viewed from the third direction DR3.

[0058] The display device DD may be rigid or flexible. The word "flexible" applied to a structure means that the structure can be bent, which includes structures that can be completely folded as well as structures that can be bent by a few nanometers. For example, the flexible display device DD may include a curved electronic device, a rollable electronic device, or a foldable electronic device.

[0059] The display device DD can display an image IM through the display surface DD-IS. An example of an icon image as an image IM is shown in FIG. Figure 1 The display surface DD-IS may be parallel to a plane defined by the first direction DR1 and the second direction DR2.

[0060] The display surface DD-IS may include a display area DD-DA displaying an image IM and a non-display area DD-NDA adjacent to the display area DD-DA. The non-display area DD-NDA may be an area where no image is displayed. The non-display area may surround the display area DD-DA. However, the present disclosure is not limited thereto, and the non-display area DD-NDA may be adjacent to one side of the display area DD-DA or may be omitted.

[0061] Reference Figure 2A and Figure 2B , the display device DD may include a window WM, a display module DM and a storage element or a back cover BC.

[0062] The window WM may be disposed on the display module DM and may transmit light from an image provided by the display module DM. The window WM may include a transmission area TA and a non-transmission area NTA. The transmission area TA may be Figure 1 The display area DD-DA shown in the figure overlaps and has a shape corresponding to the display area DD-DA. Although not shown, the window WM may include a base layer and a functional layer arranged on the base layer. The functional layer may include a protective layer and an anti-fingerprint layer, etc. The base layer of the window WM may be made of glass, sapphire or plastic. The base layer of the window WM may include an optically transparent insulating material. For example, the base layer of the window WM may include glass or a plastic film, or may include a glass substrate and a plastic film bonded by an adhesive.

[0063] The non-transmitting area NTA may be Figure 1 , and has a shape corresponding to the non-display area DD-NDA. The non-transmission area NTA may be an area having a relatively low light transmittance compared to the transmission area TA. The non-transmission area NTA may be defined by a frame pattern in or on a portion of the base layer of the window WM, and an area in which the frame pattern is not provided may be defined as the transmission area TA. However, the present disclosure is not limited thereto, and the non-transmission area NTA may be omitted.

[0064] Although not shown, an anti-reflection layer may be provided between the window WM and the display module DM. The anti-reflection layer may reduce the reflectivity of an external light beam incident on the display module DM from outside the display device DD. The anti-reflection layer may include a color filter. The color filter may have a predetermined arrangement. For example, the color filter may be arranged in consideration of the luminous color of the pixels included in the display panel DP, which will be described below. In addition, the anti-reflection layer may further include a black matrix adjacent to the color filter.

[0065] According to an embodiment of the present disclosure, the display module DM may include a display panel DP and an input sensor ISU.

[0066] The display panel DP may be one of a liquid crystal display panel, an electrophoretic display panel, a micro-electromechanical system display panel, an electrowetting display panel, an organic light-emitting display panel, an inorganic light-emitting display panel, and a quantum dot light-emitting display panel. However, the present disclosure is not limited thereto. Hereinafter, an example in which the display panel DP is an organic light-emitting display panel will be described.

[0067] The input sensor ISU may include any one of a capacitive sensor, an optical sensor, an ultrasonic sensor, and an electromagnetic induction sensor, which may be capable of sensing a touch on the outer surface of the window WM. The input sensor ISU may be formed on the display panel DP through a continuous process, or may be manufactured separately and then attached to the upper portion of the display panel DP through an adhesive layer, and the present disclosure is not limited to one embodiment of the input sensor ISU.

[0068] The display module DM may further include a driving circuit chip DIC disposed on the display panel DP. The display module DM may further include a circuit board FCB disposed on the display panel DP. In an embodiment, the circuit board FCB may be a flexible circuit board. Hereinafter, the circuit board FCB may be described as a flexible circuit board FCB, but the present disclosure is not limited thereto. For example, the circuit board FCB may be rigid. The circuit board FCB may electrically connect the display panel DP and the main circuit board.

[0069] The driving circuit chip DIC may include driving elements (eg, data driving circuits) for driving pixels of the display panel DP. Figure 2A The structure in which the driving circuit chip DIC is mounted on the display panel DP is shown, but the present disclosure is not limited thereto. For example, the driving circuit chip DIC may be mounted on a flexible circuit board FCB. In an embodiment, the driving circuit chip DIC and the flexible circuit board FCB directly mounted on the display panel DP may be collectively referred to as an electronic component. The bonding structure between the display panel DP and the flexible circuit board FCB to be described below may also be applied to other electronic components such as the driving circuit chip DIC.

[0070] The display panel DP may include a bending area BA and first and second non-bending areas NBA1 and NBA2 spaced apart from each other in a first direction DR1 with the bending area BA interposed therebetween.

[0071] The bending area BA may be defined as an area in which the display panel DP may be bent around a virtual bending axis BX extending in the second direction DR2. The first non-bending area NBA1 may include an area overlapping the transmissive area TA, and the second non-bending area NBA2 may be an area to which the flexible circuit board FCB is connected. When the bending area BA is bent around the bending axis BX, the flexible circuit board FCB and the driving circuit chip DIC may face the rear surface of the display device DD, and thus may be arranged below the rear surface of the display panel DP. Although not shown, an additional component may be arranged to compensate for the step difference caused by the bending area BA between the flexible circuit board FCB and the rear surface of the display panel DP.

[0072] According to an embodiment, the width of the first non-bending area NBA1 in the second direction DR2 may be greater than the width of each of the bending area BA and the second non-bending area NBA2. For example, the width of the bending area BA in the second direction DR2 may be provided in a shape that becomes narrower from the first non-bending area NBA1 to the second non-bending area NBA2. The present disclosure is not limited to the embodiment in which the second non-bending area NBA2 is narrower than the first non-bending area NBA1.

[0073] like Figure 2B As shown in , a portion of the display panel DP is bent, and a flexible circuit board FCB electrically bonded to the display panel DP may be disposed on the rear surface of the display panel DP.

[0074] The storage member BC may accommodate the display module DM and may be coupled to the window WM. The flexible circuit board FCB may be disposed at one end of the display panel DP and may be electrically connected to the display module DM. Figure 3 Although not shown, the display device DD may further include a main board, an electronic module mounted on the main board, a camera module, a power module, and the like.

[0075] Figure 3 is a cross-sectional view of a display module DM according to an embodiment including a display panel DP and an input sensor ISU. Figure 3 The display panel DP may include a base layer BL, a circuit element layer DP-CL disposed on the base layer BL, a display element layer DP-OLED, and an upper insulating layer TFL. The input sensor ISU may be disposed on the upper insulating layer TFL.

[0076] The display panel DP may include a display area DP-DA and a non-display area DP-NDA. The display area DP-DA of the display panel DP may correspond to Figure 1 The display area shown in DD-DA or Figure 2A The transmission area TA shown in FIG. 1 and the non-display area DP-NDA may correspond to Figure 1 The non-display area DD-NDA or Figure 2A The non-transmissive area NTA shown in FIG.

[0077] The base layer BL may include at least one plastic film. The base layer BL may be a flexible substrate, and may be a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite material substrate.

[0078] The circuit element layer DP-CL may include at least one intermediate insulating layer and at least one conductive layer or semiconductor layer. The intermediate insulating layer may include at least one intermediate inorganic layer and at least one intermediate organic layer. The conductive layer or semiconductor layer may include or form a signal line and a driving circuit of a pixel, etc.

[0079] The display element layer DP-OLED may include organic light emitting diodes of a plurality of pixels. The display element layer DP-OLED may further include an organic layer (such as a pixel definition film).

[0080] The upper insulating layer TFL may seal the display element layer DP-OLED. The upper insulating layer TFL may be disposed on the display element layer DP-OLED. The upper insulating layer TFL may overlap with the display area DP-DA and the non-display area DP-NDA. The upper insulating layer TFL may overlap with at least a portion of the non-display area DP-NDA. For example, the upper insulating layer TFL may include a thin film encapsulation layer. The thin film encapsulation layer may include a stacked structure of an inorganic layer, an organic layer, and an inorganic layer. The upper insulating layer TFL may protect the display element layer DP-OLED from foreign matter such as moisture, oxygen, and dust particles. However, the present disclosure is not limited thereto, and in addition to the thin film encapsulation layer, the upper insulating layer TFL may further include an additional insulating layer. For example, the upper insulating layer TFL may further include an optical insulating layer for controlling a refractive index.

[0081] In an embodiment of the present disclosure, an encapsulation substrate may be provided instead of the upper insulating layer TFL. In this case, the encapsulation substrate may face the base layer BL, and the circuit element layer DP-CL and the display element layer DP-OLED may be arranged between the encapsulation substrate and the base layer BL.

[0082] The input sensor ISU may be directly disposed on the display panel DP. (Herein, the statement “component A is directly disposed on component B” means that no separate layer is disposed between component A and component B.) In an embodiment, the input sensor ISU and the display panel DP may be manufactured by a continuous process. However, the embodiments of the present disclosure are not limited thereto, and the input sensor ISU may be provided as a separate panel and coupled to the display panel DP by an adhesive layer. In some embodiments, the input sensor ISU may be omitted.

[0083] Figure 4 is a plan view of a display panel DP according to an embodiment of the present disclosure. Figure 4 , the display panel DP may include a plurality of pixels PX, a gate driving circuit GDC, a plurality of signal lines SGL, and a plurality of display pads SD.

[0084] The pixels PX may be arranged in the display area DP-DA. Each of the plurality of pixels PX may include an organic light emitting diode and a pixel driving circuit connected to the organic light emitting diode.

[0085] The gate driving circuit GDC and the signal line SGL may be included in Figure 3 The gate drive circuit GDC may sequentially output gate signals to a plurality of gate lines GL. The gate drive circuit GDC may include a plurality of thin film transistors formed by the same process as the pixel drive circuit of the pixel PX. For example, a low temperature polycrystalline silicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process may form the gate drive circuit GDC and the pixel drive circuit. The display panel DP may further include another drive circuit (not shown) that provides a light emitting control signal to the pixel PX.

[0086] The signal line SGL may include a gate line GL, a data line DL, a power line PL, and a control signal line CSL. Each of the plurality of gate lines GL may extend in the second direction DR2 and may be connected to a group (e.g., a row) of pixels PX corresponding to the plurality of pixels PX, and each of the plurality of data lines DL may extend in the first direction DR1 and may be connected to a group (e.g., a column) of pixels PX corresponding to the plurality of pixels PX. The gate line GL may be connected to the gate drive circuit GDC, and the data line DL may be connected to the drive circuit chip DIC via the bending area BA (see Figure 2A). The power line PL may extend in the first direction DR1 and the second direction DR2 and may be connected to the pixel PX. The portion of the power line PL extending in the first direction DR1 may extend from the first non-bending area NBA1 to the second non-bending area NBA2 via the bending area BA. The power line PL may provide a high power voltage (e.g., ELVDD) to the pixel PX. The control signal line CSL may be connected to the gate drive circuit GDC and may extend from the first non-bending area NBA1 to the second non-bending area NBA2 via the bending area BA.

[0087] The display panel DP may include a plurality of display pads SD. The plurality of display pads SD may be spaced a predetermined distance apart from each other. The plurality of display pads SD according to the embodiment may be arranged in the connection area CA of the second non-bending area NBA2. The connection area CA may be defined as an area of ​​the second non-bending area NBA2 in which the display pads SD are arranged. The drive circuit chip DIC (see Figure 2A ) and a flexible circuit board FCB may be attached to the connection area CA.

[0088] The display pad SD may include a first pad DP-DPD and a second pad DP-FPD. The first pad DP-DPD may be arranged to overlap the connection area CA. The drive circuit chip DIC (see Figure 2A ) can be mounted on the second non-bending area NBA2. The first pad DP-DPD can be electrically connected to the driving circuit chip DIC (see Figure 2A ), and can be from the driver circuit chip DIC (see Figure 2A ) receives the electrical signal and transmits it to the data line DL. Figure 2A ) can generate an analog voltage corresponding to the grayscale value of the image signal.

[0089] The first pads DP-DPD may be arranged in a row extending along the second direction DR2 and separated from each other in the first direction DR1. The first pads DP-DPD may include a first row of pads DP-DPD1 and a second row of pads DP-DPD2, the second row of pads DP-DPD2 being spaced apart from the first row of pads DP-DPD1 in the first direction DR1 and arranged in the second direction DR2. The second row of pads DP-DPD2 may be a pad receiving a first input from a drive circuit chip DIC (see FIG. Figure 2A ) and the first row of pads DP-DPD1 may be input pads for signals to the drive circuit chip DIC (see Figure 2A However, the present disclosure is not limited thereto, and the first pads DP-DPD may be arranged in one row or in three or more rows in the second direction DR2.

[0090] The second pad DP-FPD may be arranged to overlap the connection area CA. The first pad DP-DPD and the second pad DP-FPD may be connected to each other through a bridge signal line S-CL. Like the first pad DP-DPD, the second pad DP-FPD may also be arranged in the second direction DR2. A plurality of second pads DP-FPD may be arranged to be spaced apart from each other in the second direction DR2.

[0091] The flexible circuit board FCB may include a substrate bump electrode FCB-PD electrically connected to the display panel DP. The substrate bump electrode FCB-PD included in the flexible circuit board FCB may have an arrangement matching the arrangement of the second pad DP-FPD. For example, when the second pad DP-FPD is arranged on a row extending along the second direction DR2, the substrate bump electrode FCB-PD may also be arranged on a row extending along the second direction DR2. However, the present disclosure is not limited to any specific arrangement.

[0092] The second pads DP-FPD may be electrically connected to the substrate bump electrodes FCB-PD included in the flexible circuit board FCB and transmit an electrical signal received from the flexible circuit board FCB to the first pads DP-DPD.

[0093] Although not shown, the flexible circuit board FCB may include a timing control circuit that controls the operation of the display panel DP. The timing control circuit may be mounted on the flexible circuit board FCB in the form of an integrated chip. In addition, although not shown, the flexible circuit board FCB may include an input detection circuit that controls the input sensor ISU.

[0094] Although the display panel DP of the present disclosure has been described as including a Figure 2A The structure of the first pad DP-DPD of the driving circuit chip DIC shown in FIG. 1 is shown in FIG. 2 , but the present disclosure is not limited thereto. The driving circuit chip DIC (see FIG. 2 ) Figure 2A ) may be mounted on the flexible circuit board FCB, and in this case, the first pad DP-DPD inside the display panel DP may be omitted.

[0095] Figure 5 is a cross-sectional view of a display panel DP according to an embodiment of the present disclosure.

[0096] Reference Figure 5 , the display area DP-DA may include a light emitting area PXA and a non-light emitting area NPXA. Each of the plurality of pixels PX may include an organic light emitting diode OLED and a pixel driving circuit connected to the organic light emitting diode OLED. In detail, the pixel PX may include a transistor TR and an organic light emitting diode OLED.

[0097] Figure 5One transistor TR is shown as an example, but the present disclosure is not limited thereto. A pixel PX according to a typical embodiment may include seven transistors and at least one capacitor, and the seven transistors and capacitors may be electrically connected to each other. However, the number of transistors and capacitors in the pixel PX is not limited to seven.

[0098] The display panel DP may include a plurality of insulating layers, a plurality of semiconductor patterns, and a plurality of conductive patterns (for forming a plurality of signal lines, etc.). The insulating layer, the semiconductor layer, and the conductive layer may be formed by coating or deposition, etc. After formation, each of the insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned using photolithography. The semiconductor patterns and conductive patterns included in the circuit element layer DP-CL and the display element layer DP-OLED, etc. may be formed in this manner.

[0099] The base layer BL may include a synthetic resin layer. The base layer BL may have a multilayer structure. For example, the base layer BL may have a three-layer structure including a synthetic resin layer, an inorganic layer, and a synthetic resin layer. In a specific example, the synthetic resin layer may be a polyimide-based resin layer, but the material of the synthetic resin layer is not particularly limited thereto. In addition, the base layer BL may include a glass substrate, a metal substrate, or an organic / inorganic composite material substrate, etc.

[0100] At least one inorganic layer is disposed on the upper surface of the base layer BL. The inorganic layer may be formed in multiple layers. The multiple inorganic layers may constitute a barrier layer and / or a buffer layer. Figure 5 An embodiment is shown in which the display panel DP includes a buffer layer BFL.

[0101] The semiconductor pattern is disposed on the buffer layer BFL. The semiconductor pattern may include polycrystalline silicon. However, the present disclosure is not limited thereto, and the semiconductor pattern may include amorphous silicon or metal oxide.

[0102] Figure 5 Only a portion of the semiconductor pattern is shown, and the semiconductor pattern may also be arranged in a plane in another area of ​​the pixel PX or other pixels PX. The semiconductor pattern may be arranged on the pixel PX according to a specific rule. The semiconductor pattern may have different electrical characteristics depending on whether the semiconductor pattern is doped. The semiconductor pattern may include a plurality of regions each including a first region and a second region. The first region may be doped with an N-type dopant or a P-type dopant. For example, a region corresponding to a P-type transistor may include a doped first region doped with a P-type dopant.

[0103] The conductivity of the first region may be greater than the conductivity of the second region, and the first region may be mainly used as an electrode or a signal line. The second region has a low doping concentration or may be a non-doped region, and the second region of the semiconductor region may substantially correspond to an active region (or channel region) of a transistor corresponding to the region. In other words, a portion of the semiconductor pattern may be an active region or a channel region of a transistor, another portion of the semiconductor pattern may be a source or a drain of a transistor, and another portion of the semiconductor pattern may be a connecting electrode or a connecting signal line.

[0104] Figure 5 A portion of the semiconductor pattern forming a source S, an active area A, and a drain D of the transistor TR is shown.

[0105] Figure 5 A portion of a connection signal line SCL formed of a semiconductor pattern is also shown. In an embodiment, the connection signal line SCL may be electrically connected to a drain of any one of a plurality of transistors in the pixel PX.

[0106] The first insulating layer 10 is disposed on the buffer layer BFL. The first insulating layer 10 may cover the semiconductor pattern. The first insulating layer 10 may overlap with a plurality of pixels PX in common. The gate G is disposed on the first insulating layer 10. The gate G may be a part of the metal pattern. The gate G may overlap with the active area A. In the process of doping the semiconductor pattern, the gate G (or the metal pattern including the gate G) may be used as a mask.

[0107] A second insulating layer 20 covering the gate G may be disposed on the first insulating layer 10. The second insulating layer 20 may overlap the pixel PX in common. An upper electrode UE may be disposed on the second insulating layer 20. The upper electrode UE may overlap the gate G of the transistor TR. The upper electrode UE may be a portion of a metal pattern. A portion of the gate G and the upper electrode UE overlapping the gate G may form a capacitor.

[0108] The third insulating layer 30 covering the upper electrode UE may be disposed on the second insulating layer 20. The first connection electrode CNE1 disposed on the third insulating layer 30 may be connected to the connection signal line SCL through a contact hole CNT-1 passing through the first insulating layer 10 to the third insulating layer 30.

[0109] A fourth insulating layer 40 covering the first connection electrode CNE1 may be disposed on the third insulating layer 30. Each of the first to fourth insulating layers 10 to 40 may be an inorganic layer and / or an organic layer, and each of the first to fourth insulating layers 10 to 40 may have a single layer or multilayer structure.

[0110] The fifth insulating layer 50 may be disposed on the fourth insulating layer 40. The fifth insulating layer 50 may be an organic layer. The second connection electrode CNE2 may be disposed on the fifth insulating layer 50. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a contact hole CNT-2 passing through the fourth insulating layer 40 and the fifth insulating layer 50.

[0111] A sixth insulating layer 60 covering the second connection electrode CNE2 may be disposed on the fifth insulating layer 50. The sixth insulating layer 60 may be an organic layer. The first electrode AE ​​may be disposed on the sixth insulating layer 60. The first electrode AE ​​may be connected to the second connection electrode CNE2 through a contact hole CNT-3 passing through the sixth insulating layer 60.

[0112] The pixel opening OPN may be defined in the pixel defining film PDL. The pixel opening OPN may expose at least a portion of the first electrode AE ​​when formed in the pixel defining film PDL. In an embodiment, the light emitting region PXA may correspond to a portion of the first electrode AE ​​exposed by the pixel opening OPN.

[0113] The hole control layer HCL may be commonly disposed in the light emitting area PXA and the non-light emitting area NPXA. The hole control layer HCL may include a hole transport layer and may further include a hole injection layer. The light emitting layer EML may be disposed on the hole control layer HCL. The light emitting layer EML may be disposed in an area corresponding to the pixel opening OPN. That is, the light emitting layer EML may be formed separately in each pixel. However, the present disclosure is not limited thereto, and the light emitting layer EML may also be commonly formed in a plurality of pixels PX using an opening mask.

[0114] The electron control layer ECL may be disposed on the light emitting layer EML. The electron control layer ECL may include an electron transport layer and may further include an electron injection layer. The hole control layer HCL and the electron control layer ECL may be commonly formed in the pixel using an open mask. The second electrode CE may be disposed on the electron control layer ECL. The second electrode CE may have an integral or non-patterned shape and may be commonly disposed in the pixel. The upper insulating layer TFL may be disposed on the second electrode CE. The upper insulating layer TFL may include a plurality of thin films.

[0115] The buffer layer BFL and the first to fourth insulating layers 10 to 40 may be disposed not only in the first non-bending area NBA1 but also in the second non-bending area NBA2. Figure 5 As shown in FIG. 1 , the insulating layer disposed in the first non-bending region NBA1 includes some layers also disposed in the second non-bending region NBA2, and includes some layers that do not extend into the second non-bending region NBA2. However, the stacked structure of the insulating layer in the second non-bending region NBA2 is not particularly limited to Figure 5 The embodiment shown in .

[0116] In the second non-bending area NBA2, a portion of the data line DL may be disposed on the first insulating layer 10. Although not shown, in the first non-bending area NBA1, another portion of the data line DL may be disposed on the fifth insulating layer 50. The data line DL may be connected from the first non-bending area NBA1 to the bending area BA (see FIG. Figure 2A ) extends to the second non-bending area NBA2, and the data line DL may include a plurality of portions arranged on different layers according to areas.

[0117] The display pad SD may be in the second non-bending area NBA2. Figure 5 The display pad SD shown in FIG. 1 may be Figure 4 One of the plurality of display pads SD shown in FIG. Figure 4 The display pad SD may be connected to a portion (eg, a distal end) of the data line DL through a contact hole CH passing through the second to fourth insulating layers 20 to 40 .

[0118] Figure 6 is an enlarged exploded view of a portion of the display device DD according to an embodiment of the present disclosure. Figure 7 is an enlarged cross-sectional view of a portion of a display device DD according to an embodiment of the present disclosure. More specifically, Figure 6 and Figure 7 is a diagram showing a portion of the second non-bending area NBA2 and schematically showing some components in the second non-bending area NBA2.

[0119] Reference Figure 6 and Figure 7 , the display device DD may include a flexible circuit board FCB, a driving circuit chip DIC, a conductive adhesive member ACF and a display panel DP. For ease of description, Figure 6 The flexible circuit board FCB, the driving circuit chip DIC, the conductive adhesive member ACF, and the display panel DP are shown to be detached and spaced apart from each other. However, the display panel DP, a portion of the conductive adhesive member ACF (i.e., the first conductive adhesive member AF-F), and the flexible circuit board FCB may be coupled to each other, and the display panel DP, another portion of the conductive adhesive member ACF (i.e., the second conductive adhesive member AF-D), and the driving circuit chip DIC may be coupled to each other.

[0120] An area of ​​the second non-bending area NBA2 to which the flexible circuit board FCB is bonded may be defined as a first connection area CA1 , and an area of ​​the second non-bending area NBA2 to which the driving circuit chip DIC is bonded may be defined as a second connection area CA2 .

[0121] The flexible circuit board FCB may include a base layer F-BS and substrate bump electrodes FCB-PD.

[0122] The base layer F-BS may have an upper surface F-US and a lower surface F-DS. In the specification, the upper surface F-US and the lower surface F-DS of the base layer F-BS are defined based on the state of manufacturing the flexible circuit board FCB. In the state where the flexible circuit board FCB is attached to the display panel DP, the upper surface F-US of the base layer F-BS may face the display panel DP, and the base bump electrode FCB-PD may be disposed on the upper surface F-US of the base layer F-BS.

[0123] The substrate bump electrode FCB-PD may be linearly arranged on the upper surface F-US of the base layer F-BS along the second direction DR2. The substrate bump electrodes FCB-PD may be arranged to be spaced apart from each other in the second direction DR2. On a plane, the arrangement of the substrate bump electrode FCB-PD may be the same as the arrangement of the second pad DP-FPD on the display panel DP. The substrate bump electrode FCB-PD may have a shape exposed or extended to the outside from the upper surface F-US of the base layer F-BS.

[0124] The driving circuit chip DIC may include a driving integrated circuit DI and a chip bump electrode DIC-PD.

[0125] The driving integrated circuit DI may have an upper surface D-US and a lower surface D-DS. Herein, the upper surface D-US and the lower surface D-DS of the driving integrated circuit DI are identified based on the state of manufacturing the driving circuit chip DIC. In the state where the driving circuit chip DIC is attached to the display panel DP, the upper surface D-US of the driving integrated circuit DI may face the display panel DP, and the chip bump electrode DIC-PD may be disposed in the upper surface D-US of the driving integrated circuit DI.

[0126] The chip bump electrodes DIC-PD may be arranged in an array extending in a first direction DR1 and a second direction DR2. The chip bump electrodes DIC-PD may include a first row of chip bump electrodes DIC-PD1 linearly arranged along the second direction DR2 and a second row of chip bump electrodes DIC-PD2 spaced apart from the first row of chip bump electrodes DIC-PD1 in the first direction DR1 and linearly arranged along the second direction DR2. On a plane, the arrangement of the chip bump electrodes DIC-PD may be the same as the arrangement of the first pads DP-DPD on the display panel DP. The chip bump electrodes DIC-PD may have a shape exposed or extended from the upper surface D-US of the drive integrated circuit DI toward the display panel DP.

[0127] The conductive adhesive member ACF may be disposed between the flexible circuit board FCB and the display panel DP and between the driving circuit chip DIC and the display panel DP. The conductive adhesive member ACF may be an anisotropic conductive film. For example, Figure 7 As shown in , the conductive adhesive member ACF may include an adhesive resin BS and conductive balls ACB dispersed in the adhesive resin BS. Alternatively, the conductive adhesive member ACF may be a non-conductive film. For example, the conductive adhesive member ACF may include an adhesive resin that does not contain conductive particles. The conductive adhesive member ACF may include a thermosetting resin.

[0128] The conductive adhesive member ACF may include a first conductive adhesive member AF-F disposed between the flexible circuit board FCB and the display panel DP and a second conductive adhesive member AF-D disposed between the driving circuit chip DIC and the display panel DP.

[0129] The first conductive adhesive member AF-F may bond the flexible circuit board FCB to the first connection area CA1 of the display panel DP. The flexible circuit board FCB may be bonded to the first connection area CA1 by the first conductive adhesive member AF-F. Each of the plurality of substrate bump electrodes FCB-PD may be electrically connected to a corresponding second pad DP-FPD among the plurality of second pads DP-FPD.

[0130] The second conductive adhesive member AF-D may bond the driving circuit chip DIC to the second connection area CA2 of the display panel DP. The driving circuit chip DIC may be bonded to the second connection area CA2 through the second conductive adhesive member AF-D. Each of the plurality of chip bump electrodes DIC-PD may be electrically connected to a corresponding first pad DP-DPD among the plurality of first pads DP-DPD.

[0131] Figure 7 1 shows a state where the electronic component EM and the display panel DP are attached by a conductive adhesive member ACF. The electronic component EM may include a substrate SUB having a lower surface E-DS and an upper surface E-US and a bump electrode BE arranged on the upper surface E-US of the substrate SUB. The bump electrode BE and the display pad SD may be electrically connected by the conductive adhesive member ACF. Figure 7 The electronic components EM can be Figure 6 Flexible circuit board FCB or drive circuit chip DIC. Figure 7 The display pad SD can be Figure 6 When the electronic component EM is a flexible circuit board FCB, the bump electrode BE may be Figure 6 The substrate bump electrode FCB-PD, the substrate SUB can be Figure 6The base layer F-BS, and the display pad SD can be Figure 6 When the electronic component EM is a driving circuit chip DIC, the bump electrode BE may be Figure 6 The chip bump electrode DIC-PD, the substrate SUB can be Figure 6 The driver integrated circuit DI, and the display pad SD can be Figure 6 The first pad DP-DPD.

[0132] The conductive adhesive member ACF may connect each of the plurality of bump electrodes BE to a corresponding display pad SD among the plurality of display pads SD. The conductive ball ACB may electrically connect each of the plurality of bump electrodes BE to a corresponding display pad SD among the plurality of display pads SD. Thus, the electronic component EM may be electrically connected to the display panel DP.

[0133] In an embodiment, when the electronic component EM and the display panel DP are arranged adjacent to the conductive adhesive member ACF, the near-infrared laser beam may be irradiated in the third direction DR3 through the lower side of the base layer BL of the display panel DP. When the near-infrared laser beam is irradiated on the conductive adhesive member ACF, the conductive adhesive member ACF may be cured. When the conductive adhesive member ACF is cured, the electronic component EM and the display panel DP may be connected and fixed to each other.

[0134] Figure 7 An example in which the display pad SD is directly on the base layer BL is shown, but at least one insulating layer may be further provided between the display pad SD and the base layer BL.

[0135] Figure 8 is an enlarged cross-sectional view of a portion of a display device DD according to an embodiment of the present disclosure. Figure 8 In particular, an enlarged cross-sectional view of a portion including a bump electrode BE is shown. For ease of description, Figure 8 A state is shown in which the upper surface E-US of the substrate SUB is disposed on the upper side, the lower surface E-DS of the substrate SUB is disposed on the lower side, and the bump electrode BE is disposed on the substrate SUB.

[0136] Reference Figure 8 , the bump electrode BE may include an upper surface US_B, a lower surface DS_B opposite to the upper surface US_B, and a side surface SS_B extending from the lower surface DS_B to the upper surface US_B. Herein, the lower surface DS_B of the bump electrode BE may be a surface in contact with the substrate SUB, and the upper surface US_B may be a surface opposite to the lower surface DS_B and facing the display pad SD.

[0137] In an embodiment, the side surface SS_B may include a first side surface portion SS1_B and a second side surface portion SS2_B. The first side surface portion SS1_B may be a portion extending from the lower surface DS_B. The second side surface portion SS2_B may be a portion extending from the first side surface portion SS1_B to the upper surface US_B. Herein, the first side surface portion SS1_B and the second side surface portion SS2_B may distinguish a portion of the side surface SS_B around the bending portion, and the first side surface portion SS1_B and the second side surface portion SS2_B may define a bending point BDP in the side surface SS_B.

[0138] The inclination angle θ1 of the first side surface portion SS1_B relative to the lower surface DS_B and the inclination angle θ2 of the second side surface portion SS2_B relative to the lower surface DS_B may be different from each other. In an embodiment, the inclination angle θ2 of the second side surface portion SS2_B relative to the lower surface DS_B may be smaller than the inclination angle θ1 of the first side surface portion SS1_B relative to the lower surface DS_B. The inclination angle θ1 of the first side surface portion SS1_B relative to the lower surface DS_B may represent an average inclination angle of the entire first side surface portion SS1_B, and the inclination angle θ2 of the second side surface portion SS2_B relative to the lower surface DS_B may represent an average inclination angle of the entire second side surface portion SS2_B.

[0139] The second side surface portion SS2_B may be a portion formed or shaped through a secondary etching operation after performing a primary etching operation to form the bump electrode BE.

[0140] The inclination of the entire surface of the side surface SS_B relative to the lower surface DS_B may be 90 degrees or less. When the inclination of the side surface SS_B relative to the lower surface DS_B is greater than 90 degrees, the protrusion may be included at the side of the bump electrode BE, but in an embodiment, the bump electrode BE may not include the protrusion formed at the side thereof. In other words, the bump electrode BE may include a portion having a narrowed width and / or a portion having a substantially constant width in the direction from the lower surface DS_B to the upper surface US_B, and the bump electrode BE may not include a portion having a width that widens in the direction from the lower surface DS_B to the upper surface US_B.

[0141] The conductive adhesive member ACF may contact the upper surface US_B, the first side surface portion SS1_B, and the second side surface portion SS2_B of the bump electrode BE. In an embodiment, the conductive adhesive member ACF may completely cover the upper surface US_B, the first side surface portion SS1_B, and the second side surface portion SS2_B of the bump electrode BE.

[0142] Fig. 9is an enlarged cross-sectional view of a portion of a display device DD according to an embodiment of the present disclosure. Fig. 9 Shown with Figure 8 The shape of the bump electrode BEa corresponds to the cross-sectional view of FIG. Figure 8 Embodiments of different shapes of the bump electrodes BE.

[0143] Reference Fig. 9 , the bump electrode BEa may include an upper surface US_B, a lower surface DS_B opposite to the upper surface US_B, and a side surface SS_Ba extending from the lower surface DS_B to the upper surface US_B. In an embodiment, the side surface SS_Ba may include a first side surface portion SS1_Ba and a second side surface portion SS2_Ba. The first side surface portion SS1_Ba and the second side surface portion SS2_Ba may distinguish a portion around a bending portion between the lower surface DS_B and the upper surface US_B, and the first side surface portion SS1_Ba and the second side surface portion SS2_Ba may define the bending portion BDPa.

[0144] The bump electrode BEa according to the embodiment may have a concave shape in the second side surface portion SS2_Ba. That is, the second side surface portion SS2_Ba may define a concave portion RP of the bump electrode BEa. For example, the second side surface portion SS2_Ba may be a portion concave relative to an extension line of the first side surface portion SS1_Ba.

[0145] The inclination of the entire surface of the side surface SS_Ba relative to the lower surface DS_B may be 90 degrees or less. When the inclination of the side surface SS_Ba relative to the lower surface DS_B is greater than 90 degrees, a protrusion may be included at the side of the bump electrode BEa, but in the illustrated embodiment, the bump electrode BEa does not include a protrusion formed at the side of the bump electrode BEa. In other words, the bump electrode BEa may include a portion having a narrowed width and / or a portion having a substantially constant width in the direction from the lower surface DS_B to the upper surface US_B. The bump electrode BEa may not include a portion having a width that widens in the direction from the lower surface DS_B to the upper surface US_B.

[0146] The second side surface portion SS2_Ba may be a portion formed through a secondary etching operation after a primary etching operation is performed to form the bump electrode BEa. Fig. 9 An example of a recessed shape in the second side surface portion SS2_Ba is shown, and the recessed shape may be changed depending on an etching environment during the secondary etching operation.

[0147] The conductive adhesive member ACF may contact the upper surface US_B, the first side surface portion SS1_Ba, and the second side surface portion SS2_Ba of the bump electrode BEa. The conductive adhesive member ACF may completely cover the upper surface US_B, the first side surface portion SS1_Ba, and the second side surface portion SS2_Ba of the bump electrode BEa.

[0148] Fig.10 is an enlarged cross-sectional view of a portion of a display device DD according to an embodiment of the present disclosure. Fig.10 Shown with Figure 8 The area corresponding to the area shown in the cross-sectional view of FIG. 1 and FIG. 2 shows that the bump electrode BEb has Figure 8 and Fig. 9 The shapes of the bump electrodes BE and BEa shown in FIG. 5 are different from those of the embodiment.

[0149] Reference Fig.10 , the bump electrode BEb may include an upper surface US_B, a lower surface DS_B opposite to the upper surface US_B, and a side surface SS_Bb extending from the lower surface DS_B to the upper surface US_B. Fig.10 In the embodiment shown in FIG. 1 , the bent portion may not be formed in the side surface SS_Bb. For example, the side surface SS_Bb may have a substantially constant inclination.

[0150] In an embodiment, after performing a primary etching operation for forming the bump electrode BEb, a protrusion may be formed on the side surface of the preliminary bump electrode. However, the protrusion may then be removed by a secondary etching operation, and thus a side surface SS_Bb not including a bent portion may be formed.

[0151] The conductive adhesive member ACF may be in contact with the upper surface US_B and the side surface SS_Bb of the bump electrode BEb. The conductive adhesive member ACF may completely cover the upper surface US_B and the side surface SS_Bb of the bump electrode BEb.

[0152] according to Figures 8 to 10 In the embodiment shown in , no protrusion is included at the side of the bump electrode BE, BEa or BEb, and thus the formation of a gap between the conductive adhesive member ACF near the side surfaces SS_B, SS_Ba and SS_Bb of the bump electrodes BE, BEa and BEb can be alleviated or prevented. Therefore, an adhesion defect between the bump electrodes BE, BEa and BEb and the conductive adhesive member ACF may not occur, and the bonding reliability between the display panel DP and the electronic components EM, EMa and EMb can be improved.

[0153] Fig.11 is a plan view showing a portion of a flexible circuit board FCB according to an embodiment of the present disclosure. Fig.11 In particular, the arrangement of the substrate bump electrodes FCB-PD is shown.

[0154] Reference Fig.11 , the substrate bump electrodes FCB-PD may be linearly arranged along the second direction DR2 and may be spaced apart from each other in the second direction DR2.

[0155] Among the plurality of substrate bump electrodes FCB-PD, at least some of the substrate bump electrodes FCB-PD arranged on the left side of the reference line VL may have a preset inclination relative to the reference line VL. Each of the plurality of substrate bump electrodes FCB-PD arranged on the left side of the reference line VL may extend in a first oblique direction CDR1. The first oblique direction CDR1 may be a direction between the first direction DR1 and the second direction DR2 on a plane defined by the first direction DR1 and the second direction DR2.

[0156] Among the plurality of substrate bump electrodes FCB-PD, at least some of the substrate bump electrodes FCB-PD arranged on the right side of the reference line VL may have a preset inclination relative to the reference line VL. Each of the plurality of substrate bump electrodes FCB-PD arranged on the right side of the reference line VL may extend in the second oblique direction CDR2. The second oblique direction CDR2 may be a direction that forms a non-zero angle with the first direction DR1, the second direction DR2, and the first oblique direction CDR1 on a plane defined by the first direction DR1 and the second direction DR2.

[0157] The substrate bump electrode FCB-PD on the left side may form a clockwise acute angle with respect to the reference line VL. The substrate bump electrode FCB-PD on the right side may form a counterclockwise acute angle with respect to the reference line VL.

[0158] Although Fig.11 Only the arrangement of the substrate bump electrodes FCB-PD is shown, but a plurality of display pads SD (see FIG. Figure 6 ) among the second pads DP-FPD (see Figure 6 ) can be arranged in the same manner. In addition, Fig.11 The arrangement of the substrate bump electrode FCB-PD shown in FIG can be similarly applied to the chip bump electrode DIC-PD (see FIG. Figure 6 ) arrangement.

[0159] Substrate bump electrode FCB-PD and chip bump electrode DIC-PD (see Figure 6 ) is not limited to Fig.11 For example, all of the substrate bump electrodes FCB-PD or the chip bump electrodes DIC-PD (see Figure 6) may extend in the first direction DR1, and may be arranged in the second direction DR2 without being inclined in the diagonal direction.

[0160] Fig.12 FIG. 1 is a diagram showing a method of manufacturing a display device DD (see FIG. 1 ) according to an embodiment of the present disclosure. Figure 1 ), Fig.13 FIG. 1 is a diagram showing a method of manufacturing a display device DD (see FIG. 1 ) according to an embodiment of the present disclosure. Figure 1 ) method. Fig.14A , Fig. 14B , Fig. 14C , Fig.14D , Fig.14E , Fig.14F , Figure 14G , Fig.14H , Fig.14I and Fig.14J is a diagram sequentially showing the steps of manufacturing a display device DD (see FIG. Figure 1 ) method to form a cross-sectional view of some structures.

[0161] The method for manufacturing a display device according to the present disclosure may include an operation of manufacturing an electronic component and an operation of attaching the electronic component to a display panel using a conductive adhesive member. The operation of manufacturing the electronic component may include an operation of providing a substrate and a conductive layer disposed on the substrate, an operation of etching the conductive layer once to form a preliminary bump electrode, and an operation of etching the preliminary bump electrode twice to form a bump electrode.

[0162] Reference Fig.12 According to an embodiment of the present disclosure, a method of manufacturing a display device may include an operation S100 of manufacturing an electronic component and an operation S200 of attaching the electronic component to a display panel using a conductive adhesive member.

[0163] Reference Fig.13 According to an embodiment of the present disclosure, operation S100 of manufacturing an electronic component (see Fig.12 ) may include: an operation S110 of providing a substrate and a conductive layer disposed on the substrate, an operation S120 of forming a first photoresist pattern on the conductive layer using a half-tone mask, an operation S130 of etching the conductive layer once to form a preliminary bump electrode, an operation S140 of removing a portion of the first photoresist pattern to form a second photoresist pattern, an operation S150 of etching the preliminary bump electrode twice to form a bump electrode, and an operation S160 of removing the second photoresist pattern.

[0164] FIG. 14A to FIG. 14I The operation S100 of manufacturing an electronic component according to an embodiment of the present disclosure is shown (see Fig.12 ),and Fig.14J Operation S200 of attaching an electronic component to a display panel using a conductive adhesive member according to an embodiment of the present disclosure is shown (see FIG. Fig.12 ). FIG. 14A to FIG. 14I Shown with Fig.13 The operations corresponding to the flowchart.

[0165] Reference Fig.12 , Fig.13 and Fig.14A The method of manufacturing a display device according to an embodiment may include manufacturing an electronic component EM (see Fig.14I ) operation S100, and as Fig.14A As shown in FIG. 1 , an electronic assembly EM is manufactured according to an embodiment (see FIG. 1 ). Fig.14I ) may include an operation S100 of providing a substrate SUB and a conductive layer CL disposed on the substrate SUB.

[0166] In this paper, the electronic component EM (see Fig.14I ) can correspond to the flexible circuit board FCB (see Figure 6 ) or driver circuit chip DIC (see Figure 6 ). When the electronic component EM to be manufactured (see Fig.14I ) is a flexible printed circuit board FCB (see Figure 6 ), the substrate SUB may correspond to the base layer F-BS (see Figure 6 ), and a conductive layer CL may be provided to form a substrate bump electrode FCB-PD (see Figure 6 ). When the electronic component EM (see Figure 6 ) is the driver circuit chip DIC (see Figure 6 ), the substrate SUB may correspond to the driver integrated circuit DI (see Figure 6 ), and a conductive layer CL may be provided to form a chip bump electrode DIC-PD (see Figure 6 ).

[0167] Reference Fig.12 , Fig.13 , Fig. 14B and Fig. 14C , according to the embodiment of the manufacturing electronic component EM (see Fig.14I Operation S100 of forming the conductive layer CL may include operation S120 of forming a first photoresist pattern PR1 on the conductive layer CL.

[0168] In an embodiment, operation S120 of forming the first photoresist pattern PR1 may include forming a photoresist layer PRL on the conductive layer CL, exposing the photoresist layer PRL using a halftone mask HMK, and developing the photoresist layer PRL to form the first photoresist pattern PR1.

[0169] Fig. 14B Operations of forming a photoresist layer PRL on the conductive layer CL, disposing a half-tone mask HMK on the photoresist layer PRL, and exposing the photoresist layer PRL using the half-tone mask HMK are illustrated. Fig. 14C 2 shows an operation of developing the photoresist layer PRL having only a partial region exposed and then forming a first photoresist pattern PR1 from the photoresist layer PRL. For ease of description, Fig. 14C A half tone mask HMK used in the operation of exposing the photoresist layer PRL is shown together.

[0170] The half tone mask HMK may include a transmission area TRA, a semi-transmission area STRA, and a non-transmission area NTRA. The transmission area TRA may be an area through which all light beams pass. The semi-transmission area STRA may be an area through which some light passes. The non-transmission area NTRA may be an area through which no light passes.

[0171] When using the half-tone mask HMK, the area of ​​the photoresist layer PRL corresponding to the transmission area TRA is retained, only a portion of the area of ​​the photoresist layer PRL corresponding to the semi-transmission area STRA is retained in the thickness direction, the area of ​​the photoresist layer PRL corresponding to the non-transmission area NTRA in the thickness direction is completely removed, and thus a portion of the conductive layer CL under the non-transmission area NTRA can be exposed.

[0172] The first photoresist pattern PR1 may include a first pattern portion PT1 and a second pattern portion PT2. The first pattern portion PT1 may be a portion that is not removed and completely remains during the development process, and the second pattern portion PT2 may be a portion that is partially retained during the development process. Therefore, a thickness t1 of the first pattern portion PT1 may be greater than a thickness t2 of the second pattern portion PT2. The first pattern portion PT1 and the second pattern portion PT2 may form a step. When viewed on a plane, the first pattern portion PT1 may be surrounded by the second pattern portion PT2.

[0173] Reference Fig.12 , Fig.13 , Fig.14D and Fig.14E , according to the embodiment of the manufacturing electronic component EM (see Fig.14I ) operation S100 may include an operation S130 (or referred to as a first etching operation) of etching the conductive layer CL once.

[0174] In operation S130 of once etching the conductive layer CL, the first photoresist pattern PR1 may be used as a mask. The exposed portion of the first photoresist pattern PR1 of the conductive layer CL may be removed, and a conductive layer CL may be formed as shown in FIG. Fig.14E The preliminary bump electrode BE-I shown in FIG.

[0175] In an embodiment, the operation S130 of once etching the conductive layer CL may be performed by wet etching. In the operation S130 of once etching the conductive layer CL, an etchant EC may be used. Fig.14D As shown in FIG. 5 , operation S130 of once etching the conductive layer CL may be performed by injecting the etchant EC into the conductive layer CL during the first etching time ET1 .

[0176] In an embodiment, the side surface SS_BI of the preliminary bump electrode BE-I may be inclined relative to the lower surface DS_BI. The side surface SS_BI of the preliminary bump electrode BE-I may be inclined at an acute angle relative to the lower surface DS_BI. However, the present disclosure is not limited thereto, and the side surface SS_BI of the preliminary bump electrode BE-I may be perpendicular to the lower surface DS_BI.

[0177] Reference Fig.12 , Fig.13 , Fig.14E and Fig.14F , according to the embodiment of the manufacturing electronic component EM (see Fig.14I The operation S100 of the photoresist pattern PR1 may include an operation S140 of removing a portion of the first photoresist pattern PR1. The operation S140 of removing a portion of the first photoresist pattern PR1 may be performed by a process of ashing the first photoresist pattern PR1.

[0178] In operation S140 of removing a portion of the first photoresist pattern PR1, only a portion of the first photoresist pattern PR1 may be removed, and a second photoresist pattern PR2 may be formed. The entire second pattern portion PT2 of the first photoresist pattern PR1 may be removed, and only a portion of the first pattern portion PT1 thicker than the second pattern portion PT2 may be removed. The first pattern portion PT1 may be removed in a thickness direction. Thus, the second photoresist pattern PR2 may be formed of the remaining first pattern portion PT1. Fig.14F As shown in FIG. 1 , the second photoresist pattern PR2 may expose a portion of the upper surface US_BI of the preliminary bump electrode BE-I.

[0179] Reference Fig.12 , Fig.13 , Figure 14G and Fig.14H , according to the embodiment of the manufacturing electronic component EM (see Fig.14I ) operation S100 may include an operation S150 (or referred to as a second etching operation) of performing a secondary etching on the preliminary bump electrode BE-I.

[0180] In operation S150 of performing secondary etching on the preliminary bump electrode BE-I, the second photoresist pattern PR2 may be used as a mask, a portion of the preliminary bump electrode BE-I may be exposed, a portion of the preliminary bump electrode BE-I may be removed from the second photoresist pattern PR2, and a bump electrode BE may be formed from the preliminary bump electrode BE-I.

[0181] In an embodiment, the operation S150 of secondarily etching the preliminary bump electrode BE-I may be performed by wet etching. In the operation S150 of secondarily etching the preliminary bump electrode BE-I, an etchant EC may be used. In the operation S150 of secondarily etching the preliminary bump electrode BE-I, an etchant EC may be used that is similar to that used for etching the conductive layer CL (e.g., see Fig.14D ) is the same etchant EC as the etchant EC of operation S130 in which the conductive layer CL is once etched. However, the present disclosure is not limited thereto, and an etchant different from the etchant used during operation S130 in which the conductive layer CL is once etched may be used.

[0182] The operation S150 of second-etching the preliminary bump electrode BE-I may be performed by injecting the etchant EC into the preliminary bump electrode BE-I and continuing the second etching time ET2. In an embodiment, the second etching time ET2 may be shorter than the first etching time ET1 (eg, see Fig.14D ).

[0183] In operation S150 of secondarily etching the preliminary bump electrode BE-I, an upper portion of the preliminary bump electrode BE-I may be removed, and thus a bump electrode BE including a side surface SS_B having a bent shape may be formed. The bump electrode BE formed in the embodiment may correspond to the above Figure 8 The side surface SS_B of the bump electrode BE may include a first side surface portion SS1_B and a second side surface portion SS2_B, and an inclination θ2 of the second side surface portion SS2_B relative to the bottom surface DS_B may be smaller than an inclination θ1 of the first side surface portion SS1_B relative to the bottom surface DS_B.

[0184] The first side surface portion SS1_B of the bump electrode BE may have a width that narrows in a direction from the lower surface DS_B to the upper surface US_B, and the second side surface portion SS2_B of the bump electrode BE may also have a width that narrows in a direction from the lower surface DS_B to the upper surface US_B. That is, the bump electrode BE may not include a portion having a width that widens in a direction from the lower surface DS_B to the upper surface US_B.

[0185] In an alternative embodiment of the present disclosure, the first side surface portion SS1_B may have a substantially constant width in a direction from the lower surface DS_B to the upper surface US_B.

[0186] Reference Fig.12 , Fig.13 , Fig.14H and Fig.14I , according to the embodiment of the manufacturing electronic component EM (see Fig.14I ) operation S100 may include an operation S160 of removing the second photoresist pattern PR2. The operation S160 of removing the second photoresist pattern PR2 may be performed by a process of ashing the second photoresist pattern PR2. Fig.14I As shown in , an electronic component EM including a substrate SUB and a bump electrode BE may be formed.

[0187] Reference Fig.12 and Fig.14J , according to the manufacturing display device DD of the embodiment (see Figure 1 ) may include operation S200 of attaching the electronic component EM to the display panel DP using a conductive adhesive member ACF.

[0188] The operation S200 of attaching the electronic component EM to the display panel DP using the conductive adhesive member ACF may include disposing the electronic component EM on the display panel DP so that the display pads SD and the bump electrodes BE overlap each other and heating and pressing the conductive adhesive member ACF between the electronic component EM and the display panel DP.

[0189] The electronic component EM may be disposed such that the bump electrode BE and the display pad SD face each other. That is, the electronic component EM may be disposed such that the upper surface E-US of the substrate SUB (eg, see Figure 8 ) faces the display panel DP and the lower surface E-DS (eg, see Figure 8 ) is located at an upper side of the display panel DP facing the substrate SUB.

[0190] Thereafter, the display panel DP and the electronic component EM may be attached by pressing any one of the display panel DP and the electronic component EM. In this case, each of the display panel DP and the electronic component EM may contact the conductive adhesive member ACF, and the display pads SD and the bump electrodes BE overlapping each other may be electrically connected through the conductive balls ACB.

[0191] In order to attach the display panel DP and the electronic component EM, heat and pressure may be applied using a bonding device. During the heating and pressurizing process, the adhesive resin BS of the conductive adhesive member ACF may be cured and thus fixed.

[0192] After operation S200 of attaching the electronic component EM to the display panel DP, a display device DD including the display panel DP and the electronic component EM electrically connected to each other may be manufactured (see FIG. Figure 7 ), and the display panel DP and the electronic component EM attached to each other may have Figure 7 The cross-sectional shape corresponds to the cross-sectional shape of .

[0193] Fig.15A , Fig. 15B and Fig. 15C The display device DD (see FIG. 1 ) is manufactured according to an embodiment of the present disclosure. Figure 1 ) method to form a cross-sectional view of some structures.

[0194] Fig.15A Shown in Fig.14E An example of a preliminary bump electrode BE-I' formed in the operation. That is, Fig.15A The first etching operation S130 (see Fig.13 ) is an example of a preliminary bump electrode BE-I' formed.

[0195] Reference Fig.15A , the side surface SS_BI' of the preliminary bump electrode BE-I' according to this embodiment may include a first preliminary side surface portion SS1_BI and a second preliminary side surface portion SS2_BI. The first preliminary side surface portion SS1_BI may be a portion extending from the lower surface DS_BI of the preliminary bump electrode BE-I', and the second preliminary side surface portion SS2_BI may be a portion extending from the first preliminary side surface portion SS1_BI to the upper surface US_BI of the preliminary bump electrode BE-I'.

[0196] The first preliminary side surface portion SS1_BI may have a width that gradually narrows in the direction from the lower surface DS_BI to the upper surface US_BI. At least a portion of the second preliminary side surface portion SS2_BI may have a width that widens in the direction from the lower surface DS_BI to the upper surface US_BI. The second preliminary side surface portion SS2_BI may be defined as a protrusion PP within the preliminary bump electrode BE-I. The protrusion PP may protrude in a direction away from the first preliminary side surface portion SS1_BI (e.g., a side surface direction of the preliminary bump electrode BE-I) relative to the first preliminary side surface portion SS1_BI of the preliminary bump electrode BE-I. The protrusion PP may be generated by a process error in the first etching operation S130.

[0197] In an embodiment of the present disclosure, the first preliminary side surface portion SS1_BI may have a substantially constant width in a direction from the lower surface DS_BI to the upper surface US_BI.

[0198] Fig.15A It is exemplarily illustrated that the protrusion PP protrudes outward farther than the first photoresist pattern PR1 , but the protrusion PP may also overlap with the first photoresist pattern PR1 .

[0199] Fig. 15B and Fig. 15C They are shown respectively with Figure 14G and Fig.14H The corresponding operation section. That is, Fig. 15B The first photoresist pattern PR1 (see, for example, Fig.15A ) is a part of operation S140 (see Fig.13 ) to form a second photoresist pattern PR2, and Fig. 15C The second etching operation S150 (see Fig.13 ) forms a bump electrode BE'.

[0200] Reference Fig. 15B and Fig. 15C , before removing the first photoresist pattern PR1 (eg, see Fig.15A After the operation S140 of etching a portion of the preliminary bump electrode BE-I', the protrusion PP of the preliminary bump electrode BE-I' may be exposed through the second photoresist pattern PR2. The preliminary bump electrode BE-I' may be subjected to the operation S150 (see Fig.13 ) Remove the protrusion PP.

[0201] Even when the protrusion PP overlaps the first photoresist pattern PR1, the protrusion PP may be exposed by removing a portion of the first photoresist pattern PR1 to form the second photoresist pattern PR2, and thus the preliminary bump electrode BE-I′ may be subjected to secondary etching operation S150 (see FIG. Fig.13 ) Remove the protrusion PP.

[0202] The side surface SS_B of the bump electrode BE' may include a first side surface portion SS1_B and a second side surface portion SS2_B. Fig.13 ) The protrusion PP formed in the second preliminary side surface portion SS2_BI is removed, and thus the second side surface portion SS2_B of the bump electrode BE' may have a width that narrows in a direction from the lower surface DS_B to the upper surface US_B. That is, the bump electrode BE' may not include a portion having a width that widens in a direction from the lower surface DS_B to the upper surface US_B.

[0203] Fig. 15C An example is shown in which the side surface SS_B of the bump electrode BE′ includes a bent portion and includes a first side surface portion SS1_B and a second side surface portion SS2_B, but the embodiment is not limited thereto. For example, the bump electrode BE′ may include a side surface SS_B having a substantially constant inclination without a bent portion.

[0204] Fig.16 FIG. 1 is a diagram showing a method of manufacturing a display device DD (see FIG. 1 ) according to an embodiment of the present disclosure. Figure 1 ) method. Fig.17A , Fig. 17B , Fig. 17C and Fig.17D The display device DD (see FIG. 1 ) is manufactured according to an embodiment of the present disclosure. Figure 1 ) method to form a cross-sectional view of some structures. FIG. 17A to FIG. 17D The process of forming two bump electrodes is shown.

[0205] Reference Fig.16 According to an embodiment of the present disclosure, operation S100 of manufacturing an electronic component (see Fig.12 ) may include an operation S110 of providing a substrate and a conductive layer disposed on the substrate, an operation S120A of forming a photoresist pattern on the conductive layer using a mask, an operation S130 of etching the conductive layer once to form a preliminary bump electrode, an operation S150A of etching the preliminary bump electrode twice to form a bump electrode, and an operation S160A of removing the photoresist pattern.

[0206] Reference Fig.16 and Fig.17A, according to the embodiment of the manufacturing electronic component EM (see Figure 7 ) operation S100 (see Fig.12 ) may include providing a substrate SUB (see, for example, Fig.14A ) and an operation S110 of disposing a conductive layer CL on a substrate SUB, and an operation S120A of forming a photoresist pattern PR on the conductive layer CL.

[0207] In an embodiment, a photoresist pattern PR (eg, see Fig. 17B The operation S120A of the method may include forming a photoresist layer PRL on the conductive layer CL, exposing the photoresist layer PRL using a mask MK, and developing the photoresist layer PRL to form a conductive layer such as Fig. 17B The operation of forming the photoresist pattern PR shown in FIG.

[0208] The exposure openings OP-PR may be defined in the mask MK. When the photoresist layer PRL is exposed using the mask MK, all regions of the photoresist layer PRL corresponding to the exposure openings OP-PR may be removed in the thickness direction. The regions of the photoresist layer PRL overlapping with the mask MK may remain.

[0209] and Fig.14A and Fig. 14B Compared with the first photoresist pattern PR1 in the above-described embodiment, each of the plurality of photoresist patterns PR in the embodiment may not include a step portion. That is, each of the plurality of photoresist patterns PR may have a substantially constant thickness.

[0210] Reference Fig.16 , Fig. 17B and Fig. 17C , according to the embodiment of the manufacturing electronic component EM (see Fig.14I ) operation S100 (see Fig.12 ) may include an operation S130 of etching the conductive layer CL once.

[0211] In operation S130 of once etching the conductive layer CL, the photoresist pattern PR may be used as a mask. A portion of the conductive layer CL may be exposed by the photoresist pattern PR and may be removed, and a conductive layer CL may be formed as shown in FIG. Fig. 17C The preliminary bump electrodes BE-IA shown in FIG.

[0212] In an embodiment, one of the plurality of preliminary bump electrodes BE-IA (hereinafter, referred to as the first preliminary bump electrode BEa-I) does not include a bent portion and may have a substantially constant inclination. Another one of the plurality of preliminary bump electrodes BE-IA (hereinafter, referred to as the second preliminary bump electrode BEb-I) may include a protrusion PP. That is, during the first etching operation S130, a process error may occur in the second preliminary bump electrode BEb-I.

[0213] Reference Fig.16 , Fig. 17C and Fig.17D , according to the embodiment of the manufacturing electronic component EM (see Fig.14I ) operation S100 (see Fig.12 ) may include an operation S150A of performing a secondary etching on the preliminary bump electrode BE-IA to form the bump electrode BE-A. In an embodiment, after the first etching operation S130, the second etching operation S150A may be performed immediately without an operation of removing the photoresist pattern PR.

[0214] In the operation S150A of second-etching the preliminary bump electrode BE-IA according to an embodiment, the photoresist pattern PR may be used as a mask, similar to the first etching operation S130. Therefore, an operation of removing a portion of the photoresist pattern or an operation of forming a separate photoresist pattern may not be required or included, and thus the process may be simplified.

[0215] When the side surface of the first preliminary bump electrode BEa-I is inclined in the first etching operation S130, the side surface of the first preliminary bump electrode BEa-I may be exposed from the photoresist pattern PR. In addition, through the second etching operation S150A, the portion of the first preliminary bump electrode BEa-I exposed from the photoresist pattern PR may be removed. Therefore, in the second etching operation S150A, the bump electrode formed by the first preliminary bump electrode BEa-I (hereinafter, referred to as the first bump electrode BEa) may include a recessed portion RP. The first bump electrode BEa formed in the embodiment may correspond to the above Fig. 9 The bump electrode BEa described in .

[0216] In the first etching operation S130, a protrusion PP may be formed in the second preliminary bump electrode BEb-I, and the protrusion PP of the second preliminary bump electrode BEb-I may be exposed from the photoresist pattern PR. In addition, through the second etching operation S150A, the protrusion PP of the second preliminary bump electrode BEb-I may be removed. Therefore, the bump electrode formed by the second preliminary bump electrode BEb-I (hereinafter, referred to as the second bump electrode BEb) may not include the protrusion PP. In an embodiment, the side surface of the second bump electrode BEb may have a substantially constant inclination, and the second bump electrode BEb may correspond to the above Fig.10 The bump electrode BEb described in .

[0217] Therefore, according to an embodiment, even when a process error occurs in the first etching process S130, the second etching process S150A is performed to prevent the protrusion from remaining on the final bump electrode BE-A. Each of the plurality of bump electrodes BE-A may not include a portion having a width that widens in a direction from the lower surface to the upper surface.

[0218] Fig.17D An example is shown in which the side surface of the second bump electrode BEb has a substantially constant inclination without a bent portion, but the embodiment is not limited thereto. For example, the side surface of the second bump electrode BEb may further include a recessed portion RP.

[0219] Although not shown, thereafter, an electronic component EM including a bump electrode BE-A may be manufactured by operation S160A of removing the photoresist pattern PR (see FIG. Figure 7 ).

[0220] Fig.18 FIG. 1 is a diagram showing a method of manufacturing a display device DD (see FIG. 1 ) according to an embodiment of the present disclosure. Figure 1 ) method. Fig.19A , Fig.19B , Fig.19C and Fig.19D The display device DD (see FIG. 1 ) is manufactured according to an embodiment of the present disclosure. Figure 1 ) method to form a cross-sectional view of some structures.

[0221] Reference Fig.18 According to an embodiment of the present disclosure, an electronic component EM is manufactured (see Figure 7 ) operation S100 (see Fig.12) may include an operation S110 of providing a substrate and a conductive layer disposed on the substrate, an operation S120B of forming a first photoresist pattern on the conductive layer using a mask, an operation S130 of etching the conductive layer once to form a preliminary bump electrode, an operation S140B of forming a second photoresist pattern, an operation S150 of etching the preliminary bump electrode twice to form a bump electrode, and an operation S160 of removing the second photoresist pattern.

[0222] Reference Fig.18 and Fig.19A , according to the embodiment of the present disclosure, the electronic assembly EM is manufactured (see Figure 7 ) operation S100 (see Fig.12 ) may include an operation S110 of providing a substrate SUB and a conductive layer CL disposed on the substrate SUB, and an operation S120B of forming a first photoresist pattern PR1-B on the conductive layer CL using a mask MK.

[0223] In operation S120B of forming the first photoresist pattern PR1 , the photoresist layer may be exposed using a mask MK (or referred to as a first mask), and a first exposure opening OP-PR1 may be defined in the mask MK.

[0224] The first photoresist pattern PR1-B may not include a stepped portion, which is similar to Fig. 14C That is, the first photoresist pattern PR1-B may have a substantially constant thickness. The first photoresist pattern PR1-B may have a first width w1 in one direction parallel to the upper surface of the conductive layer CL.

[0225] Reference Fig.18 , Fig.19A and Fig.19B , according to the embodiment of the present disclosure, the electronic assembly EM is manufactured (see Fig.14I ) operation S100 (see Fig.12 ) may include operation S130 of once etching the conductive layer CL to form a preliminary bump electrode BE-I.

[0226] In an operation of once etching the conductive layer CL according to an embodiment, the first photoresist pattern PR1-B may be used as a mask, a portion of the conductive layer CL may be exposed and removed from the first photoresist pattern PR1-B, and a preliminary bump electrode BE-I may be formed from the conductive layer CL.

[0227] Fig.19BAn example of forming a preliminary bump electrode BE-I including a side surface SS_BI having a constant slope by a first etching operation is shown, but some of the other preliminary bump electrodes not shown may include the above Fig. 15B The protrusion PP described in .

[0228] Reference Fig.18 , Fig.19B and Fig.19C , according to the embodiment of the present disclosure, the electronic assembly EM is manufactured (see Figure 7 ) operation S100 (see Fig.12 ) may include operation S140B of forming a second photoresist pattern PR2-B.

[0229] In an embodiment, after removing the entire first photoresist pattern PR1-B, a photoresist layer may be formed again, an additional mask MKa (or referred to as a second mask) in which a second exposure opening OP-PR2 is defined may be used to expose the photoresist layer, the exposed photoresist layer may be developed, and thus a second photoresist pattern PR2-B may be formed. Alternatively, the photoresist layer may be formed without removing the first photoresist pattern PR1-B.

[0230] Although not shown, in an embodiment, in the operation of forming the second photoresist pattern PR2-B, an outer portion of the first photoresist pattern PR1-B may be removed, and thus the second photoresist pattern PR2-B may be formed from the first photoresist pattern PR1-B.

[0231] The second photoresist pattern PR2-B may have a second width w2 in a direction in which the first photoresist pattern PR1-B has a first width w1. The second width w2 may be smaller than the first width w1 of the first photoresist pattern PR1-B. The second photoresist pattern PR2-B may correspond to a shape obtained by removing an outer portion from the first photoresist pattern PR1-B. Therefore, the second photoresist pattern may expose a portion of the upper surface US_BI of the preliminary bump electrode BE-I.

[0232] Reference Fig.18 , Fig.19C and Fig.19D , according to the embodiment of the present disclosure, the electronic assembly EM is manufactured (see Figure 7 ) operation S100 (see Fig.12 ) may include an operation S150 of performing a secondary etching on the preliminary bump electrode BE-I.

[0233] In operation S150 of second-etching the preliminary bump electrode BE-I according to an embodiment, the second photoresist pattern PR2-B may be used as a mask, a portion of the preliminary bump electrode BE-I may be exposed and removed from the second photoresist pattern PR2-B, and the bump electrode BE may be formed from the preliminary bump electrode BE-I.

[0234] In an embodiment, the above can be similarly applied Fig.14H For example, the side surface SS_B of the bump electrode BE may include a first side surface portion SS1_B and a second side surface portion SS2_B, and the inclination of the second side surface portion SS2_B relative to the lower surface DS_B may be smaller than the inclination of the first side surface portion SS1_B relative to the lower surface DS_B. In addition, the bump electrode BE may not include a portion having a width that widens in a direction from the lower surface DS_B to the upper surface US_B.

[0235] Some of the other preliminary bump electrodes not shown may include protrusions, and in this case, Fig. 15C The above description can be similarly applied.

[0236] Although not shown, thereafter, the electronic component EM including the bump electrode BE may be manufactured by an operation of removing the second photoresist pattern PR2-B (see FIG. Figure 7 ).

[0237] According to the above Figures 12 to 19C In an embodiment of a method for manufacturing a display device described in , two etching processes are performed to form a bump electrode, and therefore, a protrusion can be prevented from being formed on the finally formed bump electrode. In the first etching operation, even when a protrusion is formed in the preliminary bump electrode due to a process error, the protrusion can be removed by a second etching operation. Therefore, it is possible to reduce or prevent the formation of a gap between the conductive adhesive members near the side surface of the bump electrode. Therefore, in the process of attaching a display panel and an electronic component and / or in the process of using the display device, a poor connection between the bump electrode and the display pad may not occur due to poor adhesion between the bump electrode and the conductive adhesive member. A display device with improved bonding reliability between a display panel and an electronic component can be manufactured.

[0238] Fig. 20 is an enlarged cross-sectional view of a portion of a display device DD-1 according to a comparative example.

[0239] In the display device DD-1 according to the comparative example, a portion of the substrate SUB-1 of the electronic component EM1 and a portion of the bump electrode BE-1, a portion of the display pad SD-1 of the display panel, and a conductive adhesive member ACF-1 in contact with the bump electrode BE-1 and the display pad SD-1 are shown. In the specification, the bump electrode BE-1 in the comparative example can be formed of the conductive layer by only one etching operation. The bump electrode BE-1 according to the comparative example can correspond to the preliminary bump electrode BE-I (see Fig.15A ).

[0240] As mentioned above, the protrusion PP (see Fig.15A ) may be formed due to process errors in the first etching operation, and Fig. 20 The bump electrode BE- 1 on which the protrusion PP- 1 is formed is exemplarily shown.

[0241] When the bump electrode BE-1 on which the protrusion PP-1 is formed is attached to the display panel using the conductive adhesive member ACF-1, the gap AG may be formed near the side surface SS_B1 of the bump electrode BE-1 due to the protrusion PP-1 of the bump electrode BE-1. That is, the conductive adhesive member ACF-1 may be spaced apart from at least a portion of the side surface SS_B1 of the bump electrode BE-1, and at least a portion of the side surface SS_B1 of the bump electrode BE-1 may not be covered by the conductive adhesive member ACF-1.

[0242] Due to the gap AG formed in the manufacturing operation, the conductive adhesive member ACF-1 and the bump electrode BE-1 may not have a sufficient contact area, and thus the display device DD-1 having a poor connection between the bump electrode BE-1 and the display pad may also be formed in the manufacturing operation.

[0243] Optionally, when the display device DD-1 is used after the manufacturing is completed, the gap AG may expand and contract due to the temperature change of the electronic component EM-1. Specifically, when the gap AG expands, the adhesive force between the conductive adhesive member ACF-1 and the bump electrode BE-1 is weakened, and thus the contact area between the conductive adhesive member ACF-1 and the bump electrode BE-1 may be reduced. In addition, a moisture permeable channel may be provided between the conductive adhesive member ACF-1 and the bump electrode BE-1 through the gap AG, and the bump electrode BE-1 may be corroded by moisture introduced through the moisture permeable channel. Therefore, even when a poor connection between the bump electrode BE-1 and the display pad SD-1 does not occur during the manufacturing process, while the display device DD-1 is used, the contact area between the conductive adhesive member ACF-1 and the bump electrode BE-1 is reduced, and thus a poor connection between the bump electrode BE-1 and the display pad SD-1 may occur during use.

[0244] On the other hand, according to the present disclosure, since no protrusion is included, a gap may not be formed during the attachment operation, and thus the side surface of the bump electrode may be completely covered. A sufficient contact area is provided between the bump electrode and the conductive adhesive member, and thus a poor connection between the bump electrode and the display pad may not occur. In addition, since a weakening of the adhesive force due to temperature changes and a weakening of the adhesive force due to moisture inflow do not occur, a poor connection does not occur even during use. Therefore, the bonding reliability and electrical connection reliability between the display panel and the electronic component can be improved.

[0245] According to the present disclosure, the bump electrode inside the electronic component may not include a protrusion in the lateral direction. Therefore, the formation of a gap between the bump electrode and the conductive adhesive member can be reduced or prevented, and the decrease in the adhesive force between the bump electrode and the conductive adhesive member can be reduced or prevented. Therefore, the bonding reliability between the display panel and the electronic component can be improved.

[0246] Although the above description has been made with reference to the embodiments of the present disclosure, it is to be understood that those skilled in the art or those with ordinary knowledge in the art may make various modifications and changes to the present disclosure without departing from the spirit and technical scope of the present disclosure described in the appended claims. Therefore, the technical scope of the present disclosure is not limited to the detailed description of this specification, but should be defined by the appended claims.

Claims

1. A method for manufacturing a display device, wherein: The method comprises: Manufacturing electronic components; and attaching the electronic component to the display panel using a conductive adhesive member, Wherein, the manufacturing of the electronic component comprises: providing a substrate and a conductive layer disposed on the substrate; performing a primary etching of the conductive layer to form a preliminary bump electrode; and A secondary etching of the preliminary bump electrode is performed to form a bump electrode.

2. The method according to claim 1, wherein: The preliminary bump electrode includes a protrusion protruding in a lateral direction, and In the secondary etching of the preliminary bump electrode, the protrusion is removed.

3. The method according to claim 1, wherein: performing the first etching of the conductive layer during a first etching time, performing the secondary etching of the preliminary bump electrode during a second etching time, and The second etching time is shorter than the first etching time.

4. The method according to claim 1, wherein: The manufacturing of the electronic assembly further comprises: After the providing of the substrate and the conductive layer and before the primary etching of the conductive layer, a first photoresist pattern is formed on the conductive layer using a half-tone mask.

5. The method according to claim 4, wherein: The method further comprises: after the primary etching of the conductive layer and before the secondary etching of the preliminary bump electrode, removing a portion of the first photoresist pattern to form a second photoresist pattern; and The second photoresist pattern is removed after the secondary etching of the preliminary bump electrode.

6. The method according to claim 5, wherein: The first photoresist pattern includes a first pattern portion and a second pattern portion thinner than the first pattern portion, and Upon the removal of the portion of the first photoresist pattern, the second pattern portion is removed and an upper portion of the preliminary bump electrode is exposed.

7. The method according to claim 1, wherein: The manufacturing of the electronic assembly further comprises: After said providing of said substrate and said conductive layer and before said one etching of said conductive layer, forming a photoresist pattern using a mask in which exposure openings are defined; and The photoresist pattern is removed after the secondary etching of the preliminary bump electrode.

8. The method according to claim 7, wherein: The photoresist pattern is used as the mask in both the primary etching of the conductive layer and the secondary etching of the preliminary bump electrode.

9. The method according to claim 1, wherein: The manufacturing of the electronic assembly further comprises: After said providing of said substrate and said conductive layer and before said one etching of said conductive layer, forming a first photoresist pattern using a first mask in which a first exposure opening is defined; and After the primary etching of the conductive layer and before the secondary etching of the preliminary bump electrode, forming a second photoresist pattern using a second mask in which a second exposure opening is defined, and A width of the second photoresist pattern is smaller than a width of the first photoresist pattern.

10. The method according to claim 1, wherein: The bump electrode does not include a portion having a width that widens in a direction from a lower surface of the bump electrode to an upper surface of the bump electrode.

11. The method according to claim 1, wherein: In the attaching of the electronic component to the display panel, the conductive adhesive member is in contact with an upper surface and a side surface of the bump electrode.

12. The method according to claim 1, wherein: The side surface of the bump electrode includes: a first side surface portion extending from a lower surface of the bump electrode; and A second side surface portion extends from the first side surface portion to an upper surface of the bump electrode and is configured to define a bending point with the first side surface portion.

13. The method according to claim 1, wherein: A side surface of the bump electrode has a constant inclination.

14. The method according to claim 1, wherein: The electronic component is any one of a flexible circuit board and a driving circuit chip.

15. A display device, wherein: The display device comprises: A display panel, comprising a base layer and a display pad arranged on the base layer; an electronic component disposed on the display panel and comprising a substrate and a bump electrode disposed under the substrate; and a conductive adhesive member configured to electrically connect the display panel and the electronic component, Wherein, the side surface of the bump electrode includes: a first side surface portion extending from a lower surface of the bump electrode; and a second side surface portion extending from the first side surface portion to the upper surface of the bump electrode and configured to define a bending point with the first side surface portion, and The conductive adhesive member is in contact with the first side surface portion and the second side surface portion.

16. The display device according to claim 15, wherein: An inclination of the second side surface portion is smaller than an inclination of the first side surface portion.

17. The display device according to claim 15, wherein: The second side surface portion defines a recessed portion.

18. The display device according to claim 15, wherein: The bump electrode does not include a portion having a width that widens in a direction from the lower surface of the bump electrode to the upper surface of the bump electrode.

19. The display device according to claim 15, wherein: The conductive adhesive member includes an adhesive resin and conductive balls dispersed in the adhesive resin.

20. The display device according to claim 15, wherein: The electronic component is any one of a flexible circuit board and a driving circuit chip.

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