Enhanced signaling of SEI processing order in video bitstream

Abstract

A mechanism for processing video data is disclosed. The conversion between the visual media data and the bitstream is performed based on a rule that includes a bitstream coherence requirement that requires a supplemental enhancement information (SEI) processing order SEI message to include an SEI payload type syntax element having at least a first entry and a second entry.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of U.S. Provisional Patent Application No. 63 / 392,779, filed on July 27, 2022. The above patent application is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to the generation, storage and consumption of digital audio-visual media information in file format. Background Art

[0004] Digital video accounts for the largest share of bandwidth used on the Internet and other digital communications networks. As the number of connected user devices capable of receiving and displaying video increases, bandwidth demands for digital video usage are likely to continue to grow. Summary of the invention

[0005] A first aspect relates to a method for processing video data, the method comprising: performing conversion between visual media data and a bitstream of the visual media data based on rules, wherein the rules include a bitstream consistency requirement, the bitstream consistency requirement requiring a supplemental enhancement information (SEI) processing order SEI message should include an SEI payload type syntax element having at least a first entry and a second entry.

[0006] Optionally, in any one of the aforementioned aspects, another implementation of the aspect stipulates that the SEI payload type syntax element is po_sei_payload_type, the first entry of the SEI payload type syntax element is po_sei_payload_type[0], and the second entry of the SEI payload type syntax element is po_sei_payload_type[1].

[0007] Optionally, in any one of the aforementioned aspects, another implementation of this aspect provides that the bitstream conformance requirement requires that the SEI processing order SEI message should include a preferred order syntax element having at least a first entry and a second entry.

[0008] Optionally, in any one of the aforementioned aspects, another implementation of the aspect provides that the preferred order syntax element is po_sei_processing_order, the first entry of the preferred order syntax element is po_sei_processing_order[0], and the second entry of the preferred order syntax element is po_sei_processing_order[1].

[0009] Optionally, in any of the aforementioned aspects, another implementation of the aspect provides that within the SEI processing order SEI message, each of po_sei_payload_type[0] and po_sei_payload_type[1] is paired with po_sei_processing_order[0] and po_sei_processing_order[1], respectively, where po_sei_processing_order[i] indicates a preferred order for processing SEI messages having a payload type equal to po_sei_payload_type[i].

[0010] A second aspect relates to a method for processing video data, the method comprising: performing conversion between visual media data and a bitstream of the visual media data based on a rule, wherein the rule specifies that a zero value of a processing order SEI payload type syntax element entry in a supplemental enhancement information (SEI) processing order SEI message is processed in a manner similar to a one value.

[0011] Optionally, in any one of the aforementioned aspects, another implementation of the aspect stipulates that the SEI payload type syntax element is po_sei_payload_type and the SEI payload type syntax element entry is po_sei_payload_type[i].

[0012] Optionally, in any of the aforementioned aspects, another implementation of the aspect provides that po_sei_payload_type[i] is defined as follows: po_sei_processing_order[i] indicates the preferred order for processing any SEI message with payloadType equal to po_sei_payload_type[i]; and for any two different integer values ​​m and n greater than or equal to 0, po_sei_processing_order[m] is less than po_sei_processing_order[n] indicating that any SEI message with payloadType equal to po_sei_payload_type[m], if any, should be processed before any SEI message with payloadType equal to po_sei_payload_type[n], if any.

[0013] Optionally, in any of the aforementioned aspects, another implementation of this aspect provides that converting includes encoding the visual media data into a bitstream.

[0014] Optionally, in any of the aforementioned aspects, another implementation of this aspect provides that converting includes decoding the visual media data from a bitstream.

[0015] A third aspect relates to an apparatus for processing visual media data, the apparatus comprising: a processor; and a non-transitory memory having instructions thereon, wherein when the instructions are executed by the processor, the processor is caused to perform any one of the aforementioned aspects.

[0016] A fourth aspect relates to a non-transitory computer-readable medium, comprising a computer program product for use by an apparatus for processing visual media data, the computer program product comprising computer executable instructions stored on the non-transitory computer-readable medium, such that when the instructions are executed by a processor, the apparatus for processing visual media data performs any one of the methods of the preceding aspects.

[0017] A fifth aspect relates to a non-transitory computer-readable recording medium storing a bitstream of visual media data, the visual media data being generated by a method performed by a device for processing visual media data, wherein the method comprises: generating a bitstream of visual media data based on a rule, wherein the rule comprises a bitstream consistency requirement, the bitstream consistency requirement requiring a supplemental enhancement information (SEI) processing order; a SEI message shall include a SEI payload type syntax element having at least a first entry and a second entry;

[0018] A sixth aspect relates to a method for storing a bitstream of visual media data, the method comprising: generating a bitstream of visual media data based on rules; and storing the bitstream in a non-temporary computer-readable recording medium, wherein the rules include a bitstream consistency requirement, the bitstream consistency requirement requiring a supplemental enhancement information (SEI) processing order SEI message should include an SEI payload type syntax element having at least a first entry and a second entry.

[0019] A seventh aspect relates to the method, apparatus or system described in this document.

[0020] For purposes of clarity, any of the aforementioned embodiments may be combined with any one or more of the other aforementioned embodiments to create new embodiments within the scope of the present disclosure.

[0021]

[0011] These and other features will become more clearly understood from the following detailed description, taken in conjunction with the accompanying drawings and claims, and the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] For a more complete understanding of the present disclosure, reference is now made to the following brief description, taken in conjunction with the accompanying drawings and detailed description, wherein like reference numerals represent like parts.

[0023] Figure 1is a block diagram illustrating an example video processing system.

[0024] Figure 2 is a block diagram of an example video processing device.

[0025] Figure 3 is a flow chart of an example method for video processing.

[0026] Figure 4 is a block diagram illustrating an example video encoding and decoding system.

[0027] Figure 5 is a block diagram illustrating an example encoder.

[0028] Figure 6 is a block diagram illustrating an example decoder.

[0029] Figure 7 is a schematic diagram of an example encoder. DETAILED DESCRIPTION

[0030] First, it should be understood that although illustrative implementations of one or more embodiments are provided below, the disclosed systems and / or methods may be implemented using any number of techniques, whether currently known or yet to be developed. The present disclosure should not be limited in any way to the exemplary implementations, drawings, and techniques shown below, including the exemplary designs and implementations shown and described herein, but may be modified within the scope of the appended claims and their full scope of equivalents.

[0031] Section headings are used in this document for ease of understanding and do not limit the applicability of the techniques and embodiments disclosed in each section to only that section. In addition, the use of H.266 technical terms in some descriptions is solely for ease of understanding and is not intended to limit the scope of the disclosed techniques. Therefore, the techniques described herein are also applicable to other video codec protocols and designs. In this document, editorial changes to text relative to a draft of the Versatile Video Codec (VVC) specification or the International Organization for Standardization (ISO) Base Media File Format (ISOBMFF) file format specification are indicated by bold italics to indicate canceled text and bold underline to indicate added text.

[0032] 1. Preliminary Discussion

[0033] This document relates to image and / or video coding techniques. Specifically, the present disclosure relates to signaling notification of supplemental enhancement information (SEI) processing order. These examples can be applied individually or in various combinations for video bitstreams encoded and decoded by any codec (e.g., the VVC standard and / or the Versatile Supplemental Enhancement Information (VSEI) standard for encoded and decoded video bitstreams).

[0034] 2. Abbreviations

[0035] Adaptation parameter set (APS), access unit (AU), codec layer video sequence (CLVS), codec layer video sequence start (CLVSS), cyclic redundancy check (CRC), codec video sequence (CVS), finite impulse response (FIR), intra frame random access point (IRAP), network abstraction layer (NAL), picture parameter set (PPS), picture unit (PU), random access skip preamble (RASL), supplementary enhancement information (SEI), step-by-step temporal sublayer access (STSA), video codec layer (VCL), generic supplementary enhancement information (VSEI) as described in Rec. ITU-T H.274 | ISO / IEC 23002-7, video usability information (VUI), versatile video codec (VVC) as described in Rec. ITU-T H.266 ISO / IEC 23090-3.

[0036] 3. Further Discussion

[0037] 3.1 Video Codec Standards

[0038] Video codec standards have evolved primarily through the development of the International Telecommunication Union (ITU) Telecommunication Standardization Sector (ITU-T) and ISO / International Electrotechnical Commission (IEC) standards. ITU-T produced the H.261 and H.263 standards, ISO / IEC produced the Moving Picture Experts Group (MPEG)-1 and MPEG-4 Visual standards, and the two organizations jointly produced the H.262 / MPEG-2 Video standard, the H.264 / MPEG-4 Advanced Video Coding (AVC) standard, and the H.265 / High Efficiency Video Coding (HEVC) standard. Starting with H.262, video codec standards are based on a hybrid video codec structure, which uses temporal prediction plus transform coding. In order to explore future video codec technologies beyond HEVC, the Video Coding Experts Group (VCEG) and MPEG jointly established the Joint Video Exploration Group (JVET). JVET uses many methods and inputs them into a reference software called the Joint Exploration Model (JEM). JVET was later renamed the Joint Video Experts Team (JVET) when the Versatile Video Codec (VVC) project was officially launched. VVC is a codec standard that aims to reduce bitrate by 50% compared to HEVC.

[0039] The Versatile Video Codec (VVC) standard (ITU-T H.266 | ISO / IEC 23090-3) and the related Versatile Supplementary Enhancement Information (VSEI) standard (ITU-T H.274 | ISO / IEC 23002-7) are designed for the broadest range of applications, including traditional uses (e.g., TV broadcasting, video conferencing, or playback from storage media), as well as newer and more advanced use cases (e.g., adaptive bitrate streaming, video region extraction, composition and merging of content from multiple codec video bitstreams, multi-view video, scalable layered codecs, and viewport-adaptive 360° immersive media).

[0040] The Essential Video Codec (EVC) standard (ISO / IEC 23094-1) is another video codec standard developed by MPEG.

[0041] 3.2 SEI messages in general and VVC

[0042] SEI messages facilitate processes related to decoding, display, or other purposes. However, SEI messages are not required to construct luma or chroma samples by the decoding process. Conforming decoders do not need to process this information to achieve output order conformance. Some SEI messages are required to check bitstream conformance and output timing decoder conformance. Other SEI messages are not required to check bitstream conformance.

[0043] Annex D of VVC specifies the syntax and semantics of the SEI message payload of some SEI messages, and specifies the use of SEI messages and VUI parameters whose syntax and semantics are specified in ITU-T H.SEI ISO / IEC 23002-7.

[0044] 3.3 SEI Processing Order SEI Message

[0045] JVET-AA0102 proposes an SEI message named SEI processing order SEI message. The SEI processing order SEI message is used to carry information indicating the preferred processing order of different types of SEI messages that may be present in the bitstream, as determined by the encoder (e.g., the content producer). One implementation of the syntax and semantics of the SEI message is as follows.

[0046] 3.3.1 SEI Processing Order SEI Message Syntax

[0047]

[0048] 3.3.2 SEI Processing Order SEI Message Semantics

[0049] The SEI processing order SEI message carries information indicating the preferred processing order for different types of SEI messages that may be present in the bitstream, as determined by the encoder (e.g., the content producer). When the SEI processing order SEI message is present in any access unit of the CVS, the SEI processing order SEI message shall be present in the first access unit of the CVS. The SEI processing order SEI message persists from the current access unit until the end of the CVS in decoding order. When multiple SEI processing order SEI messages are present in the CVS, they shall have the same content.

[0050] po_sei_payload_type[i] specifies the value of payloadType for the i-th SEI message for which information is provided in the SEI processing order SEI message. When m is not equal to n, the values ​​of po_sei_payload_type[m] and po_sei_payload_type[n] shall not be the same.

[0051] po_sei_processing_order[i] indicates the preferred order for processing any SEI messages with payloadType equal to po_sei_payload_type[i]. po_sei_processing_order[m] greater than 0 and less than po_sei_processing_order[n] indicates that any SEI message with payloadType equal to po_sei_payload_type[m], if present, should be processed before any SEI message with payloadType equal to po_sei_payload_type[n], if present. po_sei_processing_order[i] equal to 0 specifies that the preferred order for processing SEI messages with payloadType equal to po_sei_payload_type[i] is unknown or unspecified, or is determined by an external mechanism not specified in this specification.

[0052] 4. Technical problems solved by the disclosed technical solutions

[0053] The example design for SEI processing order SEI messages has the following problem. The syntax allows for signaling of only one entry in the syntax elements po_sei_payload_type[i] and po_sei_payload_type[i] in a loop. However, this approach only makes sense when signaling two or more entries in those syntax elements, because only in this case can the relative processing order in multiple types of SEI messages be signaled.

[0054] In the semantics of the SEI processing order SEI message, a value of 0 for po_sei_processing_order[i] is specified as special treatment. po_sei_processing_order[i] equal to 0 specifies that the preferred order for processing SEI messages with payloadType equal to po_sei_payload_type[i] is unknown or unspecified, or is determined by an external mechanism. However, special treatment of a value of 0 for po_sei_payload_type[i] is neither necessary nor useful, but rather introduces a lack of clarity and even operational problems. For example, if the preferred processing order is unknown or unspecified, a clearer approach would not list this payload type value in the SEI message. If the preferred processing order is determined by an external mechanism, it is unclear how the externally determined order should interact with the order signaled in the SEI message.

[0055] 5. List of solutions and implementation examples

[0056] In order to solve the problems described above, the following summarized methods are disclosed. This example should be considered as an example to explain the general concept and should not be interpreted in a narrow way. In addition, these examples can be applied alone or in combination in any way.

[0057] Example 1

[0058] In one example, to solve the first problem, the SEI processing order is required. The SEI message should include at least two entries of the syntax elements po_sei_payload_type[i] and po_sei_payload_type[i] for i equal to 0 and 1, respectively.

[0059] Example 2

[0060] In one example, the following constraints are specified: A requirement for bitstream conformance is that the SEI processing order SEI message shall include at least two entries of the syntax elements po_sei_payload_type[i] and po_sei_payload_type[i] for i equal to 0 and 1, respectively.

[0061] Example 3

[0062] In another example, the following constraints are specified: A requirement for bitstream conformance is that within the SEI processing order SEI message, there shall be at least two entries of the syntax elements po_sei_payload_type[i] and po_sei_payload_type[i], e.g., there shall be syntax elements po_sei_payload_type[0], po_sei_payload_type[0], po_sei_payload_type[1], and po_sei_payload_type[1].

[0063] Example 4

[0064] To address the second issue, the value 0 of po_sei_processing_order[i] is treated the same as other values ​​of the syntax element.

[0065] Example 5

[0066] In one example, the semantics of po_sei_processing_order[i] are defined as follows. po_sei_processing_order[i] indicates the preferred order for processing any SEI message with payloadType equal to po_sei_payload_type[i]. For any two distinct integer values ​​m and n greater than or equal to 0, po_sei_processing_order[m] is less than po_sei_processing_order[n] indicating that any SEI message with payloadType equal to po_sei_payload_type[m], if any, should be processed before any SEI message with payloadType equal to po_sei_payload_type[n], if any.

[0067] 6. Examples

[0068] The following are some example embodiments of some of the disclosed items outlined in Examples 1 to 5 in Section 5 above.

[0069] 6.1 First Embodiment

[0070] Most of the relevant parts that were added or modified are shown in bold, and some deleted parts are shown in italic bold.

[0071] There may be other changes that are editorial in nature and therefore not highlighted.

[0072]

[0073] 6.1.2 SEI Processing Order SEI Message Semantics

[0074] The SEI processing order SEI message carries information indicating the preferred processing order for different types of SEI messages that may be present in the bitstream, as determined by the encoder (e.g., the content producer). When the SEI processing order SEI message is present in any access unit of the CVS, the SEI processing order SEI message shall be present in the first access unit of the CVS. The SEI processing order SEI message persists from the current access unit until the end of the CVS in decoding order. When multiple SEI processing order SEI messages are present in the CVS, they shall have the same content.

[0075] The requirement for bitstream conformance is that within the SEI processing order SEI message, there shall be at least two entries of the syntax elements po_sei_payload_type[i] and po_sei_payload_type[i], e.g., there shall be syntax elements po_sei_payload_type[0], po_sei_payload_type[0], po_sei_payload_type[1], and po_sei_payload_type[1].

[0076] po_sei_payload_type[i] specifies the value of payloadType for the i-th SEI message for which information is provided in the SEI processing order SEI message. When m is not equal to n, the values ​​of po_sei_payload_type[m] and po_sei_payload_type[n] shall not be the same.

[0077] po_sei_processing_order[i] indicates the preferred order for processing any SEI messages with payloadType equal to po_sei_payload_type[i]. For any two distinct integer values ​​m and n greater than or equal to 0, po_sei_processing_order[m] greater than 0 and less than po_sei_processing_order[n] indicates that any SEI message with payloadType equal to po_sei_payload_type[m], if present, shall be processed before any SEI message with payloadType equal to po_sei_payload_type[n], if present. po_sei_processing_order[i] equal to 0 specifies that the preferred order for processing SEI messages with payloadType equal to po_sei_payload_type[i] is unknown or unspecified, or is determined by external means not specified in this specification. ...

[0079] Figure 1 4000 is a block diagram illustrating an example video processing system 4000 in which various techniques disclosed herein may be implemented. Various implementations may include some or all of the components of system 4000. System 4000 may include an input 4002 for receiving video content. The video content may be received in a raw or uncompressed format, such as 8 or 10 bit multi-component pixel values, or may be in a compressed or encoded format. Input 4002 may represent a network interface, a peripheral bus interface, or a storage interface. Examples of network interfaces include wired interfaces such as Ethernet, a passive optical network (PON), and wireless interfaces such as Wi-Fi or a cellular interface.

[0080] System 4000 may include a codec component 4004 that can implement various codecs or encoding methods described in this document. Codec component 4004 can reduce the average bit rate of the video from input 4002 to the output of codec component 4004 to generate a codec representation of the video. Codec technology is therefore sometimes referred to as video compression or video transcoding technology. The output of codec component 4004 can be stored or sent via a communication connection as represented by component 4006. The bitstream (or codec) representation of the storage or communication transmission of the video received at input 4002 can be used by component 4008 to generate pixel values ​​or transmit to a displayable video of display interface 4010. The process of generating user-visible video from the bitstream representation is sometimes referred to as video decompression. In addition, although some video processing operations are referred to as "codec" operations or tools, it will be understood that the codec tool or operation is used at the encoder, and the corresponding decoding tool or operation of the inverse codec result will be performed by the decoder.

[0081] Examples of peripheral bus interfaces or display interfaces may include Universal Serial Bus (USB), High Definition Multimedia Interface (HDMI), DisplayPort, etc. Examples of storage interfaces include Serial Advanced Technology Attachment (SATA), Peripheral Component Interconnect (PCI), Integrated Drive Electronics (IDE) interface, etc. The technology described in this document may be embodied in various electronic devices, such as mobile phones, laptops, smart phones, or other devices capable of performing digital data processing and / or video display.

[0082] Figure 2 4100. The apparatus 4100 may be used to implement one or more methods described herein. The apparatus 4100 may be embodied in a smartphone, a tablet computer, a computer, an Internet of Things (IoT) receiver, etc. The apparatus 4100 may include one or more processors 4102, one or more memories 4104, and a video processing circuit 4106. The processor(s) 4102 may be configured to implement one or more methods described in this document. The memory(s) 4104 may be used to store data and code for implementing the methods and techniques described herein. The video processing circuit 4106 may be used to implement some of the techniques described in this document in a hardware circuit system. In some embodiments, the video processing circuit 4106 may be at least partially included in a processor 4102 (e.g., a graphics coprocessor).

[0083] Figure 34200 is a flow chart of an example method 4200 for video processing. The method 4200 includes performing a conversion between visual media data and a bitstream of the visual media data based on a rule at step 4202. The rule includes a bitstream consistency requirement that a supplemental enhancement information (SEI) processing order SEI message should include a SEI payload type syntax element having at least a first entry and a second entry. In an example, the SEI payload type syntax element in step 4202 is po_sei_payload_type, the first entry is po_sei_payload_type[0], and the second entry is po_sei_payload_type[1]. In another example, the bitstream consistency requirement in step 4202 requires that the SEI processing order SEI message should include a preferred order syntax element having at least a first entry and a second entry. In yet another example, the preferred order syntax element is po_sei_processing_order, the first entry is po_sei_processing_order[0], and the second entry is po_sei_processing_order[1].

[0084] It should be noted that the method 4200 may be implemented in an apparatus for processing video data, the apparatus comprising a processor and a non-transitory memory having instructions thereon, such as the video encoder 4400, the video decoder 4500, and / or the encoder 4600. In this case, the instructions, when executed by the processor, cause the processor to perform the method 4200. In addition, the method 4200 may be performed by a non-transitory computer-readable medium including a computer program product for use by a video codec device. The computer program product includes computer executable instructions stored on a non-transitory computer-readable medium, such that when executed by the processor, the video codec device performs the method 4200.

[0085] Figure 4 43 is a block diagram illustrating an example video codec system 4300 that can utilize the techniques of the present disclosure. The video codec system 4300 can include a source device 4310 and a destination device 4320. The source device 4310 generates encoded video data, where the source device 4310 can be referred to as a video encoding device. The destination device 4320 can decode the encoded video data generated by the source device 4310, where the destination device 4320 can be referred to as a video decoding device.

[0086] Source device 4310 may include video source 4312, video encoder 4314 and input / output (I / O) interface 4316. Video source 4312 may include a source, such as a video capture device, an interface for receiving video data from a video content provider, and / or a computer graphics system for generating video data, or a combination of these sources. Video data may include one or more pictures. Video encoder 4314 encodes video data from video source 4312 to generate a bit stream. The bit stream may include a bit sequence that forms a codec representation of video data. The bit stream may include a codec picture and related data. The codec picture is a codec representation of a picture. Related data may include sequence parameter sets, picture parameter sets and other syntax structures. I / O interface 4316 may include a modulator / demodulator (modem) and / or a transmitter. Encoded video data may be directly sent to destination device 4320 via network 4330 via I / O interface 4316. Encoded video data may also be stored on storage medium / server 4340 for access by destination device 4320.

[0087] Destination device 4320 may include an I / O interface 4326, a video decoder 4324, and a display device 4322. I / O interface 4326 may include a receiver and / or a modem. I / O interface 4326 may obtain encoded video data from source device 4310 or storage medium / server 4340. Video decoder 4324 may decode the encoded video data. Display device 4322 may display the decoded video data to a user. Display device 4322 may be integrated with destination device 4320, or may be external to destination device 4320 that may be configured to interface with an external display device.

[0088] The video encoder 4314 and the video decoder 4324 may operate according to a video compression standard, such as the High Efficiency Video Codec (HEVC) standard, the Versatile Video Codec (VVC) standard, and other current and / or additional standards.

[0089] Figure 5 is a block diagram showing an example of a video encoder 4400, which may be Figure 4 4300. Video encoder 4400 may be configured to perform any or all of the techniques of the present disclosure. Video encoder 4400 includes multiple functional components. The techniques described in this disclosure may be shared between various components of video encoder 4400. In some examples, a processor may be configured to perform any or all of the techniques described in this disclosure.

[0090] The functional components of the video encoder 4400 may include a segmentation unit 4401, a prediction unit 4402 (which may include a mode selection unit 4403, a motion estimation unit 4404, a motion compensation unit 4405 and an intra-frame prediction unit 4406), a residual generation unit 4407, a transform processing unit 4408, a quantization unit 4409, an inverse quantization unit 4410, an inverse transform unit 4411, a reconstruction unit 4412, a buffer 4413 and an entropy coding and decoding unit 4414.

[0091] In other examples, the video encoder 4400 may include more, fewer, or different functional components. In an example, the prediction unit 4402 may include an intra-block copy (IBC) unit. The IBC unit may perform prediction in IBC mode, where at least one reference picture is a picture in which the current video block is located.

[0092] Furthermore, for example, some components of the motion estimation unit 4404 and the motion compensation unit 4405 may be highly integrated, but are represented separately in the example of the video encoder 4400 for purposes of explanation.

[0093] The segmentation unit 4401 may segment the picture into one or more video blocks. The video encoder 4400 and the video decoder 4500 may support various video block sizes.

[0094] The mode selection unit 4403 may select one of the coding modes (e.g., intra or inter) based on the error result, and provide the resulting intra-coded block or inter-coded block to the residual generation unit 4407 to generate residual block data, and to the reconstruction unit 4412 to reconstruct the coded block for use as a reference picture. In some examples, the mode selection unit 4403 may select a combination of intra and inter prediction modes (CIIP), where the prediction is based on an inter prediction signal and an intra prediction signal. In the case of inter prediction, the mode selection unit 4403 may also select a resolution of the motion vector of the block (e.g., sub-pixel or integer pixel precision).

[0095] To perform inter-frame prediction on the current video block, the motion estimation unit 4404 may generate motion information of the current video block by comparing the current video block with one or more reference frames from the buffer 4413. The motion compensation unit 4405 may determine a predicted video block of the current video block based on the motion information and decoded samples of pictures from the buffer 4413 other than the picture associated with the current video block.

[0096] The motion estimation unit 4404 and the motion compensation unit 4405 may perform different operations on the current video block, eg, depending on whether the current video block is in an I slice, a P slice, or a B slice.

[0097] In some examples, the motion estimation unit 4404 may perform unidirectional prediction on the current video block, and the motion estimation unit 4404 may search the reference picture of list 0 or list 1 for the reference video block of the current video block. The motion estimation unit 4404 may then generate a reference index indicating the reference picture in list 0 or list 1, the reference index including the reference video block and a motion vector indicating a spatial displacement between the current video block and the reference video block. The motion estimation unit 4404 may output the reference index, the prediction direction indicator, and the motion vector as motion information of the current video block. The motion compensation unit 4405 may generate a predicted video block of the current block based on the reference video block indicated by the motion information of the current video block.

[0098] In other examples, the motion estimation unit 4404 may perform bidirectional prediction on the current video block, and the motion estimation unit 4404 may search for a reference video block of the current video block in the reference pictures in list 0, and may also search for another reference video block of the current video block in list 1. The motion estimation unit 4404 may then generate a reference index indicating a reference picture in list 0 and list 1 including the reference video block and a motion vector indicating a spatial displacement between the reference video block and the current video block. The motion estimation unit 4404 may output the reference index and the motion vector of the current video block as the motion information of the current video block. The motion compensation unit 4405 may generate a predicted video block of the current video block based on the reference video block indicated by the motion information of the current video block.

[0099] In some examples, motion estimation unit 4404 may output a complete set of motion information for use in a decoding process by a decoder. In some examples, motion estimation unit 4404 may not output a complete set of motion information for the current video. Instead, motion estimation unit 4404 may reference motion information of another video block to signal motion information of the current video block. For example, motion estimation unit 4404 may determine that the motion information of the current video block is sufficiently similar to the motion information of an adjacent video block.

[0100] In one example, the motion estimation unit 4404 may indicate a value in a syntax structure associated with the current video block that indicates to the video decoder 4500 that the current video block has the same motion information as another video block.

[0101] In another example, the motion estimation unit 4404 may identify another video block and a motion vector difference (MVD) in a syntax structure associated with the current video block. The motion vector difference indicates the difference between the motion vector of the current video block and the motion vector of the indicated video block. The video decoder 4500 may use the motion vector of the indicated video block and the motion vector difference to determine the motion vector of the current video block.

[0102] As discussed above, the video encoder 4400 may predictively signal motion vectors. Two examples of predictive signaling techniques that may be implemented by the video encoder 4400 include Advanced Motion Vector Prediction (AMVP) and Merge mode signaling.

[0103] The intra prediction unit 4406 may perform intra prediction on the current video block. When the intra prediction unit 4406 performs intra prediction on the current video block, the intra prediction unit 4406 may generate prediction data for the current video block based on decoded samples of other video blocks in the same picture. The prediction data for the current video block may include a predicted video block and various syntax elements.

[0104] The residual generation unit 4407 may generate residual data for the current video block by subtracting the prediction video block(s) of the current video block from the current video block. The residual data for the current video block may include residual video blocks corresponding to different sample components of samples in the current video block.

[0105] In other examples, such as in skip mode, there may be no residual data for the current video block and the residual generation unit 4407 may not perform a subtraction operation.

[0106] The transform processing unit 4408 may generate one or more transform coefficient video blocks for the current video block by applying one or more transforms to the residual video block associated with the current video block.

[0107] After the transform processing unit 4408 generates a transform coefficient video block associated with the current video block, the quantization unit 4409 may quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values ​​associated with the current video block.

[0108] The inverse quantization unit 4410 and the inverse transform unit 4411 may apply inverse quantization and inverse transform to the transform coefficient video block, respectively, to reconstruct a residual video block from the transform coefficient video block. The reconstruction unit 4412 may add the reconstructed residual video block to corresponding samples of one or more predicted video blocks generated by the prediction unit 4402 to generate a reconstructed video block associated with the current block for storage in the buffer 4413.

[0109] After the reconstruction unit 4412 reconstructs the video block, a loop filtering operation may be performed to reduce video blocking effects in the video block.

[0110] The entropy coding unit 4414 may receive data from other functional components of the video encoder 4400. When the entropy coding unit 4414 receives the data, the entropy coding unit 4414 may perform one or more entropy coding operations to generate entropy coded data and output a bitstream including the entropy coded data.

[0111] Figure 6 is a block diagram showing an example of a video decoder 4500, which may be Figure 4 4300. Video decoder 4500 may be configured to perform any or all of the techniques of the present disclosure. In the example shown, video decoder 4500 includes multiple functional components. The techniques described in this disclosure may be shared between various components of video decoder 4500. In some examples, a processor may be configured to perform any or all of the techniques described in this disclosure.

[0112] In the example shown, the video decoder 4500 includes an entropy decoding unit 4501, a motion compensation unit 4502, an intra prediction unit 4503, an inverse quantization unit 4504, an inverse transform unit 4505, a reconstruction unit 4506, and a buffer 4507. In some examples, the video decoder 4500 may perform a decoding process that is generally the reverse of the encoding pass described for the video encoder 4400.

[0113] The entropy decoding unit 4501 may retrieve a coded bitstream. The coded bitstream may include entropy-coded video data (e.g., coded blocks of video data). The entropy decoding unit 4501 may decode the entropy-coded video data, and from the entropy-decoded video data, the motion compensation unit 4502 may determine motion information including motion vectors, motion vector precision, reference picture list indexes, and other motion information. The motion compensation unit 4502 may determine such information, for example, by performing AMVP and Merge modes.

[0114] The motion compensation unit 4502 may generate a motion compensated block, and interpolation may be performed based on an interpolation filter. An identifier of an interpolation filter to be used with sub-pixel precision may be included in a syntax element.

[0115] The motion compensation unit 4502 may calculate interpolation of sub-integer pixels of a reference block using an interpolation filter as used by the video encoder 4400 during encoding of the video block. The motion compensation unit 4502 may determine the interpolation filter used by the video encoder 4400 based on received syntax information and use the interpolation filter to generate a prediction block.

[0116] The motion compensation unit 4502 can use some syntax information to determine the size of the blocks used to encode (multiple) frames and / or (multiple) slices of the encoded video sequence, partitioning information describing how each macroblock of the pictures of the encoded video sequence is partitioned, a mode indicating how each partition is encoded, one or more reference frames (and reference frame lists) for each inter-frame codec block, and other information used to decode the encoded video sequence.

[0117] The intra prediction unit 4503 may form a prediction block from spatially adjacent blocks using, for example, an intra prediction mode received in the bitstream. The inverse quantization unit 4504 inversely quantizes, i.e., dequantizes, the quantized video block coefficients provided in the bitstream and decoded by the entropy decoding unit 4501. The inverse transform unit 4505 applies an inverse transform.

[0118] The reconstruction unit 4506 may add the residual block to the corresponding prediction block generated by the motion compensation unit 4502 or the intra prediction unit 4503 to form a decoded block. If necessary, a deblocking filter may also be applied to filter the decoded block to remove block artifacts. The decoded video block is then stored in a buffer 4507 to provide a reference block for subsequent motion compensation / intra prediction, and also to generate a decoded video for presentation on a display device.

[0119] Figure 7 4600 is a schematic diagram of an example encoder 4600. The encoder 4600 is suitable for implementing VVC technology. The encoder 4600 includes three loop filters, namely a deblocking filter (DF) 4602, a sample adaptive offset (SAO) 4604, and an adaptive loop filter (ALF) 4606. Unlike the DF 4602 that uses a predefined filter, the SAO 4604 and the ALF 4606 use the original samples of the current picture to reduce the mean square error between the original samples and the reconstructed samples by adding an offset and applying a finite impulse response (FIR) filter, respectively, using the auxiliary information of the codec to signal the offset and filter coefficients. The ALF 4606 is located at the last processing stage of each picture and can be regarded as a tool that attempts to capture and repair artifacts created by previous stages.

[0120] The encoder 4600 also includes an intra prediction component 4608 and a motion estimation / compensation (ME / MC) component 4610 configured to receive an input video. The intra prediction component 4608 is configured to perform intra prediction, and the ME / MC component 4610 is configured to perform inter prediction using a reference picture obtained from a reference picture buffer 4612. The residual block from the inter prediction or intra prediction is fed to the transform (T) component 4614 and the quantization (Q) component 4616 to generate quantized residual transform coefficients, which are fed to the entropy coding component 4618. The entropy coding component 4618 performs entropy coding and decoding on the prediction result and the quantized transform coefficients and sends them to a video decoder (not shown). The quantization component output from the quantization component 4616 can be fed to the inverse quantization (IQ) component 4620, the inverse transform component 4622 and the reconstruction (REC) component 4624. The REC component 4624 is capable of outputting images to the DF 4602 , SAO 4604 , and ALF 4606 for filtering before these pictures are stored in the reference picture buffer 4612 .

[0121] Next a list of preferred solutions with some examples is provided.

[0122] The following solutions illustrate examples of the techniques discussed herein.

[0123] The following solution illustrates an example implementation of the techniques discussed in the previous sections (eg, Item 1).

[0124] 1. A method for processing media data comprises: performing conversion between visual media data and a bitstream of the visual media data based on rules, wherein the rules include a bitstream consistency requirement, and the bitstream consistency requirement requires a supplemental enhancement information (SEI) processing order. The SEI message should include an SEI payload type syntax element having at least a first entry and a second entry.

[0125] 2. The method of claim 1, wherein the SEI payload type syntax element is po_sei_payload_type, a first entry of the SEI payload type syntax element is po_sei_payload_type[0], and a second entry of the SEI payload type syntax element is po_sei_payload_type[1].

[0126] 3. The method according to any one of claims 1 to 2, wherein the bitstream conformance requirement requires that the SEI processing order SEI message shall include a preferred order syntax element having at least a first entry and a second entry.

[0127] 4 . The method of claim 3 , wherein the preferred order syntax element is po_sei_processing_order, a first entry of the preferred order syntax element is po_sei_processing_order[0], and a second entry of the preferred order syntax element is po_sei_processing_order[1].

[0128] 5. The method of any one of claims 1 to 4, wherein, within the SEI processing order SEI message, each of po_sei_payload_type[0] and po_sei_payload_type[1] is paired with po_sei_processing_order[0] and po_sei_processing_order[1], respectively, where po_sei_processing_order[i] indicates a preferred order for processing SEI messages having a payload type equal to po_sei_payload_type[i].

[0129] 6. A method for processing video data comprises: performing conversion between visual media data and a bitstream of the visual media data based on a rule, wherein the rule specifies that a zero value of a processing order SEI payload type syntax element entry in a supplemental enhancement information (SEI) processing order SEI message is processed in a manner similar to a one value.

[0130] 7 . The method of claim 6 , wherein the SEI payload type syntax element is po_sei_payload_type, and the SEI payload type syntax element entry is po_sei_payload_type[i].

[0131] 8. A method according to any one of claims 1 to 7, wherein po_sei_payload_type[i] is defined as follows: po_sei_processing_order[i] indicates the preferred order for processing any SEI message with payloadType equal to po_sei_payload_type[i]; and for any two different integer values ​​m and n greater than or equal to 0, po_sei_processing_order[m] is less than po_sei_processing_order[n] indicating that any SEI message with payloadType equal to po_sei_payload_type[m], if any, should be processed before any SEI message with payloadType equal to po_sei_payload_type[n], if any.

[0132] 9. A method according to any one of claims 1 to 8, wherein the converting comprises encoding the visual media data into a bitstream.

[0133] 10. A method according to any one of claims 1 to 8, wherein the converting comprises decoding the visual media data from a bitstream.

[0134] 11. An apparatus for processing visual media data, comprising: a processor; and a non-transitory memory having instructions thereon, wherein the instructions, when executed by the processor, cause the processor to perform a method according to any one of claims 1 to 10.

[0135] 12. A non-transitory computer-readable medium comprising a computer program product for use by an apparatus for processing visual media data, the computer program product comprising computer executable instructions stored on the non-transitory computer-readable medium, such that when the instructions are executed by a processor, the apparatus for processing visual media data performs a method according to any one of claims 1 to 10.

[0136] 13. A non-transitory computer-readable recording medium storing a bitstream of visual media data, the visual media data being generated by a method performed by a device for processing visual media data, wherein the method comprises: generating a bitstream of visual media data based on a rule, wherein the rule comprises a bitstream consistency requirement, the bitstream consistency requirement requiring a supplemental enhancement information (SEI) processing order; a SEI message shall include an SEI payload type syntax element having at least a first entry and a second entry.

[0137] 14. A method for storing a bitstream of visual media data, comprising: generating a bitstream of visual media data based on a rule; and storing the bitstream in a non-temporary computer-readable recording medium, wherein the rule includes a bitstream consistency requirement, the bitstream consistency requirement requiring a supplemental enhancement information (SEI) processing order SEI message should include an SEI payload type syntax element having at least a first entry and a second entry.

[0138] 15. The method, apparatus or system described in this document.

[0139] In the solution described herein, an encoder may comply with the format rules by generating a codec representation according to the format rules. In the solution described herein, a decoder may parse the syntax elements in the codec representation using the format rules to generate decoded video, knowing the presence and absence of the syntax elements according to the format rules.

[0140] In this document, the term "video processing" may refer to video encoding, video decoding, video compression, or video decompression. For example, during the conversion from a pixel representation of a video to a corresponding bitstream representation, a video compression algorithm may be applied, and vice versa. As defined by the syntax, the bitstream representation of the current video block may correspond, for example, to bits that are juxtaposed or interspersed in different places within the bitstream. For example, macroblocks may be encoded according to error residual values ​​of transforms and codecs and also using bits in headers and other fields in the bitstream. In addition, during conversion, the decoder may parse the bitstream based on the determination, knowing that some fields may or may not be present, as described in the above solution. Similarly, the encoder may determine whether to include or not include certain syntax fields, and generate the codec representation accordingly by including or excluding syntax fields from the codec representation.

[0141] The disclosed and other solutions, examples, embodiments, modules and functional operations described in this document can be implemented in digital electronic circuits, or in computer software, firmware or hardware (including the structures disclosed in this document and their structural equivalents), or in a combination of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer-readable medium, which are used to be executed by a data processing device or control the operation of the data processing device. The computer-readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a combination of substances that affect machine-readable propagation signals, or a combination of one or more of them. The term "data processing device" includes all devices, equipment and machines for processing data, including, for example, a programmable processor, a computer, or multiple processors or computers. In addition to hardware, the device may also include code that creates an execution environment for the computer program in question, for example, code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagation signal is an artificially generated signal generated to encode information for transmission to a suitable receiver device, such as a machine-generated electrical signal, an optical signal, or an electromagnetic signal.

[0142] A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language (including compiled or interpreted languages), and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program may be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files storing one or more modules, subroutines, or code portions). A computer program may be deployed to execute on one computer or on multiple computers located at one site or distributed across multiple sites and interconnected by a communication network.

[0143] The processes and logic flows described in this document can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by special purpose logic circuits, and the apparatus can also be implemented as special purpose logic circuits, such as field programmable gate arrays (FPGAs) or application specific integrated circuits (ASICs).

[0144] Processors suitable for executing computer programs include, for example, general-purpose and special-purpose microprocessors, and any one or more processors of any type of digital computer. Typically, the processor will receive instructions and data from a read-only memory or a random access memory or both. The basic elements of a computer are a processor for executing instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include one or more mass storage devices (e.g., magnetic disks, magneto-optical disks, or optical disks) for storing data, or operably coupled to receive data from or transfer data to or from the one or more mass storage devices. However, a computer does not require such a device. Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media, and memory devices, including, for example, semiconductor memory devices, such as erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and compact disk read-only memory (CD ROM) and digital versatile disk read-only memory (DVD-ROM) disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

[0145] Although the present disclosure contains many details, these details should not be interpreted as limitations on any subject matter or the scope that may be claimed, but rather as descriptions of features of specific embodiments specified for specific technologies. Certain features described in the context of separate embodiments in the present disclosure may also be implemented in combination in a single embodiment. Conversely, the various features described in the context of a single embodiment may also be implemented individually in multiple embodiments or in any suitable sub-combination. In addition, although features may be described above as working in certain combinations and even initially claimed as such, one or more features from the claimed combination may be excluded from the combination in some cases, and the claimed combination may be directed to a sub-combination or a variation of the sub-combination.

[0146] Similarly, although operations are depicted in a particular order in the drawings, this should not be understood as requiring that such operations be performed in the particular order shown or in a sequential order, or that all of the operations shown be performed, to achieve the desired results. Furthermore, the separation of various system components in the embodiments described in this disclosure should not be understood as requiring such separation in all embodiments.

[0147] Only a few implementations and examples are described, and other implementations, enhancements, and variations may be made based on what is described and illustrated in this disclosure.

[0148] A first component is directly coupled to a second component when there is no intermediate component between the first component and the second component other than a line, a trace, or another medium. A first component is indirectly coupled to a second component when there is an intermediate component between the first component and the second component other than a line, a trace, or another medium. The term "coupled" and its variations include direct coupling and indirect coupling. The use of the term "approximately" is meant to include a range of ±10% of the subsequent numerical value unless otherwise stated.

[0149] Although several embodiments have been provided in the present disclosure, it should be understood that the disclosed systems and methods may be embodied in many other specific forms without departing from the spirit or scope of the present disclosure. The present examples are considered to be illustrative rather than restrictive, and are not intended to be limited to the details given herein. For example, various elements or components may be combined or integrated in another system, or certain features may be omitted or not implemented.

[0150] In addition, without departing from the scope of the present disclosure, the techniques, systems, subsystems and methods described and illustrated as discrete or separate in various embodiments may be combined or integrated with other systems, modules, techniques or methods. Other items shown or discussed as coupled may be directly connected, or may be indirectly coupled or communicated through some interface, device or intermediate component, whether electrically, mechanically or otherwise. Other examples of changes, substitutions and modifications may be determined by those skilled in the art and may be made without departing from the spirit and scope of the present disclosure.

Claims

1. A method for processing media data, comprising: performing conversion between visual media data and a bitstream of said visual media data based on a rule, The rules include a bitstream conformance requirement requiring a supplemental enhancement information (SEI) processing order SEI message to include a SEI payload type syntax element having at least a first entry and a second entry.

2. The method according to claim 1, wherein: The SEI payload type syntax element is po_sei_payload_type, the first entry of the SEI payload type syntax element is po_sei_payload_type[0], and the second entry of the SEI payload type syntax element is po_sei_payload_type[1].

3. The method according to any one of claims 1 to 2, wherein: The bitstream conformance requirement requires that the SEI processing order SEI message shall include a preferred order syntax element having at least a first entry and a second entry.

4. The method according to claim 3, wherein: The preferred order syntax element is po_sei_processing_order, the first entry of the preferred order syntax element is po_sei_processing_order[0], and the second entry of the preferred order syntax element is po_sei_processing_order[1].

5. The method according to any one of claims 1 to 4, wherein: Within the SEI processing order SEI message, each of po_sei_payload_type[0] and po_sei_payload_type[1] is paired with po_sei_processing_order[0] and po_sei_processing_order[1], respectively, where po_sei_processing_order[i] indicates the preferred order for processing SEI messages with a payload type equal to po_sei_payload_type[i].

6. A method for processing video data, comprising: performing conversion between visual media data and a bitstream of said visual media data based on a rule, Among other things, the rules specify that a zero value of a processing order SEI payload type syntax element entry in a supplemental enhancement information (SEI) processing order SEI message is treated in a similar manner to a one value.

7. The method according to claim 6, wherein: The SEI payload type syntax element is po_sei_payload_type, and the entry is po_sei_payload_type[i].

8. The method according to any one of claims 1 to 7, wherein: The po_sei_payload_type[i] is defined as follows: po_sei_processing_order[i] indicates the preferred order for processing any SEI messages with payloadType equal to po_sei_payload_type[i]; and For any two different integer values ​​m and n greater than or equal to 0, po_sei_processing_order[m] is less than po_sei_processing_order[n] indicating that any SEI message with payloadType equal to po_sei_payload_type[m], if present, should be processed before any SEI message with payloadType equal to po_sei_payload_type[n], if present.

9. The method according to any one of claims 1 to 8, wherein: The converting includes encoding the visual media data into the bitstream.

10. The method according to any one of claims 1 to 8, wherein: The converting includes decoding the visual media data from the bitstream.

11. An apparatus for processing visual media data, comprising: processor; and a non-transitory memory having instructions thereon, wherein the instructions, when executed by the processor, cause the processor to perform the method according to any one of claims 1 to 10.

12. A non-transitory computer-readable medium, comprising a computer program product for use with an apparatus for processing visual media data, the computer program product comprising computer executable instructions stored on the non-transitory computer-readable medium, such that when the instructions are executed by a processor, the apparatus for processing visual media data performs a method according to any one of claims 1 to 10.

13. A non-transitory computer-readable recording medium storing a bit stream of visual media data, the visual media data being generated by a method performed by an apparatus for processing visual media data, wherein: The method comprises: generating said bitstream of said visual media data based on a rule, The rules include a bitstream conformance requirement requiring a supplemental enhancement information (SEI) processing order SEI message to include a SEI payload type syntax element having at least a first entry and a second entry.

14. A method for storing a bit stream of visual media data, comprising: generating a bit stream of the visual media data based on a rule; as well as storing the bitstream in a non-transitory computer-readable recording medium, The rules include a bitstream conformance requirement requiring a supplemental enhancement information (SEI) processing order SEI message to include a SEI payload type syntax element having at least a first entry and a second entry.

Images