Power consumption control method and device for SSD (Solid State Disk) and storage medium
By monitoring the target parameters of the SSD in real time and adjusting it to enter low-power mode when it is below the threshold, the problem of increased power consumption of SSD is solved, achieving more efficient data processing and lower power consumption.
Patent Information
- Application Number
- CN202311216125.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-19
- Publication Date
- 2025-03-21
AI Technical Summary
In computing devices or high-performance storage systems, the high operating frequency of solid-state drives (SSDs) leads to an increase in power consumption, which in turn increases power consumption. How to effectively control the power consumption of SSDs has become an urgent problem.
By monitoring the target parameters of the SSD in real time, such as the amount of data, bandwidth and read and write operations, the SSD is adjusted to enter low power mode when the target parameters are below the preset threshold. Specific measures include adjusting the data into the first memory chip with the highest reliability, and placing the remaining memory chips in a state where IO data processing is not performed, and only the first memory chip processes the IO data.
By reducing the number of memory chips that process IO data, the power consumption of SSD is reduced, while avoiding the increase in IO delay, more efficient data processing and lower power consumption are achieved.
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Figure CN119668393A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a method, device and storage medium for controlling power consumption of a solid state drive (SSD). Background Art
[0002] With the rapid development of the Internet and cloud technology, data has exploded. Solid-state drives (SSDs) have been widely used in computing devices or high-performance storage systems due to their low read and write latency and high bandwidth.
[0003] Currently, in computing devices or high-performance storage systems, the operating frequency of SSDs is relatively high, which causes the power consumption of the SSDs to increase rapidly, thereby increasing the power consumption of the computing devices or high-performance storage systems.
[0004] Therefore, during the operation of the SSD, how to control the power consumption of the SSD is an urgent problem to be solved. Summary of the invention
[0005] The embodiments of the present application provide a method, device and storage medium for controlling power consumption of a solid state drive (SSD), which can reduce the power consumption of the SSD during the operation of the SSD.
[0006] In a first aspect, an embodiment of the present application provides a method for controlling power consumption of a solid state drive (SSD), comprising:
[0007] Determine a parameter value of a target parameter of an SSD, wherein the target parameter is used to measure the amount of data processed by the SSD, wherein the SSD includes a plurality of storage chips, and the plurality of storage chips are used to store data;
[0008] When the parameter value of the target parameter is lower than a preset parameter threshold, adjusting the SSD to enter a low power consumption mode, wherein adjusting the SSD to enter a low power consumption mode includes: adjusting the data to a first storage chip, and controlling a second storage chip to enter a target state, wherein the plurality of storage chips include the first storage chip, the second storage chip is a storage chip in the plurality of storage chips that does not store the data, and the target state is a state in which IO data processing is not performed;
[0009] When the SSD enters the low power consumption mode, the first storage chip is used to process IO data.
[0010] According to this solution, the amount of data processed by the SSD is monitored to determine when the SSD needs to enter the low power mode. The SSD entering the low power mode includes adjusting all the data cached in the SSD to the first storage chip to reduce the number of storage chips used to process data, and all second storage chips except the first storage chip enter a state of not processing IO data, and only process IO data through the first storage chip. In this way, the number of storage chips that process IO data is reduced, thereby reducing the power consumption of the SSD.
[0011] In a possible implementation, adjusting the data to the first storage chip includes:
[0012] determining the reliability of each memory chip in the plurality of memory chips;
[0013] Determining the first memory chip from the plurality of memory chips according to the reliability of each memory chip;
[0014] The data is adjusted into the first memory chip.
[0015] In this way, determining the storage chip used for processing data based on the reliability of the storage chip can improve the efficiency of processing IO data and reduce the power consumption of the SSD.
[0016] In a possible implementation, the SSD includes a plurality of packages, each of the plurality of packages includes at least one memory chip, and determining the reliability of each memory chip in the plurality of memory chips includes:
[0017] Calculating the service life of each package, where the service life is the average value of the remaining service lives of all memory chips in the package;
[0018] The step of determining the first storage chip from the plurality of storage chips according to the reliability of each storage chip comprises:
[0019] A first package is determined from the multiple packages according to the service life of each package, and the memory chip in the first package is the first memory chip.
[0020] In this way, the efficiency of processing IO data can be improved, and at the same time, the power consumption of the SSD can be reduced.
[0021] In a possible implementation manner, determining the reliability of each storage chip in the plurality of storage chips includes:
[0022] The reliability of the storage chip is determined according to the number of errors of the storage chip or the number of bit error recovery of the storage chip.
[0023] In this way, by determining the reliability of the storage chip, a storage chip with higher reliability is selected to process IO data, which can improve the efficiency of processing IO data and reduce the power consumption of the SSD.
[0024] In a possible implementation, controlling a storage chip that does not store data to enter an idle state includes:
[0025] Stop supplying power to all memory chips in a second package, where the second package is a package among the multiple packages except the first package, the memory chip in the second package is the second memory chip, and the first package is a package where the first memory chip is located.
[0026] In a possible implementation, the target state includes a standby state or a power-off state.
[0027] In a possible implementation, the target parameter includes at least one of the following items: the bandwidth of the SSD in a continuous time, the amount of data in the SSD, and the number of read and write operations performed by the SSD per second in a continuous time.
[0028] In a second aspect, an embodiment of the present application provides a power consumption control device for a solid state drive (SSD), comprising:
[0029] A determination module, used to determine a parameter value of a target parameter of the SSD, wherein the target parameter is used to measure the amount of data processed by the SSD, wherein the SSD includes a plurality of storage chips, and the plurality of storage chips are used to store data;
[0030] an adjustment module, configured to adjust the SSD to enter a low power consumption mode when the parameter value of the target parameter is lower than a preset parameter threshold, wherein the adjustment of the SSD to enter a low power consumption mode comprises: adjusting the data to a first storage chip, and controlling a second storage chip to enter a target state, wherein the plurality of storage chips comprises the first storage chip, the second storage chip is a storage chip in the plurality of storage chips that does not store the data, and the target state is a state in which IO data processing is not performed;
[0031] When the SSD enters the low power consumption mode, the first storage chip is used to process IO data.
[0032] In a possible implementation manner, the adjustment module is used to:
[0033] determining the reliability of each memory chip in the plurality of memory chips;
[0034] Determining the first memory chip from the plurality of memory chips according to the reliability of each memory chip;
[0035] The data is adjusted into the first memory chip.
[0036] In this way, determining the storage chip used for processing data based on the reliability of the storage chip can improve the efficiency of processing IO data and reduce the power consumption of the SSD.
[0037] In a possible implementation, the SSD includes a plurality of packages, each of the plurality of packages includes at least one storage chip, and the adjustment module is used to:
[0038] Calculating the service life of each package, where the service life is the average value of the remaining service lives of all memory chips in the package;
[0039] A first package is determined from the multiple packages according to the service life of each package, and the memory chip in the first package is the first memory chip.
[0040] In this way, the efficiency of processing IO data can be improved, and at the same time, the power consumption of the SSD can be reduced.
[0041] In a possible implementation, the adjustment module is used to determine the reliability of the storage chip according to the number of errors of the storage chip or the number of bit error recovery of the storage chip.
[0042] In this way, by determining the reliability of the storage chip, a storage chip with higher reliability is selected to process IO data, which can improve the efficiency of processing IO data and reduce the power consumption of the SSD.
[0043] In a possible implementation, the adjustment module is used to stop supplying power to all storage chips in a second package, where the second package is a package among the multiple packages except the first package, the storage chip in the second package is the second storage chip, and the first package is the package where the first storage chip is located.
[0044] In a possible implementation, the target state includes a standby state or a power-off state.
[0045] In a possible implementation, the target parameter includes at least one of the following items: the bandwidth of the SSD in a continuous time, the amount of data in the SSD, and the number of read and write operations performed by the SSD per second in a continuous time.
[0046] In a third aspect, an embodiment of the present application provides a power consumption control device for a solid-state drive (SSD), comprising: at least one memory for storing programs; and at least one processor for executing the programs stored in the memory. When the programs stored in the memory are executed, the processor is used to execute the method provided in the first aspect.
[0047] In a fourth aspect, an embodiment of the present application provides a power consumption control device for a solid state drive (SSD), the device runs computer program instructions to execute the method provided in the second aspect, or execute the method provided in the third aspect. Exemplarily, the device may be a chip or a processor.
[0048] In one example, the device may include a processor, which may be coupled to a memory, read instructions in the memory and execute the method provided in the first aspect according to the instructions. The memory may be integrated in a chip or a processor, or may be independent of the chip or the processor.
[0049] In a fifth aspect, an embodiment of the present application provides a computer storage medium, in which instructions are stored. When the instructions are executed on a computer, the computer executes the method provided in the first aspect.
[0050] In a sixth aspect, an embodiment of the present application provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the method provided in the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS
[0051] Figure 1 It is a communication schematic diagram of an SSD power consumption control solution provided in an embodiment of the present application;
[0052] Figure 2 It is a communication schematic diagram of another SSD power consumption control solution provided in an embodiment of the present application;
[0053] Figure 3 It is a schematic diagram of the architecture of a power consumption control system of a solid state drive provided in an embodiment of the present application;
[0054] Figure 4a It is a schematic diagram of the architecture of another power consumption control system of a solid state drive provided in an embodiment of the present application;
[0055] Figure 4b This is a schematic diagram of the architecture of another power consumption control system of a solid state drive provided in an embodiment of the present application.
[0056] Figure 5 It is a flowchart of a method for controlling power consumption of a solid state drive provided in an embodiment of the present application;
[0057] Figure 6 It is a communication schematic diagram of a method for controlling power consumption of a solid state drive provided in an embodiment of the present application;
[0058] Figure 7 is a structural schematic diagram of a solid state hard disk provided in an embodiment of the present application;
[0059] Figure 8 It is a flowchart of another method for controlling power consumption of a solid state drive provided in an embodiment of the present application;
[0060] Fig. 9 It is a structural schematic diagram of a power consumption control device of a solid state hard disk provided in an embodiment of the present application;
[0061] Fig.10 is a structural schematic diagram of a solid state hard disk provided in an embodiment of the present application;
[0062] Fig.11 It is a structural diagram of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0063] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings.
[0064] In the description of the embodiments of the present application, words such as "exemplary", "for example" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary", "for example" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary", "for example" or "for example" is intended to present related concepts in a concrete way.
[0065] In the description of the embodiments of the present application, the term "and / or" is merely a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, B exists alone, and A and B exist at the same time. In addition, unless otherwise specified, the term "multiple" means two or more. For example, multiple systems refers to two or more systems, and multiple terminals refers to two or more terminals.
[0066] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. The terms "include", "comprises", "has" and their variations all mean "including but not limited to", unless otherwise specifically emphasized.
[0067] With the rapid development of the Internet and cloud technology, data has exploded. Solid-state drives (SSDs) have been widely used in computing devices or high-performance storage systems due to their low read and write latency and high bandwidth.
[0068] In high-performance storage systems, such as cloud computing platforms, a large number of enterprises or individuals use cloud services, which leads to an increasing amount of data in the storage system of the cloud computing platform. The working frequency of the SSD is high, which leads to a rapid increase in the power consumption of the SSD, thereby increasing the power consumption of the cloud computing platform.
[0069] Currently, there are two ways to reduce SSD power consumption.
[0070] In one case, if Figure 1 As shown in FIG. 1 , when there is no IO service on the host side, the host sends a power-saving instruction to the SSD, so that the entire SSD enters a power-saving working mode. In this working mode, the SSD needs to shut down corresponding components, such as shutting down some physical links between the storage chip and the host, the power management unit (Power Management Unit, PMU) powers off the dynamic random access memory (Dynamic Random Access Memory, DRAM), and all the storage chips of the PMU. However, the SSD entering the power-saving working mode will affect the IO latency. For example, in the Non-Volatile Memory Express (NVMe) / PCIe framework, it takes microseconds to milliseconds for the SSD to enter or exit different levels of low-power modes, and the power-on initialization time of the DRAM and storage chips increases the latency of processing IO requests. In addition, in high-performance storage systems such as cloud computing platforms, since services need to be continuously provided to users, the host side needs to continuously have IO requests to interact with the SSD, resulting in a relatively small chance that the SSD enters a power-saving working mode.
[0071] In another case, if Figure 2 As shown in the figure, when there is IO service on the host side, the power consumption of the SSD can be reduced by reducing the operating frequency or voltage of the components in the SSD. However, the bandwidth of existing network services is volatile, and a large amount of IO load will fall on the storage chip in the SSD. Reducing the operating frequency or operating voltage of the SSD will cause the performance of the SSD to degrade, and then cause the IO latency of the SSD to increase when burst IO services occur.
[0072] Based on this, an embodiment of the present application proposes a power consumption control method for a solid-state drive. The method determines the timing of adjusting the SSD to enter a low power consumption mode by monitoring the parameter values of the target parameters of the SSD in real time. Among them, adjusting the SSD to enter a low power consumption mode includes adjusting the data in the SSD to be stored in the first storage chip, and all storage chips in the SSD except the first storage chip enter a state where IO data is not processed, thereby reducing the number of storage chips that process IO data, reducing the power consumption of the SSD, and avoiding increasing IO latency. This is just a brief description of the method. For details about the method, see the description below.
[0073] Next, a system for controlling the power consumption of a solid-state hard disk that may be applied to the power consumption control method of the solid-state hard disk provided in an embodiment of the present application is introduced. Figure 3 The embodiment of the present application provides a power consumption control method for a solid state drive, which can be applied to Figure 3 As shown in the system architecture diagram. Figure 3 As shown, the power consumption control system of the solid state drive includes a load monitoring module 301 , a power consumption management module 302 and a data layout module 303 .
[0074] The load monitoring module 301 is used to determine the parameter value of the target parameter of the SSD in real time. The target parameter can measure the current load of the SSD, that is, the amount of data processed by the SSD. For example, the target parameter can be a target parameter such as the bandwidth of the SSD in a continuous time, the amount of data in the SSD, the number of read and write operations performed by the SSD per second in a continuous time, etc.
[0075] The power management module 302 is used to determine whether the SSD enters the low power mode according to the parameter value of the target parameter. In the case that the SSD needs to enter the low power mode, an instruction is sent to the data layout module 303. After receiving the instruction, the data layout module 303 adjusts the layout of the storage chip of the data in the SSD to reduce the amount of data in the storage chip used to store data. At the same time, the power management module 302 also sends an instruction to the power management module to power off the storage chip that does not store data or enter the standby state.
[0076] In a possible implementation, the load monitoring module 301 , the power consumption management module 302 , and the data layout module 303 may be implemented by software.
[0077] In another possible implementation, in the embodiment of the present application, the load monitoring module 301, the power management module 302 and the data layout module 303 can be implemented by hardware. For example, the power management module 302 and the data layout module 303 can be implemented as a control circuit or a chip circuit.
[0078] There are many layout modes for the load monitoring module 301 , the power consumption management module 302 and the data layout module 303 .
[0079] For example, Figure 4a As shown, the load monitoring module 301 and the power consumption management module 302 are both deployed in the host 100 , and the data layout module is deployed in the control chip of the SSD 200 .
[0080] Another exemplary example is, Figure 4b As shown, the load monitoring module 301 , the power consumption management module 302 and the data layout module 303 are all deployed in the control chip in the SSD 200 .
[0081] The host 200 may be a computing device such as a computer or a server. In one example, the server involved in the present solution may be used to provide cloud services, which may be a server or a hyperterminal that can establish a communication connection with other devices and provide computing functions and / or storage functions for other devices. The server involved in the present solution may be a hardware server or may be embedded in a virtualized environment. For example, the server involved in the present solution may be a virtual machine executed on a hardware server including one or more other virtual machines.
[0082] The SSD 100 can be used as a data storage device of the host 200 to store relevant data of the host 200. Specifically, there is a communication link between the SSD 100 and the host 200. Through the communication link, the host 200 can send a data write instruction to the SSD 100, and the control chip 110 in the SSD 100 can respond to the data write instruction and perform a write operation to write relevant data into the storage chip through the write operation to achieve data preservation. Through the communication link, the host 200 can send a data read instruction to the SSD 100, and the control chip 110 in the SSD 100 can respond to the data read instruction and perform a read operation to read data from the storage medium 120, and send the read data to the host 200 through the communication link. Among them, the relevant functions of the control chip 110 may include a write operation, a read operation, a data receiving operation, a data sending operation, etc.
[0083] In some embodiments, the communication link between the host 200 and the SSD 100 may be a PCIe link.
[0084] like Figure 4a or Figure 4b As shown, the SSD includes multiple packages, 01 to 0n, each package includes multiple memory chips. The memory chips communicate with the host through data channels, and the data channels of the memory chips in the same package are the same.
[0085] In the embodiment of the present application, the load in the SSD is monitored by the load monitoring module, and the power management module determines whether the SSD enters the low power mode according to the load of the SSD. When the SSD needs to enter the low power mode, all the cached data in the SSD is adjusted to the first storage chip to reduce the number of storage chips used to process data, and all the second storage chips except the first storage chip enter a state of not processing IO data, and only the first storage chip processes IO data. In this way, the number of storage chips that process IO data is reduced, thereby reducing the power consumption of the SSD.
[0086] Next, a method for controlling power consumption of a solid state drive provided in an embodiment of the present application is introduced in detail.
[0087] Figure 5 is a flow chart of a method for controlling power consumption of a solid state drive provided in an embodiment of the present application. This embodiment can be applied to Figure 3 , Figure 4a or Figure 4b In the system shown. Figure 2 As shown, the power consumption control method of the solid state drive provided in the embodiment of the present application at least includes the following steps S501 and S502.
[0088] S501, determining a parameter value of a target parameter of an SSD, where the target parameter is used to measure the amount of data processed by the SSD, and the SSD includes a plurality of storage chips, and the plurality of storage chips are used to store data.
[0089] The target parameter of the SSD can measure the load of the SSD, that is, the amount of data processed by the SSD. The target parameter may be the bandwidth of the SSD in continuous time, the amount of data in the SSD, the number of read and write operations performed by the SSD per second in continuous time, etc.
[0090] The SSD includes multiple storage chips, and the storage chips are used to store data. Figure 6 As shown, the SSD includes 4 packages, namely 01 to 04, each package includes m memory chips. Before the SSD enters the low power mode, the memory chips used to store data are all memory chips in packages 01, 02, 03 and 04.
[0091] For example, Figure 6 As shown, the load monitoring module in the control chip in the SSD can monitor the load of the SSD. For example, the load monitoring module monitors the bandwidth of the SSD in a continuous time, the amount of data in the SSD, or the number of read and write operations performed by the SSD per second in a continuous time.
[0092] Here, the bandwidth of the SSD can be the bandwidth for writing data or the bandwidth for reading data.
[0093] S502, when the parameter value of the target parameter is lower than the preset parameter threshold, adjusting the SSD to enter the low power consumption mode, wherein adjusting the SSD to enter the low power consumption mode includes: adjusting data to the first storage chip, and controlling the second storage chip to enter the target state, wherein the multiple storage chips include the first storage chip, the second storage chip is a storage chip that does not store data among the multiple storage chips, and the target state is a state where IO data processing is not performed; during the period when the SSD enters the low power consumption mode, the first storage chip is used to process IO data.
[0094] Low power consumption mode refers to a mode in which the power consumption of the SSD is reduced when processing the same amount of data.
[0095] The preset parameter threshold is pre-configured into the SSD. It is understandable that the preset parameter threshold can be changed according to the actual situation. Different target parameters have different parameter thresholds. For example, if the target parameter is the bandwidth of the SSD in a continuous time, then the parameter threshold is 30% of the standard value of the bandwidth. The standard value of the bandwidth is a performance parameter of the SSD and is not specifically limited. If the target parameter is the amount of data in the SSD, then the parameter threshold is 50% of the capacity of the SSD. Here, the above is only used as an example to illustrate the parameter threshold.
[0096] When the target parameter is lower than a preset parameter threshold, the SSD enters a low power consumption mode to operate.
[0097] In a possible implementation, a target parameter may be used to determine when the SSD enters the low power mode. For example, when the bandwidth of the SSD is lower than 40% of the standard value of the bandwidth in a continuous period of time, the SSD is adjusted to enter the low power mode. For another example, when the amount of data in the SSD is lower than 50% of the capacity of the SSD, the SSD is adjusted to enter the low power mode.
[0098] In another possible implementation, the timing of the SSD entering the low power mode may be determined by multiple target parameters. For example, when the bandwidth of the SSD is lower than 40% of the standard value of the bandwidth in a continuous period of time and the amount of data in the SSD is lower than 50% of the capacity of the SSD, the SSD is adjusted to enter the low power mode.
[0099] In an embodiment of the present application, adjusting the SSD to enter a low power mode includes adjusting the layout of data in the SSD to reduce the number of storage chips used to store data. Specifically, adjusting the SSD to enter a low power mode includes storing all data in the SSD in a first storage chip. It is understandable that there is at least one first storage chip. During the process of the SSD operating in a low power mode, the chip storing data is the first storage chip, and the chip not storing data is the second storage chip. The first storage chip is used to process IO data. The second storage chip is in a state where no data processing is performed, such as a sleep state, a power-off state, etc.
[0100] For example, Figure 6 As shown, before entering the low power mode, the storage chips used to store data are all the storage chips in package 01 to package 04. However, the capacity of all the storage chips in package 01 to package 04 is 1024G, while the amount of all the data in the SSD is 408G. Therefore, it is necessary to adjust the SSD to enter the low power mode. Among them, all the data in the SSD are adjusted to the storage chips in package 01 and package 02, and the storage chips in package 03 and package 04 do not store data. In other words, when the SSD enters the low power mode, the storage chips in package 01 and package 02 are the first storage chips, and the storage chips in package 03 and package 04 are the second storage chips. In this way, when the SSD enters the low power mode, IO data is processed only by the storage chips in package 01 and package 02, and package 03 and package 04 enter the sleep state or power-off state.
[0101] Here, Figure 4a Based on the adjustment instruction of the power consumption management module, the PMU can control the second storage chip in the SSD to sleep or power off the second storage chip. Figure 7 As shown, there is a power line 71 and a signal line 72 between the PMU and the storage chip. The PMU supplies power to the storage chip through the power line, and the PMU controls the storage chip through the signal line. As a possible implementation, when the SSD enters the low power mode, the PMU can power off the second storage chip, or the PMU sends a high-level sleep signal to the second storage chip to put the second storage chip into a sleep state. For example, Figure 6 As shown, the power consumption management module sends an adjustment instruction to the PMU, wherein the adjustment instruction includes the identifier of the second storage chip. According to the adjustment instruction, the PMU sends a sleep signal to the storage chip in package 03 and the storage chip in package 04, so that the storage chip in package 03 and the storage chip in package 04 enter a sleep state. Here, controlling the second storage chip to enter a sleep state by a sleep signal is only a possible implementation method, and this embodiment of the present application does not specifically limit this.
[0102] The identifier of the storage chip may be a physical address of the storage chip in the SSD, etc., which is not specifically limited.
[0103] It should be noted that Figure 6 The signal lines in the figure are for illustration only, and the connection method between the signal lines and each memory chip shall be subject to the actual situation.
[0104] In S502, adjusting the SSD to enter the low power consumption mode includes determining a first memory chip. In some embodiments, the first memory chip may be determined from a plurality of memory chips according to the reliability of the memory chip.
[0105] As a possible implementation, the reliability of the memory chip is determined by calculating the remaining service life of each memory chip. Exemplarily, the remaining service life of each memory chip is determined. The service life of the package is calculated, wherein the service life of the package is the average of the remaining service lives of all memory chips in the package. The service life of each package is compared. The greater the service life of the package, the higher the reliability of the memory chip in the package. A first package is determined from a plurality of packages by a top K algorithm, wherein the memory chip in the first package is the first memory chip.
[0106] As another possible implementation, the reliability of the memory chip is determined by the number of errors of the memory chip. Exemplarily, the number of errors of each memory chip is determined. The number of errors of the package is calculated, wherein the number of errors of the package is the average number of errors of all memory chips in the package. The number of errors of each package is compared, and the fewer the number of errors of the package, the higher the reliability of the memory chip in the package. The first package is determined from the multiple packages by the topk algorithm, wherein the memory chip in the first package is the first memory chip.
[0107] As a possible implementation, the reliability of the memory chip is determined by the number of error recovery of the memory chip. Exemplarily, the number of error recovery of each memory chip is determined. The number of error recovery of the package is calculated, wherein the number of error recovery of the package is the average number of error recovery of all memory chips in the package. The number of error recovery of each package is compared. The larger the number of error recovery of the package, the higher the reliability of the memory chip in the package. The first package is determined from the plurality of packages by the top K algorithm, wherein the memory chip in the first package is the first memory chip.
[0108] After determining the first storage chip, the data in the second storage chip is written into the first storage chip. After determining the first storage chip, the power management module sends an adjustment instruction to the data layout module, wherein the adjustment instruction includes the identity of the first storage chip and the identity of the second storage chip. According to the adjustment instruction, the data layout management module sends a read instruction to the second storage chip to read out the data in the second storage chip, and sends a write instruction to the first storage chip to write the read data into the first storage chip. For example, Figure 6 As shown, the data layout module sends a read instruction to the memory chip in package 03 and the memory chip in package 04 to read out the data stored in the memory chip in package 03 and the data stored in the memory chip in package 04. And sends a write instruction to the memory chip in package 01 and the memory chip in package 02 to write the read data into the memory chip in package 01 and the memory chip in package 02.
[0109] Next, the power management module sends an adjustment instruction to the PMU, which carries the identity of the second storage chip. The PMU sends a sleep signal to the second storage chip or powers off the second storage chip according to the adjustment instruction. Figure 6 As shown, the power management module sends an adjustment instruction to the PMU, and the adjustment instruction includes the identity identifiers of all memory chips in package 03 (i.e., 031 to 03m) and the identity identifiers of all memory chips in package 04 (041 to 04m). According to the adjustment instruction, the PMU sends a sleep signal to memory chips 031 to 03m and sends a sleep signal to memory chips 041 to 04m, so that memory chips 031 to 03m and memory chips 041 to 04m enter a standby state.
[0110] According to the embodiment of the present application, Figure 4b Based on this, taking the target parameter being the write bandwidth of the SSD within T consecutive seconds as an example, the power consumption control method of the solid state drive SSD provided in the embodiment of the present application is exemplarily described.
[0111] Figure 8 FIG. 1 is a flow chart of a method for controlling power consumption of a solid state drive (SSD) provided in an embodiment of the present application. Figure 8 As shown, the power consumption control method of the solid state drive SSD provided in the embodiment of the present application includes steps S801 to S814.
[0112] S801, the host monitors the write bandwidth tBW of the SSD in real time.
[0113] S802, the host determines whether the write bandwidth tBW of the SSD within T consecutive seconds is less than 30% of the standard value tBW_0 of the write bandwidth. If yes, execute S803. If no, execute S810.
[0114] S803, the host sends an instruction to the control chip in the SSD to enter a low power consumption mode.
[0115] The write bandwidth can measure the load of the SSD. When the load of the SSD is low, the SSD can enter the low power mode. The low power mode can be described in detail in S501 and will not be described here. When tBM<0.3*tBW_0 for T consecutive seconds, the host sends a command to the control chip of the SSD to enter the low power mode.
[0116] S804, the control chip determines that the SSD is in low power consumption mode. If yes, execute S808. If no, execute S805.
[0117] S805: The control chip determines a first storage chip and a second storage chip.
[0118] The specific process may refer to the specific implementation method of determining the first storage chip in S502, which will not be described in detail here.
[0119] S806, the control chip writes the data in the second storage chip into the first storage chip.
[0120] S807, the control chip sends an adjustment instruction to the PMU, where the adjustment instruction includes the identity of the second storage chip.
[0121] S808: The PMU sends a sleep signal to the second storage chip to put the second storage chip into a sleep state.
[0122] S809: The host sends an IO data request to the SSD according to the bandwidth limit corresponding to the low power consumption mode.
[0123] S810, the host sends an instruction to the control chip in the SSD to enter a normal working mode.
[0124] S811, the control chip determines that the SSD is in a normal working mode. If yes, execute S814, if not, execute S812.
[0125] S812, the control chip sends a power supply instruction to the PMU.
[0126] S813, the PMU supplies power to all storage chips in the SSD.
[0127] S814, the control chip receives the IO data request sent by the host.
[0128] By monitoring the amount of data processed by the SSD, the timing when the SSD needs to enter the low power mode is determined. The SSD entering the low power mode includes adjusting all the data cached in the SSD to the first storage chip to reduce the number of storage chips used to process data, and all second storage chips except the first storage chip enter a state of not processing IO data, and only process IO data through the first storage chip. In this way, the number of storage chips that process IO data is reduced, thereby reducing the power consumption of the SSD.
[0129] Based on the same concept as the embodiment of the method of the present application, the embodiment of the present application also provides a power consumption control device for a solid state drive SSD. The power consumption control device for a solid state drive SSD includes several modules, each of which is used to execute each step in the personal information identification method provided in the embodiment of the present application, and the division of the modules is not limited here. The technicians in the relevant field can clearly understand that in practical applications, the various steps in the power consumption control method for the solid state drive SSD provided in the embodiment of the present application can be assigned to different modules as needed, that is, the internal structure of the device is divided into different modules to complete all or part of the functions described above. Each module in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more modules can be integrated in one unit, and the above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit. In addition, the specific names of each module are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present application. The specific working process of the module in the above-mentioned device can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.
[0130] For example, the power consumption control device of the solid state drive SSD is used to execute the power consumption control method of the solid state drive SSD provided in the embodiment of the present application. Fig. 9 Schematic diagram of the structure of the power consumption control device of the solid state drive SSD provided in the embodiment of the present application. Fig. 9 As shown, the power consumption control device of the solid state drive SSD provided in the embodiment of the present application includes: a determination module 901 and an adjustment module 902.
[0131] A determination module 901 is used to determine a parameter value of a target parameter of the SSD, where the target parameter is used to measure the amount of data processed by the SSD, and the SSD includes a plurality of storage chips, and the plurality of storage chips are used to store data;
[0132] The adjustment module 902 is used to adjust the SSD to enter a low power consumption mode when the parameter value of the target parameter is lower than a preset parameter threshold value, and the adjustment of the SSD to enter the low power consumption mode includes: adjusting data to a first storage chip, and controlling a second storage chip to enter a target state, wherein the plurality of storage chips include the first storage chip, the second storage chip is a storage chip in which no data is stored in the plurality of storage chips, and the target state is a state in which IO data processing is not performed;
[0133] When the SSD enters the low power consumption mode, the first storage chip is used to process IO data.
[0134] In a possible implementation, the adjustment module is used to:
[0135] determining reliability of each memory chip in the plurality of memory chips;
[0136] Determining a first memory chip from a plurality of memory chips according to the reliability of each memory chip;
[0137] The data is adjusted into the first memory chip.
[0138] In this way, determining the storage chip used for processing data based on the reliability of the storage chip can improve the efficiency of processing IO data and reduce the power consumption of the SSD.
[0139] In a possible implementation, the SSD includes multiple packages, each of the multiple packages includes at least one storage chip, and the adjustment module is used to:
[0140] Calculate the service life of each package, which is the average of the remaining service life of all memory chips in the package;
[0141] According to the service life of each package, a first package is determined from multiple packages, and the memory chip in the first package is the first memory chip.
[0142] In this way, the efficiency of processing IO data can be improved, and at the same time, the power consumption of the SSD can be reduced.
[0143] In a possible implementation, the adjustment module is used to determine the reliability of the storage chip according to the number of errors of the storage chip or the number of bit error recovery of the storage chip.
[0144] In this way, by determining the reliability of the storage chip, a storage chip with higher reliability is selected to process IO data, which can improve the efficiency of processing IO data and reduce the power consumption of the SSD.
[0145] In a possible implementation, the adjustment module is used to stop supplying power to all memory chips in a second package, where the second package is a package among multiple packages except the first package, the memory chip in the second package is a second memory chip, and the first package is the package where the first memory chip is located.
[0146] In a possible implementation, the target state includes a standby state or a power-off state.
[0147] In a possible implementation, the target parameter includes at least one of the following items: the bandwidth of the SSD in a continuous time, the amount of data in the SSD, and the number of read and write operations performed by the SSD per second in a continuous time.
[0148] By monitoring the amount of data processed by the SSD, the timing when the SSD needs to enter the low power mode is determined. The SSD entering the low power mode includes adjusting all the data cached in the SSD to the first storage chip to reduce the number of storage chips used to process data, and all second storage chips except the first storage chip enter a state of not processing IO data, and only process IO data through the first storage chip. In this way, the number of storage chips that process IO data is reduced, thereby reducing the power consumption of the SSD.
[0149] The present application embodiment also provides a solid state drive 1000. Fig.10 As shown, the solid state drive 1000 includes a control chip 1001 and a storage medium 1002. The storage medium 1002 refers to the storage chip mentioned above.
[0150] Fig.11 It is a structural diagram of a computing device provided in an embodiment of the present application.
[0151] like Fig.11 As shown, computing device 1100 includes a processor 1101 , a memory 1102 , and a communication interface 1103 .
[0152] In some embodiments, the processor 1101 may be a CPU in a host, and the memory 1102 may be an SSD. In other embodiments, the processor 1101 may be a control chip in an SSD, and the memory may be a storage chip in an SSD.
[0153] The processor 1101 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc.
[0154] Among them, the non-volatile memory can be a read-only memory (ROM), a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable programmable read-only memory (EEPROM) or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous connection dynamic random access memory (SLDRAM) and direct memory bus random access memory (DR RAM).
[0155] For example, a computer program may be stored in the memory 1102, and the processor 1101 implements the steps in the above method embodiment when executing the computer program. Alternatively, the processor 1101 implements the functions of each module in the above device embodiment when executing the computer program. For example, the computer program may be divided into one or more modules / units, and the one or more modules / units may be a series of computer program instruction segments that can perform specific functions. The one or more modules / units are stored in the memory 1102 and executed by the processor 1101 to complete the present application. For example, a computer program may be divided into multiple modules, such as the modules in the device described above.
[0156] The communication interface 1103 is used to send and receive data, for example, to send data processed by the processor 1101 to other computing devices, or to receive data sent by other computing devices.
[0157] Of course, to simplify, Fig.11 Only some of the components of the computing device 1100 related to the present application are shown, and components such as buses, input / output interfaces, etc. are omitted. In addition, according to specific application situations, the computing device 1100 may also include any other appropriate components. In addition, the computing device may be a desktop computer, a notebook, a handheld computer, a cloud server, and other computing devices. Those skilled in the art will understand that Fig.11 This is only an example of the computing device 1100 and does not constitute a limitation of the computing device. The computing device may include more or fewer components than shown in the figure, or may combine certain components, or may have different components. For example, the computing device may also include an input device, an output device, a network access device, a bus, etc. By way of example, the input device may be a microphone array, and may also include, for example, a keyboard, a mouse, etc. By way of example, the output device may output various information to the outside, and may include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, etc.
[0158] In addition to the above methods, apparatuses and computing devices, embodiments of the present application may also provide a computer program product, which includes computer program instructions, which, when executed by a processor, cause the processor to execute the steps in the methods of various embodiments of the present application described in the above "Method" section of this specification. Wherein, the computer program product can be written in any combination of one or more programming languages to perform computer program code for performing the operation of the embodiments of the present application, and the programming language includes an object-oriented programming language, such as Java, C++, etc., and also includes a conventional procedural programming language, such as "C" language or similar programming language. Wherein, the computer program code can be in source code form, object code form, executable file or some intermediate form, etc. The computer program code can be executed completely on the user computing device, partially on the user device, as an independent software package, partially on the user computing device, partially on the remote computing device, or completely on the remote computing device or server.
[0159] In addition, the embodiment of the present application may also provide a computer-readable storage medium on which computer program instructions are stored, and the computer program instructions, when executed by the processor, cause the processor to perform the steps in the display control method according to various embodiments of the present application described in the "Method" section of the present specification. The computer-readable storage medium may adopt any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may, for example, include but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or devices, or any combination of the above. More specific examples of readable storage media (non-exhaustive list) include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. It should be noted that the content contained in the computer-readable medium may be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.
[0160] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted through the computer-readable storage medium. The computer instructions can be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integration. The available medium can be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk), etc.
[0161] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0162] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.
[0163] The basic principles of the present application are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present application are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present application. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, not for limitation, and the above details do not limit the present application to being implemented by adopting the above specific details.
[0164] The block diagrams of the devices, apparatuses, equipment, and systems involved in this application are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagram. As will be appreciated by those skilled in the art, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open words, referring to "including but not limited to", and can be used interchangeably with them. The words "or" and "and" used here refer to the words "and / or" and can be used interchangeably with them, unless the context clearly indicates otherwise. The words "such as" used here refer to the phrase "such as but not limited to", and can be used interchangeably with them.
[0165] It should also be noted that in the apparatus, device and method of the present application, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present application.
[0166] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present application to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.
[0167] It should be understood that the various numerical numbers involved in the embodiments of the present application are only used for the convenience of description and are not used to limit the scope of the embodiments of the present application.
Claims
1. A method for controlling power consumption of a solid state drive (SSD), characterized in that: include: Determine a parameter value of a target parameter of an SSD, wherein the target parameter is used to measure the amount of data processed by the SSD, wherein the SSD includes a plurality of storage chips, and the plurality of storage chips are used to store data; When the parameter value of the target parameter is lower than a preset parameter threshold, adjusting the SSD to enter a low power consumption mode, wherein adjusting the SSD to enter a low power consumption mode includes: adjusting the data to a first storage chip, and controlling a second storage chip to enter a target state, wherein the plurality of storage chips include the first storage chip, the second storage chip is a storage chip in the plurality of storage chips that does not store the data, and the target state is a state in which IO data processing is not performed; When the SSD enters the low power consumption mode, the first storage chip is used to process IO data.
2. The method according to claim 1, characterized in that The step of adjusting the data to the first storage chip includes: determining the reliability of each memory chip in the plurality of memory chips; Determining the first memory chip from the plurality of memory chips according to the reliability of each memory chip; The data is adjusted into the first memory chip.
3. The method according to claim 2, characterized in that The SSD includes a plurality of packages, each of the plurality of packages includes at least one memory chip, and determining the reliability of each of the plurality of memory chips includes: Calculating the service life of each package, where the service life is the average value of the remaining service lives of all memory chips in the package; The step of determining the first storage chip from the plurality of storage chips according to the reliability of each storage chip comprises: A first package is determined from the multiple packages according to the service life of each package, and the memory chip in the first package is the first memory chip.
4. The method according to claim 2, characterized in that: The determining the reliability of each memory chip in the plurality of memory chips comprises: The reliability of the storage chip is determined according to the number of errors of the storage chip or the number of bit error recovery of the storage chip.
5. The method according to any one of claims 1 to 4, characterized in that: The target state includes a standby state or a power-off state.
6. The method according to any one of claims 1 to 4, characterized in that: The target parameter includes at least one of the following items: the bandwidth of the SSD in a continuous time, the amount of data in the SSD, and the number of read and write operations performed by the SSD per second in a continuous time.
7. A power consumption control device for a solid state hard disk, characterized in that: include: A determination module, used to determine a parameter value of a target parameter of the SSD, wherein the target parameter is used to measure the amount of data processed by the SSD, wherein the SSD includes a plurality of storage chips, and the plurality of storage chips are used to store data; an adjustment module, configured to adjust the SSD to enter a low power consumption mode when the parameter value of the target parameter is lower than a preset parameter threshold, wherein the adjustment of the SSD to enter a low power consumption mode comprises: adjusting the data to a first storage chip, and controlling a second storage chip to enter a target state, wherein the plurality of storage chips comprises the first storage chip, the second storage chip is a storage chip in the plurality of storage chips that does not store the data, and the target state is a state in which IO data processing is not performed; When the SSD enters the low power consumption mode, the first storage chip is used to process IO data.
8. The device according to claim 7, characterized in that The adjustment module is used for: determining the reliability of each memory chip in the plurality of memory chips; Determining the first memory chip from the plurality of memory chips according to the reliability of each memory chip; The data is adjusted into the first memory chip.
9. The device according to claim 8, characterized in that The SSD includes a plurality of packages, each of the plurality of packages includes at least one storage chip, and the adjustment module is used for: Calculating the service life of each package, where the service life is the average value of the remaining service lives of all memory chips in the package; A first package is determined from the multiple packages according to the service life of each package, and the memory chip in the first package is the first memory chip.
10. The device according to claim 8, characterized in that The adjustment module is used to determine the reliability of the storage chip according to the number of errors of the storage chip or the number of bit error recovery of the storage chip.
11. The device according to any one of claims 7 to 10, characterized in that: The target state includes a standby state or a power-off state.
12. The device according to any one of claims 7 to 10, characterized in that: The target parameter includes at least one of the following items: the bandwidth of the SSD in a continuous time, the amount of data in the SSD, and the number of read and write operations performed by the SSD per second in a continuous time.
13. A power consumption control device for a solid state hard disk, characterized in that: include: at least one memory for storing a program; At least one processor is used to execute the program stored in the memory. When the program stored in the memory is executed, the processor is used to execute the method according to any one of claims 1 to 6.
14. A power consumption control device for a solid state hard disk, characterized in that: The device runs computer program instructions to perform the method according to any one of claims 1-7.
15. A computer storage medium, wherein instructions are stored in the computer storage medium, and when the instructions are executed on a computer, the computer executes the method according to any one of claims 1 to 6.
16. A computer program product comprising instructions, which, when executed on a computer, causes the computer to execute the method according to any one of claims 1 to 6.