Semiconductor packaging mold, semiconductor circuit and semiconductor circuit manufacturing method

By using tweezer pins and pin moving space in semiconductor packaging molds, the overflow and insulating layer cracks caused by substrate-mold tolerance are solved, and the integration of stress-free packaging and bimetallic substrate is achieved.

CN119673785APending Publication Date: 2025-03-21HEILONGJIANG HUIXIN SEMICONDUCTOR CO LTD
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Patent Information

Application Number
CN202411684380.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-22
Publication Date
2025-03-21

AI Technical Summary

Technical Problem

In semiconductor packaging, the thickness tolerance between the substrate and the mold leads to overflow problems, and the thimble solution will cause stress on the substrate and cause cracks in the insulating layer.

Method used

A semiconductor packaging mold is designed, including upper and lower molds, and the two metal substrates are tightly connected by tweezing pins, and pin moving space is provided in the mold to absorb tolerances and avoid stress generation.

Benefits of technology

Effectively prevent semiconductor circuit from overflowing glue, avoid layering of insulation layers, and at the same time realize the integration of bimetallic substrates.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of semiconductors, and discloses a semiconductor packaging mold, a semiconductor circuit and a semiconductor circuit manufacturing method. The two metal substrates are electrically connected through the tweezer type pins and integrated into the packaging structure, the two metal substrates can be tightly attached to a mold through the elastic force of the tweezer type pins, glue overflowing of a semiconductor circuit can be prevented, a pin moving space is formed in the mold, and the packaging structure is more compact. The total tolerance obtained after superposition of the tolerance of the substrate, the welding tolerance of the pins and the tolerance of the die is absorbed, so that it is guaranteed that no stress is generated between the substrate and the pins, and layering of the insulating layer caused by stress is avoided; by means of the mode, glue overflowing of the semiconductor circuit is effectively prevented, layering of the insulating layer can be avoided, and integration of the double-metal substrate is achieved on the basis.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor packaging mold, a semiconductor circuit and a method for manufacturing a semiconductor circuit. Background Art

[0002] Semiconductor packaging requires the substrate to fit tightly with the mold, but the substrate has a thickness tolerance of ±10%. Such a large tolerance makes it impossible for the substrate and the mold to achieve precise matching. When injecting material into the mold cavity, the plastic encapsulation material easily enters the gap between the substrate and the mold, causing overflow in the semi-encapsulated semiconductor circuit. At present, the main solution for preventing overflow of semi-encapsulated semiconductor circuits at home and abroad is the ejector solution. An ejector is set in the mold cavity, and the substrate is pressed by the ejector to make it tightly attached to the cavity surface; however, the ejector will generate additional stress on the substrate, making the insulating layer on the substrate prone to cracks and delamination.

[0003] Therefore, there is a need for a semiconductor circuit and a manufacturing method thereof that can solve the problem of insulating layer delamination and no glue overflow. Summary of the invention

[0004] The present invention aims to improve at least one technical problem in the background technology.

[0005] A first aspect of the present invention provides a semiconductor packaging mold, comprising an upper mold and a lower mold, wherein the upper mold is provided with a first groove for mounting a metal substrate and a third groove for placing a pin; and the lower mold is provided with a second groove for mounting a metal substrate and a fourth groove for placing a pin;

[0006] When the upper mold and the lower mold are matched, the first groove and the second groove together form a main mold cavity, and the third groove and the fourth groove together form a pin movable space; the main mold cavity and the pin movable space are connected to each other;

[0007] A fixed block is horizontally arranged in the pin movable space, and the fixed block divides the pin movable space into two parts, an upper part and an lower part; a mounting groove is vertically opened on the fixed block, and the mounting groove completely passes through the fixed block; a first movable block, a second movable block and a reset spring are arranged in the mounting groove; the first movable block and the second movable block are arranged up and down, the first movable block and the second movable block are slidably connected with the mounting groove, the first movable block and the second movable block slide up and down along the mounting groove, and the reset spring is connected between the first movable block and the second movable block to provide upward and downward elastic force for the first movable block and the second movable block; the side wall of the mounting groove at least partially covers the side surfaces of the first movable block and the second movable block.

[0008] The beneficial effects of the embodiments of the first aspect of the present invention are as follows: two metal substrates are electrically connected using tweezer-type pins and integrated into a packaging structure, and the elastic force of the tweezer-type pins is used to make the two metal substrates close to the mold, which can prevent the semiconductor circuit from overflowing with glue, and a pin movable space is provided in the mold to absorb the total tolerance of the substrate tolerance, the pin welding tolerance and the mold tolerance after superposition, thereby ensuring that no stress is generated between the substrate and the pin, and the insulating layer will not be delaminated due to stress; the present invention can effectively prevent the semiconductor circuit from overflowing with glue and avoid delamination of the insulating layer in the above manner, and on this basis, realize the integration of dual metal substrates.

[0009] As some sub-schemes of the above technical scheme, a first limit block and a second limit block are respectively provided at the upper and lower ends of the mounting groove; a first protrusion is provided on the first movable block, and when the first movable block is pushed upward to the highest point by the return spring, the bottom surface of the first limit block abuts against the top surface of the first protrusion; a second protrusion is also provided on the second movable block, and when the second movable block is pushed downward to the lowest point by the return spring, the top surface of the second limit block abuts against the bottom surface of the second protrusion.

[0010] A second aspect of the present invention provides a semiconductor circuit manufactured using the semiconductor packaging mold described in the above embodiment, the semiconductor circuit comprising: two metal substrates, tweezer pins connected between the two metal substrates, a plurality of ordinary pins, and a plastic packaging material wrapping the two metal substrates;

[0011] The two metal substrates are symmetrically arranged up and down; one end of all the common pins is connected to the metal substrate, and the other end of all the common pins extends outward;

[0012] The tweezer pin is bent into two symmetrical sections at its middle position to form two pin tips and a pin middle end connected to the pin tips, and the two pin tips are respectively connected to two metal substrates; the two metal substrates are electrically connected through the tweezer pin;

[0013] The plastic encapsulation material is filled between the two metal substrates and completely wraps the tweezer pins;

[0014] The molding compound seals at least the connection portion between the common pin and the metal substrate, and the portion of the common pin extending outward is not sealed by the molding compound.

[0015] The semiconductor circuit according to the second aspect of the present invention also has corresponding beneficial effects because it includes the semiconductor packaging mold of the above technical solution.

[0016] As some sub-solutions of the above technical solution, the semiconductor circuit also includes multiple components, chip capacitors and chip resistors; the chip capacitors, the chip resistors and all the components are mounted on the metal substrate.

[0017] As some sub-solutions of the above technical solution, the components are electrically connected through metal wires.

[0018] As some sub-solutions of the above technical solution, both the ordinary pins and the tweezer pins are electrically connected to the metal substrate through pin solder.

[0019] As some sub-solutions of the above technical solution, the metal substrate includes a base material layer, an insulating layer covering the base material layer, a copper foil layer covering the insulating layer, and a protective layer covering the copper foil layer.

[0020] As some sub-solutions of the above technical solution, the substrate layer is a curved surface structure.

[0021] As some sub-solutions of the above technical solution, the circuit wiring layer is formed by etching the copper foil layer.

[0022] A third aspect of the present invention provides a method for manufacturing a semiconductor circuit, the method comprising the following steps:

[0023] Place two metal substrate finished products on a special carrier by automated equipment or manually;

[0024] The semiconductor inverter circuit chip is mounted on the component installation position reserved on the finished copper foil circuit layer of the substrate by brushing solder paste or dispensing silver glue through an automatic die bonding device;

[0025] The high-voltage power device is mounted on the silver-plated copper heat sink through a soft solder die bonding machine to form a semi-finished component.

[0026] Use automatic SMT equipment to mount resistors, capacitors, and components to the mounting positions on the metal substrate;

[0027] Place ordinary pins on the soldering positions of the metal substrate by a robot or manually, place the two ends of the tweezer pins on the soldering positions of the two metal substrates respectively, put the metal substrate and the special carrier through the reflow oven together, and solder all the components and pins on the metal substrate;

[0028] The welding quality of components is inspected by visual inspection AOI equipment, and foreign matters such as flux and aluminum chips remaining on the metal substrate are removed by spraying, ultrasonic cleaning or the like;

[0029] By installing metal wires, electrical connections are formed between components and circuit wiring on the metal substrate;

[0030] The metal substrate is plastic-sealed in a specific mold by packaging equipment;

[0031] Marking of products by laser marking;

[0032] Post-curing stress relief treatment of the product through a high-temperature oven;

[0033] The connecting ribs and dummy pins of the pins are cut off and shaped into the required shapes through the rib cutting and forming equipment; finally, the electrical parameter test is carried out to form the final qualified product.

[0034] The semiconductor circuit manufacturing method according to the third aspect of the embodiment of the present invention also has corresponding beneficial effects because it includes the semiconductor packaging mold of the above technical solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0036] Figure 1 A schematic diagram of the structure of the semiconductor packaging mold provided by the present invention when packaging a semiconductor circuit;

[0037] Figure 2 It is a structural schematic diagram of a semiconductor packaging mold;

[0038] Figure 3 It is a schematic diagram of the structure within the pin activity space;

[0039] Figure 4 It is a schematic diagram of the structure of a semiconductor circuit;

[0040] Figure 5 It is a schematic diagram of a structure in which a gap contact appears in a semiconductor structure in the prior art;

[0041] Figure 6 A schematic diagram of a structure in which a semiconductor structure has contact in the prior art;

[0042] Figure 7 It is a schematic diagram of a structure in which a normal gap contact occurs in a semiconductor structure in the prior art.

[0043] In the attached figure:

[0044] 1-upper die; 11-first groove; 12-third groove;

[0045] 2-lower die; 21-second groove; 22-fourth groove;

[0046] 3- Main mold cavity;

[0047] 4-pin active space;

[0048] 5-fixed block; 51-installation slot; 511-first limit block; 512-second limit block; 52-first movable block; 521-first convex block; 53-second movable block; 531-second convex block; 54-reset spring;

[0049] 6-metal substrate; 61-base material layer; 62-insulating layer; 63-copper foil layer; 64-protective layer; 65-chip capacitor; 66-chip resistor; 67-components; 68-metal wire;

[0050] 7-ordinary pin; 71-tweezer pin;

[0051] 8- plastic packaging material;

[0052] 9- Crack. DETAILED DESCRIPTION

[0053] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0054] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0055] In the description of the present invention, the meaning of "several" is an indefinite quantity, the meaning of "multiple" is more than two, "greater than", "less than", "exceed", etc. are understood as not including the number itself, and "above", "below", "within", etc. are understood as including the number itself. If there is a description of the first and the second, it is only for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features. The "and / or" that appears in the full text represents three parallel solutions. For example, A and / or B represents the solution satisfied by A, the solution satisfied by B, or the solution satisfied by both A and B.

[0056] In the description of the present invention, if there is a short sentence containing multiple parallel features, the attributive defines the closest feature, for example: B, C, and E connected to D are arranged on A, which means that B is arranged on A and E is connected to D, and does not constitute a limitation on C; but attributives that indicate the relationship between features, such as "interval arrangement" or "circular arrangement", do not belong to this category. If the word "all" is preceded by an attributive, it means that all features in the short sentence are limited, such as B, C, and D are all arranged on A, which means that B, C, and D are all arranged on A. For a sentence with an omitted subject, the omitted subject is the subject of the previous sentence, that is, B is arranged on A, including C, which means that B is arranged on A and A includes C.

[0057] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific content of the technical solution.

[0058] Combine the following Figures 1 to 7 Embodiments of the present invention are described.

[0059] Reference Figures 5 to 7 As shown, when the ordinary pin 7 is welded on the metal substrate 6, due to the three tolerances of the metal substrate 6, the pin welding tolerance and the mold tolerance, the surface of the metal substrate 6 and the cavity surface cannot be properly fitted, resulting in three situations: gap contact, over-contact and normal contact:

[0060] Gap contact: Figure 5 As shown, when the assembly tolerance of the common pin 7 and the metal substrate 6 is less than the depth of the main mold cavity 3, there will be a gap between the metal substrate 6 and the inner surface of the main mold cavity 3, forming a gap contact; the plastic encapsulation material 8 will soften at a temperature of 180°C, and the plastic encapsulation material 8 will be injected into the main mold cavity 3 by the injection pressure of the equipment. The plastic encapsulation material 8 will also enter the gap between the main mold cavity 3 and the metal substrate 6 under the injection pressure, resulting in glue overflow; and the solution to glue overflow is to eliminate the gap between the metal substrate 6 and the main mold cavity 3, and to apply a force to the metal substrate 6 to make it close to the inner surface of the main mold cavity 3, because the insulating layer 62 in the metal substrate is very fragile at high temperature, and once an external force is generated, a crack 9 will be generated, and the crack 9 appears at the end of the common pin 7;

[0061] Over contact: Figure 6 As shown, when the assembly tolerance of the common pin 7 and the metal substrate 6 is greater than the depth of the main mold cavity 3, over-contact is formed; when the mold is closed, an extrusion force will appear between the common pin 7 and the metal substrate 6. Under the action of this extrusion external force, cracks 9 will also appear in the insulating layer 62, and the cracks 9 appear at the tail of the common pin 7;

[0062] Normal contact: Figure 7As shown, the assembly tolerance of the common pin 7 and the metal substrate 6 is equal to the depth of the main mold cavity 3. At this time, it is normal contact, and the metal substrate 6 fits tightly with the surface of the main mold cavity 3. During the mold closing process, no force will be generated between the common pin 7 and the metal substrate 6. In this case, there will be no glue overflow and no delamination, which is the best state.

[0063] However, there will always be more or less tolerances in the actual production process; in order to solve these tolerances, the present invention provides a semiconductor packaging mold and a semiconductor circuit made using the semiconductor packaging mold to solve the problem of delamination of the insulating layer 62 in the semiconductor circuit industry.

[0064] Embodiment 1

[0065] Please refer to Figure 2 and Figure 3 As shown, a semiconductor packaging mold in this embodiment includes an upper mold 1 and a lower mold 2, wherein the upper mold 1 is provided with a first groove 11 for mounting a metal substrate 6 and a third groove 12 for placing a pin; the lower mold 2 is provided with a second groove 21 for mounting a metal substrate 6 and a fourth groove 22 for placing a pin;

[0066] When the upper mold 1 and the lower mold 2 are matched, the first groove 11 and the second groove 21 together form a main mold cavity 3, and the third groove 12 and the fourth groove 22 together form a pin movable space 4; the main mold cavity 3 and the pin movable space 4 are connected to each other;

[0067] A fixing block 5 is horizontally arranged in the pin movable space 4, and the fixing block 5 divides the pin movable space 4 into two parts, an upper part and an lower part; a mounting groove 51 is vertically opened on the fixing block 5, and the mounting groove 51 completely passes through the fixing block 5; a first movable block 52, a second movable block 53 and a reset spring 54 are arranged in the mounting groove 51; the first movable block 52 and the second movable block 53 are arranged up and down, and the first movable block 52 and the second movable block 53 are slidably connected with the mounting groove 51, and the first movable block 52 and the second movable block 53 slide up and down along the mounting groove 51, and the reset spring 54 is connected between the first movable block 52 and the second movable block 53 to provide upward and downward elastic force for the first movable block 52 and the second movable block 53; the side wall of the mounting groove 51 at least partially covers the side surfaces of the first movable block 52 and the second movable block 53.

[0068] The beneficial effects of the first aspect of the embodiment of the present invention are as follows: a pin movable space 4 is provided in the semiconductor packaging mold, and the total tolerance of the substrate tolerance, the pin welding tolerance and the mold tolerance is absorbed, thereby ensuring that no stress is generated between the substrate and the pin, realizing stress-free packaging, and preventing the insulating layer 62 from being delaminated due to stress.

[0069] In this embodiment, the semiconductor packaging mold is divided into an upper mold 1 and a lower mold 2, wherein the upper mold 1 is provided with a first groove 11 and a third groove 12, and the lower mold 2 is provided with a second groove 21 and a fourth groove 22; when the upper mold 1 and the lower mold 2 cooperate, the first groove 11 and the second groove 21 together form a main mold cavity 3, and the third groove 12 and the fourth groove 22 together form a pin activity space 4; the main mold cavity 3 and the pin activity space 4 are interconnected. The semiconductor circuit to be packaged is placed in the main mold cavity 3 of the mold, and the pins of the semiconductor circuit can be extended into the pin activity space 4 for movement. When the main mold cavity 3 is injection molded, the injection pressure will cause stress in the main mold cavity 3; when the pin is subjected to the stress generated by injection molding, the stress is converted into its movement in the pin activity space 4, and the stress is transmitted out of the main mold cavity 3.

[0070] When the upper mold 1 and the lower mold 2 are closed, in order to prevent the common pins 7 respectively connecting the upper and lower metal substrates 6 from sticking in the pin activity space 4, they need to be separated. By inserting the fixing block 5, the pin activity space 4 is divided into two downward sections. The common pins 7 extending into the pin activity space 4 can be preliminarily fixed, so that they are divided into the upper and lower ends of the pin activity space 4, respectively, and their adhesion is effectively prevented.

[0071] The first movable block 52 and the second movable block 53 are installed in the mounting groove 51 of the fixed block 5, and a reset spring 54 is connected between them. The movable block is used to press against two common pins 7 separated by the fixed block 5 to the upper and lower ends of the pin movable space 4, and can seal the gap between the two pins and the fixed block 5.

[0072] The top of the return spring 54 is connected to the first movable block 52, and the first return spring 54 provides elastic force to push the first movable block 52 to move upward until its top surface is tightly abutted against the bottom surface of the ordinary pin 7 at the upper end of the pin movable space 4, thereby pushing the ordinary pin 7 so that it can be close to the upper end of the pin movable space 4; similarly, the bottom end of the return spring 54 is connected to the second movable block 53, and the second return spring 54 provides elastic force to push the second movable block 53 to move downward until its bottom surface is tightly abutted against the top surface of the ordinary pin 7 at the lower end of the pin movable space 4, thereby pushing the ordinary pin 7 to be close to the lower end of the pin movable space 4; the ordinary pin 7 is tightly abutted against the upper and lower ends of the pin movable space 4, so that the ordinary pin 7 and the upper and lower ends of the pin movable space 4 There is no gap between the two ends, preventing the plastic encapsulation material 8 from overflowing the main mold cavity 3 through these gaps; at the same time, because the side walls of the mounting groove 51 at least partially cover the sides of the first movable block 52 and the second movable block 53, the plastic encapsulation material 8 in the main mold cavity 3 will be blocked by the front end face of the fixed block 5, the side face of the first movable block 52 and the side face of the second movable block 53 when entering the gap between the two ordinary pins 7, so that the front end face of the fixed block 5, the side face of the first movable block 52 and the side face of the second movable block 53 together form a sealing surface that can completely seal the gap between the upper and lower ordinary pins 7, preventing the plastic encapsulation material 8 from overflowing the main mold cavity 3 through the gap between the two ordinary pins 7; thereby ensuring that the plastic encapsulation material 8 in the main mold cavity 3 will not overflow into the pin movable space 4.

[0073] Specifically, a first limit block 511 and a second limit block 512 are respectively provided at the upper and lower ends of the mounting groove 51; a first protrusion 521 is provided on the first movable block 52, and when the first movable block 52 is pushed upward to the highest point by the return spring 54, the bottom surface of the first limit block 511 abuts against the top surface of the first protrusion 521; a second protrusion 531 is also provided on the second movable block 53, and when the second movable block 53 is pushed downward to the lowest point by the return spring 54, the top surface of the second limit block 512 abuts against the bottom surface of the second protrusion 531.

[0074] The cooperation between the limiting block and the protruding block limits the moving range of the movable block, and ensures that the movable block can stably stay at a predetermined position when subjected to elastic force, thereby further improving the stability and reliability of the packaging structure.

[0075] Embodiment 2

[0076] Reference Figure 1 and Figure 4, an embodiment of the present invention further provides a semiconductor circuit manufactured using the semiconductor packaging mold described in any one of the above embodiments, the semiconductor circuit comprising: two metal substrates 6, a tweezer pin 71 connected between the two metal substrates 6, a plurality of ordinary pins 7, and a plastic packaging material 8 wrapping the two metal substrates 6;

[0077] The two metal substrates 6 are symmetrically arranged up and down; one end of all the common pins 7 is connected to the metal substrate 6, and the other end of all the common pins 7 extends outward;

[0078] The tweezer pin 71 is bent into two symmetrical sections at its middle position, forming two pin tips and a pin middle end connected to the pin tips, and the two pin tips are respectively connected to two metal substrates 6; the two metal substrates 6 are electrically connected through the tweezer pin 71;

[0079] The plastic packaging material 8 is filled between the two metal substrates 6 and completely wraps the tweezer pins 71;

[0080] The molding compound 8 seals at least the connection portion between the common pin 7 and the metal substrate 6 , and the portion of the common pin 7 extending outward is not sealed by the molding compound 8 .

[0081] The beneficial effect of the embodiment of the second aspect of the present invention: the tweezer pin 71 is bent in the middle position to form two symmetrical sections, thereby producing two pin tips and a pin middle end connecting the two pin tips; due to this bending design, a certain elasticity is accumulated inside the tweezer pin 71, and this elasticity makes the two pin tips have a tendency to rebound to the upper and lower ends, so that the two metal substrates 6 connected to the two pin tips can be close to the upper and lower surfaces of the main mold cavity 3; this can effectively prevent the metal substrate 6 and the main mold cavity 3 from leaving a gap and causing glue overflow; using the tweezer pin 71 to replace the existing ejector pin solution can not only make the metal substrate 6 close to the mold cavity surface, but also integrate two metal substrates 6 at the same time.

[0082] In this embodiment, the material of the ordinary pin 7 and the tweezer pin 71 is C194, Fe: 2.4, P: 0.03, Zn: 0.12) or KFC, Fe: 0.1, P: 0.03), and the 0.5mm copper plate is stamped by machining to form the required shape, and then the surface is first nickel-plated with a thickness of 0.1-0.5um and then tin-plated with a thickness of 2-5um.

[0083] In this embodiment, the plastic encapsulation material 8 is based on epoxy resin, high-performance phenolic resin is added as a curing agent, silicon micropowder and the like are added as fillers, and finally a powdered molding compound is added with a variety of additives. The powdered molding compound is extruded into the mold cavity by heat transfer molding and the semiconductor chip is embedded therein. At the same time, it is cross-linked and cured to form a structural device with a certain appearance.

[0084] Specifically, the semiconductor circuit further includes a plurality of components 67 , a chip capacitor 65 and a chip resistor 66 ; the chip capacitor 65 , the chip resistor 66 and all the components 67 are mounted on the metal substrate 6 .

[0085] In this embodiment, the chip capacitors 65, chip resistors 66 and multiple components 67 are all arranged on the surface of the metal substrate 6 away from the main mold cavity 3, that is, the chip capacitors 65, chip resistors 66 and multiple components 67 on the two metal substrates 6 are relative, they are located in the middle of the two metal substrates 6 and are sealed by the plastic packaging material 8; the side of the metal substrate 6 without the chip capacitors 65, chip resistors 66 and multiple components 67 is exposed to the outside as the shell of the semiconductor circuit and is not sealed by the plastic packaging material 8; the chip resistor 66 is connected to the gate of the IGBT chip inside the semiconductor circuit, and the effect of limiting the switching speed of the IGBT is achieved by current limiting; the chip capacitors 65 play a filtering, coupling and bootstrapping role in the semiconductor circuit; the components 67 are used to form the chips required for the internal functional circuits of the semiconductor circuit.

[0086] Specifically, the components 67 are electrically connected via metal wires 68. In this embodiment, the electrical connection between the components 67 in the circuit is achieved via metal wires 68, and the metal wires 68 are generally made of gold, aluminum, copper, and the like.

[0087] Specifically, the common pins 7 and the tweezer pins 71 are both electrically connected to the metal substrate 6 through pin solder. In this embodiment, the common pins 7 and the tweezer pins 71 are both connected to the soldering positions on the metal substrate 6 through pin solder, and the pins are electrically connected to the metal substrate 6 by high-temperature reflow; the pin solder is formed by uniformly mixing alloy powder and solder resist in a certain proportion.

[0088] Specifically, the metal substrate 6 includes a base material layer 61 , an insulating layer 62 covering the base material layer 61 , a copper foil layer 63 covering the insulating layer 62 , and a protective layer 64 covering the copper foil layer 63 .

[0089] The metal substrate 6 is used to carry semiconductor circuit components 67 and circuits, and to dissipate heat for the components 67; the base material layer 61 is the bottom layer of the metal substrate 6, and serves as a carrier of the internal circuit, and the metal has good heat dissipation performance and can dissipate heat; the insulating layer 62 is used to prevent the circuit on the copper foil layer 63 from being energized with the base material layer 61, resulting in the risk of short circuit and leakage of the internal circuit; the copper foil layer 63 has a circuit for installing components 67; the protective layer 64 is used to cover the part of the copper foil layer 63 that does not need to be soldered, to increase the withstand voltage between the circuits, to prevent short circuits caused by circuit oxidation or contamination, and to protect the circuits.

[0090] Specifically, the base material layer 61 has a curved surface structure.

[0091] Since the semiconductor circuit of the present invention needs to detect the vibration of the compressor, the substrate layer 61 is directly set to a curved surface, so that it can be directly installed on the compressor, which can not only realize the vibration detection of the compressor but also dissipate heat through the compressor.

[0092] Specifically, the circuit wiring layer is formed by etching the copper foil layer 63. By etching the copper foil layer 63, a desired circuit can be formed for electrically connecting the chip capacitor 65, the chip resistor 66 and the components 67.

[0093] Embodiment 3

[0094] An embodiment of the present invention further provides a semiconductor manufacturing method for manufacturing the semiconductor circuit described in any one of the above embodiments, wherein the semiconductor circuit manufacturing method comprises the following steps:

[0095] Place two metal substrates 6 finished products on a special carrier by automated equipment or manually;

[0096] The semiconductor inverter circuit chip is mounted on the component 67 mounting position reserved on the finished copper foil circuit layer of the substrate by brushing solder paste or dispensing silver glue through an automatic die bonding device;

[0097] The high-voltage power device is mounted on the silver-plated copper heat sink by a soft solder die-bonding machine to form a semi-finished component 67;

[0098] The resistors, capacitors and components 67 are mounted to the mounting positions on the metal substrate 6 by automatic SMT equipment;

[0099] Place the common pin 7 on the soldering position of the metal substrate 6 by a robot or manually, place the two ends of the tweezer pin 71 on the soldering positions of the two metal substrates 6 respectively, put the metal substrate 6 and the special carrier together through the reflow furnace, and solder all the components 67 and pins on the metal substrate 6;

[0100] The welding quality of the components 67 is inspected by visual inspection AOI equipment, and foreign matters such as flux and aluminum chips remaining on the metal substrate 6 are removed by spraying, ultrasonic cleaning or the like;

[0101] By installing metal wires 68, the components 67 and the circuit wiring on the metal substrate 6 are electrically connected;

[0102] The metal substrate 6 is plastic-sealed in a specific mold by a packaging device;

[0103] Marking of products by laser marking;

[0104] Post-curing stress relief treatment of the product through a high-temperature oven;

[0105] The connecting ribs and dummy pins of the pins are cut off and shaped into the required shapes through the rib cutting and forming equipment; finally, the electrical parameter test is carried out to form the final qualified product.

[0106] The preferred embodiments of the present invention are described in detail above, but the present disclosure is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present disclosure.

Claims

1. A semiconductor packaging mold, characterized in that: The invention comprises an upper die (1) and a lower die (2); the upper die (1) is provided with a first groove (11) for mounting a metal substrate (6) and a third groove (12) for placing a pin; the lower die (2) is provided with a second groove (21) for mounting the metal substrate (6) and a fourth groove (22) for placing a pin; When the upper mold (1) and the lower mold (2) are matched, the first groove (11) and the second groove (21) together form a main mold cavity (3), and the third groove (12) and the fourth groove (22) together form a pin movable space (4); the main mold cavity (3) and the pin movable space (4) are connected to each other; A fixing block (5) is horizontally arranged in the pin movable space (4), and the fixing block (5) divides the pin movable space (4) into two parts, an upper part and an lower part; a mounting groove (51) is vertically opened on the fixing block (5), and the mounting groove (51) completely passes through the fixing block (5); a first movable block (52), a second movable block (53) and a return spring (54) are arranged in the mounting groove (51); the first movable block (52) and the second movable block (53) are arranged up and down, and the first movable block (52) and The second movable block (53) is slidably connected to the mounting groove (51); the first movable block (52) and the second movable block (53) slide up and down along the mounting groove (51); the return spring (54) is connected between the first movable block (52) and the second movable block (53) to provide upward and downward elastic forces for the first movable block (52) and the second movable block (53); and the side wall of the mounting groove (51) at least partially covers the side surfaces of the first movable block (52) and the second movable block (53).

2. A semiconductor packaging mold according to claim 1, characterized in that: The upper and lower ends of the mounting groove (51) are respectively provided with a first limit block (511) and a second limit block (512); the first movable block (52) is provided with a first protrusion (521); when the first movable block (52) is pushed upward to the highest point by the return spring (54), the bottom surface of the first limit block (511) abuts against the top surface of the first protrusion (521); the second movable block (53) is also provided with a second protrusion (531); when the second movable block (53) is pushed downward to the lowest point by the return spring (54), the top surface of the second limit block (512) abuts against the bottom surface of the second protrusion (531).

3. A semiconductor circuit manufactured using the semiconductor packaging mold according to any one of claims 1 to 2, characterized in that: include: Two metal substrates (6), a tweezer-type pin (71) connected between the two metal substrates (6), a plurality of ordinary pins (7), and a plastic packaging material (8) wrapping the two metal substrates (6); The two metal substrates (6) are symmetrically arranged in an upper and lower direction; one end of all the common pins (7) is connected to the metal substrate (6), and the other ends of all the common pins (7) extend outward; The tweezer pin (71) is bent at its middle position into two symmetrical sections to form two pin tips and a pin middle end connected to the pin tips, and the two pin tips are respectively connected to two metal substrates (6); the two metal substrates (6) are electrically connected via the tweezer pin (71); The plastic encapsulation material (8) is filled between the two metal substrates (6) and completely wraps the tweezer pin (71); The molding compound (8) seals at least the connection portion between the common pin (7) and the metal substrate (6), and the portion of the common pin (7) extending outward is not sealed by the molding compound (8).

4. The semiconductor circuit according to claim 3, characterized in that: The semiconductor circuit further comprises a plurality of components (67), a chip capacitor (65) and a chip resistor (66); the chip capacitor (65), the chip resistor (66) and all the components (67) are mounted on the metal substrate (6).

5. The semiconductor circuit according to claim 4, characterized in that: The components (67) are electrically connected via metal wires (68).

6. The semiconductor circuit according to claim 3, characterized in that: The common pin (7) and the tweezer pin (71) are both electrically connected to the metal substrate (6) via pin solder.

7. The semiconductor circuit according to claim 3, characterized in that: The metal substrate (6) comprises a base material layer (61), an insulating layer (62) covering the base material layer (61), a copper foil layer (63) covering the insulating layer (62), and a protective layer (64) covering the copper foil layer (63).

8. The semiconductor circuit according to claim 7, characterized in that: The substrate layer (61) has a curved surface structure.

9. The semiconductor circuit according to claim 7, wherein: A circuit wiring layer is produced by etching the copper foil layer (63).

10. A method for manufacturing a semiconductor circuit as claimed in any one of claims 3 to 9, characterized in that: The semiconductor circuit manufacturing method comprises the following steps: placing two metal substrate (6) finished products on a special carrier by automated equipment or manually; The semiconductor inverter circuit chip is mounted on the component (67) installation position reserved on the finished copper foil circuit layer of the substrate by brushing solder paste or dispensing silver glue through an automatic die bonding device; The high-voltage power device is mounted on a copper heat sink with a silver-plated surface by a soft solder die-bonding machine to form a semi-finished component (67); Mounting resistors, capacitors, and components (67) to mounting positions on a metal substrate (6) using an automatic SMT device; The common pin (7) is placed on the soldering position of the metal substrate (6) by a robot or manually, and the two ends of the tweezer pin (71) are respectively placed on the soldering positions of the two metal substrates (6), and the metal substrate (6) and the special carrier are put through a reflow furnace together, and all the components (67) and the pins are soldered on the metal substrate (6); The welding quality of the components (67) is inspected by visual inspection AOI equipment, and foreign matters such as soldering flux and aluminum chips remaining on the metal substrate (6) are removed by spraying, ultrasonic cleaning or the like; By installing a metal wire (68), the component (67) and the circuit wiring on the metal substrate (6) are electrically connected; The metal substrate (6) is plastic-sealed in a specific mold by a packaging device; Marking of products by laser marking; Post-curing stress relief treatment of the product through a high-temperature oven; The connecting ribs and dummy pins of the pins are cut off and shaped into the required shapes through the rib cutting and forming equipment; finally, the electrical parameter test is carried out to form the final qualified product.