Switching circuit of flyback DC-DC converter

Abstract

The invention relates to the technical field of switches, in particular to a conversion circuit of a flyback DC-DC converter, which comprises a rectification input filter circuit, a PD detection circuit, a flyback DC-DC conversion circuit and a sampling feedback voltage stabilizing circuit, and is characterized in that the rectification input filter circuit is connected to the input end of the flyback DC-DC conversion circuit; the PD detection circuit comprises a PD detection resistor R1, and the PD detection resistor R1 is connected in parallel between the rectification input filter circuit and the flyback DC-DC conversion circuit. The device is ingenious in design, can adapt to different PSE equipment wiring modes, and is good in rectification effect and high in stability. Through cooperation of the PD detection circuit and the sampling feedback voltage stabilizing circuit, it can be ensured that PD equipment can stably and reliably receive power supply from PSE equipment, and the power supply management circuit is very suitable for power supply management requirements in PoE application.

Description

Technical Field

[0001] The present invention relates to the technical field of switches, and in particular to a conversion circuit of a flyback DC-DC converter. Background Art

[0002] Nowadays, there are many types of switches on the market. Some high-end products have POE power supply function, which can supply power to loads through the network. We call them PSE products, such as switches and routers. Products that use this power supply method are called PD, such as IP phones and network cameras. With the rapid development of network communication technology, Power over Ethernet (PoE) technology, as an innovative network power supply method, has been widely used in various network terminal devices, such as IP phones, wireless access points, network cameras, etc. PoE technology transmits data and power simultaneously through standard Ethernet cables, greatly simplifying the power supply and wiring of network equipment and improving the flexibility and reliability of network systems.

[0003] However, in the process of implementing PoE power supply, how to ensure that the powered device (PD) can stably and reliably receive power from the power supply equipment (PSE) has become an urgent problem to be solved. Traditional power management solutions often have shortcomings such as complex wiring, poor adaptability, and insufficient stability, which cannot meet the PoE application's requirements for efficient, convenient, and reliable power management. Summary of the invention

[0004] The present invention provides a conversion circuit of a flyback DC-DC converter to solve the problems of the prior art. The circuit has an ingenious design, can adapt to different PSE equipment wiring modes, and has good rectification effect and high stability. Through the cooperation of the PD detection circuit and the sampling feedback voltage stabilization circuit, it can ensure that the PD device can stably and reliably receive the power supply from the PSE device, which is very suitable for the power management requirements in PoE applications.

[0005] In order to solve the above technical problems, the present invention adopts the following technical solutions:

[0006] The present invention provides a conversion circuit of a flyback DC-DC converter, which comprises a rectifier input filter circuit, a PD detection circuit, a flyback DC-DC conversion circuit and a sampling feedback voltage stabilization circuit, wherein the rectifier input filter circuit is connected to the input end of the flyback DC-DC conversion circuit; the PD detection circuit comprises a PD detection resistor R1, and the PD detection resistor R1 is connected in parallel between the rectifier input filter circuit and the flyback DC-DC conversion circuit; the flyback DC-DC conversion circuit is used to convert high-voltage direct current into low-voltage alternating current and then rectify it into 12V direct current after rectification and filtering at the output end; the sampling feedback voltage stabilization circuit is connected to the output end of the flyback DC-DC conversion circuit, and the sampling feedback voltage stabilization circuit is used to sample the output voltage of the flyback DC-DC conversion circuit and perform voltage stabilization processing according to the output voltage.

[0007] Among them, the rectifier input filter circuit includes a rectifier bridge circuit D1, a rectifier bridge circuit D2, a capacitor EC1, a capacitor C1, a capacitor C2 and a Zener diode D3. The capacitor EC1, the capacitor C1, the capacitor C2 and the Zener diode D3 are connected in parallel in sequence. The first pin of the rectifier bridge circuit D1 and the first pin of the rectifier bridge circuit D2 are connected to one end of the PD detection resistor R1, and the second pin of the rectifier bridge circuit D1 and the second pin of the rectifier bridge circuit D2 are connected to ground; one end of the PD detection resistor R1 is connected to the cathode of the Zener diode D3, and the anode of the Zener diode D3 and the other end of the PD detection resistor R1 are grounded respectively.

[0008] Wherein, the flyback DC-DC conversion circuit includes a control chip U1, a capacitor EC2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C7, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a Zener diode D4, a Zener diode D5, a Zener diode D6, a Zener diode D7, a diode D8 and a transformer T1;

[0009] The PD detection resistor R1 is respectively connected to the VIN pin of the control chip U1, and the VIN pin of the control chip U1 is connected to the first pin of the transformer T1;

[0010] The SW pin of the control chip U1 is connected to the third pin of the transformer T1 and the anode of the voltage stabilizing diode D7, the cathode of the voltage stabilizing diode D7 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the first pin of the transformer T1, and the resistor R4 and the capacitor C5 are connected in parallel with the resistor R3 respectively;

[0011] The fifth pin of the transformer T1 is connected to the anode of the Zener diode D6, the cathode of the Zener diode D6 is connected to one end of the resistor R15, the other end of the resistor R15 is respectively connected to the anode of the Zener diode D5, the cathode of the Zener diode D4 and one end of the capacitor EC2, the other end of the capacitor EC2 is connected to the anode of the Zener diode D4 and then grounded, and the cathode of the Zener diode D5 is connected to the VCC pin of the control chip U1;

[0012] The VCC pin of the control chip U1 is connected to one end of the capacitor C3, the other end of the capacitor C3 is grounded, the RT pin of the control chip U1 is connected to one end of the resistor R7, the other end of the resistor R7 is grounded, and the fourth pin of the transformer T1 and the GND pin of the control chip U1 are grounded respectively;

[0013] The eighth pin of the transformer T1 is grounded, the tenth pin of the transformer T1 is respectively connected to one end of the capacitor C7 and the anode of the diode D8, the other end of the capacitor C7 is connected to one end of the resistor R12, and the other end of the resistor R12 is connected to the cathode of the diode D8.

[0014] The flyback DC-DC converter circuit further includes a resistor R2 and a resistor R16, which are connected in parallel with the PD detection resistor R1, and the LINE pin of the control chip U1 is connected to the connection between the resistor R2 and the resistor R16.

[0015] The sampling feedback voltage stabilization circuit includes an optocoupler U2, a voltage regulator Q2, a capacitor C6, a capacitor C8, a capacitor C9, a resistor R9, a resistor R10, a resistor R11, a resistor R14, and a capacitor EC3. One end of the resistor R10, one end of the resistor R11, and one end of the capacitor EC3 are respectively connected to the cathode of the diode D8, the capacitor C8 is connected in parallel with the capacitor EC3, the capacitor C9 is connected in parallel with the capacitor C8, the other end of the capacitor EC3 is grounded, the other end of the resistor R11 is connected to one end of the resistor R14, the other end of the resistor R14 is grounded, the other end of the resistor R10 is connected to the first pin of the optocoupler U2, the second pin of the optocoupler U2 is connected to one end of the capacitor C6, The second pin of the voltage regulator Q2 is connected, the other end of the capacitor C6 is connected to one end of the resistor R9, the other end of the resistor R9 is connected to one end of the resistor R14, the third pin of the voltage regulator Q2 is grounded, the third pin of the optocoupler U2 is connected to the cathode of the voltage regulator diode D5, the fourth pin of the optocoupler U2 is connected to one end of the resistor R8 and one end of the resistor R6, the other end of the resistor R6 is connected to one end of the capacitor C4, one end of the resistor R13, and the FB pin of the chip U1, the other end of the capacitor C4 is connected to one end of the resistor R5, the other end of the resistor R5 and the other end of the resistor R13 are respectively connected to the COMP pin of the control chip U1, and the other end of the resistor R8 is grounded.

[0016] Preferably, the model of the control chip U1 is MP6001.

[0017] Wherein, the resistance of the PD detection resistor R1 is 24.9KΩ.

[0018] Beneficial effects of the present invention:

[0019] The control circuit of the present invention is cleverly designed and can adapt to different PSE equipment wiring modes, and has good rectification effect and high stability. Through the cooperation of the PD detection circuit and the sampling feedback voltage stabilization circuit, it can ensure that the PD device can stably and reliably receive the power supply from the PSE device, which is very suitable for the power management requirements in PoE applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 The present invention is a circuit diagram of a conversion circuit of a flyback DC-DC converter. DETAILED DESCRIPTION

[0021] In order to facilitate the understanding of those skilled in the art, the present invention is further described below in conjunction with the embodiments and drawings, and the contents mentioned in the embodiments are not intended to limit the present invention. The present invention is described in detail below in conjunction with the drawings.

[0022] A conversion circuit of a flyback DC-DC converter, comprising a rectifier input filter circuit, a PD detection circuit, a flyback DC-DC conversion circuit and a sampling feedback voltage stabilization circuit, wherein the rectifier input filter circuit is connected to the input end of the flyback DC-DC conversion circuit; the PD detection circuit comprises a PD detection resistor R1, and the PD detection resistor R1 is connected in parallel between the rectifier input filter circuit and the flyback DC-DC conversion circuit; the flyback DC-DC conversion circuit is used to convert high-voltage direct current into low-voltage alternating current and then rectify it into 12V direct current after rectification and filtering at the output end; the sampling feedback voltage stabilization circuit is connected to the output end of the flyback DC-DC conversion circuit, and the sampling feedback voltage stabilization circuit is used to sample the output voltage of the flyback DC-DC conversion circuit and perform voltage stabilization processing according to the output voltage; the resistance value of the PD detection resistor R1 is 24.9KΩ. Specifically, the present invention is cleverly designed. The network signal and POE power supply transmitted through the network cable enter the PD device through the RJ45 port, wherein the network signal enters the device CPU after passing through the network filter, and the power signal enters the conversion circuit of the flyback DC-DC converter for power conversion. First, the input end of the flyback DC-DC converter circuit uses a rectifier input filter circuit. The embodiment of the present application has strong adaptability and does not need to worry about any different wiring methods of any PSE device. At the same time, the rectification effect is good and the stability is high; there is a PD detection resistor R1 between the positive and negative poles of the rectified power supply , the PD detection resistor R1 is the POE power supply detection resistor; the moment the network cable is connected, the PSE device sends a detection signal with a voltage between 2.8-10V and is transmitted to the PD device through the network cable. After this signal passes through the PD detection resistor R1, a 200uA current will flow back to the PSE device Vdrain pin through the network cable. At this time, after the PSE chip Vdrain pin detects this signal, it will think that the network cable has been connected to a valid PD device, and then proceed to the next step of classification operation. At this time, the PSE chip will send a classification signal to allocate power to the PD device at the corresponding level.

[0023] In an embodiment of the present application, the rectifier input filter circuit includes a rectifier bridge circuit D1, a rectifier bridge circuit D2, a capacitor EC1, a capacitor C1, a capacitor C2 and a Zener diode D3. The capacitor EC1, the capacitor C1, the capacitor C2 and the Zener diode D3 are connected in parallel in sequence. The first pin of the rectifier bridge circuit D1 and the first pin of the rectifier bridge circuit D2 are connected to one end of the PD detection resistor R1, and the second pin of the rectifier bridge circuit D1 and the second pin of the rectifier bridge circuit D2 are connected to ground; one end of the PD detection resistor R1 is connected to the cathode of the Zener diode D3, and the anode of the Zener diode D3 and the other end of the PD detection resistor R1 are grounded respectively. Specifically, the embodiment of the present application uses a combination of a double-bridge rectifier bridge circuit D1 and a rectifier bridge circuit D2. Regardless of whether the connected network device is VA1+, VA2-, VB1+, VB2-, or VA1-, VA2+, VB1-, VA2+, the Vmain network after bridge rectifier rectification is positive. The advantage of this circuit is that it has strong adaptability and there is no need to worry about different PSE equipment wiring methods from different manufacturers causing load damage. At the same time, it has good rectification effect and high stability. Capacitor EC1, capacitor C1 and capacitor C2 form a filtering network, and the voltage regulator diode D3 is a transient high-voltage suppression diode for preventing transient high voltage and static electricity.

[0024] In the embodiment of the present application, the flyback DC-DC conversion circuit includes a control chip U1, a capacitor EC2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C7, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a Zener diode D4, a Zener diode D5, a Zener diode D6, a Zener diode D7, a diode D8 and a transformer T1;

[0025] The PD detection resistor R1 is respectively connected to the VIN pin of the control chip U1, and the VIN pin of the control chip U1 is connected to the first pin of the transformer T1;

[0026] The SW pin of the control chip U1 is connected to the third pin of the transformer T1 and the anode of the voltage stabilizing diode D7, the cathode of the voltage stabilizing diode D7 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the first pin of the transformer T1, and the resistor R4 and the capacitor C5 are connected in parallel with the resistor R3 respectively;

[0027] The fifth pin of the transformer T1 is connected to the anode of the Zener diode D6, the cathode of the Zener diode D6 is connected to one end of the resistor R15, the other end of the resistor R15 is respectively connected to the anode of the Zener diode D5, the cathode of the Zener diode D4 and one end of the capacitor EC2, the other end of the capacitor EC2 is connected to the anode of the Zener diode D4 and then grounded, and the cathode of the Zener diode D5 is connected to the VCC pin of the control chip U1;

[0028] The VCC pin of the control chip U1 is connected to one end of the capacitor C3, the other end of the capacitor C3 is grounded, the RT pin of the control chip U1 is connected to one end of the resistor R7, the other end of the resistor R7 is grounded, and the fourth pin of the transformer T1 and the GND pin of the control chip U1 are grounded respectively;

[0029] The eighth pin of the transformer T1 is grounded, the tenth pin of the transformer T1 is respectively connected to one end of the capacitor C7 and the anode of the diode D8, the other end of the capacitor C7 is connected to one end of the resistor R12, and the other end of the resistor R12 is connected to the cathode of the diode D8.

[0030] The flyback DC-DC converter circuit further includes a resistor R2 and a resistor R16, which are connected in parallel with the PD detection resistor R1, and the LINE pin of the control chip U1 is connected to the connection between the resistor R2 and the resistor R16.

[0031] In the embodiment of the present application, the sampling feedback voltage stabilization circuit includes an optocoupler U2, a voltage regulator Q2, a capacitor C6, a capacitor C8, a capacitor C9, a resistor R9, a resistor R10, a resistor R11, a resistor R14, and a capacitor EC3. One end of the resistor R10, one end of the resistor R11, and one end of the capacitor EC3 are respectively connected to the cathode of the diode D8, the capacitor C8 is connected in parallel with the capacitor EC3, the capacitor C9 is connected in parallel with the capacitor C8, the other end of the capacitor EC3 is grounded, the other end of the resistor R11 is connected to one end of the resistor R14, the other end of the resistor R14 is grounded, the other end of the resistor R10 is connected to the first pin of the optocoupler U2, the second pin of the optocoupler U2 is connected to one end of the capacitor C6, The second pin of the voltage regulator Q2 is connected, the other end of the capacitor C6 is connected to one end of the resistor R9, the other end of the resistor R9 is connected to one end of the resistor R14, the third pin of the voltage regulator Q2 is grounded, the third pin of the optocoupler U2 is connected to the cathode of the voltage regulator diode D5, the fourth pin of the optocoupler U2 is connected to one end of the resistor R8 and one end of the resistor R6, the other end of the resistor R6 is connected to one end of the capacitor C4 and one end of the resistor R13, the other end of the capacitor C4 is connected to one end of the resistor R5, the other end of the resistor R5 and the other end of the resistor R13 are respectively connected to the COMP pin of the control chip U1, and the other end of the resistor R8 is grounded; the model of the voltage regulator Q2 is TL431.

[0032] Specifically, the output power of the embodiment of the present application is up to 15W, so we mark the PD detection resistor R1 connected between Vmain and the ground wire as 24.9K, and this PD detection resistor R1 is a POE power supply detection resistor; the moment the network cable is connected, the PSE device sends a detection signal between 2.8-10V to the PD device through the network cable. The signal current is about 200uA, which flows back to the Vdrain pin of the PSE device after passing through the 24.9K resistor R1. At this time, the PSE chip will think that a valid PD device is detected to be connected to the network cable, and then perform the next step of classification operation. At this time, the PSE chip will send a classification signal to allocate power of the corresponding level to the PD device.

[0033] When the embodiment of the present application is working, the power supply Vmain after rectification and filtering is approximately between 48V and 54V, and is input to the control chip U1, that is, the VIN pin of the chip MP6001. At this time, its VCC pin is connected to the VIN pin through the internal circuit to charge the external capacitor; when the charging voltage reaches 6V, the chip MP6001 is enabled; after the chip MP6001 works, its internal PWM oscillator starts to work, and the PWM waveform is amplified by the internal amplifier to control the conduction of its internal MOS tube; the Vmain power supply enters the SW pin of the chip MP6001 through the first pin and the third pin of the transformer T1, and flows back to the ground through its internal MOS tube; at this time, the secondary winding of the transformer T1 will generate an induced electromotive force; among them, the induced electromotive force generated by the fourth pin and the fifth pin of the transformer T1 is rectified and filtered to supply power to the VCC pin of the chip MP6001, and this current can also reduce the power consumption of the internal startup circuit of the chip MP6001; the eighth pin and the tenth pin of the transformer T1 generate The induced electromotive force is rectified and filtered to supply power to the load. At the same time, this process will make the filter capacitor fully charged to provide power reserve for the load when the MOS tube is turned off later. After the chip MP6001 is enabled, the VCC pin of the chip MP6001 is disconnected from VIN, and the VCC voltage is released through the internal working current. When the VCC voltage drops to 4.5V, the VCC pin is reconnected to VIN through the internal circuit to charge the external capacitor. During this period, the internal MOS tube is disconnected, and no current will flow through the first and third pins of the transformer T1. The first and third pins of the transformer T1 will generate a reverse electromotive force due to the sudden change of the inductor current. This electromotive force will be released by the peak absorption diode connected to the side, thereby protecting the MOS tube from damage. This current release process will be induced to the secondary coil through the magnetic core, but due to the opposite polarity, the rectifier diode at the secondary output end has a unidirectional conductive characteristic, and this electromotive force cannot supply power to the load. At this time, the filter capacitor behind the rectifier diode releases energy to supply power to the load.

[0034] When the VCC external capacitor is recharged to above 6V, the VCC pin of the chip MP6001 will be disconnected from VIN again, and the internal MOS tube will be turned on again. The current will flow through the first and third pins of the transformer T1 again, and return to the ground through the MOS tube; according to this cycle, the power supply will be converted from high-voltage (48V-54V) DC to low-voltage AC, and then rectified by the output rectifier and filter circuit into the low-voltage DC (+12V DC) we need.

[0035] Specifically, the induced electromotive force generated by the fourth and fifth pins of the transformer T1 will be processed by the rectifier filter circuit composed of the voltage regulator diode D4, the voltage regulator diode D6, the resistor R15, and the capacitor EC2, and then flow back to the ground through the photosensitive tube of the optocoupler U2 and the resistor R8 after passing through the voltage regulator diode D5. This power supply is connected to the VCC pin of the chip MP6001, which can also reduce the power consumption of the internal startup circuit of the chip MP6001; the voltage regulator diode D4 is used to clamp the voltage at 6.2V, and the voltage regulator diode D5 is used to prevent the VCC pin power supply of the chip MP6001 from being reversed; the induced electromotive force generated by the eighth and tenth pins of the transformer T1 is rectified and filtered by the rectifier circuit composed of the diode D8, the capacitor EC3, the capacitor C8, and the capacitor C9, and then supplies power to the load. This process will charge the capacitor EC3 to provide continuous current for the load when the MOS tube is turned off later; and the capacitor C7 and the resistor R12 constitute the peak absorption circuit of the diode D8.

[0036] After the chip MP6001 is enabled, its VCC pin is disconnected from VIN, and the VCC voltage on the capacitor C3 is released through the internal working current. When the VCC voltage drops to 4.5V, the VCC pin is reconnected to VIN through the internal circuit and charges the external capacitor C3 again; during this period, its internal MOS tube is disconnected, and no current flows through the first and third pins of the transformer T1. At this time, the first and third pins of the transformer T1 will generate a reverse electromotive force due to the sudden change of the inductor current. This electromotive force will be released by the peak absorption circuit composed of the voltage-stabilizing diode D7, resistor R3, resistor R4, and capacitor C5 connected next to it, and will be sensed to the secondary line However, due to the unidirectional conductive characteristics of the rectifier diode at the secondary output end, this electromotive force cannot supply power to the load. At this time, the filter capacitor EC3 behind the rectifier diode D8 will release electrical energy to supply power to the load; when the external capacitor C3 connected to the VCC pin is recharged to more than 6V, its VCC pin will be disconnected from the VIN pin again, and the internal MOS tube of the chip MP6001 will be turned on, and the current will flow through the transformer T1 and T3 windings again, and the internal MOS tube of the chip MP6001 will flow back to the ground; according to this cycle, the power supply will be converted from 48V-54V high-voltage DC to low-voltage AC, and then rectified by the output rectifier and filter circuit into the +12V DC we need.

[0037] The optocoupler PC817 and the voltage regulator TL431 together form a power sampling feedback circuit; because the Vmain voltage, the rectifier output voltage, and the sampling voltage have synchronous characteristics, after the Vmain power supply changes, the sampling voltage changes synchronously, the current flowing through the light-emitting diode inside the optocoupler will change, and the photosensitive tube Vce inside the optocoupler will change, that is, the current released by the sampling winding of the transformer T1 through the optocoupler will change; at this time, the voltage sampled by the sampling resistor of the FB pin of the chip MP6001 through its external connection to the optocoupler will change, and this sampling voltage will be compared with the internal 1.2V voltage of the chip MP6001. After the difference is amplified by the internal error amplifier, it enters the PWM amplifier to control the PWM duty cycle; the voltage regulation process is as follows:

[0038] The Vmain power supply voltage increases > the sampling voltage increases > the FB pin voltage increases > after the error amplifier amplifies > the duty cycle of the control PWM signal decreases > the conduction time of the internal MOS tube of the chip MP6001 decreases > the rectifier output power supply voltage of the transformer T1 decreases.

[0039] Vmain power supply voltage drops > sampling voltage drops > FB pin voltage drops > after error amplifier amplification > control PWM signal duty cycle increases > internal MOS tube conduction time of chip MP6001 extends > transformer rectifier output power supply voltage increases.

[0040] The chip U1 is externally connected to an input power voltage divider sampling circuit. When the sampling voltage is between 1.2V and 3V, the chip can work normally. When it exceeds this range, the chip will enter standby mode. This pin can also be used as a remote standby control pin. The COMP pin of the chip U1 is the negative feedback output terminal of the feedback signal error amplifier. The external resistor on the RT pin of the chip U1 is used to determine the oscillation frequency of the chip PWM signal.

[0041] Specifically, the optocoupler U2 and the voltage regulator Q2 together form a power sampling feedback circuit. When the Vmain power supply voltage is normal, the voltage on the resistor R14 after sampling by the resistor R11 and the resistor R14 is exactly equal to 2.5V, which is equal to the reference voltage of the voltage regulator TL431; at this time, the output of the transformer T1 is +12V, and this power supply flows back to the ground through the resistor R10, the light-emitting diode of the optocoupler U2, and the voltage regulator Q2. At this time, the current sensed by the feedback winding (the fourth pin and the fifth pin) is discharged to the ground through the voltage stabilizing diode D5, the optical coupler U2, and the resistor R8; the resistor R6 is the sampling resistor of the chip MP6001, and the voltage on the resistor R8 is sampled to the FB pin of the chip MP6001. After comparing this voltage with the internal 1.2V voltage of the chip MP6001, the difference is amplified by the error amplifier and enters the PWM amplifier to adjust the PWM duty cycle; the duty cycle of the PWM signal will determine the conduction time of the internal MOS tube of the chip MP6001, thereby affecting the output voltage of the transformer; if the Vmain power supply voltage increases, the power supply voltage output by the rectification of the diode D8 will increase synchronously, and the voltage sampled by the resistors R11 and R14 will increase, flowing through the resistors R10, the optical coupler U 2, the current of the light-emitting tube and the voltage regulator Q2 will also increase, and the impedance of the photosensitive tube of the optocoupler U2 will decrease. At this time, the discharge current of the fourth pin and the fifth pin through the voltage regulator diode D5, the optocoupler U2, and the resistor R8 will increase, and the sampling voltage of the resistor R6 will rise synchronously, that is, the FB pin voltage of the chip MP6001 will rise. After this voltage is compared with 1.2V, the difference is amplified by the error amplifier and enters the PWM amplifier, which controls the PWM duty cycle to decrease, the MOS tube conduction time to shorten, and the output voltage of the transformer T1 to decrease; similarly, if the Vmain power supply decreases, the PWM amplifier will be controlled to increase the PWM duty cycle due to the opposite reason, the MOS tube conduction time will be prolonged, and the output voltage of the transformer T1 will increase; through the above process, the embodiment of the present application will output a stable +12V power supply for the PD device.

[0042] The LINE pin of chip MP6001 is externally connected to a voltage-dividing sampling circuit composed of resistors R2 and R16. When the sampling voltage is between 1.2V and 3V, the chip can work normally. When it exceeds this range, chip MP6001 will enter standby mode. This pin can also be used as an enable switch for remote standby control.

[0043] The COMP pin of chip MP6001 is the negative feedback output terminal of the feedback signal error amplifier; the external resistor R7 of the RT pin of chip MP6001 is used to determine the PWM signal oscillation frequency of chip MP6001; its calculation formula is: RT=10K*550Hz / Fs; capacitor C6 and resistor R9 are the spike absorption circuit in parallel with the voltage regulator Q2, which is used to protect the voltage regulator Q2; the embodiment of the present application also includes capacitor C20, which is a Y capacitor connected between the primary and secondary ground lines of the transformer to filter out common-mode interference.

[0044] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention is disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with the profession can make some changes or modifications to equivalent embodiments of equivalent changes by using the technical contents disclosed above without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent changes and modifications made to the above embodiments according to the technology of the present invention are within the scope of the technical solution of the present invention without departing from the content of the technical solution of the present invention.

Claims

1. A conversion circuit of a flyback DC-DC converter, characterized in that: It includes a rectifier input filter circuit, a PD detection circuit, a flyback DC-DC conversion circuit and a sampling feedback voltage stabilization circuit, wherein the rectifier input filter circuit is connected to the input end of the flyback DC-DC conversion circuit; the PD detection circuit includes a PD detection resistor R1, and the PD detection resistor R1 is connected in parallel between the rectifier input filter circuit and the flyback DC-DC conversion circuit; the flyback DC-DC conversion circuit is used to convert high-voltage direct current into low-voltage alternating current and then rectify it into 12V direct current after rectification and filtering at the output end; the sampling feedback voltage stabilization circuit is connected to the output end of the flyback DC-DC conversion circuit, and the sampling feedback voltage stabilization circuit is used to sample the output voltage of the flyback DC-DC conversion circuit and perform voltage stabilization processing according to the output voltage.

2. The conversion circuit of a flyback DC-DC converter according to claim 1, characterized in that: The rectifier input filter circuit includes a rectifier bridge circuit D1, a rectifier bridge circuit D2, a capacitor EC1, a capacitor C1, a capacitor C2 and a Zener diode D3. The capacitor EC1, the capacitor C1, the capacitor C2 and the Zener diode D3 are connected in parallel in sequence. The first pin of the rectifier bridge circuit D1 and the first pin of the rectifier bridge circuit D2 are connected to one end of the PD detection resistor R1, and the second pin of the rectifier bridge circuit D1 and the second pin of the rectifier bridge circuit D2 are connected to ground; one end of the PD detection resistor R1 is connected to the cathode of the Zener diode D3, and the anode of the Zener diode D3 and the other end of the PD detection resistor R1 are grounded respectively.

3. The conversion circuit of a flyback DC-DC converter according to claim 1, characterized in that: The flyback DC-DC conversion circuit includes a control chip U1, a capacitor EC2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C7, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a Zener diode D4, a Zener diode D5, a Zener diode D6, a Zener diode D7, a diode D8 and a transformer T1; The PD detection resistor R1 is respectively connected to the VIN pin of the control chip U1, and the VIN pin of the control chip U1 is connected to the first pin of the transformer T1; The SW pin of the control chip U1 is connected to the third pin of the transformer T1 and the anode of the voltage stabilizing diode D7, the cathode of the voltage stabilizing diode D7 is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the first pin of the transformer T1, and the resistor R4 and the capacitor C5 are connected in parallel with the resistor R3 respectively; The fifth pin of the transformer T1 is connected to the anode of the Zener diode D6, the cathode of the Zener diode D6 is connected to one end of the resistor R15, the other end of the resistor R15 is respectively connected to the anode of the Zener diode D5, the cathode of the Zener diode D4 and one end of the capacitor EC2, the other end of the capacitor EC2 is connected to the anode of the Zener diode D4 and then grounded, and the cathode of the Zener diode D5 is connected to the VCC pin of the control chip U1; The VCC pin of the control chip U1 is connected to one end of the capacitor C3, the other end of the capacitor C3 is grounded, the RT pin of the control chip U1 is connected to one end of the resistor R7, the other end of the resistor R7 is grounded, and the fourth pin of the transformer T1 and the GND pin of the control chip U1 are grounded respectively; The eighth pin of the transformer T1 is grounded, the tenth pin of the transformer T1 is respectively connected to one end of the capacitor C7 and the anode of the diode D8, the other end of the capacitor C7 is connected to one end of the resistor R12, and the other end of the resistor R12 is connected to the cathode of the diode D8.

4. The conversion circuit of a flyback DC-DC converter according to claim 3, characterized in that: The flyback DC-DC conversion circuit further includes a resistor R2 and a resistor R16, which are connected in parallel with the PD detection resistor R1, and a LINE pin of the control chip U1 is connected to the connection between the resistor R2 and the resistor R16.

5. The conversion circuit of a flyback DC-DC converter according to claim 3, characterized in that: The sampling feedback voltage stabilization circuit includes an optocoupler U2, a voltage regulator Q2, a capacitor C6, a capacitor C8, a capacitor C9, a resistor R9, a resistor R10, a resistor R11, a resistor R14, and a capacitor EC3. One end of the resistor R10, one end of the resistor R11, and one end of the capacitor EC3 are respectively connected to the cathode of the diode D8, the capacitor C8 is connected in parallel with the capacitor EC3, the capacitor C9 is connected in parallel with the capacitor C8, the other end of the capacitor EC3 is grounded, the other end of the resistor R11 is connected to one end of the resistor R14, the other end of the resistor R14 is grounded, the other end of the resistor R10 is connected to the first pin of the optocoupler U2, and the second pin of the optocoupler U2 is connected to the The third pin of the voltage regulator Q2 is connected to ground, the third pin of the optocoupler U2 is connected to the cathode of the voltage regulator diode D5, the fourth pin of the optocoupler U2 is connected to one end of the resistor R8 and one end of the resistor R6, the other end of the resistor R6 is connected to one end of the capacitor C4 and one end of the resistor R13, the other end of the capacitor C4 is connected to one end of the resistor R5, the other end of the resistor R5 and the other end of the resistor R13 are respectively connected to the COMP pin of the control chip U1, and the other end of the resistor R8 is grounded.

6. The conversion circuit of a flyback DC-DC converter according to claim 3, characterized in that: The model of the control chip U1 is MP6001.

7. The conversion circuit of a flyback DC-DC converter according to claim 1, characterized in that: The resistance of the PD detection resistor R1 is 24.9KΩ.

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