Full-digital hysteresis control method for on-line prediction of sampling time of three-level inverter without inductance value

Abstract

The invention relates to a full-digital hysteresis control method for on-line prediction of sampling time of a non-inductance three-level inverter, belongs to the technical field of power electronic converters, and solves the problems that a full-digital hysteresis control algorithm of a three-level converter depends on a high sampling rate and is greatly influenced by parameters of a main circuit filter. The method comprises the steps of determining a mathematical model and a modulation method of the three-level converter, determining a full-digital three-level hysteresis control algorithm for online prediction of sampling time without inductance, and correcting a prediction sampling time interval. The full-digital hysteresis control method is used for hysteresis control simulation of the three-level inverter without inductance.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronic converters, and in particular relates to a fully digital hysteresis control method for online prediction of sampling time of a three-level inverter without inductance. Background Art

[0002] With the progress of society and the development of industry, power electronic devices have been widely used in various industries due to their superior performance in power transmission, distribution and transformation. Power electronic converters based on new energy power generation have made important contributions to solving the fossil energy crisis, curbing environmental pollution, solving carbon peak and achieving carbon neutrality. In addition, new electric vehicles represented by Tesla and BYD also widely use power electronic converters to drive high-speed motors to achieve unparalleled performance and very little pollution emissions. In power electronic converters, in addition to the circuit itself, the core of achieving superior output performance lies in its control strategy. For a hundred years, classic power electronic converters have adopted the traditional proportional integral differential (PID) control strategy. The hysteresis control algorithm has many advantages over the traditional PID control algorithm: it can track any form of command signal, the tracking error accuracy can be controlled and adjusted, and the control bandwidth is extremely high. Therefore, it has been widely used in new energy power generation, electric drive, harmonic suppression, noise filtering and other occasions to achieve power conversion, improve power quality and electromagnetic protection. However, traditional digital hysteresis control must rely on high sampling rates to achieve relatively precise control accuracy, which is a great obstacle to increasing the control system frequency and reducing the size of the equipment. In addition, digital hysteresis control is very sensitive to the filter inductance parameters of the converter, has poor robustness, and is difficult to commercialize.

[0003] Many research works and results have been proposed to solve the problem that the fully digital hysteresis control strategy adopted by power electronic converters is too dependent on the sampling rate and is greatly affected by the filter, especially the filter inductance. In order to solve the problem that the digital hysteresis control method is too dependent on the sampling rate, some studies have proposed a control strategy based on oversampling and virtual sampling. Through a large number of repeated sampling and virtual sampling through sampling characteristics, the dependence of digital hysteresis control on high sampling rate is reduced. However, the sampling rate of this method is still high, the data storage volume is large, and the credibility of the virtual sampling data needs to be further verified. Some studies have proposed an online sampling time prediction algorithm, which reduces the sampling rate and improves the control accuracy and effect by predicting the sampling time interval of the next sampling point. However, these methods do not consider that with the change of power and output current, the inductance of the main circuit will also change nonlinearly, resulting in the deviation of its prediction time and the final control effect is poor. As a further improvement, another study proposed to change the number of output levels of the power electronic converter through the error current at different stages to improve the accuracy and dynamic response speed of hysteresis control. However, this method will increase the switching loss and the control process is extremely complicated, which is not conducive to productization and its cost will increase. Therefore, it is also necessary to conduct a systematic study on the fully digital hysteresis control strategy of power electronic converters, especially the widely used three-level converters. Summary of the invention

[0004] In order to solve the problem that the fully digital hysteresis control algorithm of the three-level converter relies on high sampling rate and is greatly affected by the main circuit filter parameters, the present invention proposes a fully digital hysteresis control method for online prediction of the sampling time of a three-level inverter without inductance.

[0005] The technical solution adopted by the present invention to solve the technical problem is:

[0006] A fully digital hysteresis control method for online prediction of sampling time of a three-level inverter without inductance comprises the following steps:

[0007] Step 1: Determine the mathematical model and modulation method of the three-level converter

[0008] According to Kirchhoff's voltage law and current law, the mathematical model of the three-level converter is calculated; according to the modulation law of the switch tube of the three-level converter, the working state table of the three-level converter is obtained; through the modulation working state table of the three-level converter, the mathematical relationship between the change rate of the inductor current of any phase on the three-level converter side and the switching state of the switch tube of its corresponding phase bridge arm is derived; through the control logic relationship at the intersection of the hysteresis control sampling point and the loop width, the mathematical relationship between the sampling time interval and the current change rate under the full digital hysteresis control is derived.

[0009] Step 2: Determine the fully digital three-level hysteresis control algorithm for online prediction of the sampling time without inductance

[0010] Simplify the main inductance parameters of the filter of the three-level converter, derive the changing relationship of the hysteresis control loop width when the control frequency of the theoretical digital hysteresis control is kept fixed; obtain the expressions of the command current, hysteresis control loop width and their upper and lower boundaries at adjacent sampling moments; determine the predicted sampling time interval; determine the relationship between the sampling time prediction value and the switch control quantity.

[0011] Step 3: Correct the predicted sampling time interval

[0012] The predicted sampling time interval is corrected; the correction time is determined to obtain the fully digital hysteresis sampling time.

[0013] The above-mentioned fully digital hysteresis control method, the step 1, determining the mathematical model and modulation method of the three-level converter, further comprises:

[0014] In the mathematical model calculation of the three-level converter, the side inductance L of any phase of the three-level converter r The calculation formula is as follows:

[0015]

[0016] In formula (1), represents the current in the inductor on the converter side, is the differential operation of the inductor current on the converter side, V(t) represents the PWM voltage at the converter side port, and E(t) represents the grid voltage on the grid side.

[0017] The mathematical relationship between the change rate of the inductor current of any phase on the three-level converter side and the switching state of the switch tube of the corresponding phase bridge arm is:

[0018]

[0019] In formula (2), Indicates the rate of change of the inductor current of any phase on the converter side, U dc represents the total DC voltage on the DC side of the three-level converter, is the control variable, S 1a , S 2a They represent the switching state of the switch tube in any phase bridge arm of the three-level converter, E g It represents the grid voltage on the grid side, and L is the inductance on the inverter side.

[0020] The mathematical relationship between the sampling time interval and the current change rate under full digital hysteresis control is expressed as follows:

[0021]

[0022] In formula (3), ΔT = t(n+1)-t(n) represents the sampling time interval of hysteresis control, B up (n) = i ref (n)+H represents the upper limit of the loop width of the hysteresis control at the nth sampling time, n represents the nth sampling time under digital control, H is the loop width of the hysteresis control, i ref Indicates the command current, that is, the target current expected to be output at the nth moment. i (n) represents the rate of change of the inductor current on the converter side at the nth sampling moment, and i(n) represents the current value actually sampled on the converter side at the nth sampling moment.

[0023] The above-mentioned fully digital hysteresis control method, the step 2, determining the fully digital three-level hysteresis control algorithm for online prediction of the sampling time without inductance, further comprises:

[0024] The change relationship that the hysteresis control loop width should satisfy is as follows:

[0025]

[0026] In formula (4): represents the modulation degree at the current time t, U dc represents the total DC voltage value of the DC side of the three-level converter, f s represents the desired fixed target switching frequency, and L represents the AC side filter inductor.

[0027] The expressions of the command current, hysteresis control loop width and its upper and lower boundaries at adjacent sampling moments are as follows:

[0028]

[0029] In formula (5), k-1 is the sampling point before the kth sampling point, i ref is the target output command current of the three-phase three-level converter, H is the loop width of the fully digital hysteresis control, B up is the upper limit of the loop width of the fully digital hysteresis control, B down It is the lower bound of the loop width of the fully digital hysteresis control.

[0030] The predicted sampling time interval is expressed as follows:

[0031]

[0032] In formula (6), ΔT pre The sampling interval for prediction.

[0033] The relationship between the sampling time prediction value and the switch control quantity is expressed as follows:

[0034]

[0035] In formula (7), T s For the desired fixed switching period of digital hysteresis control, is the control variable.

[0036] The above-mentioned fully digital hysteresis control method, the step three, correcting the predicted sampling time interval, further comprises:

[0037] Starting from the kth sampling time, after ΔT pre After k+1 samplings are performed, the difference between the sampled current i(k+1) and the current i(k) obtained by the kth sampling is calculated and compared with the loop width H of the hysteresis control. When |Δi(k)|=|i(k)-i(k+1)|≥H, there is no need to predict the sampling time interval ΔT pre Make corrections.

[0038] When the difference |Δi(k)|=|i(k)-i(k+1)|<H, the predicted sampling time interval ΔT needs to be pre Make corrections.

[0039] Determine the correction time. Let e(k) = H - |Δi(k)| represent the error current. Then the correction time is expressed as:

[0040]

[0041] The final online prediction algorithm for sampling time without inductance is expressed as:

[0042]

[0043] In formula (9):

[0044] The beneficial effects of the present invention are:

[0045] A fully digital hysteresis control method for online prediction of sampling time of a three-level inverter without inductance is disclosed. The mathematical model of the three-level converter is combined with the characteristics of its modulation strategy to obtain a fully digital hysteresis sampling time prediction method. The influence of the main circuit filter, especially the filter inductance, on the sampling time and sampling rate is offset by the prediction algorithm, and the sampling time prediction correction of the algorithm is performed according to the deviation of the prediction result, and periodic iterative correction is performed at the same time, thereby solving the problem that the fully digital hysteresis control algorithm of the three-level converter relies on high sampling rate and is greatly affected by the main circuit filter parameters. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 It is the main circuit topology of a three-phase T-type three-level converter;

[0047] Figure 2 It is the main circuit topology of three-phase I type three-level converter

[0048] Figure 3 It is a schematic diagram of sampling time prediction correction under digital hysteresis control;

[0049] Figure 4 It is the overall system control block diagram of the fully digital hysteresis control based on the online prediction of the sampling time of the three-level inverter without inductance;

[0050] Figure 5 is a schematic diagram of a steady-state output waveform using the hysteresis control method of an embodiment of the present invention;

[0051] Figure 6 It is an online prediction correction diagram of the sampling time of the hysteresis control method according to the embodiment of the present invention. DETAILED DESCRIPTION

[0052] The present invention will be described in more detail below with reference to examples.

[0053] As attached Figure 1-4 As shown, the present invention proposes a fully digital hysteresis control method for online prediction of sampling time of a three-level inverter without inductance. Specifically, the mathematical model of the three-level converter is combined with the characteristics of its modulation strategy to obtain a fully digital hysteresis sampling time prediction method. Through the prediction algorithm, the influence of the main circuit filter, especially the filter inductance, on the sampling time and sampling rate is offset, and the sampling time prediction correction of the algorithm is performed according to the deviation of the prediction result, and periodic iterative correction is performed at the same time, thereby solving the problem that the fully digital hysteresis control algorithm of the three-level converter relies on high sampling rate and is greatly affected by the main circuit filter parameters. The steps are as follows:

[0054] Step 1: Determine the mathematical model and modulation method of the three-level converter

[0055] Step 1.1, such as Figure 1 As shown, according to Kirchhoff's voltage law and current law, the mathematical model of the three-level converter is calculated. Taking any one of the three phases as an example (the other two phases are exactly the same), its expression is as follows:

[0056]

[0057] Among them, L r represents the inductance on the converter side, represents the current in the inductor on the converter side, is the differential operation of the inductor current on the converter side, V(t) represents the PWM voltage at the converter side port, and E(t) represents the grid voltage on the grid side. In the process of establishing the mathematical model, according to the characteristics of the actual product, the inductor L on the inverter side is ignored.r The series equivalent resistance R r , and the general LCL filter usually has a grid-side inductor L when it is designed. g <<L r Therefore, the grid-side inductance L g The voltage drop across can also be ignored.

[0058] Step 1.2, according to the modulation law of the switch tube of the three-level converter, its working state table can be obtained, taking any phase among the three phases as an example (the other two phases are exactly the same), as shown in Table 1:

[0059] Table 1

[0060]

[0061] In the table, S 1a , S 2a , and They represent the switching states of the four switches in any phase bridge arm of the three-level converter, and and They are S 1a and S 2a The logical inverse state. x =1 (x=1a or 2a) indicates that the switch is turned on. x =0 (x=1a or 2a) indicates that the switch is turned off. g Represents the grid voltage on the grid side, V x (x=a,b,c) represents the PWM voltage at the converter side port of any phase in the three-phase output, is the rate of change of the inductor current on the converter side.

[0062] Step 1.3, through the modulation relationship table of the three-level converter in step 1.2, derive the mathematical relationship between the change rate of the inductor current of any phase on the converter side and the switching state of the switch tube of the corresponding phase bridge arm, and the expression is as follows:

[0063]

[0064] In the formula, Indicates the rate of change of the inductor current of any phase on the converter side, U dc represents the total DC voltage on the DC side of the three-level converter, is the control variable.

[0065] Step 1.4, through the control logic relationship between the hysteresis control sampling point and the loop width intersection, derive the mathematical relationship between the sampling time interval and the current change rate under full digital hysteresis control, and its expression is as follows:

[0066]

[0067] Where, ΔT = t(n+1)-t(n) represents the hysteresis control sampling time interval, B up (n) = i ref (n)+H represents the upper limit of the loop width of the hysteresis control at the nth sampling time, n represents the nth sampling time under digital control, H is the loop width of the hysteresis control, i ref represents the command current, i.e. the target current expected to be output at the nth moment, k i (n) represents the rate of change of the inductor current on the converter side at the nth sampling moment, and i(n) represents the current value actually sampled on the converter side at the nth sampling moment.

[0068] Step 2: Determine the fully digital three-level hysteresis control algorithm for online prediction of the sampling time without inductance

[0069] Step 2.1, for a three-phase three-level converter, regardless of whether its AC filter is L-type, LC-type or LCL-type, the main inductance parameters of the filter can be simplified, and the variation relationship that the hysteresis control loop width should satisfy when the control frequency of the theoretical digital hysteresis control is expected to remain fixed can be derived, as shown below:

[0070]

[0071] Where: represents the modulation degree at the current time t, U dc represents the total DC voltage value of the DC side of the three-level converter, f s represents the desired fixed target switching frequency, and L represents the AC side filter inductor.

[0072] Step 2.2, for a three-phase three-level converter, its switching frequency is usually much higher than the power frequency of the power grid, and the frequency of change of the digital hysteresis control loop width H derived in step 2.1 is only twice the power frequency. Therefore, it is assumed that the loop width H remains unchanged in each switching cycle. And the three-level converter usually has a command current signal i ref It is also the power frequency component, so it remains unchanged in each switching cycle. From this, we can get the expressions of the command current, hysteresis control loop width and its upper and lower boundaries at adjacent sampling moments:

[0073]

[0074] In the formula, k-1 is the sampling point before the kth sampling point, i ref is the target output command current of the three-phase three-level converter, H is the loop width of the fully digital hysteresis control, B up is the upper limit of the loop width of the fully digital hysteresis control, B down It is the lower bound of the loop width of the fully digital hysteresis control.

[0075] Step 2.3, determine the predicted value of the sampling time, such as Figure 2 As shown, through step 2.2, the predicted sampling time interval is determined, and the expression is as follows:

[0076]

[0077] Where, ΔT pre The sampling interval for prediction.

[0078] Step 2.4, determine the relationship between the sampling time prediction value and the switch control amount, substitute the formula obtained in step 1.3 and step 2.1 into the predicted value of the sampling time interval in step 2.3, eliminate the influence of the filter parameters, and obtain the following expression:

[0079]

[0080] Where, T s For the desired fixed switching period of digital hysteresis control, is the control variable.

[0081] Step 3: Correct the predicted sampling time interval

[0082] Step 3.1, start timing from the kth sampling time, after ΔT pre After k+1 samplings are performed, the difference between the sampled current i(k+1) and the current i(k) obtained by the kth sampling is calculated and compared with the loop width H of the hysteresis control. When |Δi(k)|=|i(k)-i(k+1)|≥H, there is no need to predict the sampling time interval ΔT pre Make corrections, such as Figure 3 When the difference |Δi(k)|=|i(k)-i(k+1)|<H, the predicted sampling time interval ΔT needs to be pre Make corrections.

[0083] Step 3.2, determine the correction time, let e(k) = H-|Δi(k)| represent the error current, then the correction time can be expressed as:

[0084]

[0085] The final online prediction algorithm for sampling time without inductance can be expressed as:

[0086]

[0087] in: is the control variable.

[0088] The present invention combines the mathematical model of the three-phase three-level converter with the characteristics of its modulation strategy to obtain a fully digital hysteresis sampling time budget method. Through the prediction algorithm, the influence of the main circuit filter, especially the filter inductance, on the sampling time and sampling rate is offset, and the sampling time prediction correction of the algorithm is performed according to the deviation of the prediction result, and periodic iterative correction is performed at the same time, thereby solving the problem that the fully digital hysteresis control algorithm of the three-level converter relies on a high sampling rate and is greatly affected by the main circuit filter parameters.

[0089] The fully digital hysteresis control method for online prediction of sampling time of a three-level inverter without inductance in the present invention is verified in simulation software according to the above steps. Figure 5 , Figure 6 As shown in the figure, the simulation results prove that this method is correct and reliable, and provides a good reference value for engineering applications.

Claims

1. A fully digital hysteresis control method for online prediction of sampling time of a three-level inverter without inductance, characterized in that: The following steps are involved: Step 1: Determine the mathematical model and modulation method of the three-level converter: According to Kirchhoff's voltage law and current law, the mathematical model of the three-level converter is calculated; according to the modulation law of the switch tube of the three-level converter, the working state table of the three-level converter is obtained; through the modulation working state table of the three-level converter, the mathematical relationship between the change rate of the inductor current of any phase on the three-level converter side and the switch state of the switch tube of its corresponding phase bridge arm is derived; through the control logic relationship at the intersection of the hysteresis control sampling point and the loop width, the mathematical relationship between the sampling time interval and the current change rate under the full digital hysteresis control is derived; Step 2: Determine the fully digital three-level hysteresis control algorithm for online prediction of sampling time without inductance: Simplify the main inductance parameters of the filter of the three-level converter, derive the change relationship of the hysteresis control loop width when the control frequency of the theoretical digital hysteresis control is kept fixed; obtain the expressions of the command current, hysteresis control loop width and its upper and lower boundaries at adjacent sampling moments; determine the predicted sampling time interval; determine the relationship between the sampling time prediction value and the switch control quantity; Step 3, correct the predicted sampling time interval: The predicted sampling time interval is corrected; the correction time is determined to obtain the fully digital hysteresis sampling time.

2. The fully digital hysteresis control method according to claim 1, characterized in that: The step 1, determining a mathematical model and a modulation method of a three-level converter, further comprises: In the mathematical model calculation of the three-level converter, the side inductance L of any phase of the three-level converter r The calculation formula is as follows: In formula (1), i Lr represents the current in the inductor on the converter side, is the differential operation of the inductor current on the converter side, V(t) represents the PWM voltage at the converter side port, and E(t) represents the grid voltage on the grid side; The mathematical relationship between the change rate of the inductor current of any phase on the three-level converter side and the switching state of the switch tube of the corresponding phase bridge arm is: In formula (2), Indicates the rate of change of the inductor current of any phase on the converter side, U dc represents the total DC voltage on the DC side of the three-level converter, is the control variable, S 1a , S 2a They represent the switching state of the switch tube in any phase bridge arm of the three-level converter, E g represents the grid voltage on the grid side, L is the inductance on the inverter side; The mathematical relationship between the sampling time interval and the current change rate under full digital hysteresis control is expressed as follows: In formula (3), ΔT = t(n+1)-t(n) represents the sampling time interval of hysteresis control, B up (n) = i ref (n)+H represents the upper limit of the loop width of the hysteresis control at the nth sampling time, n represents the nth sampling time under digital control, H is the loop width of the hysteresis control, i ref represents the command current, that is, the target current expected to be output at the nth moment; k i (n) represents the rate of change of the inductor current on the converter side at the nth sampling moment, and i(n) represents the current value actually sampled on the converter side at the nth sampling moment.

3. The fully digital hysteresis control method according to claim 1, characterized in that: The step 2, determining the fully digital three-level hysteresis control algorithm for online prediction of the sampling time without inductance, further comprises: The change relationship that the hysteresis control loop width should satisfy is as follows: In formula (4): represents the modulation degree at the current time t, U dc represents the total DC voltage value of the DC side of the three-level converter, f s represents the desired fixed target switching frequency, L represents the AC side filter inductance; The expressions of the command current, hysteresis control loop width and its upper and lower boundaries at adjacent sampling moments are as follows: In formula (5), k-1 is the sampling point before the kth sampling point, i ref is the target output command current of the three-phase three-level converter, H is the loop width of the fully digital hysteresis control, B up is the upper limit of the loop width of the fully digital hysteresis control, B down It is the lower bound of the loop width of the fully digital hysteresis control; The predicted sampling time interval is expressed as follows: In formula (6), ΔT pre The predicted sampling interval; The relationship between the sampling time prediction value and the switch control quantity is expressed as follows: In formula (7), T s For the desired fixed switching period of digital hysteresis control, is the control variable.

4. The fully digital hysteresis control method according to claim 1, characterized in that: The step three, correcting the predicted sampling time interval, further comprises: Starting from the kth sampling time, after ΔT pre After the k+1th sampling time, the difference between the obtained sampling current i(k+1) and the current i(k) obtained by the kth sampling is calculated and compared with the loop width H of the hysteresis control; when |Δi(k)|=|i(k)-i(k+1)|≥H, there is no need to predict the sampling time interval ΔT pre Make corrections; When the difference |Δi(k)|=|i(k)-i(k+1)|<H, the predicted sampling time interval ΔT needs to be pre Make corrections; Determine the correction time. Let e(k) = H - |Δi(k)| represent the error current. Then the correction time is expressed as: The final online prediction algorithm for sampling time without inductance is expressed as: In formula (9):

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