A multi-channel transceiver integrated system based on RFSOC and radio frequency SIP

Abstract

The present invention discloses a multi-channel transceiver integrated system based on RFSOC and radio frequency SIP, which includes an RFSOC system, a multi-channel clock synchronization module, a radio frequency SIP system, and a power network; the RFSOC system includes a control and sampling module, a storage module, and an optical fiber module, the control and sampling module includes multiple RFSOC chips, a CPLD chip, and a main control chip, the RFSOC chips are used to process intermediate frequency signals and realize data interaction with the optical fiber module; the CPLD chip is used to enable the power network; the main control chip is used to perform control and coordination between multiple RFSOC chips; the storage module is used to realize program solidification of the RFSOC system; the optical fiber module is used to realize high-speed transmission of broadband received data; the multi-channel clock synchronization module is used to provide a clock reference for the entire system; the radio frequency SIP system includes a radio frequency SIP module, a balun network, and a local oscillator power distribution and amplification module, and the radio frequency SIP module realizes reception, transmission, and processing of multi-channel radio frequency signals. The present invention can realize a multi-channel transceiver integrated system with high integration, large bandwidth, and miniaturization.

Description

Technical Field

[0001] The present invention belongs to the technical field of digital transceiver components, and particularly relates to a multi-channel transceiver integrated system based on RFSOC (Radio Frequency System on Chip) and radio frequency SIP (System In a Package). Background Art

[0002] A multi-channel transceiver integrated system refers to a system that integrates the transmitting and receiving functions of multiple channels, enabling the system to process multiple signals simultaneously. It is usually used in scenarios that require high data throughput and complex signal processing, such as radar systems. However, existing transceiver integrated systems have a narrow instantaneous bandwidth, a relatively large overall size, and poor flexibility, and cannot well adapt to the future intelligent radar electronic warfare field. Summary of the Invention

[0003] The purpose of the present invention is to provide a high-integration, large-bandwidth, and miniaturized multi-channel transceiver integrated system based on RFSOC and radio frequency SIP.

[0004] To achieve the above purpose, one aspect of the present invention provides a multi-channel transceiver integrated system based on RFSOC and radio frequency SIP, including an RFSOC system, a multi-channel clock synchronization module, a radio frequency SIP system, and a power network;

[0005] The RFSOC system includes a control and sampling module, a storage module, and an optical fiber module. The control and sampling module includes multiple RFSOC chips, a CPLD chip, and a main control chip. The RFSOC chips are used to receive the control and synchronization signals from the main control chip, implement the processing of received intermediate frequency signals and transmitted intermediate frequency signals, and implement data interaction with the optical fiber module; the CPLD chip is used to receive the monitoring signals from the power network and generate an enabling signal to enable the power network; the main control chip is used to receive the control and synchronization signals from the outside and perform control coordination between multiple RFSOC chips;

[0006] The storage module is used to implement program solidification of the RFSOC system; the optical fiber module is used to receive the control and synchronization signals from the outside through the main control chip, and implement high-speed transmission of broadband received data through the RFSOC chips;

[0007] The multi-channel clock synchronization module is used to provide a clock reference for the entire system and achieve phase synchronization of multiple receiving and transmitting channels;

[0008] The RF SIP system includes an RF SIP module, a balun network, and a local oscillator power splitting and amplifying module. The RF SIP module uses microsystem technology to receive, transmit, and process multi-channel RF signals. The balun network is used to convert the single-ended and differential intermediate-frequency signals mutually. The local oscillator power splitting and amplifying module is used to amplify the local oscillator signal and perform power distribution for multiple channels.

[0009] Preferably, the RFSOC chip integrates a hardware high-speed interface, multi-channel ADCs, multi-channel DACs, and an ARM core.

[0010] The hardware high-speed interface is used for interconnected communication with the optical fiber module.

[0011] The multi-channel ADCs are used to sample RF broadband signals and transmit the sampled signal data to the ARM core.

[0012] The multi-channel DACs are used to generate RF broadband signals and provide output signals with a bandwidth exceeding 1 GHz.

[0013] The ARM core is used to implement the multiplication and addition operation function for the sampled signal data.

[0014] Preferably, the storage module includes a FLASH and a DDR4 chip. The FLASH is used for program solidification storage of the RFSOC system, and the DDR4 chip is used to cache the intermediate-frequency signal data required by the multi-channel DACs.

[0015] Preferably, the optical fiber module is divided into two parts. One part is interconnected by the main control chip and an external array synchronization combination device to receive the control and synchronization signals of the array synchronization combination device. The other part is interconnected by the RFSOC chip and an external digital beam combination system for high-speed transmission of broadband received data.

[0016] Preferably, the microsystem technology is a radio frequency microsystem that uses a ceramic substrate or an active substrate and is miniaturized through packaging technology.

[0017] Preferably, the RF SIP module uses CLTE board material and a double-layer POP structure, realizes the RF signal interconnection between the two layers through silicon capacitors, uses wire bonding for interconnection on the same layer, uses wire bonding inside for spatial signal isolation, performs capping treatment on the top layer through ceramic materials, and completes BGA solder ball treatment on the bottom layer through ball planting technology.

[0018] Preferably, the local oscillator power splitting and amplifying module is embedded in the board material of the RF SIP module. The RF SIP module inputs and outputs 16 RF signals and inputs 1 local oscillator signal. The RF SIP module is vertically interconnected with the RFSOC system through vertical interconnection.

[0019] The multi-channel transceiver integrated system based on RFSOC and radio frequency SIP according to the above aspects of the present invention can realize a multi-channel transceiver integrated system with high integration, large bandwidth and miniaturization. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings:

[0021] Figure 1 is a schematic structural diagram of a multi-channel transceiver integrated system based on RFSOC and radio frequency SIP according to an embodiment of the present invention;

[0022] Figure 2 is a schematic diagram of the internal packaging of a radio frequency SIP module according to an embodiment of the present invention;

[0023] Figure 3 is a schematic diagram of the integrated structure of an RFSOC system and a radio frequency SIP module according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0024] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of them. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0025] An embodiment of the present invention provides a multi-channel transceiver integrated system based on RFSOC and radio frequency SIP, as Figure 1 shown, the multi-channel transceiver integrated system based on RFSOC and radio frequency SIP according to the embodiment of the present invention includes an RFSOC system, a multi-channel clock synchronization module, a radio frequency SIP system and a power network. The RFSOC system and the multi-channel clock synchronization module are connected by printed circuit board-level traces. The input / output ports of the RFSOC system are connected to the input / output ports of the radio frequency SIP system.

[0026] The RFSOC system includes a control and sampling module, a storage module, and an optical fiber module. Among them, the control and sampling module includes an RFSOC chip, a CPLD (Complex Programmable Logic Device) chip, and a main control chip.

[0027] The RFSOC chip integrates a hardware high-speed interface, high-speed multi-channel ADC, high-speed multi-channel DAC, and ARM core. It is used to receive control and synchronization signals from the master control chip, and realizes sampling of the received intermediate frequency signal (F≥1.8GHz), amplitude threshold detection, quadrature multiplexing carrier (QMC) gain compensation, I / Q (In-phase / Quadrature) mixing, decimation, polyphase filtering, realizes mixing of the transmitted intermediate frequency signal (F≥1.8GHz), quadrature multiplexing carrier gain compensation, interpolation, parallel input serial output (PISO) decoding, anti-sinc filtering, equalization, pulse compression, and realizes data interaction with the optical fiber module.

[0028] The hardware high-speed interface supports a transmission rate of up to 32Gbps, supports multiple protocols, is used for interface control synchronization signals, and is used for interconnection and communication with the high-speed optical fiber module. The multi-channel ADC is used to sample radio frequency broadband signals, receive SYSREF synchronization signals (System Synchronization Reference), receive externally input radio frequency GHz clocks, provide sampling data with a bandwidth exceeding 1GHz, and transmit the data to the ARM core. The multi-channel DAC is used to generate radio frequency broadband signals, receive SYSREF synchronization signals, receive externally input radio frequency GHz clocks, and provide output signals with a bandwidth exceeding 1GHz. The ARM core is used to implement the multiply-accumulate operation function of the sampled signal data.

[0029] The CPLD chip is used for power control of multiple power rails of the system, power-on monitoring, and drive conversion of different signal levels. The master control chip is used to receive control and synchronization signals from the outside, complete chip control coordination between RFSOCs, and realize the health management of multiple chips.

[0030] The storage module includes FLASH and DDR4. Among them, FLASH is used for the solid-state storage function of the RFSOC system program. It adopts a multi-chip SelectMAP mode, and multiple chips are cascaded and share the same storage chip to realize the program solidification function of the FSOC system; the DDR4 chip is used to cache the intermediate frequency signal data required by the multi-channel DAC module.

[0031] The optical fiber module is divided into two parts. One part is interconnected by the main control chip of the control and sampling module and the external array synchronization combination device, and is used to receive the control and synchronization signals of the array synchronization combination device; the other part is interconnected by the RFSOC chip of the control and sampling module and the external Digital Beamforming (DBF) system, and is used for the high-speed transmission of broadband received data, with a communication rate ≥ 25 Gbps.

[0032] The multi-channel clock synchronization module includes a clock, which is used to complete the clock reference supply of the entire system and realize the phase synchronization function of multiple receiving and transmitting channels.

[0033] The RF SIP system includes: an RF SIP module, a balun network, and a local oscillator power distribution and amplification module. The RF SIP module uses microsystem technology to realize the functions of receiving, transmitting, amplifying, frequency conversion, attenuation, filtering, etc. of multi-channel RF signals. The balun network is used to realize the mutual conversion between single-ended and differential of intermediate frequency transmitting and receiving signals. The local oscillator power distribution and amplification module realizes the amplification of the local oscillator signal and the power distribution of multiple channels.

[0034] The microsystem technology is a miniaturized RF microsystem realized by using a ceramic substrate or an active substrate and through packaging technologies such as wire bond, flip-chip hybrid bonding, and Redistribution Layer (RDL).

[0035] The working process of the multi-channel transceiver integrated system based on RFSOC and RF SIP according to the embodiments of the present invention is as follows:

[0036] After the external power is powered on, the CPLD chip is powered on first, receives the monitoring signals from the power network, and generates multi-power rail power enable signals to enable the entire system power network.

[0037] After the system is powered on, the main control chip receives the external control and synchronization signals through the optical fiber interface of the external array synchronization combination device. The main control chip analyzes the relevant control words and optical synchronization signals according to the protocol, enables and configures the multi-channel clock synchronization module, and distributes the control signals to the RFSOC system through the high-speed serial bus at the same time.

[0038] The RFSOC system receives the control and synchronization signals from the main control chip through the high-speed serial bus. At the same time, the multi-channel clock synchronization module provides clock synchronization signals to the multi-channel ADC and DAC inside the RFSOC system. The RFSOC system performs internal initialization configuration of the multi-channel ADC and DAC according to the requirements of the control word.

[0039] External signals enter the RF SIP module through the antenna unit, and are amplified, attenuated, and frequency-converted to obtain broadband intermediate-frequency signals, which then enter the RFSOC system.

[0040] The RFSOC system generates broadband intermediate-frequency signals, which enter the RF SIP module. The broadband intermediate-frequency signals (single-carrier frequency / linear frequency modulation) are amplified, attenuated, and frequency-converted to obtain broadband RF signals, which are then transmitted through the antenna.

[0041] In a specific embodiment, the RF SIP system completes the signal processing of the RF front end by internally integrating and soldering a frequency-converting SIP module. The external local oscillator signal enters the RF SIP system and is distributed and amplified through the local oscillator power distribution and amplification module to send out 16 local oscillator signals.

[0042] The RFSOC system is connected to the RF SIP module and simultaneously completes broadband signal sampling and the generation of broadband waveform data. Inside the RFSOC system, the sampled data is packaged, and according to the requirements of the control word, the number of packages and the data volume are adjusted, and then sent to the backend DBF system through the optical fiber module.

[0043] In a specific embodiment, as Figure 2 shown, the RF SIP module uses CLTE board material to achieve the transmission of RF signals. The RF SIP module adopts a double-layer POP structure. Due to the small volume, low ESR, and temperature stability of silicon capacitors, silicon capacitors are used to achieve the RF signal interconnection function between the two layers, and the same layer is interconnected by the Wire Bond method. Inside the RF SIP module, the wire bonding method is used for spatial signal isolation. The top layer of the RF SIP module is covered with ceramic material, and the bottom layer is completed with BGA solder ball treatment through the ball mounting technology.

[0044] In a specific embodiment, as Figure 3 shown, the local oscillator power distribution and amplification module is embedded in the board material of the RF SIP module. The RF SIP module externally inputs and outputs 16 RF signals and inputs 1 local oscillator signal. The RF SIP module uses SMA connectors and J63A connectors externally. The RF SIP module is vertically interconnected with the RFSOC system through a vertical interconnection method to reduce the RF signal transmission path. The RFSOC system has 9 optical fiber interfaces for external input and output. The entire RFSOC system and the RF SIP module integrated system complete the input and output configuration of the RF interface and the optical fiber interface.

[0045] The intermediate frequency bandwidth of the output signal of the multi-channel transceiver integrated system based on RFSOC and radio frequency SIP in the embodiment of the present invention is not less than 1000 MHz, the covered frequency band supports the S band and above, the instantaneous dynamic range reaches more than 60 dB, the system gain ≥ 50 dB, the transmission power supports a maximum output of +6 dBm, the phase consistency ≤ 3°, the overall size is 285*137*40 mm, the volume is reduced by more than 50% compared with traditional components, it supports 16 transceiver channels, the maximum data transmission supports 8 channels of 25 Gbps, the overall power consumption is reduced to 90%, and it can be externally extended to higher radio frequency bands by replacing the SIP, which is more flexible.

[0046] Only some exemplary embodiments of the present invention have been described by way of illustration above. Undoubtedly, for those of ordinary skill in the art, the described embodiments can be modified in various different ways without departing from the spirit and scope of the present invention. Therefore, the above drawings and descriptions are illustrative in nature and should not be construed as limiting the protection scope of the claims of the present invention.

Claims

1. A multi-channel transceiver system based on RFSOC and RF SIP, characterized in that: Including RFSOC system, multi-channel clock synchronization module, RF SIP system and power supply network; The RFSOC system includes a control sampling module, a storage module and an optical fiber module. The control sampling module includes multiple RFSOC chips, a CPLD chip and a main control chip. The RFSOC chip is used to receive the control and synchronization signals of the main control chip, realize the processing of receiving intermediate frequency signals and transmitting intermediate frequency signals, and realize data interaction with the optical fiber module; the CPLD chip is used to receive the monitoring signal from the power supply network, generate an enable signal to enable the power supply network of the entire system; the main control chip is used to receive the control and synchronization signals from the outside, and perform control coordination between multiple RFSOC chips; The storage module is used to implement program curing of the RFSOC system; the optical fiber module is used to receive control and synchronization signals from the outside through the main control chip, and to implement high-speed transmission of broadband received data through the RFSOC chip; The multi-channel clock synchronization module is used to provide a clock reference for the entire system and realize phase synchronization of multiple receiving and transmitting channels; The RF SIP system includes a RF SIP module, a balun network and a local oscillator power amplifier module. The RF SIP module adopts microsystem technology to realize the reception, transmission and processing of multi-channel RF signals; the balun network is used to realize the mutual conversion between single-ended and differential intermediate frequency signals; the local oscillator power amplifier module is used to realize the amplification of local oscillator signals and multi-channel power distribution.

2. The system according to claim 1, characterized in that The RFSOC chip integrates hardware high-speed interface, multi-channel ADC, multi-channel DAC, and ARM hard core; The hardware high-speed interface is used for interconnecting and communicating with the optical fiber module; The multi-channel ADC is used to sample the RF broadband signal and transmit the sampled signal data to the ARM hard core; The multi-channel DAC is used to generate a radio frequency broadband signal and provide an output signal with a bandwidth exceeding 1 GHz; The ARM hard core is used to implement the multiplication and addition operation function of the sampled signal data.

3. The system according to claim 2, characterized in that The storage module includes FLASH and DDR4 chips, wherein FLASH is used for program solidification storage of the RFSOC system, and the DDR4 chip is used for caching intermediate frequency signal data required by the multi-channel DAC.

4. The system according to any one of claims 1 to 3, characterized in that: The optical fiber module is divided into two parts, one part of which is interconnected by the main control chip with the external array synchronization combination device for receiving the control and synchronization signals of the array synchronization combination device; the other part is interconnected by the RFSOC chip with the external digital beam combination system for high-speed transmission of broadband received data.

5. The system according to any one of claims 1 to 3, characterized in that: The microsystem technology adopts a ceramic substrate or an active substrate and realizes a miniaturized radio frequency microsystem through packaging technology.

6. The system according to any one of claims 1 to 3, characterized in that: The RF SIP module adopts CLTE board and double-layer POP structure, realizes RF signal interconnection of two-layer boards through silicon capacitors, interconnects the same layer by wire bonding, and uses gold wire punching to isolate spatial signals internally. The top layer is sealed with ceramic material, and the bottom layer is processed with BGA solder balls through ball planting technology.

7. The system according to claim 6, characterized in that The local oscillator power amplifier module is embedded in the plate of the RF SIP module. The RF SIP module inputs and outputs 16 RF signals and inputs 1 local oscillator signal. The RF SIP module is vertically interconnected with the RFSOC system in a vertical interconnection manner.

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