Lamination imaging method and device including sample shape optimization

Abstract

The invention discloses a laminated imaging method and device with sample shape optimization, and relates to the technical field of electronic manufacturing. The method comprises the following steps: collecting multi-level information data of a circuit board sample, and combining environment change data; through quantitative calculation of an oxidation effect coefficient, a moisture absorption effect coefficient and a volatilization effect coefficient, physical effect influences of environmental factors on each layer of a circuit board sample are analyzed, a correction shape correction scheme of each layer of the circuit board sample is generated, a shape optimization value E of the whole circuit board sample is further calculated, and global shape correction and optimization are generated. Comprising the steps of vacuum drying, laser alignment and anti-oxidation coating measures, so that the shape precision and environment resistance of a sample are improved. According to the invention, through combination of the multi-level optimization model and the automatic adjustment technology, the precision and reliability of lamination imaging are improved, and efficient lamination imaging of circuit board sample shape optimization is realized.

Description

Technical Field

[0001] The present invention relates to the field of electronic manufacturing technology, and in particular to a stacked imaging method and device including sample shape optimization. Background Art

[0002] In the manufacturing process of modern electronic devices, circuit boards are core components, and their performance and reliability have a decisive influence on the function of the overall product. Especially in the manufacture of multi-layer circuit boards, the design and processing of each layer are directly related to the final performance of the circuit board. In these circuit boards, there are many factors that may affect their imaging accuracy and physical properties, such as oxidation, moisture absorption, volatilization, and thermal expansion between layered materials.

[0003] With the development of technology, traditional imaging technologies, such as microscopes and X-ray imaging, can reflect the hierarchical structure of circuit boards to a certain extent. However, due to the influence of environmental factors such as humidity and temperature, as well as material properties such as moisture absorption and oxidation during the imaging process, image distortion often occurs, which in turn affects the accuracy and production quality of the circuit boards. Summary of the invention

[0004] In view of the shortcomings of the prior art, the present invention provides a stacked imaging method and device including sample shape optimization to solve the problems mentioned in the background technology.

[0005] To achieve the above objectives, the present invention is implemented by the following technical solutions: a stacked imaging method including sample shape optimization, comprising:

[0006] Step 1: Collect multi-level information data of circuit board samples;

[0007] Step 2: Collect the temperature, humidity and volatilization rate of each layer of the circuit board sample to build environmental change data;

[0008] Step 3: Calculate the oxidation effect coefficient α of each level based on environmental change data i , Hygroscopic effect coefficient γ i and volatility effect coefficient δ i ;

[0009] Step 4: Calculate the first shape optimization value E of each level i , and after evaluating it, generating a first modified shape correction scheme for each level of circuit board samples;

[0010] Step 5: After the corrected shape correction scheme of each level of circuit board samples is executed, the shape optimization value E of the entire circuit board sample is recalculated, and a second corrected shape correction scheme of the entire circuit board sample is generated;

[0011] Step 6: According to the second corrected shape correction scheme of the overall circuit board sample, automatic adjustment is performed, and stack imaging is implemented to output the final stack imaging image.

[0012] Preferably, step one comprises:

[0013] S11. By using scanning electron microscope, X-ray and CT scanning high-resolution imaging technology, each layer is finely imaged to obtain a sample image of each layer of circuit board, and the sample images of several layers of circuit boards are integrated to form multi-level information data;

[0014] S12. By quantitatively analyzing the factors affecting the degree of oxidation, moisture absorption and volatilization rate of each level of circuit board samples, the physical property changes of each level of circuit board samples in each level are determined to form a physical property information group and define the oxidation effect coefficient α of each level of circuit board samples in each level. i , Hygroscopic effect coefficient γ i and the volatility effect coefficient is δ i , where i represents the layer number of the circuit board sample.

[0015] Preferably, S12 includes:

[0016] S121. De-noising the image of each level of the circuit board sample by using Gaussian filtering denoising technology, and converting the de-noised image data into a grayscale image, and performing pixel-level analysis on the specific areas of factors affecting the degree of oxidation, moisture absorption and volatilization rate;

[0017] S122. After analyzing the pixel level of each level of circuit board samples, quantitative processing is performed in combination with different physical effects to calculate the oxidation effect coefficient α of each level of circuit board samples at each level. i , Hygroscopic effect coefficient γ i and the volatility effect coefficient is δ i , the specific formula is as follows:

[0018]

[0019] In the formula, P represents each pixel in the image, pox i Represents the pixel set of the i-th level oxidation area, Nox i represents the total number of pixels in the oxidized area at level i;

[0020]

[0021] In the formula, pmo i Represents the pixel set of the hygroscopic area at level i, Nmo i Represents the total number of pixels in the hygroscopic area of ​​the i-th level;

[0022]

[0023] In the formula, pvo i Represents the pixel set of the volatile area at level i, Nvo i Indicates the total number of pixels in the volatile area of ​​the i-th level.

[0024] Preferably, step 2 includes: installing a temperature sensor, a humidity sensor and a volatility detection device to collect the temperature T of each level of the circuit board sample in real time. i 、Humidity i and the volatilization rate V i , build environmental change data.

[0025] Preferably, step three includes: according to the environmental change data, and in combination with the oxidation effect coefficient α of each level of circuit board sample i , Hygroscopic effect coefficient γ i and the volatility effect coefficient is δ i , and calculate the oxidation influence coefficient kα of each level of circuit board samples i , Moisture absorption coefficient kγ i and volatility influence coefficient kδ i , the formula is as follows:

[0026]

[0027] Where, T i represents the temperature of the i-th level, T0 represents the ideal standard temperature, H i represents the humidity value of the i-th layer, H0 represents the ideal standard humidity value, V i represents the volatilization rate value of the i-th level, V0 represents the ideal standard volatilization rate value; e represents the base of the natural logarithm, e≈2.71828.

[0028] Preferably, step four includes:

[0029] S41, through the oxidation influence coefficient kα of each layer of circuit board samples i , Moisture absorption coefficient kγ i and volatility influence coefficient kδ i , calculate the first shape optimization value E of each level of circuit board sample i , the formula is as follows:

[0030] E i = kδ i *α i +kγ i *γ i +kδ i *δ i ;

[0031] S42, combining and analyzing the first shape optimization value E of each level of circuit board sample i , and set the first threshold K, and the first shape optimization value E of each level circuit board sample i Comparative analysis is performed. When the first threshold value K> the first shape optimization value E of each level of circuit board sample i When , it indicates that the shape optimization value of the i-th layer circuit board sample is unqualified, and a first shape optimization correction scheme is generated, including:

[0032] According to the shape of the current i-th layer circuit board sample, the curvature radius of the edge of the i-th layer circuit board sample is increased by 3%, the curvature radius of the edge of the hole of the i-th layer circuit board sample is reduced by 1%, the line width of the current path concentration is increased by 2%, and the width of the current path non-concentration is reduced by 2%. After adjustment, recalculation is performed until the first threshold K ≤ the first shape optimization value E of each layer circuit board sample i ;

[0033] When the first threshold K ≤ the first shape optimization value E of each level of circuit board sample i When , it means that the shape optimization value of the i-th layer circuit board sample is qualified.

[0034] Preferably, step five includes:

[0035] S51. S51. By installing a distance meter, collect the thickness hd of the i-th layer of the circuit board i and the clearance distance cj between the i-th circuit board layer and the adjacent layer i , calculate the thermal expansion coefficient β of each level of circuit board sample i , the formula is as follows:

[0036] β i =b*(hd i +cj i )*(T-T0);

[0037] In the formula, b represents the normal expansion coefficient of the circuit board, and the commonly used value is 10 -6 Up to 20 -6 T represents the ambient temperature of the circuit board, and T0 represents the ideal standard temperature.

[0038] Preferably, step five also includes:

[0039] S52, by using a multi-level optimization model, after the first modified shape correction scheme of each level of circuit board samples is executed, the second shape optimization value E of each level is recalculated i 2 , calculate and obtain the shape optimization value E of the overall circuit board sample, the formula is as follows:

[0040]

[0041] Where n represents the total number of levels, i represents the i-th level, w1 and w2 represent weight coefficients, 0<w1<1, 0<w2<1, and w1+w2=1; the second shape optimization value of each level is and the first shape optimization value E of each level i The steps are the same.

[0042] Preferably, step six includes:

[0043] S61, combining and analyzing the shape optimization value E of the whole circuit board sample, and setting a second threshold value K2, and comparing and analyzing it, when the second threshold value K2> the shape optimization value E of the whole circuit board sample, it means that the shape optimization value of the whole circuit board sample is unqualified, and generating a second shape optimization correction scheme, including:

[0044] For the shape of the current overall circuit board sample, the edge width is increased by 1%, the thickness of the high stress concentration area is increased by 2%, and the layer height is increased by 2%, and then the shape is recalculated after adjustment until the second threshold K2 is ≤ the shape optimization value E of the overall circuit board sample;

[0045] When the second threshold value K2 ≤ the shape optimization value E of the overall circuit board sample, it indicates that the shape optimization value of the overall circuit board sample is qualified;

[0046] S62. According to the second shape optimization scheme, automatic adjustment is performed and stacked imaging is implemented to monitor the imaging accuracy and sample stability of the entire circuit board sample in real time, and the final stacked imaging image is output.

[0047] A stacked imaging apparatus including sample shape optimization, comprising:

[0048] An information acquisition module, used to obtain images of circuit board samples through scanning electron microscope, X-ray and CT scanning, and generate multi-level information data;

[0049] Environmental monitoring module, used to collect temperature, humidity and volatilization rate of each layer of circuit board samples in real time and build environmental change data;

[0050] Physical effect calculation module, calculates the oxidation effect coefficient α of each level based on environmental change data i , Hygroscopic effect coefficient γ i and volatility effect coefficient δ i ;

[0051] Shape optimization calculation module, used to calculate the first shape optimization value E of each level i , and after evaluating it, generating a first modified shape correction scheme for each level of circuit board samples;

[0052] The automatic adjustment module is used to recalculate the shape optimization value E of the overall circuit board sample after the corrected shape correction scheme of the circuit board sample at each level is executed, and generate a second corrected shape correction scheme for the overall circuit board sample; and perform automatic adjustment according to the second corrected shape correction scheme of the overall circuit board sample, implement stacked imaging, and output the final stacked imaging image.

[0053] The present invention provides a stacked imaging method and device including sample shape optimization, which has the following beneficial effects:

[0054] (1) The stacked imaging method and device including sample shape optimization, combined with high-resolution scanning electron microscopy, X-ray and CT scanning technology, realizes the fine collection of multi-level information of circuit boards, comprehensively improves the image quality and reliability of stacked imaging, and overcomes the accuracy limitations of traditional imaging methods.

[0055] (2) The stacked imaging method and device including sample shape optimization collects the temperature, humidity and volatilization rate of each layer of circuit board in real time, and calculates the oxidation effect coefficient α of each layer of circuit board sample. i , Hygroscopic effect coefficient γ i and volatility effect coefficient δ i The pixel-level quantitative calculation and analysis enables accurate assessment of the impact of environmental and physical factors and provides a scientific basis.

[0056] (3) The stacked imaging method and device including sample shape optimization calculates the oxidation influence coefficient kα of each layer of circuit board sample i , Moisture absorption coefficient kγ i and volatility influence coefficient kδ i , which provides a scientific basis for the accurate assessment of the impact of environmental and physical factors, and provides an accurate data foundation for subsequent calculations.

[0057] (4) The stacked imaging method and device including sample shape optimization calculates the first shape optimization value E of each layer of circuit board sample i ,Combined with the comparative analysis of the first threshold, the morphological errors of the circuit board samples at each level are effectively avoided, and the accuracy of the correction scheme is improved.

[0058] (5) The stacked imaging method and device including sample shape optimization calculates the thermal expansion influence coefficient β of each layer of circuit board sample i , effectively avoiding the thermal expansion error of each level of circuit board samples and improving the accuracy of calculations.

[0059] (6) The stacked imaging method and device including sample shape optimization, by recalculating the second shape optimization value of each layer , combined with the thermal expansion coefficient β of each level of circuit board samples i , calculate the optimized value of the overall circuit board sample and improve the precision and accuracy of the calculation.

[0060] (7) The stacked imaging method and device including sample shape optimization improves the objectivity and accuracy of the evaluation result by comparing and analyzing the shape optimization value E of the overall circuit board sample with the second threshold value, effectively avoids the morphological error of the overall circuit board sample, and improves the accuracy of the correction scheme.

[0061] (8) The stacked imaging method and device including sample shape optimization constructs a complete closed-loop optimization system from sample collection to stacked imaging through automated adjustment process and real-time monitoring technology, ensuring the stability of the final imaging and the accuracy of the sample. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] Figure 1 Schematic diagram of the steps of the stacked imaging method including sample shape optimization of the present invention.

[0063] Figure 2 The present invention is a schematic diagram of the apparatus flowchart of the stacked imaging method including sample shape optimization. DETAILED DESCRIPTION

[0064] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0065] Example 1

[0066] See also Figure 1 The present invention provides a stacked imaging method including sample shape optimization, comprising the following steps:

[0067] Step 1: Collect multi-level information data of circuit board samples;

[0068] Step 2: Collect the temperature, humidity and volatilization rate of each layer of the circuit board sample to build environmental change data;

[0069] Step 3: Calculate the oxidation effect coefficient α of each level based on environmental change data i , Hygroscopic effect coefficient γ i and volatility effect coefficient δ i ;

[0070] Step 4: Calculate the first shape optimization value E of each level i, and after evaluating it, generating a first modified shape correction scheme for each level of circuit board samples;

[0071] Step 5: After the corrected shape correction scheme of each level of circuit board samples is executed, the shape optimization value E of the entire circuit board sample is recalculated, and a second corrected shape correction scheme of the entire circuit board sample is generated;

[0072] Step 6: According to the second corrected shape correction scheme of the overall circuit board sample, automatic adjustment is performed, and stack imaging is implemented to output the final stack imaging image.

[0073] In this embodiment, by collecting multi-level information data of circuit board samples, combining high-resolution scanning electron microscope, X-ray and CT scanning technology, the structural information of each layer of circuit board is accurately captured, the accuracy and quality of laminated imaging are significantly improved, and the temperature, humidity and volatilization rate of each layer of circuit board are collected, which effectively solves the distortion problem caused by environmental factors to the imaging process and enhances the environmental adaptability of the system. By quantitatively calculating the oxidation effect coefficient, moisture absorption effect coefficient and volatilization effect coefficient of each layer of circuit board samples, the physical property changes of each layer of circuit board samples under different environmental conditions can be comprehensively evaluated, thereby optimizing the first shape correction scheme, and by calculating the shape optimization value E of the overall circuit board sample and generating the second corrected shape correction scheme, the overall performance of the multi-layer circuit board is effectively improved, the structural integrity and functional reliability are ensured, and the complete optimization closed-loop system from physical effect analysis to final imaging output ensures the accuracy of data in each link and the efficiency of the scheme, and finally generates high-quality laminated imaging images to meet the requirements of modern circuit board manufacturing for high precision and high reliability.

[0074] Example 2

[0075] This example is an explanation of Example 1. Figure 1 Specifically, step one includes:

[0076] S11. By using scanning electron microscope, X-ray and CT scanning high-resolution imaging technology, each layer is finely imaged to obtain a sample image of each layer of circuit board, and the sample images of several layers of circuit boards are integrated to form multi-level information data;

[0077] S12. By quantitatively analyzing the factors affecting the degree of oxidation, moisture absorption and volatilization rate of each level of circuit board samples, the physical property changes of each level of circuit board samples in each level are determined to form a physical property information group and define the oxidation effect coefficient α of each level of circuit board samples in each level. i , Hygroscopic effect coefficient γ i and the volatility effect coefficient is δ i, where i represents the layer number of the circuit board sample.

[0078] In this embodiment, the temperature, humidity and volatilization rate of each level of circuit board are collected in real time, and the oxidation effect coefficient α of each level of circuit board sample is calculated. i , Hygroscopic effect coefficient γ i and volatility effect coefficient δ i The pixel-level quantitative analysis provides accurate data basis for subsequent calculations.

[0079] Example 3

[0080] This embodiment is explained in Embodiment 2. Specifically, S12 includes:

[0081] S121. De-noising the image of each level of the circuit board sample by using Gaussian filtering denoising technology, and converting the de-noised image data into a grayscale image, and performing pixel-level analysis on the specific areas of factors affecting the degree of oxidation, moisture absorption and volatilization rate;

[0082] S122. After analyzing the pixel level of each level of circuit board samples, quantitative processing is performed in combination with different physical effects to calculate the oxidation effect coefficient α of each level of circuit board samples at each level. i , Hygroscopic effect coefficient γ i and the volatility effect coefficient is δ i , the specific formula is as follows:

[0083]

[0084] In the formula, P represents each pixel in the image, pox i Represents the pixel set of the i-th level oxidation area, Nox i represents the total number of pixels in the oxidized area at level i;

[0085]

[0086] In the formula, pmo i Represents the pixel set of the hygroscopic area at level i, Nmo i Represents the total number of pixels in the hygroscopic area of ​​the i-th level;

[0087]

[0088] In the formula, pvo i Represents the pixel set of the volatile area at level i, Nvo i Indicates the total number of pixels in the volatile area of ​​the i-th level.

[0089] In this embodiment, the oxidation effect coefficient α of each level of circuit board sample is calculated with high precision by using Gaussian filtering denoising technology and grayscale image conversion technology. i , Hygroscopic effect coefficient γ i and volatility effect coefficient δ i , providing an accurate data basis for subsequent calculations.

[0090] Example 4

[0091] This embodiment is an explanation of the embodiment 1. Specifically, step 2 includes: installing a temperature sensor, a humidity sensor and a volatility detection device to collect the temperature T of each layer of the circuit board sample in real time. i 、Humidity i and the volatilization rate V i , build environmental change data.

[0092] In this embodiment, the real-time temperature T of each layer of circuit board samples is collected. i 、Humidity i and the volatilization rate V i , providing accurate data basis for subsequent calculations.

[0093] Example 5

[0094] This embodiment is an explanation of the embodiment 1. Specifically, step 3 includes: according to the environmental change data and the oxidation effect coefficient α of each layer of circuit board samples i , Hygroscopic effect coefficient γ i and the volatility effect coefficient is δ i , and calculate the oxidation influence coefficient kα of each level of circuit board samples i , Moisture absorption coefficient kγ i and volatility influence coefficient kδ i , the formula is as follows:

[0095]

[0096] Where, T i represents the temperature of the i-th level, T0 represents the ideal standard temperature, H i represents the humidity value of the i-th layer, H0 represents the ideal standard humidity value, V i represents the volatilization rate value of the i-th level, V0 represents the ideal standard volatilization rate value; e represents the base of the natural logarithm, e≈2.71828.

[0097] In this embodiment, based on the pixel-level quantitative calculation of the oxidation effect coefficient, the moisture absorption effect coefficient and the volatilization effect coefficient, the oxidation influence coefficient kα of each layer of the circuit board sample is obtained. i , Moisture absorption coefficient kγ iand volatility influence coefficient kδ i , providing a scientific basis for accurate assessment of the impact of environmental and physical factors.

[0098] Example 6

[0099] This embodiment is an explanation of the embodiment 1. Specifically, step 4 includes:

[0100] S41, through the oxidation influence coefficient kα of each layer of circuit board samples i , Moisture absorption coefficient kγ i and volatility influence coefficient kδ i , calculate the first shape optimization value E of each level of circuit board sample i , the formula is as follows:

[0101] E i = kδ i *α i +kγ i *γ i +kδ i *δ i ;

[0102] S42, combining and analyzing the first shape optimization value E of each level of circuit board sample i , and set the first threshold K, and the first shape optimization value E of each level circuit board sample i Comparative analysis is performed. When the first threshold value K> the first shape optimization value E of each level of circuit board sample i , it indicates that the shape optimization value of the i-th layer circuit board sample is unqualified, and a first shape optimization correction scheme is generated, including: for the shape of the current i-th layer circuit board sample, increasing the curvature radius of the edge of the i-th layer circuit board sample by 3%, reducing the curvature radius of the edge of the hole of the i-th layer circuit board sample by 1%, increasing the line width of the current path concentration by 2%, and reducing the width of the current path non-concentration by 2%, and recalculating after adjustment until the first threshold K ≤ the first shape optimization value E of each layer circuit board sample i ; When the first threshold K≤the first shape optimization value E of each level of circuit board sample i When , it means that the shape optimization value of the i-th layer circuit board sample is qualified.

[0103] In this embodiment, the first shape optimization value E of each level of circuit board sample is calculated. i , combined with the comparative analysis of the first threshold, the objectivity and accuracy of the evaluation results are improved, the morphological errors of circuit board samples at each level are effectively avoided, and the accuracy of the correction scheme is improved.

[0104] Example 7

[0105] This embodiment is an explanation of the embodiment 1. Specifically, step 5 includes:

[0106] S51. S51. By installing a distance meter, collect the thickness hd of the i-th layer of the circuit board i and the clearance distance cj between the i-th circuit board layer and the adjacent layer i , calculate the thermal expansion coefficient β of each level of circuit board sample i , the formula is as follows:

[0107] β i =b*(hd i +cj i )*(T-T0);

[0108] In the formula, b represents the normal expansion coefficient of the circuit board, and the commonly used value is 10 -6 Up to 20 -6 T represents the ambient temperature of the circuit board, and T0 represents the ideal standard temperature.

[0109] In this embodiment, the thermal expansion coefficient β of each level of circuit board sample is calculated. i , effectively avoiding the thermal expansion error of each level of circuit board samples and improving the accuracy of subsequent calculations.

[0110] Example 8

[0111] This embodiment is explained in Embodiment 1. Specifically, step five also includes:

[0112] S52, by using a multi-level optimization model, after the first modified shape correction scheme of each layer of circuit board samples is executed, the second shape optimization value of each layer is recalculated Calculate and obtain the shape optimization value E of the overall circuit board sample, the formula is as follows:

[0113]

[0114] Where n represents the total number of levels, i represents the i-th level, w1 and w2 represent weight coefficients, 0<w1<1, 0<w2<1, and w1+w2=1; the second shape optimization value of each level is and the first shape optimization value E of each level i The steps are the same.

[0115] In this embodiment, the second shape optimization value of each level is recalculated. Combined with the thermal expansion coefficient β of each level of circuit board samples i , calculate the optimization value of the overall circuit board sample, and provide a more accurate data basis for subsequent evaluation and optimization solutions.

[0116] Example 9

[0117] This embodiment is an explanation of the embodiment 1. Specifically, step 6 includes:

[0118] S61, combining and analyzing the shape optimization value E of the whole circuit board sample, and setting a second threshold value K2, and comparing and analyzing it, when the second threshold value K2> the shape optimization value E of the whole circuit board sample, it means that the shape optimization value of the whole circuit board sample is unqualified, and generating a second shape optimization correction scheme, including:

[0119] For the shape of the current overall circuit board sample, the edge width is increased by 1%, the thickness of the high stress concentration area is increased by 2%, and the layer height is increased by 2%, and then the shape is recalculated after adjustment until the second threshold K2 is ≤ the shape optimization value E of the overall circuit board sample;

[0120] When the second threshold value K2 ≤ the shape optimization value E of the overall circuit board sample, it indicates that the shape optimization value of the overall circuit board sample is qualified;

[0121] S62. According to the second shape optimization scheme, automatic adjustment is performed and stacked imaging is implemented to monitor the imaging accuracy and sample stability of the entire circuit board sample in real time, and the final stacked imaging image is output.

[0122] In this embodiment, by comparing and analyzing the shape optimization value E of the overall circuit board sample with the second threshold, the morphological error of the overall circuit board sample is effectively avoided, and the accuracy of the correction scheme is improved. Through the automated adjustment process and real-time monitoring technology, a complete closed-loop optimization system from sample collection to stacked imaging is constructed, ensuring the stability of the final imaging and the accuracy of the sample.

[0123] Example 10

[0124] See also Figure 2 , a stack imaging apparatus including sample shape optimization, comprising:

[0125] An information acquisition module, used to obtain images of circuit board samples through scanning electron microscope, X-ray and CT scanning, and generate multi-level information data;

[0126] Environmental monitoring module, used to collect temperature, humidity and volatilization rate of each layer of circuit board samples in real time and build environmental change data;

[0127] Physical effect calculation module, calculates the oxidation effect coefficient α of each level based on environmental change data i , Hygroscopic effect coefficient γ i and volatility effect coefficient δ i ;

[0128] Shape optimization calculation module, used to calculate the first shape optimization value E of each level i , and after evaluating it, generating a first modified shape correction scheme for each level of circuit board samples;

[0129] The automatic adjustment module is used to recalculate the shape optimization value E of the overall circuit board sample after the corrected shape correction scheme of the circuit board sample at each level is executed, and generate a second corrected shape correction scheme for the overall circuit board sample; and perform automatic adjustment according to the second corrected shape correction scheme of the overall circuit board sample, implement stacked imaging, and output the final stacked imaging image.

[0130] The threshold is set to facilitate comparison. The size of the threshold depends on the amount of sample data and the number of bases set by technicians in this field for each group of sample data; as long as it does not affect the proportional relationship between the parameter and the quantized value.

[0131] The above formulas are obtained by collecting a large amount of data for software simulation and selecting a formula that is close to the actual value. The coefficients in the formula are set by technical personnel in this field according to actual conditions. The above is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited to this. Any technical personnel familiar with the technical field within the technical scope disclosed by the present invention, according to the technical solution and the inventive concept of the present invention, make equivalent replacement or change, which should be covered within the protection scope of the present invention.

Claims

1. A stacked imaging method comprising sample shape optimization, characterized in that: The following steps are involved: Step 1: Collect multi-level information data of circuit board samples; Step 2: Collect the temperature, humidity and volatilization rate of each layer of the circuit board sample to build environmental change data; Step 3: Calculate the oxidation effect coefficient α of each level based on environmental change data i , Hygroscopic effect coefficient γ i and volatility effect coefficient δ i ; Step 4: Calculate the first shape optimization value E of each level i , and after evaluating it, generating a first modified shape correction scheme for each level of circuit board samples; Step 5: After the corrected shape correction scheme of each level of circuit board samples is executed, the shape optimization value E of the entire circuit board sample is recalculated, and a second corrected shape correction scheme of the entire circuit board sample is generated; Step 6: According to the second corrected shape correction scheme of the overall circuit board sample, automatic adjustment is performed, and stack imaging is implemented to output the final stack imaging image.

2. The stacked imaging method including sample shape optimization according to claim 1, characterized in that: Step one includes: S11. By using scanning electron microscope, X-ray and CT scanning high-resolution imaging technology, each layer is finely imaged to obtain a sample image of each layer of circuit board, and the sample images of several layers of circuit boards are integrated to form multi-level information data; S12. By quantitatively analyzing the factors affecting the degree of oxidation, moisture absorption and volatilization rate of each level of circuit board samples, the physical property changes of each level of circuit board samples in each level are determined to form a physical property information group and define the oxidation effect coefficient α of each level of circuit board samples in each level. i , Hygroscopic effect coefficient γ i and the volatility effect coefficient is δ i , where i represents the layer number of the circuit board sample.

3. The stacked imaging method including sample shape optimization according to claim 2, characterized in that: S12 includes: S121. De-noising the image of each level of the circuit board sample by using Gaussian filtering denoising technology, and converting the de-noised image data into a grayscale image, and performing pixel-level analysis on the specific areas of factors affecting the degree of oxidation, moisture absorption and volatilization rate; S122. After analyzing the pixel level of each level of circuit board samples, quantitative processing is performed in combination with different physical effects to calculate the oxidation effect coefficient α of each level of circuit board samples at each level. i , Hygroscopic effect coefficient γ i and volatility effect coefficient δ i , the specific formula is as follows: In the formula, P represents each pixel in the image, pox i Represents the pixel set of the i-th level oxidation area, Nox i Represents the total number of pixels in the oxidized area at level i; In the formula, pmo i Represents the pixel set of the hygroscopic area at level i, Nmo i represents the total number of pixels in the hygroscopic area of ​​the i-th level; In the formula, pvo i Represents the pixel set of the volatile area at level i, Nvo i Indicates the total number of pixels in the volatile area of ​​the i-th level.

4. The stacked imaging method including sample shape optimization according to claim 1, characterized in that: Step 2 includes: installing temperature sensors, humidity sensors and volatility detection equipment to collect the temperature T of each layer of circuit board samples in real time. i 、Humidity i and the volatilization rate V i , build environmental change data.

5. The stacked imaging method including sample shape optimization according to claim 4, characterized in that: Step 3 includes: Based on the environmental change data and the oxidation effect coefficient α of each layer of circuit board samples i , Hygroscopic effect coefficient γ i and the volatility effect coefficient is δ i , and calculate the oxidation influence coefficient kα of each level of circuit board samples i , Moisture absorption coefficient kγ i and volatility influence coefficient kδ i , the formula is as follows: Where, T i represents the temperature of the i-th level, T0 represents the ideal standard temperature, H i represents the humidity value of the i-th layer, H0 represents the ideal standard humidity value, V i represents the volatilization rate value of the i-th level, V0 represents the ideal standard volatilization rate value; e represents the base of the natural logarithm, e≈2.71828.

6. The stacked imaging method including sample shape optimization according to claim 5, characterized in that: Step 4 includes: S41, through the oxidation influence coefficient kα of each layer of circuit board samples i , Moisture absorption coefficient kγ i and volatility influence coefficient kδ i , calculate the first shape optimization value E of each level of circuit board sample i , the formula is as follows: E i =kδ i *a i +kγ i *c i +kδ i *d i ; S42, combining and analyzing the first shape optimization value E of each level of circuit board sample i , and set the first threshold K, and the first shape optimization value E of each level circuit board sample i , conduct comparative analysis, when the first threshold K> the first shape optimization value E of each level of circuit board sample i When , it indicates that the shape optimization value of the i-th layer circuit board sample is unqualified, and a first shape optimization correction scheme is generated, including: According to the shape of the current i-th layer circuit board sample, the curvature radius of the edge of the i-th layer circuit board sample is increased by 3%, the curvature radius of the edge of the hole of the i-th layer circuit board sample is reduced by 1%, the line width of the current path concentration is increased by 2%, and the width of the current path non-concentration is reduced by 2%. After adjustment, recalculation is performed until the first threshold K ≤ the first shape optimization value E of each layer circuit board sample i ; When the first threshold K ≤ the first shape optimization value E of each level of circuit board sample i When , it means that the shape optimization value of the i-th layer circuit board sample is qualified.

7. The stacked imaging method including sample shape optimization according to claim 1, characterized in that: Step five includes: S51. By installing a distance meter, collect the thickness hd of the i-th layer of the circuit board i and the clearance distance cj between the i-th circuit board layer and the adjacent layer i , calculate the thermal expansion coefficient β of each level of circuit board sample i , the formula is as follows: β i =b*(hd i +cj i )*(T-T0); In the formula, b represents the normal expansion coefficient of the circuit board, and the commonly used value is 10 -6 Up to 20 -6 T represents the ambient temperature of the circuit board, and T0 represents the ideal standard temperature.

8. The stacked imaging method including sample shape optimization according to claim 7, characterized in that: Step five also includes: S52, by using a multi-level optimization model, after the first modified shape correction scheme of each level of circuit board samples is executed, the second shape optimization value of each level is recalculated Calculate and obtain the shape optimization value E of the overall circuit board sample, the formula is as follows: Where n represents the total number of levels, i represents the i-th level, w1 and w2 represent weight coefficients; the second shape optimization value of each level is and the first shape optimization value E of each level i The steps are the same.

9. The stacked imaging method including sample shape optimization according to claim 8, characterized in that: Step six includes: S61, combining and analyzing the shape optimization value E of the whole circuit board sample, and setting a second threshold value K2, and comparing and analyzing it, when the second threshold value K2> the shape optimization value E of the whole circuit board sample, it means that the shape optimization value of the whole circuit board sample is unqualified, and generating a second shape optimization correction scheme, including: For the shape of the current overall circuit board sample, the edge width is increased by 1%, the thickness of the high stress concentration area is increased by 2%, and the layer height is increased by 2%, and then the shape is recalculated after adjustment until the second threshold K2 is ≤ the shape optimization value E of the overall circuit board sample; When the second threshold value K2 ≤ the shape optimization value E of the overall circuit board sample, it indicates that the shape optimization value of the overall circuit board sample is qualified; S62. According to the second shape optimization scheme, automatic adjustment is performed and stacked imaging is implemented to monitor the imaging accuracy and sample stability of the entire circuit board sample in real time, and the final stacked imaging image is output.

10. A stacked imaging device including sample shape optimization, applied to a stacked imaging method including sample shape optimization as claimed in any one of claims 1 to 9, characterized in that: include: An information acquisition module, used to obtain images of circuit board samples through scanning electron microscope, X-ray and CT scanning, and generate multi-level information data; Environmental monitoring module, used to collect temperature, humidity and volatilization rate of each layer of circuit board samples in real time and build environmental change data; Physical effect calculation module, calculates the oxidation effect coefficient α of each level based on environmental change data i , Hygroscopic effect coefficient γ i and volatility effect coefficient δ i ; Shape optimization calculation module, used to calculate the first shape optimization value E of each level i , and after evaluating it, generating a first modified shape correction scheme for each level of circuit board samples; An automatic adjustment module, used for recalculating the shape optimization value E of the overall circuit board sample after the correction shape correction scheme of each level of circuit board sample is executed, and generating a second correction shape correction scheme of the overall circuit board sample; And according to the second corrected shape correction scheme of the overall circuit board sample, automatic adjustment is performed, and stack imaging is implemented to output the final stack imaging image.

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