Pop three-dimensional stacking interconnection substrate and manufacturing method thereof

Abstract

This invention discloses a POP (Position-on-Pack) three-dimensional stacked interconnect substrate and its fabrication method, belonging to the field of printed circuit technology. It improves the design of the suspended lead structure and provides a new suspended lead fabrication process. By utilizing the pre-stack design scheme and combining the thickness tolerance of each layer material, the overall thickness of the substrate product is calculated. With the substrate thickness known, the excess substrate below and between the leads is removed by combining mechanical depth-controlled milling and laser etching. The combination of mechanical depth-controlled milling and laser etching reduces the processing flow of the suspended lead printed circuit substrate compared to the original process, thus improving operational efficiency.

Description

Technical Field

[0001] This invention belongs to the field of printed circuit technology, specifically a POP three-dimensional stacked interconnect substrate and its manufacturing method. Background Technology

[0002] Conventional suspended leads are processed by locally filling with adhesive resist material. This requires filling the specified position with adhesive resist material during the lamination of the printed circuit board layers to prevent the semi-cured adhesive from covering the suspended area during the lamination process. However, in actual processing, the width of this suspended area is only 1mm, and the adhesive resist material can only be filled manually, which is inefficient and poses a risk of misalignment, resulting in abnormal product quality.

[0003] In the electronics manufacturing industry, the precise fabrication of suspended leads is a crucial step in ensuring the performance and reliability of circuit boards. In traditional suspended lead manufacturing processes, to prevent semi-cured adhesive (usually a pre-impregnated epoxy resin or other polymer material used for interlayer bonding and insulation) from flowing into and covering the areas designed for suspended leads during the interlayer lamination of the printed circuit board, the industry commonly uses adhesive resist materials for localized filling. These adhesive resist materials have excellent barrier properties, effectively preventing adhesive penetration while maintaining the integrity of the electrical connection.

[0004] However, this process faces numerous challenges in practice. Especially when the width of the suspended area is reduced to only 1 millimeter, the manual filling of the resist material becomes extremely difficult. First, due to the confined operating space, workers require extremely high precision and patience to ensure the resist material is accurately filled into the target location, which not only significantly reduces production efficiency but also increases labor costs. Second, the unavoidable alignment misalignment during manual operation becomes a major hidden danger affecting product quality. Even the most skilled operators cannot guarantee perfect alignment every time on such a tiny scale. Once the resist material filling position deviates, the prepreg may accidentally cover the suspended area, leading to serious consequences such as short circuits, poor signal transmission, or mechanical instability, directly affecting the final performance and reliability of the product.

[0005] Furthermore, the manual filling process makes it difficult to control the amount and uniformity of the resist material. Too much resist material can lead to unnecessary material waste and increased circuit board thickness, while too little may fail to effectively block the adhesive, also causing quality problems. Therefore, this manual operation method is not only inefficient but also difficult to control in terms of quality, making it difficult to meet the high precision, high efficiency, and high quality requirements of modern electronic products. Summary of the Invention

[0006] This invention provides a POP three-dimensional stacked interconnect substrate and its manufacturing method, which solves the problem that the width of the suspended area is only 1mm, and the resist material can only be filled manually, which has low operation efficiency and the risk of misalignment, resulting in abnormal product quality.

[0007] To achieve the above objectives, the present invention provides the following technical solution:

[0008] A method for fabricating a POP (Position-on-Place) three-dimensional stacked interconnect substrate includes:

[0009] The laminate design uses epoxy glass cloth laminate, and the thin sheets of each layer are cut and drawn.

[0010] The inner layers of the thin film are etched, and the layers of the thin film are laminated to obtain the laminated substrate.

[0011] Metallized holes are obtained by drilling and metallizing the substrate.

[0012] Perform pattern transfer and pattern electroplating operations on the substrate;

[0013] The substrate is subjected to alkaline etching and depth control processing;

[0014] Laser cutting and adhesive removal of substrates after deep processing;

[0015] Solder resist coating is applied to the top and bottom surfaces of the substrate according to the design layout, followed by chemical nickel-gold plating, and finally, shaping is performed to obtain the POP 3D stacked interconnect substrate.

[0016] Preferably, the specific steps for thin-slice pattern making are as follows:

[0017] The surface of the thin sheet is cleaned and roughened by sandblasting or chemical micro-etching.

[0018] Remove the transfer medium from the lower carrier board, place the transfer medium and the printed circuit board at the contact point of the guide line, keep them in full contact, and use the squeeze roller to fix the transfer medium to the printed circuit board. Before fixing, use the positioning guide line to align the position of the transfer medium and the printed circuit board.

[0019] Select a film with the corresponding pattern and attach it to both sides of the thin film, and use an exposure machine to perform photocuring treatment on the transfer medium;

[0020] After peeling off the top and bottom layers of the film and letting it stand for a period of time, the photosensitive adhesive that has been cured on the surface is broken down according to the pattern of the film and then cleaned.

[0021] Preferably, the inner layer etching step specifically includes:

[0022] Etch the copper surface without resist layer protection to create inner conductive patterns;

[0023] Remove the resist dry film from the non-effective patterned areas on the surface of the thin film.

[0024] Preferably, the specific steps of the lamination operation are as follows:

[0025] In a clean and dust-free environment, the prepreg is cut into individual pieces and positioning holes are machined.

[0026] The inner layer sheet that has already been fabricated with the circuit pattern is blackened to increase the interlayer bonding strength of the inner layers after lamination.

[0027] Pre-stacked plates are completed using a hot melt machine or a riveting machine according to the corresponding stacking requirements;

[0028] According to the product type, the laminated plates are processed according to the lamination and stacking requirements;

[0029] The stacked pressing molds are conveyed to the vacuum laminator via a conveying device;

[0030] The corresponding pressing program is invoked to complete the pressing process.

[0031] Preferably, the specific steps for drilling are as follows:

[0032] Machining positioning holes on multilayer boards, checking the overlap of inner layer patterns, measuring expansion and contraction values, and identifying and marking the board orientation;

[0033] Use pins to fix the multilayer board to the CNC drilling machine worktable at the positioning hole positions;

[0034] The CNC drilling file is read into the CNC drilling machine to perform drilling on the multilayer board.

[0035] The CNC milling file is read into the CNC milling machine to perform shape processing on the substrate.

[0036] Preferably, the specific steps of the hole metallization operation are as follows:

[0037] Use a deburring brush machine to remove burrs from the orifices, oxide layer, organic contaminants and other impurities from the board surface, and roughen the surface to enhance the adhesion between the board surface and the chemical copper layer.

[0038] A copper thin film is deposited on the hole wall of the printed circuit board using a chemical plating process to achieve metallization of the hole wall surface, making the inner layers of each network conductive.

[0039] Electroplating a dense copper layer onto the printed circuit board after chemical copper plating provides good conductivity and sufficient strength for the metallized holes of the printed circuit board.

[0040] Clean and dry the printed circuit board after one electroplating.

[0041] Preferably, the specific steps of alkaline etching are as follows:

[0042] Remove the anti-plating dry film from the non-effective patterned areas on the substrate surface;

[0043] Etch the copper surface without resist layer protection to create the outer conductive pattern;

[0044] Remove the tin protective layer from the conductive lines.

[0045] Preferably, the steps of controlled depth processing are as follows:

[0046] Manufacturing a high-precision depth control base plate;

[0047] Before performing depth control machining, the CNC milling machine worktable is measured and calibrated, and a high-precision depth control base plate is used to ensure that the flatness of the table is controlled within ±30μm before the product is processed.

[0048] The whole board is milled into single boards, and then non-metallized holes in the single board are used for positioning and installation. The bottom substrate of the suspended lead wire is grooved and the depth is controlled to reduce the thickness.

[0049] Preferably, the step of applying solder resist coating to the surface of the top and bottom layers of the substrate according to the design layout specifically includes:

[0050] Create a solder resist graphic printing template film;

[0051] Place the interconnect substrate at the corresponding size position on the screen printing machine using guide lines, and ensure complete alignment;

[0052] Solder resist ink is pressed onto the substrate surface through a screen using mechanical pressure.

[0053] The prepared printing film is positioned and fixed to the substrate through the positioning guide holes around the substrate, ensuring complete contact. The solder resist is then photocured using an exposure machine.

[0054] After exposure, the substrate with solder resist film is placed in a solder resist developing machine for development, and the unexposed solder resist film layer that was covered by the film is completely removed.

[0055] Then, it is cured according to the curing parameters of the solder resist material.

[0056] A POP three-dimensional stacked interconnect substrate is prepared based on the above-described method for preparing a POP three-dimensional stacked interconnect substrate, wherein the epoxy material under the copper leads is retained at 0.1~0.2mm, and the substrate on both sides of the suspended leads is completely removed.

[0057] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides a method for manufacturing a POP three-dimensional stacked interconnect substrate, improves the design of the suspended lead structure, and provides a new suspended lead manufacturing process. By utilizing the previous layer design scheme and combining the thickness tolerance of each layer material, the overall thickness of the substrate product is calculated. With the substrate thickness known, the excess substrate under and between the leads is removed by combining mechanical depth control cutting depth and laser etching. By using a combination of mechanical depth control milling and laser etching, the processing flow of the suspended lead printed circuit board is reduced compared with the original process flow, thus improving the operation efficiency. Attached Figure Description

[0058] Figure 1 This is a flowchart of a method for fabricating a POP three-dimensional stacked interconnect substrate according to the present invention;

[0059] Figure 2 This is a diagram of the stacked structure according to an embodiment of the present invention;

[0060] Figure 3 This is a schematic diagram of a drilled stacked board of a POP three-dimensional interconnect substrate according to an embodiment of the present invention;

[0061] Figure 4 This is a schematic diagram of the high-precision depth control single-board positioning structure according to an embodiment of the present invention;

[0062] Figure 5 This is a schematic diagram of the depth control platform structure according to an embodiment of the present invention;

[0063] Figure 6 This is a diagram illustrating the depth control effect of the product of this invention;

[0064] Figure 7 This is a front view of the suspended lead of the present invention;

[0065] Figure 8 This is a back view of the suspended lead of the present invention;

[0066] In the diagram: 1-CNC drilling machine worktable, 2-pad plate, 3-positioning hole, 4-cover plate, 5-multilayer board, 6-template, 7-pin, 8-suspended lead wire printed circuit board, 9-high precision depth control base plate, 10-bakelite board, 11-equipment table, 12-depth control groove, 13-metallized positioning hole inside the board. Detailed Implementation

[0067] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0068] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0069] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0070] To enable those skilled in the art to better understand the technical solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings.

[0071] Printed substrates using traditional processing techniques contain materials such as copper wires, epoxy fiberglass cloth, and potting compound when interconnecting on the sides. The energy requirements for potting compound and epoxy fiberglass cloth are different during laser etching. To avoid metal powder residue from etching interconnect patterns remaining in the fiberglass material of the substrate, which could lead to potential leakage or short circuits in the potting compound, excess substrate below the leads needs to be removed.

[0072] The technical solution of this invention is to improve the design of the suspended lead structure and develop a novel structure: utilizing the epoxy material of the substrate to locally reinforce the suspended lead. Its structural features are: 0.1~0.2mm of epoxy material is retained below the copper lead, and the substrate on both sides of the suspended lead is completely removed. This substrate-reinforced lead process improves the structural strength of the suspended lead, reduces process difficulty, shortens the processing steps, and increases the yield.

[0073] like Figure 1 As shown, the present invention provides a method for fabricating a POP three-dimensional stacked interconnect substrate, comprising:

[0074] S101 uses epoxy glass cloth laminate for lamination design, and performs sheet cutting and sheet drawing for each layer of thin sheet;

[0075] S102 performs inner layer etching on the thin film and lamination operation on each layer of the thin film to obtain the laminated substrate.

[0076] S103 performs drilling and hole metallization operations on the substrate to obtain metallized holes.

[0077] S104 performs pattern transfer and pattern electroplating operations on the substrate.

[0078] S105 performs alkaline etching and depth control processing on the substrate;

[0079] S106 is used for laser cutting and adhesive removal of substrates after deep processing;

[0080] S107 applies solder resist coating to the top and bottom surfaces of the substrate according to the design layout, then performs chemical nickel-gold plating, and finally performs shaping to obtain a POP 3D stacked interconnect substrate.

[0081] The detailed steps are as follows

[0082] Process flow: Layer design → Sheet blanking → Sheet drawing → Inner layer etching → Lamination → Drilling → Hole forming → Pattern transfer → Pattern electroplating → Alkaline etching → Controlled depth milling → Laser cutting → Chemical desmearing → Screen printing solder resist → Chemical nickel plating → Outer shape processing.

[0083] S1: Layered Design

[0084] The stack-up design utilizes epoxy glass cloth laminates, with an inner core board featuring a 0.15mm thick substrate and 18µm / 18µm copper base. Four 1080-type prepreg sheets and an outer 18µm copper foil lamination process are used. Based on the theoretical material thickness, the theoretical thickness of the interconnect substrate is calculated to be 0.6mm, and the theoretical depth for handling suspended leads is calculated to be 0.35~0.4mm. Corresponding graphics and CNC machining files are then created based on the design layout. The stack-up design is as follows: Figure 2 As shown:

[0085] S2: Sheet cutting: Layers L2 / 3 are processed using sheets with a substrate thickness of 0.15mm and a copper thickness of 18um, while layers L1 and L4 are processed using 18um copper foil.

[0086] S3: Thin-film plotting: This involves transferring the pattern from the transfer medium to a thin film. The transfer process requires precise positioning and alignment of the pattern, ensuring complete contact between the transfer medium and the printed circuit board. The thin-film plotting process includes the following four steps:

[0087] Step 1: Clean and roughen the surface of the sheet using sandblasting or chemical micro-etching. Step 2: Remove the transfer medium from the lower carrier board, place the transfer medium (film or membrane) and the printed circuit board at the guide line contact point, ensuring complete contact, and use a pressure roller to fix the transfer medium onto the printed circuit board. Before fixing, use positioning guide lines to align the position of the transfer medium and the printed circuit board. Step 3: Select a film with the corresponding pattern and attach it to both sides of the sheet, then use an exposure machine to photocur the transfer medium. Step 4: Manually peel off the top and bottom layers of the film and allow it to stand for a period of time. Then, degrade the cured photosensitive adhesive according to the pattern on the film, and clean it thoroughly.

[0088] Table 1 CCD Exposure Machine Parameter Table

[0089]

[0090] S4: Inner Layer Etching: Using specialized etching equipment and an etching solution with a specific ratio of components, the solution concentration, temperature, and spray pressure are adjusted to a suitable range. The etching speed is determined based on the thickness of the copper foil. The thin film covered with the pattern medium is placed into the etching equipment, and the copper foil in the areas not covered by the pattern medium is removed cleanly through chemical etching, resulting in a circuit pattern with neat conductor edges. The inner layer etching process includes the following two steps:

[0091] Step 1: Etch the copper surface without resist protection to create the inner conductive pattern; Step 2: Remove the resist film from the non-effective pattern areas on the surface of the thin film.

[0092] Table 218µm Thick Copper Foil Etching Rate

[0093]

[0094] S5: Lamination: Using a prepreg (a sheet material made by impregnating glass cloth with epoxy resin and then drying off the solvent. The resin is in the B stage, and under temperature and pressure, it has flow properties and can quickly cure and bond), conductive patterns are bonded together according to the corresponding layer design requirements under high temperature and high pressure. The lamination process includes the following six steps:

[0095] Step 1: Cut the prepreg into individual pieces and process the positioning holes in a clean, dust-free environment. Step 2: Blacken the inner layer sheets with completed circuit patterns to increase the interlayer bonding strength after lamination. Step 3: Use a hot melt machine or riveting machine to complete the pre-stacking according to the corresponding lamination requirements. Step 4: Perform lamination processing according to the product type and lamination requirements. Step 5: Transport the stacked lamination mold to the vacuum laminator via a conveyor. Step 6: Retrieve the corresponding lamination program to complete the lamination process.

[0096] S6: Drilling: Using a specialized drilling machine, such as Figure 3 As shown, holes of the required diameter are drilled at designated locations on the laminated substrate according to the design documents. The drilling process includes the following four steps:

[0097] Step 1: Machining positioning holes on the multilayer board; checking the overlap of inner layer patterns, measuring expansion and contraction values, and identifying and marking the board orientation; Step 2: Fixing the multilayer board to the CNC drilling machine table with pins at the positioning hole positions; Step 3: Reading the CNC drilling file into the CNC drilling machine to perform drilling on the multilayer board; Step 4: Reading the CNC milling file into the CNC milling machine to perform shape machining on the substrate.

[0098] S7: Hole Metallization: Utilizing the deposition of colloidal palladium, the activation of the palladium core induces a self-catalytic reaction of chemical copper deposition, depositing a layer of chemical copper on the board surface and hole walls, thus forming a network interconnect between the printed conductors of each layer of the interconnect substrate. The hole metallization process includes the following four steps:

[0099] Step 1: Use a deburring and brushing machine to remove burrs from the hole openings, oxide layer, organic contaminants, and other impurities from the board surface, and roughen the surface to enhance the adhesion between the board surface and the electroless copper layer. Step 2: Use electroless plating to deposit a thin copper film on the hole walls of the printed circuit board, achieving surface metallization of the hole walls and enabling the inner layers of each network to conduct. Step 3: Electroplate a dense copper layer onto the printed circuit board after electroless copper plating, providing good conductivity and sufficient strength for the metallized holes. Step 4: Clean and dry the printed circuit board after the first electroplating.

[0100] S8: Graphic transfer: The method and steps are the same as in S3.

[0101] S9: Pattern plating: Pattern plating is a process of selectively forming a coating on the surface of a substrate covered with a patterned dry film through electrolytic deposition. The pattern plating process includes the following two steps:

[0102] Step 1: Plate a copper layer of the required thickness onto the metallized holes and circuit surfaces; Step 2: Plate a tin layer of the required thickness onto the metallized holes and circuit surfaces.

[0103] S10: Alkaline Etching: Utilizing the resist properties of dry / wet films to protect the effective patterned areas, the copper surface without resist layer protection is removed by etching with an alkaline copper chloride solution. The alkaline etching process includes the following three steps:

[0104] Step 1: Remove the resist film from the non-effective pattern areas on the substrate surface; Step 2: Etch the copper surface without resist protection to create the outer conductive pattern; Step 3: Remove the tin protective layer on the conductive lines.

[0105] S11: Depth Control Machining: Using a dedicated CCD depth control milling machine, the corresponding depth control file is retrieved, and depth control machining of the substrate in the overhanging lead area is performed according to the layer stack design theory. The depth control milling process includes the following three steps:

[0106] Step 1: Fabricate a high-precision depth control base plate; Step 2: Before depth control machining, measure and calibrate the CNC milling machine table surface, and use the high-precision depth control base plate to ensure that the table surface flatness is controlled within ±30μm before processing the product; Step 3: Mill the whole plate into single boards, and then use non-metallized holes in the single board for positioning and installation, and perform depth control and thinning machining of the bottom substrate of the suspended lead wire slot.

[0107] High-precision depth control single-board positioning and depth control platform structure, such as Figure 4 As shown, the product's depth control effect is as follows: Figure 5 As shown.

[0108] S12: Laser Cutting: Laser cutting utilizes a focused, high-power, high-density laser beam to irradiate a substrate, causing the irradiated material to rapidly ablate, melt, and vaporize. Simultaneously, a high-speed gas stream coaxial with the laser beam blows away the molten material, thus cutting the epoxy-coated substrate material between suspended leads. The laser cutting process includes the following three steps:

[0109] Step 1: Place the substrate in the corresponding position on the laser cutting worktable according to the guide lines; Step 2: Read the laser cutting file into the laser processing equipment, locate the substrate through the MARK point recognition system, and perform the first laser cutting trial processing; Step 3: Apply the laser parameters determined by the first trial processing to the remaining substrates in the same batch for batch processing.

[0110] Laser cutting effect on both sides of the suspended lead area as shown Figure 7 and Figure 8 As shown

[0111] S13: Chemical Debonding: This process uses potassium permanganate to remove the shallowly carbonized surface layer of the epoxy substrate after laser cutting. The chemical debonding process includes the following two steps:

[0112] Step 1: Load the interconnect substrate board onto the fixture on the hole metallization production line; Step 2: Start the adhesive removal process to remove the adhesive.

[0113] S14: Solder Mask Screen Printing: Solder mask is applied to the top and bottom surfaces of the substrate according to the design layout. The solder mask screen printing process includes the following six steps:

[0114] Step 1: Create a solder resist pattern printing template film; Step 2: Place the interconnect substrate at the corresponding size position on the screen printing machine using guide lines, ensuring complete alignment; Step 3: Apply solder resist ink through the screen to the substrate surface using mechanical pressure; Step 4: Position and fix the prepared printing template to the substrate using the positioning guide holes around the substrate, ensuring complete contact, and then use an exposure machine to perform photocuring treatment on the solder resist medium; Step 5: Place the exposed substrate with the solder resist film into a solder resist developing machine for development, removing the unexposed solder resist film layer hidden by the template; Step 6: Perform curing treatment according to the solder resist material curing parameters.

[0115] S15: Chemical Electroless Nickel-Gold Deposit: A nickel layer of appropriate thickness is deposited on the interconnect substrate pads, and then a gold layer of a certain thickness is replaced on the nickel layer. This provides extremely high flatness to the pad surface during soldering and forms a protective layer on the pad surface and sidewalls, facilitating subsequent lap soldering or wire bonding. The chemical electroless nickel-gold deposit process includes the following three steps:

[0116] Step 1: Use a sandblasting machine to remove the oxide layer, organic contaminants and other impurities from the board surface, and roughen the surface to enhance the adhesion between the board surface and the electroless nickel layer; Step 2: Deposit an electroless nickel gold layer on the exposed copper conductors and pad areas of the substrate to protect the surface and sidewalls of the conductors / pads; Step 3: Clean and dry the processed substrate product.

[0117] S16: Outer Shape Machining: Mill the substrate into the required shape according to the drawings. The outer shape machining process includes the following three steps:

[0118] Step 1: Import the CNC milling pattern file into the dedicated computer for shape processing, load it into the machine's computer and read it out; Step 2: Determine the mounting direction according to the CNC milling pattern, and fix the plate to be processed on the worktable; Step 3: Open the file and set the type and diameter of the milling tool required; Step 4: Start the machine to complete the processing of the base plate shape.

[0119] Although embodiments of the present invention have been described above in conjunction with the accompanying drawings, the present invention is not limited to the specific embodiments and application fields described above. The specific embodiments described above are merely illustrative and instructive, and not restrictive. Those skilled in the art, guided by the specification, can make many other modifications without departing from the scope of the claims of the present invention, and all of these modifications are within the scope of protection of the present invention.

Claims

1. A method for fabricating a POP three-dimensional stacked interconnect substrate, characterized in that, include: The laminate design uses epoxy glass cloth laminate, and the thin sheets of each layer are cut and drawn. The inner layers of the thin film are etched, and the layers of the thin film are laminated to obtain the laminated substrate. Metallized holes are obtained by drilling and metallizing the substrate. Perform pattern transfer and pattern electroplating operations on the substrate; The substrate is subjected to alkaline etching and depth control processing; Laser cutting and adhesive removal of substrates after deep processing; Solder resist coating is applied to the top and bottom surfaces of the substrate according to the design layout, followed by chemical nickel-gold plating, and finally shaping to obtain the POP three-dimensional stacked interconnect substrate. The specific steps for thin section drawing are as follows: The surface of the thin sheet is cleaned and roughened by sandblasting or chemical micro-etching. Remove the transfer medium from the lower carrier board, place the transfer medium and the printed circuit board at the contact point of the guide line, keep them in full contact, and use the squeeze roller to fix the transfer medium to the printed circuit board. Before fixing, use the positioning guide line to align the position of the transfer medium and the printed circuit board. Select a film with the corresponding pattern and attach it to both sides of the thin film, and use an exposure machine to perform photocuring treatment on the transfer medium; After peeling off the top and bottom layers of the film and letting it stand for a period of time, the photosensitive adhesive that has been cured on the surface is broken off according to the pattern of the film and then cleaned. The specific steps of the lamination process are as follows: In a clean and dust-free environment, the prepreg is cut into individual pieces and positioning holes are machined. The inner layer sheet that has already been fabricated with the circuit pattern is blackened to increase the interlayer bonding strength of the inner layers after lamination. Pre-stacked plates are completed using a hot melt machine or a riveting machine according to the corresponding stacking requirements; According to the product type, the laminated plates are processed according to the lamination and stacking requirements; The stacked pressing molds are conveyed to the vacuum laminator via a conveying device; Retrieve the corresponding pressing program to complete the pressing process; The specific steps of controlled depth processing are as follows: Manufacturing a high-precision depth control base plate; Before performing depth control machining, the CNC milling machine worktable is measured and calibrated, and a high-precision depth control base plate is used to ensure that the flatness of the table is controlled within ±30μm before the product is processed. The whole board is milled into single boards, and then non-metallized holes in the single board are used for positioning and installation. The bottom substrate of the suspended lead wire is grooved and the depth is controlled to reduce the thickness. The specific steps for using epoxy glass cloth laminate for laminate design are as follows: The inner core board uses a substrate with a thickness of 0.15mm and a copper thickness of 18um / 18um. The stacking design uses four 1080-type prepreg sheets and an outer layer of 18um copper foil. Based on the theoretical thickness of the material, the theoretical thickness of the interconnect substrate is calculated to be 0.6mm. The theoretical depth of the suspended lead processing is calculated to be 0.35~0.4mm. The corresponding graphics and CNC machining files are made according to the design layout.

2. The method for manufacturing a POP three-dimensional stacked interconnect substrate according to claim 1, characterized in that, The specific steps of inner layer etching are as follows: Etch the copper surface without resist layer protection to create inner conductive patterns; Remove the resist dry film from the non-effective patterned areas on the surface of the thin film.

3. The method for manufacturing a POP three-dimensional stacked interconnect substrate according to claim 1, characterized in that, The specific steps for drilling are as follows: Machining positioning holes on multilayer boards, checking the overlap of inner layer patterns, measuring expansion and contraction values, and identifying and marking the board orientation; Use pins to fix the multilayer board to the CNC drilling machine worktable at the positioning hole positions; The CNC drilling file is read into the CNC drilling machine to perform drilling on the multilayer board. The CNC milling file is read into the CNC milling machine to perform shape processing on the substrate.

4. The method for manufacturing a POP three-dimensional stacked interconnect substrate according to claim 1, characterized in that, The specific steps of the hole metallization operation are as follows: Use a deburring brush machine to remove burrs from the orifices, oxide layer and organic contaminants from the board surface, and roughen the surface to enhance the adhesion between the board surface and the chemical copper layer. A copper thin film is deposited on the hole wall of the printed circuit board using a chemical plating process to achieve metallization of the hole wall surface, making the inner layers of each network conductive. Electroplating a dense copper layer onto the printed circuit board after chemical copper plating provides conductivity and strength to the metallized holes of the printed circuit board. Clean and dry the printed circuit board after one electroplating.

5. The method for manufacturing a POP three-dimensional stacked interconnect substrate according to claim 1, characterized in that, The specific steps of alkaline etching are as follows: Remove the anti-plating dry film from the non-effective patterned areas on the substrate surface; Etch the copper surface without resist layer protection to create the outer conductive pattern; Remove the tin protective layer from the conductive lines.

6. The method for manufacturing a POP three-dimensional stacked interconnect substrate according to claim 1, characterized in that, The specific steps for applying solder resist coating to the top and bottom surfaces of the substrate according to the design layout are as follows: Create a solder resist graphic printing template film; Place the interconnect substrate at the corresponding size position on the screen printing machine using guide lines, and ensure complete alignment; Solder resist ink is pressed onto the substrate surface through a screen using mechanical pressure. The prepared printing film is positioned and fixed to the substrate through the positioning guide holes around the substrate, ensuring complete contact. The solder resist is then photocured using an exposure machine. After exposure, the substrate with solder resist film is placed in a solder resist developing machine for development, and the unexposed solder resist film layer that was covered by the film is completely removed. Then, cure the material according to the curing parameters of the solder resist.

7. A POP three-dimensional stacked interconnect substrate, characterized in that, The substrate is prepared according to the manufacturing method of any one of claims 1-6, wherein the epoxy material under the copper leads is retained at 0.1~0.2mm, and the substrate on both sides of the suspended leads is completely removed.

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