Display device and manufacturing method thereof

Abstract

The invention discloses a display device and a manufacturing method thereof. The display device comprises a driving backboard and a plurality of display units. Each display unit comprises at least one light-emitting chip, and the light-emitting chips in the same display unit are arranged in a laminated mode. The light-emitting chip comprises an epitaxial auxiliary layer and an epitaxial structure layer; lattices of the epitaxial auxiliary layer and the epitaxial structure layer are matched. By introducing the epitaxial auxiliary layer, the epitaxial structure of the light-emitting chip can be directly grown on the epitaxial auxiliary layer, so that the dependence of the light-emitting chip on an epitaxial substrate can be eliminated, the production cost is greatly reduced, and the chip manufacturing flexibility is improved. Each light-emitting chip in the display unit adopts a laminated structure, and the manufacturing processes of the light-emitting chips are mutually independent, so that the sizes of the light-emitting chips can be flexibly controlled, the overall size of the display unit is reduced, more display units can be arranged in the same area, and the resolution of the display device is improved.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display device and a manufacturing method thereof. Background Art

[0002] Micro LED (Micro Light-Emitting Diode, Micro LED for short) display technology refers to a display technology that uses micron-scale LED chips as light-emitting units and assembles them on a driving backplane to form a high-density light-emitting array. Due to the small size and high integration of Micro LED, it has greater advantages in brightness, resolution and contrast compared with Organic Light-Emitting Diode (OLED), and is widely used in micro-display technologies such as Augmented Reality (AR), Virtual Reality (VR), and Mixed Reality (MR).

[0003] However, the sub-pixel arrangement in Micro LED display devices is usually to transfer a large number of independent red, green and blue Micro LEDs to the driving backplane. Due to process limitations, the pixel pitch cannot be further reduced. In order to overcome this problem, a method is proposed to first make a package including red, green and blue Micro LEDs, and then transfer the package to the driving backplane. However, the current solution usually adopts the horizontal arrangement of red, green and blue Micro LEDs or the prism light combination method, which seriously limits the advantage of high pixel density of Micro LED. Summary of the invention

[0004] According to a first aspect of an embodiment of the present invention, a display device is provided, including:

[0005] A driving backplane, used for providing a driving signal;

[0006] A plurality of display units are located on the driving backplane and are electrically connected to the driving backplane;

[0007] Wherein, the display unit comprises at least one light-emitting chip, and the light-emitting chips in the same display unit are stacked;

[0008] The light-emitting chip comprises: an epitaxial auxiliary layer and an epitaxial structural layer; the epitaxial auxiliary layer is located on a side of the light-emitting chip close to the driving backplane, and the epitaxial structural layer is located on a side of the epitaxial auxiliary layer away from the driving backplane; the lattices of the epitaxial auxiliary layer and the epitaxial structural layer match.

[0009] In some embodiments of the present invention, the display unit includes three light-emitting chips, namely a first light-emitting chip, a second light-emitting chip and a third light-emitting chip; the first light-emitting chip, the second light-emitting chip and the third light-emitting chip are used to emit light of different wavelengths;

[0010] The first light-emitting chip is located on a side close to the driving backplane; the second light-emitting chip is located on a side of the first light-emitting chip away from the driving backplane; the third light-emitting chip is located on a side of the second light-emitting chip away from the first light-emitting chip; the first light-emitting chip, the second light-emitting chip and the third light-emitting chip have an overlapping area in their orthographic projections on the driving backplane.

[0011] In some embodiments of the present invention, the driving backplane includes a plurality of pad groups corresponding to the plurality of display units one by one; the pad groups include: a first pad, a second pad, a third pad and a fourth pad;

[0012] The display unit further includes: a first insulating layer covering the first light emitting chip and the driving backplane, a second insulating layer covering the second light emitting chip and the first insulating layer, and a third insulating layer covering the third light emitting chip and the second insulating layer;

[0013] The display unit further includes: a first connection portion, a second connection portion and a third connection portion; the epitaxial auxiliary layer of the first light-emitting chip is located on the first pad; the first connection portion is used to electrically connect the epitaxial auxiliary layer of the second light-emitting chip and the second pad; the second connection portion is used to electrically connect the epitaxial auxiliary layer of the third light-emitting chip and the third pad; the third connection portion is used to electrically connect the side of the epitaxial structure layer of the first light-emitting chip away from the epitaxial auxiliary layer, the side of the epitaxial structure layer of the second light-emitting chip away from the epitaxial auxiliary layer, the side of the epitaxial structure layer of the third light-emitting chip away from the epitaxial auxiliary layer, and the fourth pad;

[0014] The first connection portion is electrically connected to the second pad through the via hole of the first insulation layer; the second connection portion is electrically connected to the third pad through the via holes of the first insulation layer and the second insulation layer; the third connection portion is electrically connected to the fourth pad through the via holes of the first insulation layer, the second insulation layer and the third insulation layer.

[0015] In some embodiments of the present invention, the epitaxial structure layer includes:

[0016] a buffer layer, located on the epitaxial auxiliary layer;

[0017] A first semiconductor layer, located on a side of the buffer layer away from the epitaxial auxiliary layer;

[0018] a light emitting layer, located on a side of the first semiconductor layer away from the buffer layer;

[0019] a second semiconductor layer, located on a side of the light-emitting layer away from the first semiconductor layer;

[0020] The third connection portion is used to electrically connect the second semiconductor layer of the first light emitting chip, the second semiconductor layer of the second light emitting chip, the second semiconductor layer of the third light emitting chip and the fourth pad.

[0021] In some embodiments of the present invention, the first half body layer is an N-type doped semiconductor layer, and the second semiconductor layer is a P-type doped semiconductor layer.

[0022] In some embodiments of the present invention, the display unit further comprises: a first transflective layer located between the first insulating layer and the second light-emitting chip, and a second transflective layer located between the second insulating layer and the third light-emitting chip;

[0023] The first transflective layer is used to transmit the light emitted by the first light-emitting chip and reflect the light emitted by the second light-emitting chip and the third light-emitting chip; the second transflective layer is used to transmit the light emitted by the first light-emitting chip and the second light-emitting chip and reflect the light emitted by the third light-emitting chip.

[0024] In some embodiments of the present invention, the orthographic projections of the light-emitting chips in the same display unit on the driving backplane completely overlap.

[0025] According to a second aspect of an embodiment of the present invention, a method for manufacturing a display device is provided, comprising:

[0026] Making at least one light-emitting structure layer on the driving backplane;

[0027] Wherein, the manufacturing method of each light emitting structure layer includes:

[0028] forming an epitaxial auxiliary material layer;

[0029] Etching the epitaxial auxiliary material layer to form a plurality of epitaxial auxiliary layers;

[0030] An epitaxial structure layer is formed on each of the epitaxial auxiliary layers.

[0031] In some embodiments of the present invention, the step of manufacturing at least one light-emitting structure layer on the driving backplane includes:

[0032] Making a first light-emitting structure layer on the driving backplane;

[0033] Fabricating a second light-emitting structure layer on the first light-emitting structure layer;

[0034] forming a third light-emitting structure layer on the second light-emitting structure layer;

[0035] Wherein, the driving backplane includes a plurality of pad groups; the pad groups include: a first pad, a second pad, a third pad and a fourth pad;

[0036] The step of manufacturing the first light-emitting structure layer on the driving backplane comprises:

[0037] forming a first epitaxial auxiliary material layer on the driving back plate;

[0038] Etching the first epitaxial auxiliary material layer to form a first epitaxial auxiliary layer on each of the first pads of the driving backplane;

[0039] forming a first epitaxial structure layer on each of the first epitaxial auxiliary layers;

[0040] forming a first insulating layer on the driving back plate and each of the first epitaxial structure layers;

[0041] forming a first transflective layer on the first insulating layer;

[0042] The step of manufacturing the second light-emitting structure layer on the first light-emitting structure layer comprises:

[0043] forming a second epitaxial auxiliary material layer on the first transflective layer;

[0044] Etching the second epitaxial auxiliary material layer to form a second epitaxial auxiliary layer at a position of the first transflective layer corresponding to each of the first pads;

[0045] forming a second epitaxial structure layer on each of the second epitaxial auxiliary layers;

[0046] forming a second insulating layer on the first transflective layer and each of the second epitaxial structure layers;

[0047] forming a second transflective layer on the second insulating layer;

[0048] The step of manufacturing a third light-emitting structure layer on the second light-emitting structure layer comprises:

[0049] forming a third epitaxial auxiliary material layer on the second transflective layer;

[0050] Etching the third epitaxial auxiliary material layer to form a third epitaxial auxiliary layer at positions of the second transflective layer corresponding to the first pads;

[0051] forming a third epitaxial structure layer on each of the third epitaxial auxiliary layers;

[0052] A third insulating layer is formed on the second transflective layer and each of the third epitaxial structure layers.

[0053] In some embodiments of the present invention, the step of forming a first insulating layer on the driving backplane and each of the first epitaxial structure layers includes:

[0054] forming a first dielectric layer on the driving backplane; the first dielectric layer exposes the surface of each of the first epitaxial structure layers;

[0055] forming a plurality of first sub-connecting portions on the first dielectric layer; each of the first sub-connecting portions corresponds to each of the first epitaxial structural layers one by one, and the first sub-connecting portions cover at least a portion of a surface of the corresponding first epitaxial structural layer;

[0056] forming a second dielectric layer on each of the first sub-connecting portions and the first dielectric layer; the first dielectric layer and the second dielectric layer constitute the first insulating layer;

[0057] Before forming the second epitaxial auxiliary material layer on the first transflective layer, the method further includes:

[0058] Etching the first transflective layer and the first insulating layer to form a plurality of through holes exposing each of the second pads;

[0059] A plurality of first connection parts are formed on the first transflective layer; each of the first connection parts corresponds to each of the second pads one by one, and the first connection parts are electrically connected to the corresponding second pads through the through holes;

[0060] The forming of a second insulating layer on the first transflective layer and each of the second epitaxial structure layers comprises:

[0061] forming a third dielectric layer on the first transflective layer; the third dielectric layer exposes the surface of each of the second epitaxial structure layers;

[0062] forming a plurality of second sub-connecting portions on the third dielectric layer; each of the second sub-connecting portions corresponds to each of the second epitaxial structure layers one by one, and the second sub-connecting portions cover at least a portion of the surface of the corresponding second epitaxial structure layer;

[0063] forming a fourth dielectric layer on each of the second sub-connecting portions and the third dielectric layer; the third dielectric layer and the fourth dielectric layer constitute the second insulating layer;

[0064] Before forming the third epitaxial auxiliary material layer on the second transflective layer, the method further includes:

[0065] Etching the second transflective layer, the second insulating layer, the first transflective layer and the first insulating layer to form a plurality of through holes exposing the third pads;

[0066] A plurality of second connection parts are formed on the second transflective layer; each of the second connection parts corresponds to each of the third pads one by one, and the second connection parts are electrically connected to the corresponding third pads through the through holes;

[0067] The forming of a third insulating layer on the second transflective layer and each of the third epitaxial structure layers comprises:

[0068] forming a fifth dielectric layer on the second transflective layer; the fifth dielectric layer exposes the surface of each of the third epitaxial structure layers;

[0069] forming a plurality of third sub-connecting portions on the fifth dielectric layer; each of the third sub-connecting portions corresponds to each of the third epitaxial structure layers one by one, and the third sub-connecting portions cover at least a portion of the surface of the corresponding third epitaxial structure layer;

[0070] forming a sixth dielectric layer on each of the third sub-connecting portions and the fifth dielectric layer; the fifth dielectric layer and the sixth dielectric layer constitute the third insulating layer;

[0071] Wherein, before forming a plurality of third sub-connecting parts on the fifth dielectric layer, the method further comprises:

[0072] Etching the fifth dielectric layer, the second transflective layer, the second insulating layer, the first transflective layer and the first insulating layer to form a plurality of through holes exposing the fourth pads;

[0073] The forming of a plurality of third sub-connecting parts on the fifth dielectric layer comprises:

[0074] A plurality of third sub-connecting portions are formed on the fifth dielectric layer, and a plurality of fourth sub-connecting portions are formed in the through hole; each of the fourth sub-connecting portions corresponds to each of the fourth pads one by one, and the fourth sub-connecting portion electrically connects the first sub-connecting portion, the second sub-connecting portion, the third sub-connecting portion and the fourth pad in the same display unit through the through hole; the first sub-connecting portion, the second sub-connecting portion, the third sub-connecting portion and the fourth sub-connecting portion constitute a third connecting portion.

[0075] In the display device and the manufacturing method thereof provided by the embodiment of the present invention, by introducing an epitaxial auxiliary layer, the epitaxial structure of the light-emitting chip can be directly grown on the epitaxial auxiliary layer, thereby getting rid of the dependence of the light-emitting chip on the epitaxial substrate, greatly reducing the production cost and improving the flexibility of chip manufacturing. Each light-emitting chip in the display unit adopts a stacked structure, and the manufacturing process of each light-emitting chip is independent of each other, thereby flexibly controlling the size of the light-emitting chip and reducing the overall size of the display unit, so that a larger number of display units can be set within the same area, which is conducive to improving the resolution of the display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0076] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings introduced below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0077] Figure 1 One of the cross-sectional structural schematic diagrams of a display device provided by an embodiment of the present invention;

[0078] Figure 2 A second schematic diagram of a cross-sectional structure of a display device provided in an embodiment of the present invention;

[0079] Figure 3 A third schematic diagram of a cross-sectional structure of a display device provided in an embodiment of the present invention;

[0080] Figure 4 A flow chart of a method for manufacturing a display device provided by an embodiment of the present invention;

[0081] Figure 5 One of the schematic cross-sectional structural diagrams of the display device provided by the embodiment of the present invention in an intermediate state during the manufacturing process;

[0082] Figure 6 A second schematic cross-sectional structural diagram of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0083] Figure 7 A third schematic cross-sectional structural diagram of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0084] Figure 8 A fourth schematic cross-sectional structural diagram of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0085] Fig. 9 A fifth schematic cross-sectional structural diagram of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0086] Fig.10 A sixth schematic cross-sectional structural diagram of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0087] Fig.11 The seventh schematic diagram of the cross-sectional structure of the display device provided by the embodiment of the present invention in an intermediate state during the manufacturing process;

[0088] Fig.12 An eighth schematic diagram of a cross-sectional structure of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0089] Fig.13 A ninth schematic cross-sectional structural diagram of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0090] Fig.14 A tenth schematic cross-sectional structural diagram of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0091] Fig.15 The eleventh schematic cross-sectional structure diagram of the display device provided by the embodiment of the present invention in an intermediate state during the manufacturing process;

[0092] Fig.16 A twelfth schematic cross-sectional structure diagram of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0093] Fig.17 The thirteenth schematic diagram of the cross-sectional structure of the display device provided by the embodiment of the present invention in an intermediate state during the manufacturing process;

[0094] Fig.18 A fourteenth schematic cross-sectional structural diagram of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0095] Fig.19 The fifteenth schematic cross-sectional structure diagram of the display device provided by the embodiment of the present invention in an intermediate state during the manufacturing process;

[0096] Fig. 20 A sixteenth schematic cross-sectional structural diagram of an intermediate state of a display device in a manufacturing process provided by an embodiment of the present invention;

[0097] Fig.21 The seventeenth schematic cross-sectional structure diagram of the display device provided by the embodiment of the present invention in an intermediate state during the manufacturing process;

[0098] Fig. 22 The eighteenth schematic cross-sectional structure diagram of the display device provided by the embodiment of the present invention in an intermediate state during the manufacturing process;

[0099] Fig.23 The nineteenth schematic cross-sectional structure diagram of the display device in an intermediate state during the manufacturing process provided by the embodiment of the present invention. DETAILED DESCRIPTION

[0100] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, the present invention will be further described below with reference to the accompanying drawings and examples. However, the exemplary embodiments can be implemented in various forms and should not be understood as being limited to the embodiments described herein; on the contrary, these embodiments are provided to make the present invention more comprehensive and complete, and to fully convey the concepts of the exemplary embodiments to those skilled in the art. The same figure marks in the figures represent the same or similar structures, and thus their repeated descriptions will be omitted. The words expressing position and direction described in the present invention are all explained using the accompanying drawings as examples, but changes can be made as needed, and the changes made are all included in the scope of protection of the present invention. The drawings of the present invention are only used to illustrate the relative position relationship and do not represent the true proportions.

[0101] In a display device based on Micro LED technology, the size of the LED chip is reduced to the micron level, which is called Micro LED. Since LED cannot be produced on a large area on a large-sized substrate of glass or other materials, the current process usually first produces red, green and blue Micro LEDs separately on a semiconductor substrate, and then transfers the red, green and blue Micro LEDs to the driving backplane through mass transfer technology and arranges them in an array, where a Micro LED can be regarded as a sub-pixel, and each Micro LED is connected to a driving circuit respectively, so that each Micro LED can be driven to emit light individually. As display technology is increasingly developing towards high resolution, high brightness and high contrast, the requirements for the arrangement density of Micro LEDs are also correspondingly increased. However, due to current process limitations, it is difficult to further reduce the spacing between Micro LEDs, thereby limiting the number of pixels that can be set in the display device and being unable to further improve the resolution of the display device.

[0102] In view of this, an embodiment of the present invention provides a display device, which can help to arrange more pixels in the same space, thereby improving the resolution of the display device.

[0103] Figure 1 This is one of the schematic cross-sectional structural diagrams of a display device provided in an embodiment of the present invention.

[0104] like Figure 1 As shown, the display device includes a driving backplane 1 and a plurality of display units 2 located on the driving backplane 1 .

[0105] The driving backplane 1 may include a base substrate and a driving circuit formed on the base substrate.

[0106] The substrate substrate can be a hard substrate with a flat surface such as cleaned SiO2 / p-Si, SiO2 / n-Si, transparent glass, quartz, etc., or a flexible substrate such as polyimide (PI), polyethersulfone (PES), polyethylene naphthalate (PEN), polycarbonate (PC) and polyethylene terephthalate (PET).

[0107] The driving circuit is formed on the substrate, and can adopt a thin film transistor (TFT) driving circuit, which can specifically include a low-temperature polysilicon TFT, an oxide TFT, a low-temperature polycrystalline oxide TFT and other thin film transistor driving circuits, and can also adopt a complementary metal oxide semiconductor (CMOS) driving circuit or a micro-electro-mechanical system (MEMS) driving circuit, etc. The driving circuit can provide a driving signal to the display unit connected thereto, so that each display unit is driven to emit light separately.

[0108] A plurality of display units 2 are located on the driving backplane 1 and are electrically connected to the driving circuit of the driving backplane. The display unit 2 includes at least one light emitting chip 21, and the light emitting chips 21 in the same display unit 2 are stacked.

[0109] Each display unit in the embodiment of the present invention can be used as a pixel, and each light-emitting chip in the display unit can adopt a Micro LED chip, and each light-emitting chip adopts a stacked structure, thereby flexibly controlling the size of the light-emitting chip and reducing the overall size of the display unit, so that more display units can be arranged in the same area, which is beneficial to improving the resolution of the display device.

[0110] like Figure 1 As shown, each light-emitting chip 21 in the display unit includes: an epitaxial auxiliary layer 211 and an epitaxial structure layer 212; the epitaxial auxiliary layer 211 is located on the side of the light-emitting chip close to the driving backplane 1, and the epitaxial structure layer 212 is located on the side of the epitaxial auxiliary layer 211 away from the driving backplane 1; the lattices of the epitaxial auxiliary layer 211 and the epitaxial structure layer 212 match.

[0111] In the embodiment of the present invention, each light-emitting chip of the display unit is not transferred by bonding, but is made in situ on the driving backplane. The light-emitting chip first forms an epitaxial auxiliary layer at a set position. The epitaxial auxiliary layer is similar to the role of the substrate when the LED chip is made, and matches the lattice of the material of the light-emitting chip. In this way, the epitaxial structure of the LED chip can be directly grown on the epitaxial auxiliary layer, thereby getting rid of the dependence of the LED on the epitaxial substrate, greatly reducing the production cost and improving the flexibility of chip manufacturing.

[0112] In specific implementation, the epitaxial auxiliary layer can be made of a material that is viscous and matches the crystal lattice of the LED chip material. If the display unit includes more than two light-emitting chips, the epitaxial auxiliary layer of the light-emitting chip located at the bottom layer can be made of a non-transparent material with high reflectivity, and the epitaxial auxiliary layer of the light-emitting chip located at the upper layer can be made of a material with high transmittance. The epitaxial auxiliary layer can be made of a two-dimensional single crystal material, as long as the material can achieve the crystal lattice matching of the epitaxial structure layer of the light-emitting chip.

[0113] In the related art, if the display unit adopts a laminated structure, a post-etching connection process is usually used to make the size of the bottom light-emitting chip larger than the size of the upper light-emitting chip, so that the size change of each light-emitting chip is not flexible enough, resulting in the performance not being able to perform at the optimal level. In the display unit of the embodiment of the present invention, each light-emitting chip also adopts a laminated structure, but each light-emitting chip adopts an in-situ manufacturing solution, so the size and structure of each light-emitting chip can be independently set, which is conducive to the display unit to perform at the best performance.

[0114] Specifically, if Figure 1 As shown, the epitaxial structure layer 212 of the light-emitting chip includes: a buffer layer 212a, a first semiconductor layer 212b, a light-emitting layer 212c and a second semi-layer body layer 212d. The buffer layer 212a is located on the epitaxial auxiliary layer 211; the first semiconductor layer 212b is located on the side of the buffer layer 212a away from the epitaxial auxiliary layer 211; the light-emitting layer 212c is located on the side of the first semiconductor layer 212b away from the buffer layer 212a; and the second semiconductor layer 212d is located on the side of the light-emitting layer 212c away from the first semiconductor layer 212b.

[0115] The buffer layer 212a can be made of the same material as the first semiconductor layer 212b, the light-emitting layer 212c and the second semiconductor layer 212d. A buffer layer 212a is first formed on the epitaxial auxiliary layer 211, which is more conducive to epitaxial growth. The first semiconductor layer 212b and the second semiconductor layer 212d are respectively N-type doped and P-type doped using the same material. The light-emitting layer 212c can adopt a multi-quantum well structure, which is conducive to improving the light-emitting efficiency.

[0116] Figure 2The second schematic diagram of the cross-sectional structure of the display device provided by the embodiment of the present invention is as follows: Figure 3 The third schematic diagram of the cross-sectional structure of the display device provided in the embodiment of the present invention.

[0117] It is worth noting that Figure 2 and Figure 3 Only the cross-sectional structure of one display unit is shown. The display device includes multiple display units with the same structure, and when manufacturing each film layer in each display unit, each display unit in the display area is manufactured synchronously. In order to illustrate the structure of the display unit, the embodiment of the present invention only takes one display unit as an example, which does not mean that each display unit in the display device needs to be manufactured separately.

[0118] like Figure 2 and Figure 3 As shown, in order to achieve full-color display, each display unit 2 may include three stacked light-emitting chips, namely, a first light-emitting chip 21r, a second light-emitting chip 21g, and a third light-emitting chip 21b; the first light-emitting chip 21r, the second light-emitting chip 21g, and the third light-emitting chip 21b are used to emit light of different wavelengths. In the embodiment of the present invention, the first light-emitting chip 21r can be used to emit red light, the second light-emitting chip 21g can be used to emit green light, and the third light-emitting chip 21b can be used to emit blue light. The first light-emitting chip 21r is located on the side close to the driving backplane 1; the second light-emitting chip 21g is located on the side of the first light-emitting chip 21r away from the driving backplane 1; the third light-emitting chip 21b is located on the side of the second light-emitting chip 21g away from the first light-emitting chip 21r, thereby avoiding the influence of the emitted light of the light-emitting chip on the light-emitting chip above it.

[0119] The light-emitting layer of the first light-emitting chip 21r can be made of compound materials such as aluminum gallium arsenide (AlGaAs), gallium arsenic phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), gallium phosphide (GaP), and indium gallium nitride (InGaN). The light-emitting layer of the second light-emitting chip 21g can be made of compound materials such as indium gallium nitride (InGaN), gallium nitride (GaN), gallium phosphide (GaP), aluminum gallium indium phosphide (AlGaInP), and aluminum gallium phosphide (AlGaP). The light-emitting layer of the third light-emitting chip 21b can be made of compound materials such as gallium nitride (GaN), indium gallium nitride (InGaN), and zinc arsenide (ZnSe).

[0120] like Figure 2 As shown, the first light emitting chip 21r, the second light emitting chip 21g and the third light emitting chip 21b have overlapping areas in the orthographic projection of the driving backplane 1, thereby making the light emitting chips in the display unit stacked and reducing the overall size of the display unit.

[0121] In some embodiments, Figure 2 As shown, the orthographic projections of the light-emitting chips in the same display unit 2 on the driving backplane 1 completely overlap, that is, the sizes of the light-emitting chips in the same display unit 2 are exactly the same.

[0122] In some embodiments, Figure 3 As shown, the orthographic projection sizes of the light emitting chips in the same display unit 2 on the driving backplane 1 may be different. Figure 3 For example, the size of the third light emitting chip 21b may be larger than that of the second light emitting chip 21g, and the size of the second light emitting chip 21g may be larger than that of the first light emitting chip 21r.

[0123] In the related art, a display unit with a stacked structure usually stacks three-color light-emitting chips together, then etches and patterns them, and finally realizes electrical connection, which results in the light-emitting chip at the bottom having the largest size and the light-emitting chip at the top having the smallest size. The embodiment of the present invention introduces an epitaxial auxiliary layer, so that the size of the three-color light-emitting chip in the horizontal direction is no longer restricted, thereby improving the light efficiency of the light-emitting chip at the upper layer, thereby improving the overall brightness.

[0124] In the related art, the structure of the three-color light-emitting chip is finally etched and patterned, and the preparation process and the pattern structure are mutually restricted, which in turn affects the performance. The display unit in the embodiment of the present invention first makes the first light-emitting chip and connects it before making the second light-emitting chip, and then makes the third light-emitting chip after connecting the second light-emitting chip. The manufacturing process of the three-color light-emitting chip is relatively independent and there will be no mutual interference. By improving the performance of each of the three-color light-emitting chips, the light output quality of the laminated display unit is optimized.

[0125] like Figure 2 and Figure 3 As shown, the driving backplane 1 includes a plurality of pad groups corresponding one-to-one to the plurality of display units 2 ; the pad groups include: a first pad 11 , a second pad 12 , a third pad 13 and a fourth pad 14 .

[0126] The display unit 2 further includes a first insulating layer s1 covering the first light emitting chip 21r and the driving backplane 1, a second insulating layer s2 covering the second light emitting chip 21g and the first insulating layer s1, and a third insulating layer s3 covering the third light emitting chip 21b and the second insulating layer s2.

[0127] The display unit 2 further includes: a first connection portion 22, a second connection portion 23, and a third connection portion 24. Considering the overall size of the display unit, each light-emitting chip in the display unit adopts a common electrode structure. The film layer close to the epitaxial auxiliary layer in the light-emitting chip is the first semiconductor layer, and the film layer located on the top of the light-emitting chip is the second semiconductor layer. Considering the manufacturing sequence of the epitaxial structure layer, the first semiconductor layer is an N-type doped semiconductor layer, and the second semiconductor layer is a P-type doped semiconductor layer. Each light-emitting chip in the display unit can adopt a common anode structure.

[0128] Specifically, the epitaxial auxiliary layer of the first light-emitting chip 21r is located on the first pad 11; the first connecting portion 22 is used to electrically connect the epitaxial auxiliary layer of the second light-emitting chip 21g and the second pad 12; the second connecting portion 23 is used to electrically connect the epitaxial auxiliary layer of the third light-emitting chip 21b and the third pad 13; the third connecting portion 24 is used to electrically connect the second semiconductor layers (P-type doped semiconductor layers) of the first light-emitting chip 21r, the second light-emitting chip 21g, and the third light-emitting chip 21b to the fourth pad 14.

[0129] Among them, the first connection part 22 is electrically connected to the second pad 12 through the via hole of the first insulating layer s1; the second connection part 23 is electrically connected to the third pad 13 through the via holes of the first insulating layer s1 and the second insulating layer s2; the third connection part 24 is electrically connected to the fourth pad 14 through the via holes of the first insulating layer s1, the second insulating layer s2 and the third insulating layer s3.

[0130] In the embodiment of the present invention, the second pad 12 and the third pad 13 for connecting the second light-emitting chip and the third light-emitting chip, and the fourth pad 14 of the common electrode structure are all arranged at the periphery of the light-emitting chip structure, rather than directly below the light-emitting chip. For the structure in which the pad is arranged directly below the light-emitting chip, the etching and patterning of the light-emitting chip is relatively limited, and the light-emitting chip structure at the pad position needs to be retained, which limits the reduction of the overall size of the light-emitting chip. In contrast, in the embodiment of the present invention, the second pad 12, the third pad 13 and the fourth pad 14 are arranged at the periphery of the light-emitting chip structure, and the overall structure patterning is more flexible.

[0131] Depend on Figure 2 and Figure 3It can be seen that the first connection part 22, the second connection part 23 and the third connection part 24 include both a part located on the surface of the insulating layer and a part located in the through hole of the insulating layer. Among them, the part located on the surface of the insulating layer can be selected from one material of transparent conductive materials such as indium oxide, tin oxide, indium zinc oxide, indium tin oxide, aluminum zinc oxide, fluorine-doped tin oxide, etc., or a laminated structure of multiple materials. At the same time, the connection parts connecting different light-emitting chips can use the same or different materials. The part located in the through hole of the insulating layer can be selected from one or more metal materials with low resistance such as tungsten, aluminum, copper, gold, indium, etc., or materials with excellent conductivity such as indium oxide, tin oxide, indium zinc oxide, indium tin oxide, aluminum zinc oxide, fluorine-doped tin oxide, etc. At the same time, the connection parts connecting different light-emitting chips can use the same or different materials.

[0132] The first insulating layer s1, the second insulating layer s2, and the third insulating layer s3 may be made of one or more insulating materials such as PMMA, Ta2O5, SiO2, Al2O3, HfO2, silicon nitride, silicon oxynitride, etc. At the same time, the first insulating layer s1, the second insulating layer s2, and the third insulating layer s3 may be made of the same or different materials.

[0133] The epitaxial auxiliary layer 211 of the light-emitting chip is in direct contact with the pad or the connection part, so the epitaxial auxiliary layer not only needs to match the lattice of the corresponding epitaxial structure layer, but also needs to have better conductivity. At the same time, the buffer layer 212a in each light-emitting chip also needs to have N-type conductivity or strong conductivity, thereby ensuring the reliability of the electrical connection between the pad or the connection part and the light-emitting chip.

[0134] In some embodiments, a metal layer with excellent conductivity and reflectivity can also be arranged between the first light-emitting chip 21r and the driving backplane 1, thereby protecting the reliability of the electrical connection between the first light-emitting chip 21r and the driving backplane 1, and also protecting the outgoing light of the display unit from being emitted in the light-emitting direction of the display device, thereby improving the brightness and light utilization rate of the display unit.

[0135] In some embodiments, Figure 2 and Figure 3 As shown, the display unit 2 further includes: a first transflective layer f1 located between the first insulating layer s1 and the second light-emitting chip 21g, and a second transflective layer f2 located between the second insulating layer s2 and the third light-emitting chip 21b. The first transflective layer f1 is used to transmit the light emitted from the first light-emitting chip 21r and reflect the light emitted from the second light-emitting chip 21g and the third light-emitting chip 21b; the second transflective layer f2 is used to transmit the light emitted from the first light-emitting chip 21r and the second light-emitting chip 21g and reflect the light emitted from the third light-emitting chip 21b.

[0136] The first transflective layer f1 and the second transflective layer f2 may be distributed Bragg reflective layers or other filter layers, which have high transmittance to the light emitted by the light-emitting chip located below them and high reflectivity to the light emitted by the light-emitting chip located above them. At the same time, the structures and functions of the first transflective layer f1 and the second transflective layer f2 may be different.

[0137] In some embodiments, the shape of each light emitting chip in the display unit can be circular or square, and can be different from each other. The size of each light emitting chip can be adjusted as needed.

[0138] In some embodiments, the light-emitting layer of each light-emitting chip may be roughened as needed to adjust the light extraction efficiency and colorization effect.

[0139] In some embodiments, the display device may further include a plurality of reflective cups, one reflective cup corresponding to one display unit and the reflective cups are arranged around the display unit, and the reflective cups may be used to reflect the light emitted from the display unit to the light emitting side of the display device, thereby improving the utilization rate of the light. At the same time, the thickness of the light emitting layer of each light emitting chip in the display unit may also be adjusted as needed, thereby controlling the amount of light emitted from the side of the light emitting chip, and the light emitted from the display unit may be adjusted in conjunction with the reflective cups.

[0140] In some embodiments, the display device may further include a plurality of microlenses, one microlens corresponding to one display unit, and the microlens is disposed on the top of the corresponding display unit. The microlens can be used to converge light so that it can be focused farther away, so that the display device can be applied to more diverse scenarios.

[0141] Based on the same inventive concept, an embodiment of the present invention further provides a method for manufacturing a display device, which can manufacture at least one light-emitting structure layer on a driving backplane, and each light-emitting structure layer can include multiple light-emitting chips that emit light of the same color.

[0142] In an embodiment of the present invention, the manufacturing method of each light emitting structure layer includes:

[0143] forming an epitaxial auxiliary material layer;

[0144] Etching the epitaxial auxiliary material layer to form a plurality of epitaxial auxiliary layers;

[0145] An epitaxial structure layer is formed on each epitaxial auxiliary layer.

[0146] By introducing an epitaxial auxiliary layer into the light-emitting chip, the epitaxial structure of the light-emitting chip can be directly grown on the epitaxial auxiliary layer, thereby getting rid of the LED's dependence on the epitaxial substrate, greatly reducing production costs and improving the flexibility of chip manufacturing.

[0147] The embodiment of the present invention takes a display device including three light-emitting structure layers as an example to specifically illustrate the manufacturing process of the display device. Figure 4 The present invention provides a flowchart of a method for manufacturing a display device according to an embodiment of the present invention.

[0148] like Figure 4 As shown, the manufacturing method of the display device includes:

[0149] S10, manufacturing a first light-emitting structure layer on the driving backplane;

[0150] S20, forming a second light-emitting structure layer on the first light-emitting structure layer;

[0151] S30, manufacturing a third light-emitting structure layer on the second light-emitting structure layer.

[0152] The manufacturing process of the driving backplane can be adopted in the related art, which will not be described in detail here. The surface of the driving backplane includes a plurality of pad groups, one pad group corresponds to one display unit. Each pad group includes: a first pad, a second pad, a third pad and a fourth pad.

[0153] Figure 5 to Figure 23 The cross-sectional structure of the display device in an intermediate state during the manufacturing process is shown.

[0154] In step S10, a first light emitting structure layer is manufactured on the driving backplane, including:

[0155] forming a first epitaxial auxiliary material layer on the driving back plate;

[0156] Etching the first epitaxial auxiliary material layer to form a first epitaxial auxiliary layer on each first pad of the driving backplane;

[0157] forming a first epitaxial structure layer on each first epitaxial auxiliary layer;

[0158] forming a first insulating layer on the driving back plate and each first epitaxial structure layer;

[0159] A first transflective layer is formed on the first insulating layer.

[0160] Specifically, if Figure 5 As shown, first, a first epitaxial auxiliary material layer 211' is formed on the driving backplane 1. Figure 6 As shown, the first epitaxial auxiliary material layer 211 ′ is then etched to retain only the material on each first pad 11 on the driving backplane, thereby forming a first epitaxial auxiliary layer 211 on each first pad 11 .

[0161] like Figure 7As shown, a first epitaxial structure layer 212 is formed on each first epitaxial auxiliary layer 211. The first epitaxial structure layer 212 can be manufactured by using an epitaxial process in the related art, specifically including growing a buffer layer 212a on the first epitaxial auxiliary layer 211, growing a first semiconductor layer 212b on the buffer layer 212a, growing a light emitting layer 212c on the first semiconductor layer 212b, and growing a second semiconductor layer 212d on the light emitting layer 212c. The first semiconductor layer can be an N-type doped semiconductor layer, and the second semiconductor layer can be a P-type doped semiconductor layer.

[0162] like Figure 8 As shown, after the first epitaxial structure layer 212 is manufactured, a first dielectric layer s11 is formed on the driving backplane 1, and the first dielectric layer s11 exposes the surface of each first epitaxial structure layer, thereby exposing the second semiconductor layer of the first light-emitting chip. Then, a plurality of first sub-connecting portions 241 are formed on the first dielectric layer s11; each first sub-connecting portion 241 corresponds to each first epitaxial structure layer one by one, and the first sub-connecting portion 241 covers at least a portion of the surface of the corresponding first epitaxial structure layer. The first dielectric layer s11 is made of a transparent insulating material, and the first sub-connecting portion 241 is made of a transparent conductive material. The first sub-connecting portion covers at least a portion of the surface of the first epitaxial structure layer, so that the first sub-connecting portion 241 is electrically connected to the second semiconductor layer of the first light-emitting chip. As shown Fig. 9 As shown, a second dielectric layer s12 is formed on each first sub-connection portion 241 and the first dielectric layer s11 to insulate and protect each first sub-connection portion 241 and each first light-emitting chip. The first dielectric layer s11 and the second dielectric layer s12 constitute the first insulating layer s1, and the first dielectric layer s11 and the second dielectric layer s12 can be made of the same or different transparent insulating materials.

[0163] like Fig.10 As shown, a first transflective layer f1 is formed on the first insulating layer s1, thereby completing the production of the first light emitting structure layer. Fig.10 As shown, after forming the first transflective layer f1 and before starting to manufacture the second light emitting structure layer, the first transflective layer f1 and the first insulating layer s1 need to be etched to form a plurality of through holes k1 exposing the second pads 12 .

[0164] like Fig.11 As shown, a plurality of first connection parts 22 are formed on the first transflective layer f1; each first connection part 22 corresponds to each second pad 12 one by one, and the first connection part 22 is electrically connected to the corresponding second pad 12 through the through hole k1. The first connection part 22 can be manufactured by a deposition and then etching process, and the portion of the first connection part 22 located on the surface of the first transflective layer f1 needs to cover the top of the first light-emitting chip 21r.

[0165] In the above step S20, manufacturing a second light emitting structure layer on the first light emitting structure layer includes:

[0166] forming a second epitaxial auxiliary material layer on the first transflective layer;

[0167] Etching the second epitaxial auxiliary material layer to form a second epitaxial auxiliary layer at positions of the first transflective layer corresponding to the first pads;

[0168] forming a second epitaxial structure layer on each second epitaxial auxiliary layer;

[0169] forming a second insulating layer on the first transflective layer and each second epitaxial structure layer;

[0170] A second transflective layer is formed on the second insulating layer.

[0171] Specifically, if Fig.12 As shown, the process of forming a plurality of second light-emitting chips 21g on the first transflective layer f1 is similar to the process of manufacturing the first light-emitting chip 21r. The steps of manufacturing the first light-emitting chip 21r can be referred to, and will not be repeated here.

[0172] like Fig.13 As shown, after the second light-emitting chip is manufactured, a third dielectric layer s21 is formed on the first transflective layer f1, and the third dielectric layer s21 exposes the surface of each second epitaxial structure layer, thereby exposing the second semiconductor layer of the second light-emitting chip. Fig.14 As shown, a plurality of second sub-connecting parts 242 are then formed on the third dielectric layer s21; each second sub-connecting part 242 corresponds to each second epitaxial structure layer one by one, and the second sub-connecting part 242 covers at least part of the surface of the corresponding second epitaxial structure layer. The third dielectric layer s21 is made of a transparent insulating material, and the second sub-connecting part 242 is made of a transparent conductive material. The second sub-connecting part covers at least part of the surface of the second epitaxial structure layer, so that the second sub-connecting part 242 is electrically connected to the second semiconductor layer of the second light-emitting chip. Fig.15 As shown, a fourth dielectric layer s22 is formed on each second sub-connection portion 242 and the third dielectric layer s21 to insulate and protect each second sub-connection portion 242 and each second light-emitting chip. The third dielectric layer s21 and the fourth dielectric layer s22 constitute the second insulating layer s2, and the third dielectric layer s21 and the fourth dielectric layer s22 can be made of the same or different transparent insulating materials.

[0173] like Fig.16 As shown, a second transflective layer f2 is formed on the second insulating layer s2, thereby completing the production of the second light emitting structure layer. Fig.16As shown, after forming the second transflective layer f2 and before starting to make the third light-emitting structure layer, the second transflective layer f2, the second insulating layer s2, the first transflective layer f1 and the first insulating layer s1 need to be etched to form a plurality of through holes k2 exposing each third pad 13.

[0174] like Fig.17 As shown, a plurality of second connection parts 23 are formed on the second transflective layer f2; each second connection part 23 corresponds to each third pad 13 one by one, and the second connection part 23 is electrically connected to the corresponding third pad 13 through the through hole k2. The second connection part 23 can be manufactured by a deposition and then etching process, and the part of the second connection part 23 located on the surface of the second transflective layer f2 needs to cover the second light-emitting chip 21g.

[0175] In the above step S30, manufacturing a third light emitting structure layer on the second light emitting structure layer includes:

[0176] forming a third epitaxial auxiliary material layer on the second transflective layer;

[0177] Etching the third epitaxial auxiliary material layer to form a third epitaxial auxiliary layer at positions of the second transflective layer corresponding to the first pads;

[0178] forming a third epitaxial structure layer on each third epitaxial auxiliary layer;

[0179] A third insulating layer is formed on the second transflective layer and each of the third epitaxial structure layers.

[0180] Specifically, if Fig.18 As shown, the process of forming a plurality of third light-emitting chips 21b on the second transflective layer f2 is similar to the process of making the second light-emitting chip 21g and the first light-emitting chip 21r. The steps of making the second light-emitting chip 21g or the first light-emitting chip 21r can be referred to, and will not be repeated here.

[0181] like Fig.19 As shown, after the third light-emitting chip is manufactured, a fifth dielectric layer s31 is formed on the second transflective layer f2, and the fifth dielectric layer s31 exposes the surface of each third epitaxial structure layer, thereby exposing the second semiconductor layer of the third light-emitting chip. Fig. 20 As shown, the fifth dielectric layer s31, the second transflective layer f2, the second insulating layer s2, the first transflective layer f1 and the first insulating layer s1 are etched to form a plurality of through holes k3 exposing the fourth pads 14. Fig.21As shown, a plurality of third sub-connecting parts 243 are formed on the fifth dielectric layer s31, and a plurality of fourth sub-connecting parts 244 are formed in the through hole k3. Each third sub-connecting part 243 corresponds to each third epitaxial structure layer one by one, and the third sub-connecting part 243 covers at least part of the surface of the corresponding third epitaxial structure layer, and the third sub-connecting part is covered on at least part of the surface of the third epitaxial structure layer, so that the third sub-connecting part 243 is electrically connected to the second semiconductor layer of the third light-emitting chip. Each fourth sub-connecting part 244 corresponds to each fourth soldering pad 14 one by one, and the fourth sub-connecting part 244 electrically connects the first sub-connecting part 241, the second sub-connecting part 242, and the third sub-connecting part 243 in the same display unit to the fourth soldering pad 14 through the through hole k3, thereby realizing a common anode structure. The third connecting part 24 is composed of the first sub-connecting part 241, the second sub-connecting part 242, the third sub-connecting part 243 and the fourth sub-connecting part 244. Among them, the first sub-connection part 241, the second sub-connection part 242, and the third sub-connection part 243 can be made of one material or a laminated structure of multiple materials selected from transparent conductive materials such as indium oxide, tin oxide, indium zinc oxide, indium tin oxide, aluminum zinc oxide, and fluorine-doped tin oxide. The fourth sub-connection part 242 can be made of a metal material with low resistance such as tungsten, aluminum, copper, gold, and indium, or one or more materials with excellent conductivity such as indium oxide, tin oxide, indium zinc oxide, indium tin oxide, aluminum zinc oxide, and fluorine-doped tin oxide.

[0182] Finally, if Figure 2 As shown, a sixth dielectric layer s32 is formed on each third sub-connection portion 243 and the fifth dielectric layer s31 to insulate and protect the display unit. The fifth dielectric layer s31 and the sixth dielectric layer s32 constitute the third insulating layer s3, and the fifth dielectric layer s31 and the sixth dielectric layer s32 can be made of the same or different transparent insulating materials.

[0183] The above manufacturing method adopts a process of first depositing and then etching to form the through hole k3 when manufacturing the third connecting portion 24. In some embodiments, the third connecting portion 24 can also be manufactured separately when manufacturing each light emitting structure layer. Fig. 22 As shown, after the first light emitting chip 21r is manufactured, before the first sub-connection portion 241 is formed, the first dielectric layer s11 may be etched to form a through hole exposing the fourth pad 14, so that an electrical connection relationship with the fourth pad 14 is formed while the first sub-connection portion 241 is formed. Fig.23As shown, after the second light-emitting chip 21g is manufactured, before the second sub-connection part 242 is formed, the third dielectric layer s21, the first transflective layer f1, and the second dielectric layer s12 can be etched to form a through hole exposing the first sub-connection part 241, so that the electrical connection relationship with the first sub-connection part 241 is formed while the second sub-connection part 242 is formed. Similarly, after the third light-emitting chip 21b is manufactured, before the third sub-connection part 243 is formed, the fifth dielectric layer s31, the second transflective layer f2, and the fourth dielectric layer s22 can be etched to form a through hole exposing the second sub-connection part 242, so that the electrical connection relationship with the second sub-connection part 242 is formed while the third sub-connection part 243 is formed. In this way, a common anode structure of each light-emitting chip in the display unit can be formed. In practical applications, different manufacturing processes can be used for manufacturing as needed, which is not limited here.

[0184] In the manufacturing method of the display device provided in the embodiment of the present invention, common graphic processes such as photoresist spin coating, photolithography, stripping, etching, chemical mechanical flattening, etc. are used many times, which will not be repeated here. Thermal annealing can be added as needed after each step is completed. After forming each film layer, surface flattening processes such as chemical mechanical polishing (CMP), spin coating, and grinding can be used. Among them, the production of the connecting portion can be selected from one of the methods such as magnetron sputtering, electron beam evaporation, thermal evaporation, pulsed laser deposition, chemical vapor deposition, and sol-gel. At the same time, the same or different preparation methods can be used between each connecting portion.

[0185] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0186] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A display device, characterized in that: include: A driving backplane, used for providing a driving signal; A plurality of display units are located on the driving backplane and are electrically connected to the driving backplane; Wherein, the display unit comprises at least one light-emitting chip, and the light-emitting chips in the same display unit are stacked; The light-emitting chip comprises: an epitaxial auxiliary layer and an epitaxial structural layer; the epitaxial auxiliary layer is located on a side of the light-emitting chip close to the driving backplane, and the epitaxial structural layer is located on a side of the epitaxial auxiliary layer away from the driving backplane; the lattices of the epitaxial auxiliary layer and the epitaxial structural layer match.

2. The display device according to claim 1, wherein: The display unit includes three light-emitting chips, namely a first light-emitting chip, a second light-emitting chip and a third light-emitting chip; the first light-emitting chip, the second light-emitting chip and the third light-emitting chip are used to emit light of different wavelengths; The first light-emitting chip is located on a side close to the driving backplane; the second light-emitting chip is located on a side of the first light-emitting chip away from the driving backplane; the third light-emitting chip is located on a side of the second light-emitting chip away from the first light-emitting chip; the first light-emitting chip, the second light-emitting chip and the third light-emitting chip have an overlapping area in their orthographic projections on the driving backplane.

3. The display device according to claim 2, wherein: The driving backplane includes a plurality of pad groups corresponding to the plurality of display units one by one; the pad groups include: a first pad, a second pad, a third pad and a fourth pad; The display unit further includes: a first insulating layer covering the first light emitting chip and the driving backplane, a second insulating layer covering the second light emitting chip and the first insulating layer, and a third insulating layer covering the third light emitting chip and the second insulating layer; The display unit further includes: a first connection portion, a second connection portion and a third connection portion; the epitaxial auxiliary layer of the first light-emitting chip is located on the first pad; the first connection portion is used to electrically connect the epitaxial auxiliary layer of the second light-emitting chip and the second pad; the second connection portion is used to electrically connect the epitaxial auxiliary layer of the third light-emitting chip and the third pad; the third connection portion is used to electrically connect the side of the epitaxial structure layer of the first light-emitting chip away from the epitaxial auxiliary layer, the side of the epitaxial structure layer of the second light-emitting chip away from the epitaxial auxiliary layer, the side of the epitaxial structure layer of the third light-emitting chip away from the epitaxial auxiliary layer, and the fourth pad; The first connection portion is electrically connected to the second pad through the via hole of the first insulation layer; the second connection portion is electrically connected to the third pad through the via holes of the first insulation layer and the second insulation layer; the third connection portion is electrically connected to the fourth pad through the via holes of the first insulation layer, the second insulation layer and the third insulation layer.

4. The display device according to claim 3, characterized in that The epitaxial structure layer comprises: a buffer layer, located on the epitaxial auxiliary layer; A first semiconductor layer, located on a side of the buffer layer away from the epitaxial auxiliary layer; a light emitting layer, located on a side of the first semiconductor layer away from the buffer layer; a second semiconductor layer, located on a side of the light-emitting layer away from the first semiconductor layer; The third connection portion is used to electrically connect the second semiconductor layer of the first light emitting chip, the second semiconductor layer of the second light emitting chip, the second semiconductor layer of the third light emitting chip and the fourth pad.

5. The display device according to claim 4, characterized in that The first half body layer is an N-type doped semiconductor layer, and the second semiconductor layer is a P-type doped semiconductor layer.

6. The display device according to claim 3, wherein: The display unit further includes: a first transflective layer located between the first insulating layer and the second light emitting chip, and a second transflective layer located between the second insulating layer and the third light emitting chip; The first transflective layer is used to transmit the light emitted by the first light-emitting chip and reflect the light emitted by the second light-emitting chip and the third light-emitting chip; the second transflective layer is used to transmit the light emitted by the first light-emitting chip and the second light-emitting chip and reflect the light emitted by the third light-emitting chip.

7. The display device according to any one of claims 1 to 6, wherein: The orthographic projections of the light-emitting chips in the same display unit on the driving backplane completely overlap.

8. A method for manufacturing a display device, characterized in that: include: Making at least one light-emitting structure layer on the driving backplane; Wherein, the manufacturing method of each light emitting structure layer includes: forming an epitaxial auxiliary material layer; Etching the epitaxial auxiliary material layer to form a plurality of epitaxial auxiliary layers; An epitaxial structure layer is formed on each of the epitaxial auxiliary layers.

9. The method of claim 8, wherein: The method of manufacturing at least one light-emitting structure layer on the driving backplane includes: Making a first light-emitting structure layer on the driving backplane; Fabricating a second light-emitting structure layer on the first light-emitting structure layer; forming a third light-emitting structure layer on the second light-emitting structure layer; Wherein, the driving backplane includes a plurality of pad groups; the pad groups include: a first pad, a second pad, a third pad and a fourth pad; The step of manufacturing the first light-emitting structure layer on the driving backplane comprises: forming a first epitaxial auxiliary material layer on the driving back plate; Etching the first epitaxial auxiliary material layer to form a first epitaxial auxiliary layer on each of the first pads of the driving backplane; forming a first epitaxial structure layer on each of the first epitaxial auxiliary layers; forming a first insulating layer on the driving back plate and each of the first epitaxial structure layers; forming a first transflective layer on the first insulating layer; The step of manufacturing the second light-emitting structure layer on the first light-emitting structure layer comprises: forming a second epitaxial auxiliary material layer on the first transflective layer; Etching the second epitaxial auxiliary material layer to form a second epitaxial auxiliary layer at a position of the first transflective layer corresponding to each of the first pads; forming a second epitaxial structure layer on each of the second epitaxial auxiliary layers; forming a second insulating layer on the first transflective layer and each of the second epitaxial structure layers; forming a second transflective layer on the second insulating layer; The step of manufacturing a third light-emitting structure layer on the second light-emitting structure layer comprises: forming a third epitaxial auxiliary material layer on the second transflective layer; Etching the third epitaxial auxiliary material layer to form a third epitaxial auxiliary layer at positions of the second transflective layer corresponding to the first pads; forming a third epitaxial structure layer on each of the third epitaxial auxiliary layers; A third insulating layer is formed on the second transflective layer and each of the third epitaxial structure layers.

10. The manufacturing method according to claim 9, characterized in that: The step of forming a first insulating layer on the driving backplane and each of the first epitaxial structure layers comprises: forming a first dielectric layer on the driving backplane; the first dielectric layer exposes the surface of each of the first epitaxial structure layers; forming a plurality of first sub-connecting portions on the first dielectric layer; each of the first sub-connecting portions corresponds to each of the first epitaxial structural layers one by one, and the first sub-connecting portions cover at least a portion of a surface of the corresponding first epitaxial structural layer; forming a second dielectric layer on each of the first sub-connecting portions and the first dielectric layer; the first dielectric layer and the second dielectric layer constitute the first insulating layer; Before forming the second epitaxial auxiliary material layer on the first transflective layer, the method further includes: Etching the first transflective layer and the first insulating layer to form a plurality of through holes exposing each of the second pads; A plurality of first connection parts are formed on the first transflective layer; each of the first connection parts corresponds to each of the second pads one by one, and the first connection parts are electrically connected to the corresponding second pads through the through holes; The forming of a second insulating layer on the first transflective layer and each of the second epitaxial structure layers comprises: forming a third dielectric layer on the first transflective layer; the third dielectric layer exposes the surface of each of the second epitaxial structure layers; forming a plurality of second sub-connecting portions on the third dielectric layer; each of the second sub-connecting portions corresponds to each of the second epitaxial structure layers one by one, and the second sub-connecting portions cover at least a portion of the surface of the corresponding second epitaxial structure layer; forming a fourth dielectric layer on each of the second sub-connecting portions and the third dielectric layer; the third dielectric layer and the fourth dielectric layer constitute the second insulating layer; Before forming the third epitaxial auxiliary material layer on the second transflective layer, the method further includes: Etching the second transflective layer, the second insulating layer, the first transflective layer and the first insulating layer to form a plurality of through holes exposing the third pads; A plurality of second connection parts are formed on the second transflective layer; each of the second connection parts corresponds to each of the third pads one by one, and the second connection parts are electrically connected to the corresponding third pads through the through holes; The forming of a third insulating layer on the second transflective layer and each of the third epitaxial structure layers comprises: forming a fifth dielectric layer on the second transflective layer; the fifth dielectric layer exposes the surface of each of the third epitaxial structure layers; forming a plurality of third sub-connecting portions on the fifth dielectric layer; each of the third sub-connecting portions corresponds to each of the third epitaxial structure layers one by one, and the third sub-connecting portions cover at least a portion of the surface of the corresponding third epitaxial structure layer; forming a sixth dielectric layer on each of the third sub-connecting portions and the fifth dielectric layer; the fifth dielectric layer and the sixth dielectric layer constitute the third insulating layer; Wherein, before forming a plurality of third sub-connecting parts on the fifth dielectric layer, the method further comprises: Etching the fifth dielectric layer, the second transflective layer, the second insulating layer, the first transflective layer and the first insulating layer to form a plurality of through holes exposing the fourth pads; The forming of a plurality of third sub-connecting parts on the fifth dielectric layer comprises: A plurality of third sub-connecting portions are formed on the fifth dielectric layer, and a plurality of fourth sub-connecting portions are formed in the through hole; each of the fourth sub-connecting portions corresponds to each of the fourth pads one by one, and the fourth sub-connecting portion electrically connects the first sub-connecting portion, the second sub-connecting portion, the third sub-connecting portion and the fourth pad in the same display unit through the through hole; the first sub-connecting portion, the second sub-connecting portion, the third sub-connecting portion and the fourth sub-connecting portion constitute a third connecting portion.

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