Track circuit, frequency shift signal re-detection method and device thereof and medium

Abstract

The invention discloses a track circuit, a frequency shift signal back-checking method and device thereof and a medium, and the back-checking method comprises the steps: obtaining a first count value of a first frequency shift square wave, and determining whether the frequency of the first frequency shift square wave meets a first requirement or not according to the first count value; obtaining a second count value of the second frequency shift square wave, and determining whether the frequency of the second frequency shift square wave meets a second requirement according to the second count value; acquiring a third count value of the frequency shift signal output by the transformer, and determining whether the frequency of the frequency shift signal output by the transformer meets a third requirement or not according to the third count value; and when the frequency of the first frequency shift square wave meets the first requirement, the frequency of the second frequency shift square wave meets the second requirement and the frequency of the frequency shift signal output by the transformer meets the third requirement, determining that the frequency shift signal is correct. According to the technical scheme provided by the invention, the correctness of the frequency shift signal is re-checked in multiple aspects, so that the correctness of the frequency shift signal is improved, and the track safety is further improved.

Description

Technical Field

[0001] The present invention relates to the field of digital signal technology, and in particular to a track circuit and a frequency shift signal return detection method, device and medium thereof. Background Art

[0002] The main function of the transmitter in the communication coding track circuit is to generate a corresponding phase-continuous frequency-modulated sine wave signal according to the carrier frequency and low-frequency configuration. The sine wave signal is sent to the rail through the configurable tap of the transformer to generate a transmission signal with flexible amplitude adjustment to realize the idle / occupied inspection of the section where the track circuit is located. Therefore, the correctness of the transmission signal sent to the rail is crucial to track safety.

[0003] At present, the backcheck of the transmission signal includes the amplitude check of the transformer backcheck tap and the frequency check of the frequency shift square wave inside the Field-Programmable Gate Array (FPGA). The accuracy of the check on the correctness of the transmission signal sent to the rail is low. Summary of the invention

[0004] The present invention provides a track circuit and a frequency shift signal check method, device and medium thereof to solve the defects of the prior art and realize multiple-aspect check on the correctness of the frequency shift signal to improve the correctness of the frequency shift signal and further improve the track safety.

[0005] In a first aspect, the present invention provides a frequency shift signal check method for a track circuit, comprising:

[0006] Obtaining a first count value of a first frequency-shifted square wave, and determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first count value;

[0007] Obtaining a second count value of the second frequency-shifted square wave, and determining whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second count value; the first frequency-shifted square wave is converted into a first frequency-shifted sine wave through a digital-to-analog converter, and the first frequency-shifted sine wave is converted into a second frequency-shifted square wave through a zero-crossing detection circuit;

[0008] Obtaining a third count value of the frequency-shifted signal output by the transformer, and determining whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the third count value;

[0009] When the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement, it is determined that the frequency-shifted signal is correct.

[0010] Optionally, when the frequency of the first frequency-shifted square wave does not meet the first requirement, the frequency of the second frequency-shifted square wave does not meet the second requirement, or the frequency of the frequency-shifted signal output by the transformer does not meet the third requirement, it is determined that the frequency-shifted signal is wrong.

[0011] Optionally, it is characterized in that obtaining a first count value of the first frequency-shifted square wave, and determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first count value, comprises:

[0012] Under the stimulation of a first fixed clock signal, using a first register to count the first frequency-shifted square wave to obtain the first count value;

[0013] Determine a first upper sideband and a first lower sideband of the first frequency-shifted square wave according to the first count value and the first table;

[0014] It is determined whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first upper sideband and the first lower sideband.

[0015] Optionally, determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first upper sideband and the first lower sideband includes:

[0016] Determine first switching point values ​​of the upper and lower sidebands according to the first upper sideband, the first lower sideband and five first count values ​​collected continuously;

[0017] Determine a cumulative counting result between two adjacent first switching point values ​​according to the two adjacent first switching point values ​​and the first counting value between the two first switching point values, and record the result as a first cumulative counting value;

[0018] Determine a first carrier frequency and a first low frequency of the first frequency-shifted square wave according to five continuously collected first count values, the first switching point value, and the first cumulative count value;

[0019] It is determined whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first carrier frequency and the first low frequency.

[0020] Optionally, determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first carrier frequency and the first low frequency includes:

[0021] When the absolute value of the difference between the first carrier frequency and the expected carrier frequency value is less than or equal to the first carrier frequency value, and the absolute value of the difference between the first low frequency and the expected low frequency value is less than or equal to the first low frequency value, it is determined that the frequency of the first frequency-shifted square wave meets the first requirement.

[0022] Optionally, obtaining a second count value of the second frequency-shifted square wave, and determining whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second count value includes:

[0023] Under the stimulation of the second fixed clock signal, the second frequency-shifted square wave is counted using the second register to obtain the second count value;

[0024] Determine a second upper sideband and a second lower sideband of the second frequency-shifted square wave according to the second count value and the second table;

[0025] It is determined whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second upper sideband and the second lower sideband.

[0026] Optionally, determining whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second upper sideband and the second lower sideband includes:

[0027] Determine a second switching point value of the second upper sideband and the second lower sideband according to the second upper sideband, the second lower sideband and five second count values ​​collected continuously;

[0028] Determine a cumulative counting result between two adjacent second switching point values ​​according to the two adjacent second switching point values ​​and the second counting value between the two second switching point values, and record it as a second cumulative counting value;

[0029] Determine a second carrier frequency and a second low frequency of the second frequency-shifted square wave according to five continuously collected second count values, the second switching point value, and the second accumulated count value;

[0030] It is determined whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second carrier frequency and the second low frequency.

[0031] Optionally, determining whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second carrier frequency and the second low frequency includes:

[0032] When the absolute value of the difference between the second carrier frequency and the expected carrier frequency value is less than or equal to the second carrier frequency value, and the absolute value of the difference between the second low frequency and the expected low frequency value is less than or equal to the second low frequency value, it is determined that the frequency of the second frequency-shifted square wave meets the second requirement.

[0033] Optionally, obtaining a third count value of the frequency-shifted signal output by the transformer, and determining whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the third count value, includes:

[0034] After performing voltage attenuation on the frequency-shifted signal output by the transformer, sampling and counting the frequency-shifted signal output by the transformer at a set frequency to obtain the three count values;

[0035] According to the third count values ​​of the preset number acquired most recently, it is determined whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement.

[0036] Optionally, determining whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the third count values ​​of the preset number obtained most recently includes:

[0037] The third count value of the preset number is divided into N 2 The third count values ​​form an N×N matrix M1;

[0038] Generate an N×2 signal basis matrix B with a single frequency f1; the first column element of the signal basis matrix B is 100×sin(2×π×i / 8192×f1+π / 6), and the second column element of the signal basis matrix B is 100×cos(2×π×i / 8192×f1+π / 6); wherein i is an integer between [0,7], the range of the single frequency f1 is: fc-25Hz≤f1≤fc+25Hz, the accuracy of f1 is 0.1Hz, and fc is the expected value of the carrier frequency;

[0039] Determine a signal basis projection matrix T1 according to the matrix M1 and the signal basis matrix B;

[0040] According to the signal-based projection matrix T1, it is determined whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement.

[0041] Optionally, determining a signal basis projection matrix T1 according to the matrix M1 and the signal basis matrix B includes:

[0042] Performing singular value decomposition on the autocorrelation matrix M3 of the matrix M1 to obtain a U matrix;

[0043] The last 5 rows of the submatrix of the transposed matrix of the U matrix are used as the matrix U3;

[0044] The matrix U3 is multiplied by the signal basis matrix B to obtain the signal basis projection matrix T1.

[0045] Optionally, determining whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the signal-based projection matrix T1 includes:

[0046] Accumulate and sum the squares of the elements in the signal basis projection matrix T1 to obtain a signal basis projection error D;

[0047] Determine the projection error D1 of the upper sideband opportunity and the projection error D2 of the lower sideband opportunity according to the signal base projection error D;

[0048] According to the projection error D1 of the upper sideband opportunity and the projection error D2 of the lower sideband opportunity, it is determined whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement.

[0049] In a second aspect, the present invention provides a frequency shift signal check device for a track circuit, characterized in that it comprises:

[0050] A first acquisition and judgment module, used for acquiring a first count value of a first frequency-shifted square wave, and determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first count value;

[0051] A second acquisition and judgment module is used to acquire a second count value of a second frequency-shifted square wave, and determine whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second count value; the first frequency-shifted square wave is converted into a first frequency-shifted sine wave through a digital-to-analog converter, and the first frequency-shifted sine wave is converted into a second frequency-shifted square wave through a zero-crossing detection circuit;

[0052] A third acquisition and judgment module, used to acquire a third count value of the frequency-shifted signal output by the transformer, and determine whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the third count value;

[0053] The determination module is used to determine that the frequency-shifted signal is correct when the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement.

[0054] In a third aspect, the present invention provides a track circuit, comprising:

[0055] at least one processor;

[0056] and a memory communicatively connected to the at least one processor; wherein the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute any of the methods described above.

[0057] In a fourth aspect, the present invention provides a computer storage medium, wherein the computer storage medium stores computer instructions, and the computer instructions are used to implement any of the methods described above when executed by a processor.

[0058] The technical solution of the present invention obtains a first count value of a first frequency-shifted square wave to determine whether the frequency of the first frequency-shifted square wave meets the first requirement according to the first count value, the first frequency-shifted square wave forms a first frequency-shifted sine wave through a digital-to-analog converter, the first frequency-shifted sine wave forms a second frequency-shifted square wave through a zero-crossing detection circuit, obtains a second count value of the second frequency-shifted square wave to determine whether the frequency of the second frequency-shifted square wave meets the second requirement according to the second count value, obtains a third count value of the frequency-shifted signal output by the transformer to determine whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement according to the third count value, thereby determining that the frequency-shifted signal is correct when the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement, thereby achieving multi-faceted backchecking of the correctness of the frequency-shifted signal, thereby improving the correctness of the frequency-shifted signal, and thereby improving track safety.

[0059] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0061] Figure 1 A flow chart of a frequency shift signal check method for a track circuit provided in Embodiment 1 of the present invention;

[0062] Figure 2 A flow chart of a frequency shift signal check method for a track circuit provided in Embodiment 2 of the present invention;

[0063] Figure 3 A flow chart of a frequency shift signal check method for a track circuit provided in Embodiment 3 of the present invention;

[0064] Figure 4 This is a schematic diagram of the structure of a frequency shift signal check device for a track circuit provided in Embodiment 4 of the present invention. DETAILED DESCRIPTION

[0065] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0066] It should be noted that the terms "first", "second", "target", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0067] Embodiment 1

[0068] Figure 1 This is a flow chart of a frequency shift signal check method for a track circuit provided in Embodiment 1 of the present invention. This embodiment is applicable to the case of determining the correctness of the frequency shift signal of the track circuit. The method can be executed by a frequency shift signal check device for the track circuit. The check device can be implemented in the form of hardware and / or software, and the check device can be configured in a processor. Figure 1 As shown, the method includes:

[0069] S110 , obtaining a first count value of the first frequency-shifted square wave, and determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first count value.

[0070] Among them, the method for generating the frequency-shifted signal of the track circuit is that the FPGA generates a high-precision phase-continuous first frequency square wave according to the carrier frequency and the low frequency, and then the first frequency-shifted square wave is converted into a frequency-shifted sine wave through the configurable filter chip MAX260 or the digital-to-analog converter. After the frequency-shifted sine wave is amplified by the signal amplifier, it is formed into frequency-shifted signals of different levels according to actual needs through a transformer with a configuration ratio that can be externally wired. Finally, the frequency-shifted signal is output to the rail to realize the inspection of the idleness / occupancy of the section where the track circuit is located.

[0071] In an optional embodiment, the FPGA, under the stimulation of a fixed clock, for example, a 36.48MHz fixed clock, accumulates the side frequency control word and the lower side frequency control word into the phase control word register (the switching frequency of the upper side frequency control word and the lower side frequency controller is low frequency), and the phase control word determines the input address of the lookup table, and the highest bit (0 or 1) of the data output by the lookup table forms the first frequency-shifted square wave. The data output by the lookup table is directly or after sampling as the input of the digital-to-analog converter, so that the digital-to-analog converter forms a frequency-shifted sine wave.

[0072] The first count value of the first frequency-shifted square wave can be understood as the frequency value obtained by counting the first frequency-shifted square wave each time under the stimulation of the clock signal. Since the FPGA generates the first frequency-shifted square wave according to the carrier frequency and the low frequency, the frequency of the first frequency-shifted square wave should correspond to the carrier frequency and the low frequency. The first requirement is set according to the accuracy requirements of the first frequency-shifted square wave and the accuracy of the track circuit, and the first requirement is related to the carrier frequency and the low frequency. Therefore, according to the first count value of the first frequency-shifted square wave, it can be determined whether the frequency of the first frequency-shifted square wave meets the first requirement. When the first count value meets the first requirement, it means that the frequency of the first frequency-shifted square wave output by the FPGA is correct. On the contrary, when the first count value does not meet the first requirement, it means that the frequency of the first frequency-shifted square wave output by the FPGA is incorrect. At this time, the transformer is stopped from outputting the frequency-shifted signal to ensure the safety of the track.

[0073] S120, obtaining a second count value of the second frequency-shifted square wave, and determining whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second count value.

[0074] The first frequency-shifted square wave is converted into a first frequency-shifted sine wave through a digital-to-analog converter, and the first frequency-shifted sine wave is converted into a second frequency-shifted square wave through a zero-crossing detection circuit. Specifically, the input end of the digital-to-analog converter is electrically connected to the output end of the FPGA, and the output end of the digital-to-analog converter is electrically connected to the input end of the FPGA through a zero-crossing detection circuit, so that the first frequency-shifted square wave formed by the FPGA is converted into a first frequency-shifted sine wave through the digital-to-analog converter, and the first frequency-shifted sine wave is converted into a second frequency-shifted square wave through a zero-crossing detection circuit.

[0075] The second count value of the second frequency-shifted square wave can be understood as the frequency value obtained by counting the second frequency-shifted square wave each time under the excitation of the clock signal. Since the FPGA generates the first frequency-shifted square wave according to the carrier frequency and the low frequency, and the second frequency-shifted square wave is converted from the first frequency-shifted square wave, the frequency of the second frequency-shifted square wave should also correspond to the carrier frequency and the low frequency. The second requirement is set according to the accuracy requirements of the second frequency-shifted square wave and the accuracy of the track circuit, and the second requirement is related to the carrier frequency and the low frequency. Therefore, according to the second count value of the second frequency-shifted square wave, it can be determined whether the frequency of the second frequency-shifted square wave meets the second requirement. When the second count value meets the second requirement, it means that the frequency of the second frequency-shifted square wave is correct, that is, the frequency of the first frequency-shifted sine wave output by the digital-to-analog converter is correct. On the contrary, when the second count value does not meet the second requirement, it means that the frequency of the second frequency-shifted square wave is incorrect, that is, the frequency of the first frequency-shifted sine wave output by the digital-to-analog converter is incorrect. At this time, the transformer is stopped from outputting the frequency-shifted signal to ensure the safety of the track.

[0076] S130, obtaining a third count value of the frequency-shifted signal output by the transformer, and determining, based on the third count value, whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement.

[0077] Among them, the output end of the digital-to-analog converter is also electrically connected to the transformer, and the output side of the transformer includes a tap with a transformation ratio that can be configured by external wiring and a feedback tap with a fixed transformation ratio. The tap with a transformation ratio that can be configured by external wiring is electrically connected to the track circuit to output a frequency-shifted signal to the track, and the feedback tap with a fixed transformation ratio is electrically connected to the AD pin of the central processing unit (CPU) through an attenuation circuit, so that the CPU can count the frequency-shifted signal output by the feedback tap of the transformer.

[0078] The third count value of the frequency-shifted signal output by the transformer can be understood as the frequency value obtained by counting the frequency-shifted signal output by the transformer under the excitation of the clock signal. Since the FPGA generates the first frequency-shifted square wave according to the carrier frequency and the low frequency, the first frequency-shifted square wave is converted into the first frequency-shifted sine wave by the analog-to-digital converter, and the first frequency-shifted sine wave outputs the frequency-shifted signal after passing through the transformer, so that the frequency of the frequency-shifted signal output by the transformer should correspond to the carrier frequency and the low frequency. The third requirement is set according to the accuracy requirements of the frequency-shifted signal and the accuracy of the track circuit, and the third requirement is related to the carrier frequency and the low frequency. Therefore, according to the third count value of the frequency-shifted signal output by the transformer, it can be determined whether the frequency-shifted signal output by the transformer meets the third requirement. When the frequency-shifted signal output by the transformer meets the third requirement, it means that the frequency of the frequency-shifted signal output by the transformer is correct. On the contrary, when the frequency-shifted signal output by the transformer does not meet the third requirement, it means that the frequency of the frequency-shifted signal output by the transformer is wrong. At this time, the transformer is stopped from outputting the frequency-shifted signal to ensure the safety of the track.

[0079] S140: When the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement, it is determined that the frequency-shifted signal is correct.

[0080] Optionally, when the frequency of the first frequency-shifted square wave does not meet the first requirement, the frequency of the second frequency-shifted square wave does not meet the second requirement, or the frequency of the frequency-shifted signal output by the transformer does not meet the third requirement, it is determined that the frequency-shifted signal is wrong.

[0081] Specifically, a first count value of the first frequency-shifted square wave is obtained, and based on the first count value, it is determined whether the frequency of the first frequency-shifted square wave meets the first requirement; a second count value of the second frequency-shifted square wave is obtained, and based on the second count value, it is determined whether the frequency of the second frequency-shifted square wave meets the second requirement; a third count value of the frequency-shifted signal output by the transformer is obtained, and based on the third count value, it is determined whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement; when the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement, it indicates that the frequency-shifted signal sent by the track circuit is correct; and when the frequency of the first frequency-shifted square wave does not meet the first requirement, the frequency of the second frequency-shifted square wave does not meet the second requirement, or the frequency of the frequency-shifted signal output by the transformer does not meet the third requirement, that is, when at least one of the frequency of the first frequency-shifted square wave, the frequency of the second frequency-shifted square wave, and the frequency of the frequency-shifted signal output by the transformer does not meet the corresponding requirement, it is determined that the frequency-shifted signal is wrong.

[0082] In this embodiment, by obtaining the first count value of the first frequency-shifted square wave, it is determined according to the first count value whether the frequency of the first frequency-shifted square wave meets the first requirement, the first frequency-shifted square wave forms a first frequency-shifted sine wave through a digital-to-analog converter, and the first frequency-shifted sine wave forms a second frequency-shifted square wave through a zero-crossing detection circuit, by obtaining the second count value of the second frequency-shifted square wave, it is determined according to the second count value whether the frequency of the second frequency-shifted square wave meets the second requirement, by obtaining the third count value of the frequency-shifted signal output by the transformer, it is determined according to the third count value whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement, so that when the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement, it is determined that the frequency-shifted signal is correct. In this way, the correctness of the frequency-shifted signal is checked from multiple aspects, the correctness of the frequency-shifted signal is improved, and the track safety is improved.

[0083] Embodiment 2

[0084] Figure 2This is a flow chart of a frequency shift signal check method for a track circuit provided in the second embodiment of the present invention. Based on the above embodiment, this embodiment further adds steps of how to obtain a first count value and determine whether the frequency of the first frequency shift square wave meets the requirements according to the first count value, how to obtain a second count value and determine whether the frequency of the second frequency shift square wave meets the requirements according to the second count value, and how to obtain a third count value and determine whether the frequency of the frequency shift signal output by the transformer meets the requirements according to the third count value. Figure 2 As shown, the method specifically includes:

[0085] S210 . Under the stimulation of a first fixed clock signal, use a first register to count the first frequency-shifted square wave to obtain a first count value.

[0086] The first fixed clock signal may be, but is not limited to, generated by a 40 MHz independent clock. The first register may be, but is not limited to, a 16-bit register. It should be noted that each time the first fixed clock signal is excited, the first register counts the first frequency-shifted square wave once to obtain a first count value. Since the first fixed clock signal excites the first frequency-shifted square wave at a fixed time period, the first register can obtain multiple first count values.

[0087] S220 , determining a first upper sideband and a first lower sideband of the first frequency-shifted square wave according to the first count value and the first table.

[0088] The upper side frequency and the lower side frequency refer to the frequency components of the modulated signal, the upper side frequency is located above the carrier frequency, and the lower side frequency is located below the carrier frequency. The first table (Table 1) records the first upper side frequency range and the first lower side frequency range of the first frequency-shifted square wave at different carrier frequencies, so that the first upper side frequency and the first lower side frequency of the first frequency-shifted square wave can be determined according to the first count value and the first table. In Table 1, 1700-1 is a 1701.4Hz carrier frequency, 1700-2 is a 1698.7Hz carrier frequency, 2000-1 is a 2001.4Hz carrier frequency, 2000-2 is a 1998.7Hz carrier frequency, 2300-1 is a 2301.4Hz carrier frequency, 2300 is a 2298.7Hz carrier frequency, 2600-1 is a 2601.4Hz carrier frequency, and 2600-2 is a 2598.7Hz carrier frequency. The range from the lower limit of range 1 to the upper limit of range 1 is the first upper sideband range, and the range from the lower limit of range 2 to the upper limit of range 2 is the first lower sideband range.

[0089] Table 1. First table

[0090]

[0091] S230: Determine whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first upper sideband and the first lower sideband.

[0092] According to the first upper sideband and the first lower sideband, the first count value between the upper and lower sideband switching points and the upper and lower sideband switching points can be determined, and then it can be determined whether the frequency of the first frequency-shifted square wave meets the first requirement. The upper and lower sideband switching points can be understood as the first count value collected when the first upper sideband is switched to the first lower sideband, or the first count value collected when the first lower sideband is switched to the first upper sideband.

[0093] Specifically, under the stimulation of the first fixed clock signal, the first register obtains multiple first count values ​​in a fixed time period, and according to each first count value, the first table is searched to determine the first upper sidefrequency and the first lower sidefrequency of the first frequency-shifted square wave. There are also multiple first upper sidefrequency and first lower sidefrequency. According to the first upper sidefrequency and the first lower sidefrequency obtained in different time periods, it is determined whether the frequency of the first frequency-shifted square wave meets the first requirement.

[0094] Optionally, determining whether the frequency of the first frequency-shifted square wave meets the first requirement based on the first upper sidefrequency and the first lower sidefrequency, including: determining the first switching point value of the switching point of the upper and lower sidefrequency based on the first upper sidefrequency, the first lower sidefrequency and five continuously collected first counting values; determining the cumulative counting result between two adjacent first switching point values ​​based on two adjacent first switching point values ​​and the first counting value between the two first switching point values, and recording it as the first cumulative counting value; determining the first carrier frequency and the first low frequency of the first frequency-shifted square wave based on the five continuously collected first counting values, the first switching point value and the first cumulative counting value; determining whether the frequency of the first frequency-shifted square wave meets the first requirement based on the first carrier frequency and the first low frequency.

[0095] Among them, under the stimulation of the first fixed clock, the five first count values ​​collected continuously can feed back the waveform of the first frequency-shifted square wave. Exemplarily, among the five first count values ​​collected continuously, it is possible that all five first count values ​​are upper side frequencies, or some first count values ​​are upper side frequencies, some first count values ​​are lower side frequencies, and some first count values ​​are neither upper side frequencies nor lower side frequencies, that is, the first switching point values ​​of the upper and lower side frequencies, or all five first count values ​​are lower side frequencies. Therefore, according to the first upper side frequency, the first lower side frequency and the five first count values ​​collected continuously, the first switching point value of the switching point of the upper and lower side frequencies is determined.

[0096] In an optional embodiment, a specific method for determining the first carrier frequency and the first low frequency of the first frequency-shifted square wave according to the five continuously collected first count values, the first switching point value and the first cumulative count value is:

[0097] The three consecutive first switching point values ​​are respectively a first first switching point value, a second first switching point value and a third first switching point value.

[0098] The calculation method of the first carrier frequency is as follows: first carrier frequency = (the first cumulative count value between the first first switching point value and the second first switching point value / the cumulative number of times the first cumulative count value between the first first switching point value and the second first switching point value is added + the first cumulative count value between the second first switching point value and the third first switching point value / the cumulative number of times the first cumulative count value between the second first switching point value and the third first switching point value is added) × the frequency of the first fixed clock / 2.

[0099] When the first first switching point value and the third first switching point value are upper sideband and lower sideband switching points, and the second first switching point value is a lower sideband and upper sideband switching point, the calculation method of the first low frequency is as follows:

[0100] The first low frequency = [(first first switching point value - range 1 lower limit) / (range 2 lower limit - range 1 lower limit) × range 2 lower limit + second first switching point value + first cumulative count value between the first first switching point value and the second first switching point value + first cumulative count value between the second first switching point value and the third first switching point value + (range 2 lower limit - third first switching point value) / (range 2 lower limit - range 1 lower limit) × range 1 lower limit] × the frequency of the first fixed clock.

[0101] When the first first switching point value and the third first switching point value are the lower sideband and upper sideband switching points, and the second first switching point value is the upper sideband and lower sideband switching point, the calculation method of the first low frequency is as follows:

[0102] First low frequency = [(Range 2 lower limit - first first switching point value) / (Range 2 lower limit - Range 1 lower limit) × Range 1 lower limit + second first switching point value + first cumulative count value between the first first switching point value and the second first switching point value + first cumulative count value between the second first switching point value and the third first switching point value + (third first switching point value - Range 1 lower limit) / (Range 2 lower limit - Range 1 lower limit) × Range 2 lower limit] × frequency of the first fixed clock.

[0103] Optionally, determining whether the frequency of the first frequency-shifted square wave meets the first requirement based on the first carrier frequency and the first low frequency, including: when the absolute value of the difference between the first carrier frequency and the expected carrier frequency value is less than or equal to the first carrier frequency value, and the absolute value of the difference between the first low frequency and the expected low frequency value is less than or equal to the first low frequency value, determining that the frequency of the first frequency-shifted square wave meets the first requirement.

[0104] In an optional embodiment, when the absolute value of the difference between the first carrier frequency and the expected carrier frequency value is greater than the first carrier frequency value, or the absolute value of the difference between the first low frequency and the expected low frequency value is greater than the first low frequency value, it is determined that the frequency of the first frequency-shifted square wave does not meet the first requirement.

[0105] The expected carrier frequency value is the carrier frequency code obtained by the track circuit, and exemplarily, the carrier frequency is one of eight carrier frequencies: 1701.4 Hz, 1698.7 Hz, 2001.4 Hz, 1998.7 Hz, 2301.4 Hz, 2298.7 Hz, 2601.4 Hz and 2598.7 Hz. The expected low frequency value is the low frequency code obtained by the track circuit, and exemplarily, it is one of eighteen low frequencies: 10.3 Hz, 11.4 Hz, 12.5 Hz, 13.6 Hz, 14.7 Hz, 15.8 Hz, 16.9 Hz, 18.0 Hz, 19.1 Hz, 20.2 Hz, 21.3 Hz, 22.4 Hz, 23.5 Hz, 24.6 Hz 25.7 Hz, 26.8 Hz, 27.9 Hz and 29 Hz. The first carrier frequency value is set according to the expected carrier frequency value and the accuracy of the track circuit, and exemplarily, the first carrier frequency value is 0.05 Hz. The first low frequency value is set according to the expected low frequency value and the accuracy of the track circuit, and exemplarily, the first low frequency value is 0.03 Hz.

[0106] In a specific embodiment, under the stimulation of a 40MHz fixed clock signal, the first frequency-shifted square wave output by the FPGA is counted, and the counting result is saved in a 16-bit register, that is, the first count value is saved in a 16-bit register, and the range of the first count value is 0~32768. The highest bit of the 16-bit register represents an update flag. When each first count value is collected, the update flag is flipped. The CPU of the track circuit queries the counting result of the 16-bit register at a frequency of 8192Hz. Since the reading frequency of the CPU (8192Hz) is much greater than the frequency of the first fixed clock signal (40MHz), the counting result read by the CPU will be repeated, that is, multiple identical first count values ​​are read continuously. Therefore, the highest count result read by the CPU is the update flag. When the update flag read by the CPU is different from the update flag of the current record, it indicates that the counting result read by the CPU is valid data, that is, the first count value. Since the carrier frequency coding is known, when the first count value, i.e., the lower 15 bits of the valid data read, is between the lower limit of range 1 and the upper limit of range 1 in the first table (Table 1), the first count value is considered to be the upper side frequency; when the first count value, i.e., the lower 15 bits of the valid data read, is between the lower limit of range 2 and the upper limit of range 2 in the first table (Table 1), the first count value is considered to be the lower side frequency. Five buffers H1-H5 are set in the CPU, each buffer H is used to store a first count value, a buffer Q is set to record the first count value of the latest upper and lower side frequency switching point, i.e., the first switching point value, and an accumulative counter S is set to record the cumulative count result between two adjacent first switching point values, i.e., the first cumulative count value. When a new first count value is captured, the last buffer H5 is used to record the newly captured first count value, and the positions of buffers H1, H2, H3, and H4 are used to save the results of buffers H2, H3, H4, and H5.After each buffer update is completed, the following judgment and operation are performed: if the first two (H1, H2) first count values ​​are between the upper limit of range 1 and the lower limit of range 1 (upper side frequency), and the first count values ​​of the second two (H4, H5) are between the upper limit of range 2 and the lower limit of range 2 (lower side frequency), then the first count value recorded in the third buffer H3 is the upper and lower side frequency switching point, that is, the first switching point. After locking the upper and lower side frequency switching points, the upper and lower side frequency switching points are saved to the buffer Q1, and the cumulative counting result of the cumulative counter S is updated. Then, the first frequency shift direction can be calculated using Q1, S, H1~H5. The carrier frequency and low frequency of the wave are compared by comparing the carrier frequency with the expected value of the carrier frequency and comparing the low frequency with the expected value of the low frequency. When the carrier frequency error is greater than 0.05Hz (the first carrier frequency value) and the low frequency error is greater than 0.03Hz (the first carrier frequency value), it is considered that the frequency of the first frequency-shifted square wave does not meet the first requirement, that is, it is considered that the backcheck has failed. At this time, the power output signal is stopped, and the upper and lower sideband switching points are locked. After completing the clearing of the carrier frequency and the low frequency, the counting result of the buffer H3 is updated to Q1, and the cumulative counter S is reset to the sum of the buffer H4 and the buffer H5, and a new round of real-time backcheck calculation is started.

[0107] In an optional embodiment, in addition to frequency check on the first frequency-shifted square wave, a CRC32 check is also performed on the lookup table content to prevent errors in the lookup table from causing the digital-to-analog converter input signal to be inconsistent with expectations.

[0108] S240 . Under the stimulation of the second fixed clock signal, use a second register to count the second frequency-shifted square wave to obtain a second count value.

[0109] The second fixed clock signal may be, but is not limited to, generated by a 40 MHz independent clock. The first register may be, but is not limited to, a 16-bit register. It should be noted that the second fixed clock signal is not limited to being the same as the first fixed clock signal, and the second register is not limited to being the same as the first register, as long as the core invention of the present invention can be realized.

[0110] It should also be noted that each time the second fixed clock signal is excited, the second register counts the second frequency-shifted square wave once to obtain a second count value. Since the second fixed clock signal excites the second frequency-shifted square wave at a fixed time period, the second register can obtain multiple second count values.

[0111] S240 , determining a second upper sideband and a second lower sideband of a second frequency-shifted square wave according to the second count value and the second table.

[0112] The second table (Table 2) records the second upper sideband range and the second lower sideband range of the second frequency-shifted square wave at different carrier frequencies, so that the second upper sideband and the second lower sideband of the second frequency-shifted square wave can be determined according to the second count value and the second table. The range from the lower limit of range 3 to the upper limit of range 3 is the second upper sideband range, and the range from the lower limit of range 4 to the upper limit of range 4 is the second lower sideband range.

[0113] Table 2. Second table

[0114]

[0115] S260: Determine whether the frequency of the second frequency-shifted square wave meets the second requirement according to the second upper sideband and the second lower sideband.

[0116] According to the second upper sideband and the second lower sideband, the second count value between the upper and lower sideband switching point and the upper and lower sideband switching point can be determined, and then it can be determined whether the frequency of the second frequency-shifted square wave meets the second requirement. The upper and lower sideband switching point can be understood as the second count value collected when the second upper sideband is switched to the second lower sideband, or the second count value collected when the second lower sideband is switched to the second upper sideband.

[0117] Specifically, under the stimulation of the second fixed clock signal, the second register obtains multiple second count values ​​in a fixed time period, and according to each second count value, the second table is searched to determine the second upper sideband and the second lower sideband of the second frequency-shifted square wave. There are also multiple second upper sidebands and second lower sidebands. According to the second upper sidebands and second lower sidebands obtained in different time periods, it is determined whether the frequency of the second frequency-shifted square wave meets the second requirement.

[0118] Optionally, determining whether the frequency of the second frequency-shifted square wave meets the second requirement based on the second upper sidefrequency and the second lower sidefrequency, including: determining the second switching point value of the second upper sidefrequency and the second lower sidefrequency based on the second upper sidefrequency, the second lower sidefrequency and five continuously collected second counting values; determining the cumulative counting result between two adjacent second switching point values ​​based on the two adjacent second switching point values ​​and the second counting value between the two second switching point values, and recording it as the second cumulative counting value; determining the second carrier frequency and the second low frequency of the second frequency-shifted square wave based on the five continuously collected second counting values, the second switching point value and the second cumulative counting value; determining whether the frequency of the second frequency-shifted square wave meets the second requirement based on the second carrier frequency and the second low frequency.

[0119] Among them, under the stimulation of the second fixed clock, the five second count values ​​collected continuously can feed back the waveform of the second frequency-shifted square wave. Exemplarily, among the five second count values ​​collected continuously, five second count values ​​may all be upper side frequencies, or some second count values ​​may be upper side frequencies, some second count values ​​may be lower side frequencies, and some second count values ​​may be neither upper side frequencies nor lower side frequencies, i.e., the second switching point values ​​of the upper and lower side frequencies, or all five second count values ​​may be lower side frequencies. Therefore, according to the second upper side frequency, the second lower side frequency and the five second count values ​​collected continuously, the second switching point value of the switching point of the upper and lower side frequencies is determined.

[0120] In an optional embodiment, a specific method for determining the second carrier frequency and the second low frequency of the second frequency-shifted square wave according to the five continuously collected second count values, the second switching point value and the second accumulated count value is:

[0121] The three consecutive second switching point values ​​are respectively a first second switching point value, a second second switching point value and a third second switching point value.

[0122] The calculation method of the second carrier frequency is as follows: second carrier frequency = (the second cumulative count value between the first second switching point value and the second second switching point value / the cumulative number of times the second cumulative count value between the first second switching point value and the second second switching point value is added + the second cumulative count value between the second second switching point value and the third second switching point value / the cumulative number of times the second cumulative count value between the second second switching point value and the third second switching point value is added) × the frequency of the second fixed clock / 2.

[0123] When the first second switching point value and the third second switching point value are upper sideband and lower sideband switching points, and the second second switching point value is a lower sideband and upper sideband switching point, the second low frequency is calculated as follows:

[0124] The second low frequency = [(first second switching point value - range 3 lower limit) / (range 4 lower limit - range 3 lower limit) × range 4 lower limit + second second switching point value + second cumulative count value between the first second switching point value and the second second switching point value + second cumulative count value between the second second switching point value and the third second switching point value + (range 4 lower limit - third second switching point value) / (range 4 lower limit - range 3 lower limit) × range 3 lower limit] × the frequency of the second fixed clock.

[0125] When the first second switching point value and the third second switching point value are the lower sideband and upper sideband switching points, and the second second switching point value is the upper sideband and lower sideband switching point, the calculation method of the second low frequency is as follows:

[0126] Second low frequency = [(Range 4 lower limit - first second switching point value) / (Range 4 lower limit - Range 3 lower limit) × Range 3 lower limit + second second switching point value + second cumulative count value between the first second switching point value and the second second switching point value + second cumulative count value between the second second switching point value and the third second switching point value + (third second switching point value - Range 3 lower limit) / (Range 4 lower limit - Range 3 lower limit) × Range 4 lower limit] × the frequency of the second fixed clock.

[0127] Optionally, determining whether the frequency of the second frequency-shifted square wave meets the second requirement based on the second carrier frequency and the second low frequency, including: when the absolute value of the difference between the second carrier frequency and the expected carrier frequency value is less than or equal to the second carrier frequency value, and the absolute value of the difference between the second low frequency and the expected low frequency value is less than or equal to the second low frequency value, determining that the frequency of the second frequency-shifted square wave meets the second requirement.

[0128] In an optional embodiment, when the absolute value of the difference between the second carrier frequency and the expected carrier frequency value is greater than the second carrier frequency value, or the absolute value of the difference between the second low frequency and the expected low frequency value is less than or equal to the second low frequency value, it is determined that the frequency of the second frequency-shifted square wave does not meet the second requirement.

[0129] The second carrier frequency value is set according to the expected carrier frequency value and the accuracy of the track circuit, and the second carrier frequency value is 0.15 Hz, for example. The second low frequency value is set according to the expected low frequency value and the accuracy of the track circuit, and the second low frequency value is 0.2 Hz, for example.

[0130] In an exemplary embodiment, under the stimulation of a 40MHz fixed clock signal, the second frequency-shifted square wave is counted, and the counting result is saved in a 16-bit register, that is, the second count value is saved in a 16-bit register, and the range of the second count value is 0~32768. The highest bit of the 16-bit register represents an update flag. When each second count value is collected, the update flag is flipped. The CPU of the track circuit queries the counting result of the 16-bit register at a frequency of 8192Hz. Since the reading frequency of the CPU (8192Hz) is much greater than the frequency of the first fixed clock signal (40MHz), the counting result read by the CPU will be repeated, that is, multiple identical second count values ​​are read continuously. Therefore, the highest count result read by the CPU is the update flag. When the update flag read by the CPU is different from the update flag currently recorded, it indicates that the counting result read by the CPU is valid data, that is, the second count value. Since the carrier frequency coding is known, when the second count value, i.e., the lower 15 bits of the valid data read, is between the lower limit of range 3 and the upper limit of range 3 in the second table (Table 2), the second count value is considered to be the upper side frequency. When the second count value, i.e., the lower 15 bits of the valid data read, is between the lower limit of range 4 and the upper limit of range 4 in the second table (Table 2), the second count value is considered to be the lower side frequency. Five buffers H'1-H'5 are set in the CPU, each buffer H' is used to store a second count value, a buffer Q' is set to record the second count value of the latest upper and lower side frequency switching point, i.e., the second switching point value, and an accumulative counter S' is set to record the cumulative count result between two adjacent second switching point values, i.e., the second cumulative count value. When a new second count value is captured, the last buffer H'5 is used to record the newly captured second count value, and the positions of buffers H'1, H'2, H'3, and H'4 are used to save the results of buffers H'2, H'3, H'4, and H'5.After each buffer update is completed, the following judgment and operation are performed: if the second count values ​​of the first two (H'1, H'2) are between the upper limit of range 3 and the lower limit of range 3 (upper sideband), and the second count values ​​of the second two (H'4, H'5) are between the upper limit of range 4 and the lower limit of range 4 (lower sideband), then the second count value recorded in the third buffer H'3 is the upper and lower sideband switching point, that is, the second switching point. After locking the upper and lower sideband switching points, the upper and lower sideband switching points are saved to the buffer Q'1, and the cumulative counting result of the cumulative counter S' is updated. Then, the second switching point can be calculated using Q'1, S', H'1~H'5. The carrier frequency and low frequency of the frequency-shifted square wave are compared with the expected value of the carrier frequency and the expected value of the low frequency. When the carrier frequency error is greater than 0.15Hz (the second carrier frequency value) and the low frequency error is greater than 0.2Hz (the second carrier frequency value), it is considered that the frequency of the second frequency-shifted square wave does not meet the second requirement, that is, the backcheck fails. At this time, the output of the power output signal is stopped, and the upper and lower sideband switching points are locked. After the clearing of the carrier frequency and the low frequency is completed, the counting result of the buffer H'3 is updated to Q'1, and the cumulative counter S' is reset to the sum of the buffer H'4 and the buffer H'5, and a new round of real-time backcheck calculation is started.

[0131] S270, after performing voltage attenuation on the frequency-shifted signal output by the transformer, sampling and counting the frequency-shifted signal output by the transformer at a set frequency to obtain a third count value.

[0132] The frequency shift signal output by the transformer is output to the attenuation circuit through the back-check tap, and the attenuation circuit performs voltage attenuation on the frequency shift signal output by the transformer. Exemplarily, the voltage of the frequency shift signal after voltage attenuation is 0-3.3 V. In an exemplary embodiment, the set frequency is 8192 Hz.

[0133] Specifically, the output end of the attenuation circuit is electrically connected to the AD pin of the CPU, and the CPU samples the frequency-shifted signal after voltage attenuation at a set frequency to obtain a third count value.

[0134] S280: Determine whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the third count value of the preset number that is newly acquired.

[0135] The preset number is set according to the accuracy requirement of the frequency-shifted signal. The larger the preset number, the higher the accuracy of the back-check result, and the smaller the preset number, the lower the accuracy of the back-check result. In an exemplary embodiment, the preset number is 1280.

[0136] S290: When the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement, it is determined that the frequency-shifted signal is correct.

[0137] In this embodiment, under the stimulation of the first fixed clock signal, the first register is used to count the first frequency-shifted square wave to obtain a first count value, and the first upper sidefrequency and the first lower sidefrequency of the first frequency-shifted square wave are determined according to the first count value and the first table, so as to determine whether the frequency of the first frequency-shifted square wave meets the first requirement according to the first upper sidefrequency and the first lower sidefrequency, and, under the stimulation of the second fixed clock signal, the second register is used to count the second frequency-shifted square wave to obtain a second count value, and the second upper sidefrequency and the second lower sidefrequency of the second frequency-shifted square wave are determined according to the second count value and the second table, so as to determine whether the frequency of the second frequency-shifted square wave meets the second requirement according to the second upper sidefrequency and the second lower sidefrequency, so that when the frequencies of the first frequency-shifted square wave and the second frequency-shifted square wave are back-checked, the time required is shorter and the storage space required is smaller, so that signal storage space can be saved, and the real-time and robustness of the back-check results are improved, which is conducive to further improving the safety performance of the track circuit.

[0138] Embodiment 3

[0139] Figure 3 This is a flow chart of a frequency shift signal check method for a track circuit provided in the third embodiment of the present invention. Based on the above embodiment, this embodiment further adds a step of determining whether the frequency of the frequency shift signal output by the transformer meets the third requirement. Figure 3 As shown, the method specifically includes:

[0140] S310, obtaining a first count value of a first frequency-shifted square wave, and determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first count value.

[0141] S320: Obtain a second count value of the second frequency-shifted square wave, and determine whether the frequency of the second frequency-shifted square wave meets a second requirement based on the second count value.

[0142] The first frequency-shifted square wave is converted into a first frequency-shifted sine wave through a digital-to-analog converter, and the first frequency-shifted sine wave is converted into a second frequency-shifted square wave through a zero-crossing detection circuit.

[0143] S330, the preset number of third count values ​​is calculated in N 2 The third count values ​​form an N×N matrix M1.

[0144] Among them, N can be 8, the preset number is N 2 Each N2 third count values ​​forming an N×N matrix M1 may be arranged in a row-priority order to form an N×N matrix M1.

[0145] S340, generate an N×2 signal basis matrix B with a single frequency f1.

[0146] The first column elements of the signal basis matrix B are 100×sin(2×π×i / 8192×f1+π / 6), and the second column elements of the signal basis matrix B are 100×cos(2×π×i / 8192×f1+π / 6); where i is an integer between [0,7] in sequence, the range of the single frequency f1 is: fc-25Hz≤f1≤fc+25Hz, the accuracy of f1 is 0.1Hz, and fc is the expected value of the carrier frequency.

[0147] S350. Determine the signal basis projection matrix T1 according to the matrix M1 and the signal basis matrix B.

[0148] Optionally, the signal basis projection matrix T1 is determined according to the matrix M1 and the signal basis matrix B, including: performing singular value decomposition on the autocorrelation matrix M3 of the matrix M1 to obtain the U matrix; taking the last 5 rows of the submatrix of the transposed matrix of the U matrix as the matrix U3; and multiplying the matrix U3 and the signal basis matrix B to obtain the signal basis projection matrix T1.

[0149] S360. Determine, based on the signal-based projection matrix T1, whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement.

[0150] Optionally, based on the signal basis projection matrix T1, determining whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement includes: accumulating and summing the squares of each element in the signal basis projection matrix T1 to obtain a signal basis projection error D; determining a projection error D1 of an upper sideband opportunity and a projection error D2 of a lower sideband opportunity based on the signal basis projection error D; determining whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement based on the projection error D1 of the upper sideband opportunity and the projection error D2 of the lower sideband opportunity.

[0151] In a specific embodiment, the voltage of the transformer check tap is attenuated to 0-3.3V by an attenuation circuit and output to the AD pin of the CPU. The CPU counts the signal at a frequency of 8192Hz, and the record length of the counting buffer is 1280, that is, the buffer is used to record the third count values ​​of the latest preset number, wherein every 64 third count values ​​are arranged in row priority order to form an 8×8 matrix M1, and the matrix M1 is transposed to form a matrix M2, and the matrix M2 and the matrix M1 are multiplied to obtain an autocorrelation matrix M3, and the matrix M3 is subjected to singular value decomposition to obtain a U matrix, an S matrix and a V matrix, and a single frequency f1 is used to generate an 8×2 signal base matrix B, the first column element of B is 100×sin(2×π×i / 8192×f1+π / 6), and the second column element of B is 100×cos(2×π×i / 8192×f1+π / 6), where i is [0 ,7], the range of single frequency f1 is: fc-25Hz≤f1≤fc+25Hz, the accuracy of f1 is 0.1Hz, and fc is the expected value of carrier frequency; therefore, the above basis matrix B has 500, and the U matrix is ​​transposed to form the matrix U2. The size of the last 5 rows of the submatrix U3 of U2 is 5×8. The matrix U3 is multiplied by the signal basis matrix B to obtain the signal basis projection matrix T1, and the square accumulation and summation of the 10 elements in T1 are performed to obtain the signal basis projection error D. Since the signal basis matrix B has 500, the obtained projection error D is also 500. When the projection error D1 of the upper center carrier signal basis is at the minimum value and the absolute value of D1 is less than the set value Y1, the time subslot corresponding to the upper center carrier signal basis is considered to be the upper sideband opportunity. When the projection error D2 of the lower center carrier signal basis is at the minimum value and the absolute value of D2 is less than the set value Y2, the time subslot of the signal basis is considered to be the lower sideband opportunity. After adopting the above method, the above buffer can be calculated 20 times in each round (i.e. 1280 / 64), so the minimum effective error D3 of the upper sideband (the smallest error selected from the upper sideband opportunities calculated 20 times) and the minimum effective error D4 of the lower sideband (the smallest error selected from the lower sideband opportunities calculated 20 times) can be obtained. When D3 and D4 are both less than the preset value Y3, the backcheck is considered to be effective, otherwise the backcheck is considered to have failed. Among them, the set value Y1, the set value Y2 and the set value Y3 are determined according to the accuracy requirements of the frequency shift signal of the track circuit, and the set value Y1, the set value Y2 and the set value Y3 can be the same or different.

[0152] S370: When the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement, it is determined that the frequency-shifted signal is correct.

[0153] In this embodiment, the third count value of the preset number is divided into N 2The third counting values ​​form an N×N matrix M1 and an N×2 signal basis matrix B generated by a single frequency f1, and the matrix M1 and the signal basis matrix B are operated to obtain a signal basis projection matrix T1, and then the projection error D1 of the upper sideband opportunity and the projection error D2 of the lower sideband opportunity are obtained, so as to determine whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement according to the projection error D1 of the upper sideband opportunity and the projection error D2 of the lower sideband opportunity, so that when the frequency of the frequency-shifted signal output by the transformer is back-checked, the time required is shorter and the storage space required is smaller, which can save signal storage space and improve the real-time and robustness of the back-check result, which is beneficial to further improve the safety performance of the track circuit.

[0154] Embodiment 4

[0155] This embodiment provides a frequency shift signal check device for a track circuit. The device can be implemented in the form of hardware and / or software and can be integrated into a processor. Figure 4 The structure diagram of the frequency shift signal return detection device of the track circuit provided by the fourth embodiment of the present invention is as follows: Figure 4 As shown, the device comprises:

[0156] The first acquisition and determination module 410 is used to acquire a first count value of the first frequency-shifted square wave, and determine whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first count value.

[0157] The second acquisition and judgment module 420 is used to acquire a second count value of the second frequency-shifted square wave, and determine whether the frequency of the second frequency-shifted square wave meets the second requirement according to the second count value.

[0158] The first frequency-shifted square wave is converted into a first frequency-shifted sine wave through a digital-to-analog converter, and the first frequency-shifted sine wave is converted into a second frequency-shifted square wave through a zero-crossing detection circuit;

[0159] The third acquisition and judgment module 430 is used to acquire a third count value of the frequency-shifted signal output by the transformer, and determine whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the third count value;

[0160] The determination module 440 is used to determine that the frequency-shifted signal is correct when the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement.

[0161] The frequency-shifted signal feedback detection device for a track circuit provided in an embodiment of the present invention can execute the frequency-shifted signal feedback detection device method for a track circuit provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method. The similarities can be referred to the above description.

[0162] Embodiment 5

[0163] Based on the same concept, this embodiment also provides a track circuit, which includes at least one processor and a memory communicatively connected to the at least one processor, wherein the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the frequency-shifted signal return detection method of the track circuit provided in any embodiment of the present invention.

[0164] Since when the computer program of the track circuit provided in this embodiment is executed by at least one processor, at least one processor can execute the frequency-shifted signal check method of the track circuit provided in any embodiment of the present invention, the track circuit provided in this embodiment has the functional modules and beneficial effects corresponding to the execution method, and the similarities can be referred to the above description.

[0165] Embodiment 6

[0166] Based on the same concept, an embodiment of the present invention further provides a computer-readable storage medium, which stores computer instructions, and the computer instructions are used to enable a processor to implement the method provided by any of the above embodiments when executed.

[0167] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, device, or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0168] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A frequency shift signal check method for a track circuit, characterized in that: include: Obtaining a first count value of a first frequency-shifted square wave, and determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first count value; Obtaining a second count value of the second frequency-shifted square wave, and determining whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second count value; the first frequency-shifted square wave is converted into a first frequency-shifted sine wave through a digital-to-analog converter, and the first frequency-shifted sine wave is converted into a second frequency-shifted square wave through a zero-crossing detection circuit; Obtaining a third count value of the frequency-shifted signal output by the transformer, and determining whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the third count value; When the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement, it is determined that the frequency-shifted signal is correct.

2. The frequency shift signal check method for track circuit according to claim 1, characterized in that: When the frequency of the first frequency-shifted square wave does not meet the first requirement, the frequency of the second frequency-shifted square wave does not meet the second requirement, or the frequency of the frequency-shifted signal output by the transformer does not meet the third requirement, it is determined that the frequency-shifted signal is wrong.

3. The frequency shift signal check method for track circuit according to claim 1, characterized in that: Acquiring a first count value of a first frequency-shifted square wave, and determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first count value, includes: Under the stimulation of a first fixed clock signal, using a first register to count the first frequency-shifted square wave to obtain the first count value; Determine a first upper sideband and a first lower sideband of the first frequency-shifted square wave according to the first count value and the first table; It is determined whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first upper sideband and the first lower sideband.

4. The frequency shift signal check method for track circuit according to claim 3, characterized in that: Determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first upper sideband and the first lower sideband includes: Determine first switching point values ​​of the upper and lower sidebands according to the first upper sideband, the first lower sideband and five first count values ​​collected continuously; Determine a cumulative counting result between two adjacent first switching point values ​​according to the two adjacent first switching point values ​​and the first counting value between the two first switching point values, and record the result as a first cumulative counting value; Determine a first carrier frequency and a first low frequency of the first frequency-shifted square wave according to five continuously collected first count values, the first switching point value, and the first cumulative count value; It is determined whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first carrier frequency and the first low frequency.

5. The frequency shift signal check method for track circuit according to claim 4, characterized in that: Determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first carrier frequency and the first low frequency includes: When the absolute value of the difference between the first carrier frequency and the expected carrier frequency value is less than or equal to the first carrier frequency value, and the absolute value of the difference between the first low frequency and the expected low frequency value is less than or equal to the first low frequency value, it is determined that the frequency of the first frequency-shifted square wave meets the first requirement.

6. The frequency shift signal check method for track circuit according to claim 1, characterized in that: Acquiring a second count value of the second frequency-shifted square wave, and determining whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second count value, includes: Under the stimulation of the second fixed clock signal, the second frequency-shifted square wave is counted using the second register to obtain the second count value; Determine a second upper sideband and a second lower sideband of the second frequency-shifted square wave according to the second count value and the second table; It is determined whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second upper sideband and the second lower sideband.

7. The method for checking the frequency shift signal of a track circuit according to claim 6, characterized in that: Determining whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second upper sideband and the second lower sideband includes: Determine a second switching point value of the second upper sideband and the second lower sideband according to the second upper sideband, the second lower sideband and five second count values ​​collected continuously; Determine a cumulative counting result between two adjacent second switching point values ​​according to the two adjacent second switching point values ​​and the second counting value between the two second switching point values, and record it as a second cumulative counting value; Determine a second carrier frequency and a second low frequency of the second frequency-shifted square wave according to five continuously collected second count values, the second switching point value, and the second accumulated count value; It is determined whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second carrier frequency and the second low frequency.

8. The method for checking the frequency shift signal of a track circuit according to claim 7, characterized in that: Determining whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second carrier frequency and the second low frequency includes: When the absolute value of the difference between the second carrier frequency and the expected carrier frequency value is less than or equal to the second carrier frequency value, and the absolute value of the difference between the second low frequency and the expected low frequency value is less than or equal to the second low frequency value, it is determined that the frequency of the second frequency-shifted square wave meets the second requirement.

9. The frequency shift signal check method for track circuit according to claim 1, characterized in that: Obtaining a third count value of the frequency-shifted signal output by the transformer, and determining whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the third count value, includes: After performing voltage attenuation on the frequency-shifted signal output by the transformer, sampling and counting the frequency-shifted signal output by the transformer at a set frequency to obtain the three count values; According to the third count values ​​of the preset number acquired most recently, it is determined whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement.

10. The frequency shift signal check method for track circuit according to claim 9, characterized in that: Determining whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the third count value of the preset number obtained most recently includes: The third count value of the preset number is divided into N 2 The third count values ​​form an N×N matrix M1; Generate an N×2 signal basis matrix B with a single frequency f1; the first column element of the signal basis matrix B is 100×sin(2×π×i / 8192×f1+π / 6), and the second column element of the signal basis matrix B is 100×cos(2×π×i / 8192×f1+π / 6); wherein i is an integer between [0,7], the range of the single frequency f1 is: fc-25Hz≤f1≤fc+25Hz, the accuracy of f1 is 0.1Hz, and fc is the expected value of the carrier frequency; Determine a signal basis projection matrix T1 according to the matrix M1 and the signal basis matrix B; According to the signal-based projection matrix T1, it is determined whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement.

11. The frequency shift signal check method for track circuit according to claim 10, characterized in that: Determining a signal basis projection matrix T1 according to the matrix M1 and the signal basis matrix B includes: Performing singular value decomposition on the autocorrelation matrix M3 of the matrix M1 to obtain a U matrix; The last 5 rows of the submatrix of the transposed matrix of the U matrix are used as the matrix U3; The matrix U3 is multiplied by the signal basis matrix B to obtain the signal basis projection matrix T1.

12. The frequency shift signal check method for track circuit according to claim 10, characterized in that: Determining whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement according to the signal-based projection matrix T1 includes: Accumulate and sum the squares of the elements in the signal basis projection matrix T1 to obtain a signal basis projection error D; Determine the projection error D1 of the upper sideband opportunity and the projection error D2 of the lower sideband opportunity according to the signal base projection error D; According to the projection error D1 of the upper sideband opportunity and the projection error D2 of the lower sideband opportunity, it is determined whether the frequency of the frequency-shifted signal output by the transformer meets the third requirement.

13. A frequency shift signal check device for a track circuit, characterized in that: include: A first acquisition and judgment module, used for acquiring a first count value of a first frequency-shifted square wave, and determining whether the frequency of the first frequency-shifted square wave meets a first requirement according to the first count value; A second acquisition and judgment module is used to acquire a second count value of a second frequency-shifted square wave, and determine whether the frequency of the second frequency-shifted square wave meets a second requirement according to the second count value; the first frequency-shifted square wave is converted into a first frequency-shifted sine wave through a digital-to-analog converter, and the first frequency-shifted sine wave is converted into a second frequency-shifted square wave through a zero-crossing detection circuit; A third acquisition and judgment module, used to acquire a third count value of the frequency-shifted signal output by the transformer, and determine whether the frequency of the frequency-shifted signal output by the transformer meets a third requirement according to the third count value; The determination module is used to determine that the frequency-shifted signal is correct when the frequency of the first frequency-shifted square wave meets the first requirement, the frequency of the second frequency-shifted square wave meets the second requirement, and the frequency of the frequency-shifted signal output by the transformer meets the third requirement.

14. A track circuit, characterized in that: include: at least one processor; And a memory communicatively connected to the at least one processor; wherein the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the frequency-shifted signal check method for the track circuit described in any one of claims 1-12.

15. A computer storage medium, characterized in that: The computer storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the frequency shift signal check method for a track circuit according to any one of claims 1 to 12 when executed.

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