Data encryption method and device, storage medium, chip and electronic equipment

Abstract

The embodiment of the invention provides a data encryption method and device, a storage medium, a chip and electronic equipment. The data encryption method comprises the following steps: acquiring a memory physical address of to-be-encrypted data, wherein the memory physical address comprises a high-order address and a low-order address; obtaining a general adjustment value using a first key and the high address; searching an address block parameter in an address block pre-stored value set according to an address block determined based on the low-order address to obtain a low-order parameter; acquiring an updated adjustment value according to the general adjustment value and the low-order parameter; and encrypting the to-be-encrypted data by using the updated adjustment value and a second key to obtain encrypted data. The address block parameter and the low-order parameter are obtained through the searching operation, the obtaining time of the low-order parameter when the low-order address is long is shortened, and therefore the time needed by memory encryption is shortened, and the situation that the encryption time is prolonged and cannot be determined due to the fact that the low-order address is prolonged can be avoided.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of computer encryption, and in particular to a data encryption method, device, storage medium, chip and electronic device. Background Art

[0002] Memory encryption is a technology that protects sensitive data in computer systems. It can protect data in system memory by encryption to prevent malware or attackers from accessing or stealing sensitive information. Memory encryption technology usually encrypts sensitive data and stores it in memory, and provides encryption and decryption functions for memory read and write operations.

[0003] In the traditional calculation method for implementing memory encryption, low-order parameters need to be calculated during the data encryption process. When the address of the data is long, the calculation time of the low-order parameters is often too long, which leads to large data delays and affects the efficiency of data reading and writing.

[0004] Therefore, how to shorten data delay and improve data reading and writing efficiency has become an urgent problem to be solved by technical personnel in this field. Summary of the invention

[0005] In view of this, embodiments of the present invention provide a data encryption method, device, storage medium, chip and electronic device to shorten data delay and improve data reading and writing efficiency.

[0006] To solve the above problems, the embodiments of the present invention provide the following technical solutions:

[0007] In a first aspect, an embodiment of the present invention provides a data encryption method, comprising: obtaining a memory physical address of data to be encrypted, wherein the memory physical address comprises a high-order address and a low-order address;

[0008] Obtain a general adjustment value using the first key and the upper address;

[0009] According to the address block determined based on the low-order address, searching for address block parameters in a set of pre-stored values ​​of the address block to obtain the low-order parameters;

[0010] Acquire an updated adjustment value according to the general adjustment value and the low-order parameter;

[0011] The updated adjustment value and a second key are used to encrypt the data to be encrypted to obtain encrypted data.

[0012] In a second aspect, an embodiment of the present application further provides a data encryption device, comprising:

[0013] An address acquisition module, used to acquire a memory physical address of data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address;

[0014] A general adjustment value acquisition module, using the first key and the high-order address to acquire the general adjustment value;

[0015] A low-order parameter acquisition module, used to search for address block parameters in a set of pre-stored values ​​of an address block according to an address block determined based on the low-order address, and acquire the low-order parameters;

[0016] An update adjustment value acquisition module, used to acquire an update adjustment value according to the general adjustment value and the low-order parameter;

[0017] The data encryption module is used to encrypt the data to be encrypted using the updated adjustment value and a second key to obtain encrypted data.

[0018] In a third aspect, an embodiment of the present application further provides a chip, comprising the data encryption device as described in the second aspect.

[0019] In a fourth aspect, an embodiment of the present application further provides an electronic device, comprising: at least one memory and at least one processor, the memory storing a program, and the processor calling the program to execute the data encryption method as described in the first aspect.

[0020] Compared with the prior art, the technical method of the present application has the following advantages:

[0021] The data encryption method provided by the embodiment of the present invention obtains the memory physical address of the data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address; uses a first key and the high-order address to obtain a general adjustment value; searches for an address block parameter in a set of pre-stored values ​​of an address block according to an address block determined based on the low-order address to obtain a low-order parameter; obtains an update adjustment value according to the general adjustment value and the low-order parameter; and uses the update adjustment value and a second key to encrypt the data to be encrypted to obtain encrypted data.

[0022] It can be seen that the technical solution provided in the embodiment of the present application can pre-store the address block parameters, and when in use, search for the address block parameters in the address block pre-stored value set, and obtain the low-order parameters based on the address block parameters, so that the clock cycle required to obtain the low-order parameters only includes one clock cycle of the search operation, and a limited number of clock cycles of using the address block parameters to obtain the low-order parameters. Even if the low-order address is longer, it will not cause a significant extension of the acquisition time of the low-order parameters. Not only can the time required for memory encryption be shortened, but also the extension and uncertainty of the encryption time caused by the extension of the low-order address can be avoided. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0024] Figure 1 A schematic diagram of a process of a memory encryption method;

[0025] Figure 2 Another flowchart of a memory encryption method is shown;

[0026] Figure 3 A first flow chart of a data encryption method provided by an embodiment of the present invention;

[0027] Figure 4 A second flow chart of the data encryption method provided by an embodiment of the present invention;

[0028] Figure 5 A third flow chart of the data encryption method provided by an embodiment of the present invention;

[0029] Figure 6 A schematic diagram of a system for running the data encryption method provided by an embodiment of the present invention;

[0030] Figure 7 A fourth flow chart of the data encryption method provided by an embodiment of the present invention;

[0031] Figure 8 A schematic diagram of the structure of a data encryption device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0032] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0033] Memory encryption is a technology for protecting sensitive data in computer systems. It protects data in system memory by encryption to prevent malware or attackers from accessing or stealing sensitive information. Memory encryption technology usually encrypts sensitive data and stores it in memory, and provides encryption and decryption functions for memory read and write operations. AES (Advanced Encryption Standard) / SM4 (a block cipher standard)-XTS mode is a calculation method for memory encryption.

[0034] A memory encryption method, such as Figure 1 As shown, the XTS mode uses key 1 and key 2 to encrypt the data to be encrypted.

[0035] In order to realize the encryption of the data to be encrypted, when encrypting the continuous data to be encrypted with the common high-order address i, it is divided into two cases: first, when encrypting the data to be encrypted with the smallest low-order address j, that is, the data to be encrypted with all bits of the low-order address j being 0, the following steps are specifically included:

[0036] Step S0: Split the physical address of the data to be encrypted into a high-order address i and a low-order address j.

[0037] It is easy to understand that the memory physical address of the data to be encrypted has multiple digits. According to the preset rules, the first few digits of the memory physical address are the high-order address, and the remaining few digits are the low-order address. The combination of the high-order address and the low-order address is the complete physical address. The specific high-order address and low-order address bit segmentation can be flexibly segmented according to the segmentation rules preset by the system.

[0038] Step S1: Calculate a general adjustment value T using the key 2 and the high-order address i.

[0039] It is easy to understand that the high-order address i of the data to be encrypted is information that is easy to obtain. If the high-order address i is directly used to assist in encrypting the data, the encryption security is likely to be low. Therefore, by using key 2 for encryption, the encryption security can be effectively improved.

[0040] Step S2: Using the general adjustment value T to perform an XOR operation on the data to be encrypted to obtain XOR data.

[0041] It should be noted that if the data to be encrypted is directly encrypted, the encrypted data corresponding to different physical addresses may be the same, so a general adjustment value T may be used to perform an XOR operation to ensure that the encrypted data are different.

[0042] Step S3: Use key 1 to encrypt the XOR data to obtain encrypted XOR data.

[0043] After performing an XOR operation on the data to be encrypted using the general adjustment value T to obtain doubtful data, in order to further improve the security of the data, the XOR data is further encrypted using the key 1 to obtain encrypted XOR data.

[0044] Step S4: Use the general adjustment value T to perform an XOR operation on the encrypted XOR data to obtain the encrypted data.

[0045] Using the general adjustment value T to perform the XOR operation again can further avoid the existence of the same XOR data in the XOR data, thereby preventing the system from making errors.

[0046] Afterwards, for the data to be encrypted with a larger lower address, between step S1 and step S2, it is also necessary to run:

[0047] Step S5: When the lower address j increases by 1, the general adjustment value T is multiplied by a constant α to obtain an updated adjustment value t. Then, the updated adjustment value t is used to replace the general adjustment value T to execute steps S2 to S4.

[0048] It is easy to understand that the above step S5 can be simplified to step S6: multiply the general adjustment value by the low-order address of the constant T α to the power of i to obtain the updated adjustment value t. The step S6 is expressed by the formula t=T*α j At this time, the steps of the memory encryption method are as follows Figure 2 shown.

[0049] Based on the above description, the inventors have found that as more and more memory needs to be encrypted, the memory encryption function will consume more system overhead, such as increased data delay, which in turn leads to excessively long calculation time for memory encryption.

[0050] In order to solve the above problems, the embodiment of the present invention provides a data encryption method, so that when the low-order address is long, it does not need to consume many clock cycles to calculate the low-order parameters, and only a limited number of clock cycles are needed to search and calculate the low-order parameters, thereby shortening the calculation time of memory encryption. The specific steps of the process are as follows: Figure 3 As shown, including:

[0051] Step S10: Obtain the memory physical address of the data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address.

[0052] It is easy to understand that the memory physical address of the data to be encrypted has multiple digits. According to the preset rules, the first few digits of the memory physical address are high-order addresses, and the remaining digits are low-order addresses. The combination of the high-order address and the low-order address is the complete physical address. For the specific high-order address and low-order address bit segmentation, it can be flexibly segmented according to the segmentation rules preset by the system.

[0053] Step S20: using the first key and the high-order address to obtain a general adjustment value.

[0054] It is easy to understand that the high-order address of the data to be encrypted is information that is easier to obtain. If the high-order address is directly used to assist in encrypting the data, the encryption security is likely to be low. Therefore, by using the first key for encryption, the encryption security can be effectively improved.

[0055] Step S30: searching for address block parameters in a set of pre-stored values ​​of address blocks according to the address block determined based on the low-order address to obtain low-order parameters.

[0056] After the low-order address is obtained, the address block is determined based on the low-order address, and then the corresponding address block parameter is searched in the address block pre-stored value set to obtain the low-order parameter.

[0057] By searching for the address block parameters corresponding to the low-order address in the address block pre-stored value set instead of directly calculating the address block parameters, the time for obtaining the address block parameters can be greatly shortened when the low-order address is long.

[0058] Step S40: obtaining an updated adjustment value according to the general adjustment value and the low-order parameter.

[0059] Specifically, the general adjustment value and the low-order parameter may be multiplied to obtain an updated adjustment value.

[0060] In this way, the complexity of the calculation of the update adjustment value can be further improved, and duplication of the encrypted data obtained by subsequent encryption can be more effectively avoided.

[0061] Step S50: using the updated adjustment value and a second key to encrypt the data to be encrypted to obtain encrypted data.

[0062] Using the updated adjustment value to perform the XOR operation can further avoid the XOR data still having the same XOR data, thereby preventing the system from making errors.

[0063] It should be noted that the "low-order parameter" is the i-th power of the low-order address of the constant α in the above step S6. As the amount of data to be encrypted increases, the physical address of the data to be encrypted also increases, and then the low-order address is too large, which leads to the calculation of the i-th power of the low-order address of the constant α in the above step S6, that is, the time required to calculate the low-order parameter is too long. Therefore, the data encryption method provided by the present application stores the address block parameters in advance, and searches for the address block parameters in the address block pre-stored value set when in use, and obtains the low-order parameters based on the address block parameters, so that the clock cycle required to obtain the low-order parameters only includes one clock cycle of the search operation, and a limited number of clock cycles of using the address block parameters to obtain the low-order parameters. Even if the low-order address is long, it will not cause a large extension of the acquisition time of the low-order parameters, which can not only shorten the time required for memory encryption, but also avoid the extension of the encryption time and uncertainty caused by the extension of the low-order address.

[0064] It should be noted that the memory physical address of the data to be encrypted is a string of digits, which may have multiple digits. For example, the memory physical address has a total of 10 digits. According to the preset rules, the first few high-order addresses of the memory physical address, such as the first 4 digits of the memory physical address, are the high-order addresses, and the remaining digits are the low-order addresses. For example, when the memory physical address has a total of 10 digits and the first 4 digits are the high-order addresses, the last 6 digits of the memory physical address are the low-order addresses. The combination of the high-order address and the low-order address is the complete memory physical address. For the segmentation of the number of bits of the specific high-order address and the low-order address, it can be flexibly segmented according to the segmentation rules preset by the system.

[0065] It is easy to understand that if all possible values ​​of the low-order parameters are directly calculated and stored in advance, the amount of data to be stored is large, and the time to search for the low-order parameters is also longer, so the effect of shortening the calculation time of the low-order parameters cannot be achieved. However, by dividing the low-order address into multiple address blocks, and storing the address block power of the constant α corresponding to each possible address block, that is, the address block parameter corresponding to the address block, the amount of data to be stored and the time required to search for the address block parameter can be greatly reduced. For example, the low-order address has a total of 15 bits, and the possible low-order parameters have a total of 2 15 =32768 values, and if the low-order address is split into a 2-bit address block j1, a 3-bit address block j2, and a 10-bit address block j3, the possible address block parameters are 2 2 +2 3 +2 10 =1036 values, it can be seen that the amount of data that needs to be stored is significantly reduced after the low-order address is split, and the time required to retrieve the address block parameters is also greatly reduced.

[0066] Specifically, to obtain the address block parameters, in a specific implementation, as follows Figure 4 As shown, the step S30 also includes:

[0067] Step S31: splitting the low-order address into at least two address blocks according to a pre-stored address block splitting method;

[0068] Step S32: searching, according to each of the address blocks, in the address block pre-stored value sets corresponding to each of the address blocks, to obtain the corresponding address block parameters;

[0069] Step S33: acquiring the low-order parameters according to the address block parameters.

[0070] By dividing the low-order address into multiple address blocks and storing the address block parameters corresponding to the address blocks, the time required to find the address block parameters can be shortened to a minimum of 1 clock cycle. The time required to calculate the low-order parameters using the address block parameters is also shorter. For example, as described above, the low-order address is divided into j1, j2, and j3. At this time, the calculation formula for calculating the low-order parameters is (T*α j1 )*(T*α j2 ). In this calculation formula, only three Galois Field multiplications need to be calculated, so the time required is only the time of three Galois Field multiplications. In this way, the time for obtaining low-order parameters can be shortened to a minimum of one clock cycle and three Galois Field multiplications, thereby greatly shortening the time for calculating the low-order parameters.

[0071] Furthermore, in order to further shorten the time for calculating the low-order parameters, in a specific implementation, at least two Galois field multipliers are provided on the hardware for running the data encryption method described in this application. Taking the calculation formula as an example, in the calculation formula as described above, T*α j1 and T*α j2 The calculation can be performed in parallel, so that the calculation time of the above-mentioned calculation formula can be shortened from the time of three Galois Field multiplications to the time of two Galois Field multiplications. This can further shorten the time for calculating the low-order parameters.

[0072] Furthermore, in a specific implementation, the at least two address blocks obtained by splitting the low-order address in step S31 are at least two address blocks of equal length. In this way, the amount of data of the address block parameters that need to be stored can be reduced to a minimum. Taking the low-order address with 15 bits as an example, if the low-order address is split into a 2-bit address block j1, a 3-bit address block j2 and a 10-bit address block j3, the possible address block parameters are 2 2 +2 3 +2 10= 1036 values; if the low-order address is split into three 5-bit address blocks j1, j2 and j3, the possible address block parameters are 2 5 +2 5 +2 5 = 96 values. It can be seen that splitting the low-order address into at least two equal-length address blocks can greatly reduce the amount of data that needs to be stored.

[0073] Furthermore, in a specific implementation, the address block pre-stored value set includes all possible values ​​of the address block parameter calculated based on all possible values ​​of the address block, which makes it easy to search for the required address block parameter in the address block pre-stored value set.

[0074] Further, in a specific embodiment, Figure 5 As shown, the data encryption method provided in the embodiment of the present application includes:

[0075] Step S10: Obtain the memory physical address of the data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address.

[0076] For the specific content of step S10, please refer to the above-mentioned specific description of step S10, which will not be repeated here.

[0077] Step S21: searching in a corresponding set of pre-stored adjustment values ​​according to the high-order address and the first key to obtain a corresponding general adjustment value.

[0078] It is easy to understand that if the address of the high-order address is too large, the calculation time for calculating the general adjustment value is also long. The range of the high-order address required to calculate the general adjustment value is determined, and the possible values ​​of the high-order address are also determined, and the first key is a preset key value. Therefore, we can use ideas similar to the above content, by pre-calculating all possible values ​​of the general adjustment value and pre-storing them, and when obtaining the general adjustment value, by searching the general adjustment value, the time required to obtain the general adjustment value can be shortened to at least 1 clock cycle.

[0079] Of course, the adjustment pre-stored value set includes all possible values ​​of the high-order address and all possible values ​​of the general adjustment value calculated by the first key. In this way, it is convenient to search for the required address block parameters in the adjustment pre-stored value set.

[0080] Step S30: searching for address block parameters in a set of pre-stored values ​​of address blocks according to the address block determined based on the low-order address to obtain low-order parameters.

[0081] Step S40: obtaining an updated adjustment value according to the general adjustment value and the low-order parameter.

[0082] Step S50: using the updated adjustment value and a second key to encrypt the data to be encrypted to obtain encrypted data.

[0083] For the specific contents of step S30 to step S50, please refer to the above-mentioned specific description of step S30 to step S50, which will not be repeated here.

[0084] In this way, the calculation time of memory encryption can be shortened by shortening the time required for obtaining the general adjustment value.

[0085] Further, in a specific implementation, when there are different operating environments, in order to ensure data security, the encryption keys of different operating environments may be different. Figure 5 As shown, in order to obtain the adjusted pre-stored value set corresponding to the first key, before the step S21, the following may also be included:

[0086] Step S22: determining the first key according to the operating environment where the data to be encrypted is located;

[0087] Step S23: determining the corresponding adjustment pre-stored value set according to the first key.

[0088] It should be noted that if Figure 6 A schematic diagram of a computer system is shown, and there may be multiple different operating environments in the system where the data encryption method described in the present application is located. In order to ensure data security between different environments, each different operating environment corresponds to a set of different first keys, and then each operating environment also corresponds to a different set of adjustment pre-stored values, so the first keys and adjustment pre-stored value sets corresponding to each operating environment are stored in the system, and the set of first keys and adjustment pre-stored value sets to be used are determined before data encryption. As shown in the figure, the first key and the second key are stored in the memory 71, and the general adjustment value acquisition device 73 obtains the first key through the first key acquisition device 72, and then uses the first key to select an environment matching the first key in the first operating environment 761, the second operating environment 762 and the third operating environment 763, and uses the corresponding adjustment pre-stored value set therein. After the general adjustment value acquisition device 73 obtains the general adjustment value, the update adjustment value calculation device 74 uses the general adjustment value and the low-order parameters in the low-order parameter acquisition module 77 to calculate the update adjustment value, which is handed over to the encryption calculation device 75 for encryption, wherein the low-order parameters in the low-order parameter acquisition module 77 are obtained by searching and calculating in the address block pre-stored value set. This can improve the security of each operating environment and expand the scope of application of the data encryption method described in this application.

[0089] For further information, please continue to refer to Figure 7In a specific implementation, the step S50 may include:

[0090] Step S51: using the update adjustment value and the data to be encrypted to perform an XOR operation to obtain XOR data;

[0091] Step S52: Encrypting the XOR data using the second key to obtain encrypted XOR data;

[0092] Step S53: performing an XOR operation on the update adjustment value and the encrypted XOR data to obtain encrypted data.

[0093] It should be noted that if the second key is used directly to encrypt the data to be encrypted, the encrypted data obtained by encrypting different data to be encrypted may be numerically identical, so that the computer cannot distinguish the encrypted data of different data to be encrypted, thereby causing errors. Therefore, in order to avoid the possible numerical identity of the encrypted data, the update adjustment value can be used to perform an XOR operation once before and after the data to be encrypted is encrypted by the second key. In this way, by performing an XOR operation on each data to be encrypted using the corresponding different update adjustment values, it can be ensured that the encrypted data obtained after the encryption of each data to be encrypted is different, thereby avoiding computer errors and ensuring the stability of the data encryption method provided by the present application. Furthermore, because the update adjustment value uses the first key in the acquisition process, the update adjustment value is also encrypted to the external environment. In this way, the complexity of the encrypted data can be further increased, thereby improving the security of the data to be encrypted.

[0094] Furthermore, in order to decrypt the encrypted data obtained by the data encryption method provided by the present application, the inverse operation of steps S51 to S52 may be performed on the encrypted data to obtain the data to be encrypted. That is, the updated adjustment value and the encrypted data are subjected to an XOR operation to obtain the encrypted XOR data; the encrypted XOR data is then decrypted using the second key to obtain the XOR data; and finally, the updated adjustment value and the XOR data are subjected to an XOR operation to obtain the data to be encrypted.

[0095] In the above-mentioned embodiment of the present application, the data encryption method provided by the present application stores the address block parameters in advance, searches the address block parameters in the pre-stored value set when in use, and uses the address block parameters to obtain the low-order parameters, instead of directly calculating the low-order parameters. In the encryption process, the multiple clock cycles required to calculate the low-order parameters can be shortened to one clock cycle of the search operation, and a limited number of clock cycles of using the address block parameters to obtain the low-order parameters, so that when the low-order address is long, it is not necessary to consume multiple clock cycles to calculate the low-order parameters, and only a limited number of clock cycles are required to search and calculate the low-order parameters. And the general adjustment value is pre-stored, and the general adjustment value is searched when the general adjustment value is obtained, and the general adjustment value is calculated. Thereby shortening the calculation time of memory encryption at multiple levels. Also by pre-storing multiple groups of first keys and adjusting the pre-stored value set, as well as multiple XOR operations, the scope of application of the data encryption method provided by the present application is improved, computer errors are avoided, and the security of encryption is improved.

[0096] The present application also provides a data encryption device, such as Figure 8 As shown, including:

[0097] An address acquisition module 100 is used to acquire a memory physical address of data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address;

[0098] A general adjustment value acquisition module 200, which uses the first key and the high-order address to acquire a general adjustment value;

[0099] A low-order parameter acquisition module 300 is used to search for address block parameters in a set of pre-stored values ​​of an address block according to an address block determined based on the low-order address, and acquire the low-order parameters;

[0100] An update adjustment value acquisition module 400, configured to acquire an update adjustment value according to the general adjustment value and the low-order parameter;

[0101] The data encryption module 500 is used to encrypt the data to be encrypted using the updated adjustment value and a second key to obtain encrypted data.

[0102] The trial data processing device provided in the above-mentioned embodiment of the present application can shorten the multiple clock cycles required for calculating the low-order parameters in the encryption process to one clock cycle of the search operation and a limited number of clock cycles for obtaining the low-order parameters using the address block parameters, by searching the address block parameters in the pre-stored value set during encryption and using the address block parameters to obtain the low-order parameters instead of directly calculating the low-order parameters. As a result, when the low-order address is long, it is not necessary to spend multiple clock cycles to calculate the low-order parameters, and only a limited number of clock cycles are required to search and calculate the low-order parameters, thereby shortening the calculation time of memory encryption.

[0103] An embodiment of the present application also provides a chip, comprising the data encryption device as described above.

[0104] An embodiment of the present application also provides an electronic device, comprising: at least one memory and at least one processor, the memory stores a program, and the processor calls the program to execute the data encryption method as described above.

[0105] Although the embodiments of the present invention are disclosed above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A data encryption method, characterized in that: include: Obtaining a memory physical address of data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address; Obtain a general adjustment value using the first key and the upper address; According to the address block determined based on the low-order address, searching for address block parameters in a set of pre-stored values ​​of the address block to obtain the low-order parameters; Acquire an updated adjustment value according to the general adjustment value and the low-order parameter; The updated adjustment value and a second key are used to encrypt the data to be encrypted to obtain encrypted data.

2. The data encryption method according to claim 1, characterized in that: The step of searching for address block parameters in a set of pre-stored values ​​of an address block according to the address block determined based on the low-order address to obtain the low-order parameters comprises: Splitting the low-order address into at least two address blocks according to a pre-stored address block splitting method; Searching in the address block pre-stored value set corresponding to each of the address blocks respectively according to each of the address blocks to obtain the corresponding address block parameter; The low-order parameters are obtained according to the respective address block parameters.

3. The data encryption method according to claim 2, characterized in that: The step of splitting the low-order address into at least two address blocks according to a pre-stored address block splitting method includes: The low-order address is split into at least two address blocks of equal length according to a pre-stored address block splitting method.

4. The data encryption method according to claim 1, characterized in that: The address block pre-stored value set includes all possible values ​​of the address block parameter calculated according to all possible values ​​of the address block.

5. The data encryption method according to claim 1, characterized in that: The step of obtaining a general adjustment value using the first key and the high-order address comprises: The corresponding general adjustment value is obtained by searching in a set of adjustment pre-stored values ​​corresponding to the high-order address and the first key.

6. The data encryption method according to claim 5, characterized in that: The set of adjusted pre-stored values ​​corresponding to the first key is obtained by the following steps: Determining the first key according to the operating environment where the data to be encrypted is located; The corresponding set of adjusted pre-stored values ​​is determined according to the first key.

7. The data encryption method according to claim 5, characterized in that: The adjustment pre-stored value set includes all possible values ​​of the general adjustment value calculated according to all possible values ​​of the high-order address and the first key.

8. The data encryption method according to any one of claims 1 to 7, characterized in that: The step of encrypting the data using the updated adjustment value and the second key comprises: Performing an XOR operation on the updated adjustment value and the data to be encrypted to obtain XOR data; Encrypting the XOR data by using the second key to obtain encrypted XOR data; An XOR operation is performed on the update adjustment value and the encrypted XOR data to obtain encrypted data.

9. A data encryption device, characterized in that: include: An address acquisition module, used to acquire a memory physical address of data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address; A general adjustment value acquisition module, using the first key and the high-order address to acquire a general adjustment value; A low-order parameter acquisition module, used to search for address block parameters in a set of pre-stored values ​​of an address block according to an address block determined based on the low-order address, and acquire the low-order parameters; An update adjustment value acquisition module, used to acquire an update adjustment value according to the general adjustment value and the low-order parameter; The data encryption module is used to encrypt the data to be encrypted using the updated adjustment value and a second key to obtain encrypted data.

10. A storage medium, characterized in that: The storage medium stores a program suitable for data encryption to implement the data encryption method according to any one of claims 1 to 8.

11. A chip, characterized in that: Comprising the data encryption device as claimed in claim 9.

12. An electronic device, characterized in that: include: At least one memory and at least one processor, the memory stores a program, and the processor calls the program to execute the data encryption method according to any one of claims 1 to 8.

Images