Chip verification method, verification device and electronic equipment

Abstract

The embodiment of the invention provides a chip checking method, a checking device and electronic equipment. The chip checking method comprises the following steps: acquiring a trimming code read-out value and a checking code ideal value corresponding to parameters in a chip; the trimming code read-out value is a read-out value after a trimming code ideal value written into the chip is subjected to chip packaging or / and on-machine operation, and the check code ideal value is a check code function value determined according to the trimming code ideal value and a preset function, or a read-out value after the check code function value written into the chip is subjected to chip packaging or / and on-machine operation; determining a check code calculation value according to the trimming code read value and a preset function; and comparing the check code calculation value with the check code ideal value, and determining that the chip passes the check or does not pass the check according to a comparison result. According to the embodiment of the invention, the chip verification efficiency can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of integrated circuit technology, and in particular to a chip verification method, a verification device and an electronic device. Background Art

[0002] In the field of integrated circuits, some electrical parameters of chips have high precision requirements, but the precision is not so high when the chips leave the factory, so they need to be adjusted. The usual practice is to write adjustment codes into the one-time programmable microcontroller (OTP) or multi-time programmable microcontroller (MTP) to fine-tune the internal circuit of the chip and adjust the parameters to near the ideal value, and then perform wafer testing, packaging and machine application on the chip.

[0003] However, during the packaging and machine application process after wafer testing, the chip may be subjected to unpredictable external forces, and the adjustment code value may change. When the parameters are far away from the ideal value, the chip will work abnormally and cause losses. Summary of the invention

[0004] The embodiments of the present disclosure provide a chip verification method, a verification device and an electronic device.

[0005] In a first aspect, an embodiment of the present disclosure provides a chip verification method, comprising:

[0006] Obtaining a readout value of a trimming code and an ideal value of a check code corresponding to a parameter in a chip; the readout value of the trimming code is a readout value of the ideal trimming code written in the chip after the chip is packaged or / and put on a machine, and the ideal check code is a check code function value determined according to the ideal trimming code value and a preset function, or a readout value of the check code function value written in the chip after the chip is packaged or / and put on a machine;

[0007] Determining a check code calculation value according to the trimming code read value and the preset function;

[0008] The calculated verification code value is compared with the ideal verification code value, and whether the chip verification passes or fails is determined based on the comparison result.

[0009] In some embodiments, the chip includes a plurality of the parameters, each of the parameters corresponds to at least one ideal value of the trimming code, and after the circuit in the chip is trimmed by the ideal value of the trimming code, the parameters are in an expected state.

[0010] In some embodiments, the ideal verification code value is a verification code function value determined according to the ideal adjustment code value and a preset function, and the verification code function value is set on the chip surface by a physical method and / or a chemical method.

[0011] In some embodiments, the ideal value of the verification code is a read value of the verification code function value written into the chip after the chip is packaged and / or installed on the machine, and the verification code function value is stored in a storage space together with the ideal value of the adjustment code.

[0012] In some embodiments, the check code function value includes a fixed sign bit and a data bit for storing a numerical value, and a fixed sign value is written on the fixed sign bit; before comparing the check code calculation value with the check code ideal value, the method further includes:

[0013] Compare the fixed sign value at the fixed sign bit of the ideal check code value with the fixed sign value at the fixed sign bit of the check code function value to determine whether the two are consistent;

[0014] If they are consistent, the calculated verification code value is compared with the ideal verification code value, and the chip verification is determined to have passed or failed according to the comparison result;

[0015] If they are inconsistent, further verification is performed.

[0016] In some embodiments, comparing the calculated verification code value with the ideal verification code value, and determining whether the chip verification passes or fails according to the comparison result, includes:

[0017] If the calculated verification code value is the same as the ideal verification code value, it is determined that the chip verification has passed;

[0018] If the calculated verification code value is different from the ideal verification code value, it is determined that the chip verification fails.

[0019] In some embodiments, the further verification includes:

[0020] Comparing the calculated check code value with the ideal check code value;

[0021] If the calculated check code value is the same as the ideal check code value, it is determined that at least one of the readout adjustment code values ​​is inconsistent with its corresponding ideal adjustment code value, and the check fails.

[0022] If the calculated check code value is different from the ideal check code value, a parameter test is performed to determine whether the check is passed or not.

[0023] In some embodiments, performing parameter testing to determine whether verification passes or fails includes:

[0024] Performing performance testing on the chip;

[0025] If the chip parameter in the performance test is in the expected state, it is determined that the ideal value of the adjustment code corresponding to the parameter is consistent with the read value of the adjustment code, and the verification passes;

[0026] If the chip parameter in the performance test is not in the expected state, it is determined that the ideal value of the adjustment code corresponding to the parameter is inconsistent with the read value of the adjustment code, and the verification fails.

[0027] In a second aspect, an embodiment of the present disclosure provides a verification device, including:

[0028] An acquisition unit is configured to acquire a readout value of a trimming code and an ideal value of a check code corresponding to a parameter in a chip; the readout value of the trimming code is a readout value of the ideal trimming code written in the chip after the chip is packaged or / and put on a machine, and the ideal check code is a check code function value determined according to the ideal trimming code value and a preset function, or is a readout value of the check code function value written in the chip after the chip is packaged or / and put on a machine;

[0029] A determination unit, configured to determine a check code calculation value according to the trimming code read value and the preset function;

[0030] The comparison unit is configured to compare the calculated verification code value with the ideal verification code value, and determine whether the chip verification passes or fails according to the comparison result.

[0031] In a third aspect, an embodiment of the present disclosure provides an electronic device, the electronic device comprising a memory and a processor;

[0032] The memory is used to store a computer program that can be run on the processor;

[0033] The processor is configured to execute the chip verification method as described in any one of the first aspects when running the computer program;

[0034] Alternatively, the electronic device includes the verification device as described in the second aspect.

[0035] The disclosed embodiments provide a chip verification method, a verification device and an electronic device. When verifying a chip and determining whether a trimming code in the chip has changed, the method uses a preset function and substitutes multiple trimming codes into the preset function to calculate a verification code. Then, by judging whether the verification code has changed before and after the chip is packaged and / or installed on the machine, it is indirectly judged whether the trimming code has changed, thereby realizing verification of the chip. Compared with judging whether each trimming code has changed one by one, the present solution only needs to compare and judge the verification codes, thereby greatly improving the verification efficiency and saving time costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1A schematic diagram of a chip verification method provided by an embodiment of the present disclosure;

[0037] Figure 2 A schematic diagram of the structure of a verification device provided in an embodiment of the present disclosure;

[0038] Figure 3 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present disclosure;

[0039] Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. It is understood that the specific embodiments described herein are only used to explain the relevant disclosure, rather than to limit the disclosure. It should also be noted that, for the convenience of description, only the parts related to the relevant disclosure are shown in the drawings.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein are only for the purpose of describing the embodiments of the present disclosure and are not intended to limit the present disclosure.

[0042] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0043] It should be pointed out that the terms "first\second\third" involved in the embodiments of the present disclosure are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present disclosure described here can be implemented in an order other than that illustrated or described here.

[0044] During chip packaging and machine application after wafer testing, the chip may be subjected to unpredictable external forces, and the trimming code value may change, causing the parameters in the chip to be far from the ideal value. When the parameters are far from the ideal value, the chip will work abnormally, causing losses. If the trimming codes are read out one by one and each trimming code is checked to see if it has changed, it will take a lot of time for a large number of trimming codes, and the verification efficiency is low.

[0045] Based on this, an embodiment of the present disclosure provides a chip verification method, which includes: obtaining a readout value of a trimming code and an ideal value of a verification code corresponding to parameters in the chip; the readout value of the trimming code is a readout value of the ideal value of the trimming code written into the chip after the chip is packaged and / or put on the machine, and the ideal value of the verification code is a function value of the verification code determined based on the ideal value of the trimming code and a preset function, or is a readout value of the function value of the verification code written into the chip after the chip is packaged and / or put on the machine; determining a calculated value of the verification code based on the readout value of the trimming code and the preset function; comparing the calculated value of the verification code with the ideal value of the verification code, and determining whether the chip verification passes or fails based on the comparison result.

[0046] In this way, when verifying the chip to determine whether the trimming code in the chip has changed, a check code is calculated using a preset function and the trimming code. By judging whether the check code has changed, it is indirectly judged whether the trimming code has changed, thereby realizing the verification of the chip. Compared with judging whether each trimming code has changed one by one, this solution only needs to compare and judge the check code, which greatly improves the verification efficiency and saves time cost. On the other hand, if it is judged one by one whether each trimming code has changed, a large number of trimming codes need to be additionally recorded and saved and circulated with the chip, so as to obtain the original burned value of the trimming code in the verification link and compare it with the corresponding check value. However, there is a great inconvenience in recording and saving a large number of trimming codes and circulating them with the chip. The present disclosure can alleviate this problem to a certain extent.

[0047] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0048] In one embodiment of the present disclosure, see Figure 1 , which shows a schematic flow chart of a chip verification method provided by an embodiment of the present disclosure. Figure 1 As shown, the method includes:

[0049] S101: Obtaining a readout value of a trimming code and an ideal value of a check code corresponding to parameters in a chip.

[0050] The readout value of the trimming code is the readout value of the ideal trimming code written into the chip after the chip is packaged or / and put on the machine; the ideal trimming code value is a value determined based on the difference between the test value of the parameter and the ideal value of the parameter. After the circuit in the chip is trimmed by the ideal trimming code value, the test value of the chip parameter is close to the ideal value of the parameter. The ideal check code value is the check code function value determined based on the ideal trimming code value and the preset function, or the readout value of the check code function value written into the chip after the chip is packaged or / and put on the machine.

[0051] It should be noted that in the disclosed embodiment, the chip may include multiple parameters, each parameter corresponds to at least one ideal value of the trimming code, and the parameters in the circuit in the chip are in the expected state after the trimming code ideal value is trimmed. The expected state means that the parameter value after trimming is basically consistent with the ideal value of the parameter, that is, the difference is less than the threshold, and the threshold can be considered as an error within the allowable range. That is, by writing the above-mentioned ideal value of the trimming code into the chip, the test parameters of the chip can be near the ideal parameters, so that the chip can work with optimal performance.

[0052] It should also be noted that the trimming code readout value is the trimming code value read out from the storage space of the chip (such as a one-time programmable memory OTP, a limited time programmable memory FTP (Few Time Programmable) or a multi-time programmable memory MTP), and is the value obtained by reading after the chip has been packaged and / or installed on the machine. Before the chip is packaged, the ideal value of the trimming code needs to be written into the chip, so that the trimming code readout value can be read during the verification process. Therefore, in some embodiments, before step S101, the method may further include:

[0053] Writing the ideal value of the adjustment code corresponding to the parameter into the chip; and writing the verification code function value determined according to the ideal value of the adjustment code and the preset function into the chip, or setting the verification code function value on the chip surface by physical methods and / or chemical methods.

[0054] It should be noted that in the embodiments of the present disclosure, there are two ways to define and obtain the ideal value of the check code:

[0055] The first method is: the ideal value of the check code is the check code function value determined according to the ideal value of the adjustment code and the preset function, and the check code function value is set on the chip surface by physical methods and / or chemical methods. Among them, the physical method may include: laser printing, engraving, labeling and the like; the chemical method may include etching, fluorescent marking and the like. In this case, the check code function value usually does not change with external force, that is, the obtained ideal value of the check code is equal to the calculated check code function value, that is, the ideal value of the check code = the check code function value.

[0056] The second method is: the ideal value of the check code is the read value of the check code function value written into the chip after the chip is packaged or / and installed on the machine. The check code function value is determined according to the ideal value of the adjustment code and the preset function, and is stored in the storage space together with the ideal value of the adjustment code. Among them, the storage space can be OTP, FTP, MTP, etc. In this case, the ideal value of the adjustment code is substituted into the preset function for calculation to obtain the check code function value, and the check code function value is written into the storage space of the chip; when obtaining the ideal value of the check code, the check code function value is read from the storage space of the chip, and the read result is recorded as the ideal value of the check code.

[0057] It should also be noted that there are usually multiple parameters that need to be adjusted in the chip, and each parameter corresponds to one or more adjustment codes. When performing chip verification, it can be: for each parameter, only the multiple ideal adjustment code values ​​of the parameter are combined with a preset function to calculate the verification code function value, and then only the adjustment code of the parameter is verified; it can also be: all the ideal adjustment code values ​​of all parameters are combined with a preset function to calculate the ideal verification code value, and then the adjustment codes of all parameters are verified; or it can also be a combination of part or all of the ideal verification code values ​​of any number of parameters combined with a preset function to calculate the ideal verification code value, and then the adjustment codes of the parameters involved are verified, etc. The embodiments of the present disclosure do not make specific limitations on this.

[0058] S102: Determine a check code calculation value according to the read value of the adjustment code and a preset function.

[0059] It should be noted that the readout value of the adjustment code is substituted into the preset function for calculation to obtain the verification code calculation value. In the embodiment of the present disclosure, the specific type of the preset function is not limited, and it is only necessary to ensure that the preset function for calculating the verification code function value and the preset function for calculating the verification code calculation value are the same preset function.

[0060] It should also be noted that, in the embodiments of the present disclosure, each trimming code involves two values: an ideal trimming code value and a trimming code readout value, wherein the ideal trimming code value is the value of the trimming code that can trim the parameters to an ideal state, and is also the value of the trimming code written into the chip; the trimming code readout value is the value of the trimming code read out from the chip.

[0061] Each check code involves three values: a check code function value, an ideal check code value, and a calculated check code value, wherein the check code function value is the value of the check code calculated based on the ideal value of the adjustment code and a preset function; the ideal check code value can be directly observed from the chip surface (corresponding to the first method) or read from the inside of the chip (corresponding to the second method). It can be understood that for the first method, the ideal check code value is equal to the check code function value; the calculated check code value is the value of the check code calculated based on the adjustment code readout value and a preset function.

[0062] S103: Compare the calculated value of the verification code with the ideal value of the verification code, and determine whether the chip verification has passed or failed according to the comparison result.

[0063] It should be noted that, for the check code function value set on the chip surface in the first way, the ideal check code value = the check code function value. In this case, it is only necessary to compare the calculated check code value with the ideal check code value, and whether the check is passed can be confirmed based on whether the two are the same. That is, comparing the calculated check code value with the ideal check code value, and determining whether the chip check is passed or not based on the comparison result, which may include:

[0064] If the calculated value of the verification code is the same as the ideal value of the verification code, it is determined that the chip verification has passed;

[0065] If the calculated value of the verification code is different from the ideal value of the verification code, it is determined that the chip verification has failed.

[0066] Here, if the calculated value of the check code is the same as the ideal value of the check code, it means that the result obtained by substituting multiple adjustment code read values ​​into the preset function is the same as the result obtained by substituting multiple adjustment code ideal values ​​into the preset function, and then it can be determined that the adjustment code read value is the same as the ideal adjustment code value, that is, the adjustment code has not changed, and the chip verification passes; if the calculated value of the check code is different from the ideal value of the check code, it means that the result obtained by substituting multiple adjustment code read values ​​into the preset function is different from the result obtained by substituting multiple adjustment code ideal values ​​into the preset function, and then it can be determined that at least one adjustment code read value is different from the corresponding adjustment code ideal value, that is, at least one adjustment code has changed, and the chip verification fails.

[0067] In this way, based on the chip verification method provided by the embodiment of the present disclosure, it is only necessary to compare whether the value of the verification code has changed, that is, to determine whether the value of the adjustment code has changed, without having to compare and judge the adjustment codes one by one (the adjustment code is usually not one, but many. If they are compared one by one, the workload is very large and the efficiency is low), thereby effectively improving the chip verification efficiency.

[0068] It should also be noted that, for the verification code written into the chip, the value of the verification code stored in the chip may change due to external forces during packaging, on-machine application, etc., that is, the ideal value of the verification code ≠ the function value of the verification code. For example, Table 1 shows the verification results that may be obtained when the verification code is changed and when it is not changed.

[0069] Table 1

[0070]

[0071] As shown in Table 1, assuming that there are three trimming codes X, Y, and Z, X1, Y1, and Z1 represent the corresponding ideal values ​​of the three trimming codes, and X2, Y2, and Z2 represent the corresponding read values ​​of the three trimming codes; f(X, Y, Z) represents the preset function, the check code function value M1 = f(X1, Y1, Z1), the check code calculation value M2 = f(X2, Y2, Z2), and M1` represents the ideal check code value. "√" indicates that the check result is correct, and "×" indicates that the check result is wrong.

[0072] If the check code does not change, that is, the ideal check code value M1` = the check code function value M1, the corresponding situation is the same as setting the check code function value by physical method or / and chemical method. At this time, the ideal check code value M1` is reliable, so the check results obtained by comparing the check code calculation value M2 and the ideal check code value M1` are correct. That is: if M2≠M1` (M1`=M1), it means that the adjustment code has changed and the check fails; if M2=M1` (M1`=M1), it means that the adjustment code has not changed and the check passes.

[0073] If the read check code ideal value M1`≠ check code function value M1 under the action of external force, that is, the check code changes. At this time, there are the following three special cases:

[0074] Case a: The check code function value M1 is changed by external force. When the ideal values ​​X1, Y1, and Z1 of the trimming codes stored in the chip also change, the check code calculation value M2 calculated by the trimming code read values ​​X2, Y2, and Z2 and the preset function M=f(X,Y,Z) may still be equal to the read ideal check code value M1`, that is, M2=M1`≠M1. At this time, the trimming code has actually changed, but since M2=M1`, the verification result shows that the trimming code has not changed, which is actually a verification error.

[0075] Case b: The check code function value M1 is changed by external force. When the ideal values ​​of the trimming codes X1, Y1, and Z1 stored in the chip also change, the check code calculation value M2 calculated by the read trimming code read values ​​X2, Y2, and Z2 and the preset function M=f(X, Y, Z) is not equal to the read ideal check code value M1`, that is, M2≠M1`. At this time, the trimming code actually changes, and because M2≠M1`, the verification result also shows that the trimming code has changed, and the verification result is correct (but the same as case c is M2≠M1`, and it is impossible to determine whether the ideal check code value M1` is equal to the check code function value M1, so the two cases cannot be directly distinguished).

[0076] Case c: The check code function value M1 is changed by external force. When the ideal adjustment code values ​​X1, Y1, and Z1 stored in the chip remain unchanged, the check code calculation value M2 calculated by the read adjustment code read values ​​X2, Y2, and Z2 and the preset function M=f(X, Y, Z) is equal to the initial burned check code function value M1, but is not equal to the read check code ideal value M1`, that is, M2=M1, but M2≠M1`. At this time, the adjustment code has not actually changed, but since M2≠M1`, the verification result shows that the adjustment code has changed, which is actually a verification error.

[0077] In view of these special cases, in order to further improve the accuracy of verification, it is possible to mark whether the verification code has changed. Specifically, in some embodiments, the verification code function value may include a fixed sign bit and a data bit for storing a numerical value, and a fixed sign value is written on the fixed sign bit; before comparing the calculated verification code value with the ideal verification code value, the method further includes:

[0078] Compare the fixed sign value at the fixed sign bit of the ideal value of the check code with the fixed sign value at the fixed sign bit of the check code function value written into the chip to determine whether the two are consistent;

[0079] If they are consistent, the calculated value of the verification code is compared with the ideal value of the verification code, and the chip verification is determined to pass or fail based on the comparison result;

[0080] If they are inconsistent, further verification is performed.

[0081] It should be noted that the embodiment of the present disclosure sets a fixed sign bit for the check code, and the check code function value written into the chip also includes a fixed sign value on the fixed sign bit (or flag bit, mark bit, etc.). Among them, the fixed sign value can be 0 (low level) or 1 (high level) or any other suitable value. Here, the fixed sign value on the fixed sign bit is a manually set value and is a known value before the check is performed.

[0082] It can be understood that the fixed sign bit is essentially a marking bit, and the fixed sign value on it is used to mark the initial state of the check code function value. Taking the binary code burning check code function value as an example, "0" (or "1") can be fixedly written on the fixed sign bit to mark the initial state of the check code function value, and then after the chip is packaged and / or installed on the machine, the check code function value is read to obtain the ideal check code value, and then it is determined whether the fixed symbol value on the fixed sign bit of the ideal check code value changes to "1" (or "0"), thereby indicating whether the check code has changed.

[0083] It should be further explained that the fixed sign bit and the code on the data bit of the check code function value are stored as a whole in the storage space, and usually their states change synchronously, that is, either the fixed sign bit and the code on the data bit change due to external forces, or the fixed sign bit and the code on the data bit do not change. Therefore, whether the code on the fixed sign bit (i.e., the fixed sign value) changes can indicate whether the code on the data bit (i.e., the stored check code value) changes.

[0084] In the disclosed embodiment, when performing verification, the fixed sign bit of the ideal value of the verification code is first read, and the read fixed symbol value is compared with the known established fixed symbol value. If the two are the same, it is determined that the read ideal value of the verification code is the same as the written verification code function value, and the verification code has not changed. The chip verification is judged whether it has passed in the manner when the ideal value of the verification code is equal to the verification code function value; if the two are different, it is determined that the read ideal value of the verification code is different from the written verification code function value, and the verification code has changed (corresponding to case a, case b and case c in Table 1), and further verification is required.

[0085] In some embodiments, further verification includes:

[0086] Compare the calculated check code value with the ideal check code value;

[0087] If the calculated check code value is the same as the ideal check code value, it is determined that at least one readout value of the adjustment code is inconsistent with its corresponding ideal adjustment code value, and the check fails.

[0088] If the calculated check code value is different from the ideal check code value, a parameter test is performed to determine whether the check passes or fails.

[0089] It should be noted that it can be understood that “comparing the calculated check code value with the ideal check code value” does not include comparison of fixed sign bits, but only compares the check code value.

[0090] As shown in Table 1, when the check code changes (M1`≠M1), if M2=M1`, then it corresponds to situation a. If it is judged that the adjustment code has not changed based on M2=M1`, the conclusion is wrong, so the verification result needs to be revised. The actual conclusion should be that the adjustment code has changed and the verification fails. When the check code changes (M1`≠M1), if M2≠M1`, there are two possibilities, situation b and situation c. It is impossible to make a direct judgment and further parameter testing is required. In some embodiments, parameter testing is performed to determine whether the verification passes or fails, which may include:

[0091] Perform performance tests on the chip;

[0092] If the chip parameter is in the expected state during the performance test, it is determined that the ideal value of the adjustment code corresponding to the parameter is consistent with the read value of the adjustment code, and the verification passes;

[0093] If the chip parameter is not in the expected state during the performance test, it is determined that the ideal value of the trimming code corresponding to the parameter is inconsistent with the trimming code read value, and the verification fails.

[0094] It should be noted that if the performance test determines that the parameters are in the expected state, it means that the adjustment code can adjust the parameters to the expected state, and the adjustment code has not changed, then the verification passes; if the performance test determines that the parameters are not in the expected state, it means that the adjustment code cannot adjust the parameters to the expected state, and the adjustment code has changed, then the verification fails.

[0095] In this way, the disclosed embodiment can not only determine the verification code through a preset function to synchronously verify the adjustment codes corresponding to multiple chip parameters, thereby improving the verification efficiency; it can also further check for deficiencies and make up for the gaps, and further verify the chips that may have verification errors, thereby gradually reducing the probability of verification failure, so that defective chips can be gradually screened out for timely adjustment and compensation, and the chip loss cost can be effectively reduced in large-scale chip production.

[0096] In summary, in view of the defect that the adjustment code value of the parameters in the chip may change and cause abnormal operation of the chip, the embodiment of the present disclosure can set a check code M to verify whether the adjustment code has changed. Different adjustment codes (for example, the adjustment code of parameter A is X, the adjustment code of parameter B is Y, and the adjustment code of parameter C is Z) are used to generate a check code function value M1 through a preset function M=f(X, Y, Z), and the check code function value M1 is written into the OTP or FTP or MTP of the chip, wherein the space occupied by the check code function value M1 needs to be taken into consideration by the designer during the chip design stage. At the end of the wafer test process, the adjustment codes of parameters A, B, and C are read out as X2, Y2, and Z2 respectively, and a check code calculation value M2 is generated using the same preset function M=f(X, Y, Z). The check code function value M1 is read to obtain the check code ideal value M1` (if the check code has not changed, then M1=M1`, if the check code has changed, then M1≠M1`, for the check code function value set by physical methods or / and chemical methods, M1≡M1`). When the check code has not changed, the check code calculation value M2 is compared with the read check code ideal value M1`. If M2=M1`, the check shows that the adjustment code has not changed; if M2≠M1, the check shows that the adjustment code has changed. Similarly, after the chip is applied to the terminal, the same steps can be used for verification. When the check shows that the adjustment code has changed, screening or rescue measures need to be performed.

[0097] It should be noted that there are three special cases (case a, case b and case c mentioned above). The reasons for the exceptions may be: during the packaging and machine application process, the verification code function value M1 written into the chip may also change due to external force. The ideal verification code value obtained by reading M1 during the verification stage is M1`, and M1`≠M1.

[0098] For special cases, the following optimization can be done: when writing the check code function value M1, set a fixed sign bit, and the fixed sign bit is fixed to 0 (or 1). The check steps are as follows:

[0099] (1) Before calculating the check code calculation value M2, the fixed sign bit of the check code function value M1 is first read from the chip to determine whether the check code has changed. When it is determined that the check code value has not changed, the check result is always correct.

[0100] (2) When the verification code changes, judgment or further verification is performed according to the situation, specifically:

[0101] When it is determined that the check code has changed, if M2 = M1`, it is case a, the check result is wrong, and the adjustment code X / Y / Z is actually changed to adjust the check result;

[0102] If M2≠M1`, then it includes case b and case c. At this time, it is necessary to further verify whether X / Y / Z has changed, and then continue to verify;

[0103] (3) Directly select all / part of / one of the adjustment codes X / Y / Z for parameter testing. If the corresponding parameters are close to the ideal values, X / Y / Z remain unchanged, otherwise they are changed.

[0104] In this way, the chip verification scheme provided by the embodiment of the present disclosure can promptly find out whether there is a problem with the adjustment code value corresponding to each parameter of the chip after the wafer test is completed and the chip is packaged, thereby screening out problematic chips, improving chip yield and reducing terminal losses. Furthermore, since this scheme only needs to compare and judge the verification code, and does not need to compare a large number of adjustment codes one by one, this scheme is particularly suitable for multi-parameter verification of batch chips, and can improve the efficiency of multi-parameter verification of chips.

[0105] In another embodiment of the present disclosure, see Figure 2 , which shows a schematic diagram of the composition structure of a verification device provided by an embodiment of the present disclosure. Figure 2 As shown, the verification device 20 may include:

[0106] The acquisition unit 201 is configured to acquire a readout value of the adjustment code and an ideal value of the check code corresponding to the parameters in the chip; the readout value of the adjustment code is a readout value of the ideal value of the adjustment code written in the chip after the chip is packaged or / and put on the machine, and the ideal value of the check code is a check code function value determined according to the ideal value of the adjustment code and a preset function, or a readout value of the check code function value written in the chip after the chip is packaged or / and put on the machine;

[0107] The determination unit 202 is configured to determine the calculated value of the check code according to the read value of the adjustment code and a preset function;

[0108] The comparison unit 203 is configured to compare the calculated value of the verification code with the ideal value of the verification code, and determine whether the chip verification has passed or failed according to the comparison result.

[0109] like Figure 2 As shown, in some embodiments, the verification device 20 may further include:

[0110] The writing unit 204 is configured to write the ideal value of the adjustment code corresponding to the parameter into the chip; and write the verification code function value determined according to the ideal value of the adjustment code and the preset function into the chip, or set the verification code function value on the chip surface by physical methods and / or chemical methods.

[0111] It should be noted that, since the chip verification is a step performed after the chip is packaged / applied on a machine, the writing unit 204 for writing the ideal value of the adjustment code and the ideal value of the verification code into the chip is not necessarily integrated in the verification device 20. Figure 2 Shown are examples only.

[0112] In some embodiments, the comparison unit 203 is further configured to compare the fixed symbol value on the fixed sign bit of the ideal value of the check code with the fixed symbol value on the fixed sign bit of the check code function value to determine whether the two are consistent; if they are consistent, the calculated value of the check code is compared with the ideal value of the check code, and the chip verification is determined to pass or fail based on the comparison result; if they are inconsistent, further verification is performed.

[0113] In some embodiments, the comparison unit 203 is further configured to determine that the chip verification has passed if the calculated value of the verification code is the same as the ideal value of the verification code; and to determine that the chip verification has failed if the calculated value of the verification code is different from the ideal value of the verification code.

[0114] In some embodiments, the comparison unit 203 is further configured to compare the calculated value of the check code with the ideal value of the check code; if the calculated value of the check code is the same as the ideal value of the check code, it is determined that at least one adjustment code read value is inconsistent with its corresponding ideal adjustment code value, and the check fails; if the calculated value of the check code is different from the ideal value of the check code, a parameter test is performed to determine whether the check passes or fails.

[0115] In some embodiments, the comparison unit 203 is further configured to perform a performance test on the chip; if the parameters of the chip are in an expected state during the performance test, it is judged that the ideal value of the trimming code corresponding to the parameter is consistent with the trimming code read value, and the verification passes; if the parameters of the chip are not in the expected state during the performance test, it is judged that the ideal value of the trimming code corresponding to the parameter is inconsistent with the trimming code read value, and the verification fails.

[0116] It should be noted that the verification device 20 provided in the embodiment of the present disclosure is used to implement the chip verification method in the aforementioned embodiment. For details not disclosed in this embodiment, please refer to the description of the aforementioned embodiment for understanding, and no further details will be given here.

[0117] It can be understood that in this embodiment, a "unit" can be a part of a circuit, a part of a processor, a part of a program or software, etc., and of course it can also be a module, or it can be non-modular. Moreover, the components in this embodiment can be integrated into a processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional module.

[0118] If the integrated unit is implemented in the form of a software function module and is not sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this embodiment is essentially or the part that contributes to the prior art or the whole or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) or a processor to perform all or part of the steps of the method described in this embodiment. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory, disk or optical disk, etc. Various media that can store program codes.

[0119] Therefore, this embodiment provides a computer storage medium, which stores a computer program. When the computer program is executed by at least one processor, the steps of the chip verification method in any one of the above embodiments are implemented.

[0120] This embodiment further provides a computer program product, which includes a computer program. When the computer program is executed by at least one processor, the chip verification steps in any one of the above embodiments are implemented.

[0121] Based on the above computer storage medium and computer program product, see Figure 3 , which shows a hardware structure diagram of an electronic device provided by an embodiment of the present disclosure. Figure 3 As shown, the electronic device 30 may include: a communication interface 301, a memory 302 and a processor 303; each component is coupled together via a bus system 304. It is understood that the bus system 304 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 304 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, Figure 3 Various buses are labeled as bus system 304. Among them, the communication interface 301 is used for receiving and sending signals in the process of sending and receiving information between other external network elements;

[0122] Memory 302, used to store computer programs that can be run on processor 303;

[0123] The processor 303 is used to execute any of the aforementioned chip verification methods when running the computer program.

[0124] It can be understood that the memory 302 in the embodiment of the present disclosure can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a RAM, which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct memory bus random access memory (DRRAM). The memory 302 of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0125] The processor 303 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the hardware integrated logic circuit or software instructions in the processor 303. The above processor 303 may be a general processor, a digital signal processor (Digital Signal Processor, DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present disclosure can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in conjunction with the embodiments of the present disclosure can be directly embodied as a hardware decoding processor to perform, or the hardware and software modules in the decoding processor are combined to perform. The software module can be located in a mature storage medium in the field such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory 302, and the processor 303 reads the information in the memory 302 and completes the steps of the above method in combination with its hardware.

[0126] It is understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For hardware implementation, the processing unit may be implemented in one or more application specific integrated circuits (ASIC), digital signal processors (DSP), digital signal processing devices (DSPD), programmable logic devices (PLD), field programmable gate arrays (FPGA), general purpose processors, controllers, microcontrollers, microprocessors, other electronic units for performing the functions described in the present disclosure, or a combination thereof.

[0127] For software implementation, the techniques described herein can be implemented by modules (e.g., procedures, functions, etc.) that perform the functions described herein. The software code can be stored in a memory and executed by a processor. The memory can be implemented in the processor or outside the processor.

[0128] In another embodiment of the present disclosure, see Figure 4, which shows a schematic diagram of the composition structure of another electronic device provided by an embodiment of the present disclosure, such as Figure 4 As shown, the electronic device 30 includes the verification device 20 described in any one of the aforementioned embodiments.

[0129] It should be noted that the electronic device 30 may be a device for testing chip performance, such as a tester.

[0130] The above description is only a preferred embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure.

[0131] It should be noted that in the present disclosure, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0132] The serial numbers of the above-mentioned embodiments of the present disclosure are only for description and do not represent the advantages or disadvantages of the embodiments.

[0133] The methods disclosed in several method embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments. The features disclosed in several product embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new product embodiments. The features disclosed in several method or device embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

[0134] The above description is only a specific implementation mode of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure.

Claims

1. A chip verification method, characterized in that: include: Obtaining a readout value of a trimming code and an ideal value of a check code corresponding to a parameter in a chip; the readout value of the trimming code is a readout value of the ideal trimming code written in the chip after the chip is packaged or / and put on a machine, and the ideal check code is a check code function value determined according to the ideal trimming code value and a preset function, or a readout value of the check code function value written in the chip after the chip is packaged or / and put on a machine; Determining a check code calculation value according to the trimming code read value and the preset function; The calculated verification code value is compared with the ideal verification code value, and whether the chip verification passes or fails is determined based on the comparison result.

2. The chip verification method according to claim 1, characterized in that: The chip includes a plurality of the parameters, each of which corresponds to at least one ideal value of the trimming code. After the circuit in the chip is trimmed by the ideal value of the trimming code, the parameter is in an expected state.

3. The chip verification method according to claim 1, characterized in that: The ideal value of the verification code is a verification code function value determined according to the ideal value of the adjustment code and a preset function, and the verification code function value is set on the chip surface by a physical method and / or a chemical method.

4. The chip verification method according to claim 1, characterized in that: The ideal value of the verification code is a read value of the verification code function value written into the chip after the chip is packaged and / or installed on the machine. The verification code function value is stored in the storage space together with the ideal value of the adjustment code.

5. The chip verification method according to claim 4, characterized in that: The check code function value includes a fixed sign bit and a data bit for storing a numerical value, and a fixed sign value is written on the fixed sign bit; Before comparing the calculated check code value with the ideal check code value, the method further includes: Compare the fixed sign value at the fixed sign bit of the ideal check code value with the fixed sign value at the fixed sign bit of the check code function value to determine whether the two are consistent; If they are consistent, the calculated verification code value is compared with the ideal verification code value, and the chip verification is determined to have passed or failed according to the comparison result; If they are inconsistent, further verification is performed.

6. The chip verification method according to claim 3 or 5, characterized in that: The comparing the calculated verification code value with the ideal verification code value, and determining whether the chip verification passes or fails according to the comparison result, includes: If the calculated verification code value is the same as the ideal verification code value, it is determined that the chip verification has passed; If the calculated verification code value is different from the ideal verification code value, it is determined that the chip verification fails.

7. The chip verification method according to claim 5, characterized in that: The further verification includes: Comparing the calculated check code value with the ideal check code value; If the calculated check code value is the same as the ideal check code value, it is determined that at least one of the readout adjustment code values ​​is inconsistent with its corresponding ideal adjustment code value, and the check fails. If the calculated check code value is different from the ideal check code value, a parameter test is performed to determine whether the check is passed or not.

8. The chip verification method according to claim 7, characterized in that: The performing of parameter testing to determine whether verification has passed or failed includes: Performing performance testing on the chip; If the chip parameter in the performance test is in the expected state, it is determined that the ideal value of the adjustment code corresponding to the parameter is consistent with the read value of the adjustment code, and the verification passes; If the chip parameter in the performance test is not in the expected state, it is determined that the ideal value of the adjustment code corresponding to the parameter is inconsistent with the read value of the adjustment code, and the verification fails.

9. A verification device, characterized in that: include: An acquisition unit is configured to acquire a readout value of a trimming code and an ideal value of a check code corresponding to a parameter in a chip; the readout value of the trimming code is a readout value of the ideal trimming code written in the chip after the chip is packaged or / and put on a machine, and the ideal check code is a check code function value determined according to the ideal trimming code value and a preset function, or is a readout value of the check code function value written in the chip after the chip is packaged or / and put on a machine; A determination unit, configured to determine a check code calculation value according to the trimming code read value and the preset function; The comparison unit is configured to compare the calculated verification code value with the ideal verification code value, and determine whether the chip verification passes or fails according to the comparison result.

10. An electronic device, characterized in that: The electronic device comprises a memory and a processor; The memory is used to store a computer program that can be run on the processor; The processor is configured to execute the chip verification method according to any one of claims 1 to 8 when running the computer program; Alternatively, the electronic device includes the verification device as claimed in claim 9.

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