Abnormal wafer cause identification system and method

Abstract

The invention relates to an incentive identification system and method for an abnormal wafer. The method comprises the following steps: acquiring an abnormal distribution diagram of the abnormal wafer; the abnormal distribution diagram comprises a defect distribution diagram of the wafer and / or a yield distribution diagram of the wafer; comparing a feature mark of a part contacted with the wafer on the surface of the wafer when a process machine carries out the process with the abnormal distribution diagram, and finding out the feature mark with a similar area with the abnormal position in the abnormal distribution diagram and the part corresponding to the feature mark; and according to the part corresponding to the feature mark, obtaining a process machine and process steps which cause wafer abnormity in the process. According to the invention, the intelligent analysis of the abnormal wafer is realized, the automation degree is improved, and the engineering analysis efficiency is improved.

Description

Technical Field

[0001] The present application relates to semiconductor manufacturing, and in particular to a cause identification system for abnormal wafers, and also to a cause identification method for abnormal wafers. Background Art

[0002] Process quality control is an important control method for high-quality semiconductor operations. In semiconductor manufacturing, there are two common monitoring methods, namely, online inspection site particle monitoring (Inline Particle Defect Monitor), hereinafter referred to as Inline monitoring or online monitoring, and process equipment particle monitoring (Offline Particle Defect QCMonitor), hereinafter referred to as Offline monitoring or equipment monitoring. For online monitoring, please refer to Figure 1 , generally after a process loop is completed, online inspection is performed. For example, the wafer defect inspection system can be used to scan product defects and monitor the stability of the process in real time. For equipment monitoring, please refer to Figure 2 , generally for monitoring the particles of a certain process equipment. For example, a defect scanner can be used to scan the defects of the optical sheet to evaluate the particle situation of a single-step process equipment. Both online monitoring and equipment monitoring can output the defect map (distribution map) of the wafer.

[0003] Before chip packaging, the wafer needs to undergo CP (Chip Probing) testing. CP testing can be performed by automatic test equipment (ATE), and the wafer yield map is output after the test is completed.

[0004] When engineering technicians in a semiconductor manufacturing plant (Fab) perform engineering analysis on wafer feature failure defect maps or yield maps, they need to perform a lot of manual processing and operations, the degree of automation is low, and the engineering analysis is ineffective. Summary of the invention

[0005] Based on this, it is necessary to provide an abnormal wafer cause identification system that can assist engineers in analyzing abnormal wafers (eg, wafers with too low a yield, wafers with too high a defect count, etc.).

[0006] A method for identifying causes of abnormal wafers, comprising: obtaining an abnormal distribution map of the abnormal wafer; the abnormal distribution map includes a defect distribution map of the wafer and / or a yield distribution map of the wafer; comparing characteristic imprints on the surface of a wafer of a component of a process machine that contacts the wafer during a process with the abnormal distribution map, finding characteristic imprints with similar areas to abnormal positions in the abnormal distribution map and components corresponding to the characteristic imprints; and obtaining the process machine and process steps that cause the wafer abnormality in the process according to the components corresponding to the characteristic imprints.

[0007] The above-mentioned abnormal wafer cause identification method can locate the suspicious components, process machines and process steps that are the source of certain types of defects (or chip failures caused by certain types of defects) by comparing the abnormal distribution map with the characteristic imprints on the wafer surface of the components that come into contact with the wafer during the process of each process machine. This realizes the intelligent analysis of abnormal wafers, improves the degree of automation, and improves the efficiency of engineering analysis.

[0008] In one embodiment, the step of finding a characteristic imprint having a similar area to the abnormal position in the abnormal distribution map includes: calculating the similarity between the characteristic imprint and the abnormal position; if the similarity is greater than a preset threshold, determining that the corresponding characteristic imprint has a similar area to the abnormal position in the abnormal distribution map.

[0009] In one of the embodiments, it also includes the step of obtaining the rotation angle information of the wafer in each process machine, and the rotation angle information includes the angle at which the wafer is rotated by the corresponding process machine; the step of finding the characteristic imprint that has a similar area to the abnormal position in the abnormal distribution map includes: after correcting the rotation angle of the characteristic imprint on the wafer surface of the component that contacts the wafer when the process machine is performing the process according to the rotation angle information, the characteristic imprint is compared with the abnormal distribution map to find the characteristic imprint that has a similar area to the abnormal position in the abnormal distribution map and the component corresponding to the characteristic imprint.

[0010] In one of the embodiments, the step of dividing the wafer into a plurality of positioning areas is further included; the step of finding the characteristic imprint that has a similar area to the abnormal position in the abnormal distribution map includes: finding the characteristic imprint that has a similar area to the abnormal position in the abnormal distribution map based on the positioning area where the abnormality is located in the abnormal distribution map and the positioning area where the characteristic imprint is located.

[0011] In one embodiment, the step of dividing the wafer into multiple positioning areas includes gridding the wafer surface to obtain each positioning area; the method also includes associating each contact point of the feature imprint with each positioning area, and identifying and comparing the abnormal distribution map with the contact points of each positioning area.

[0012] In one of the embodiments, the method further includes performing a step of visually displaying the abnormal distribution map in each process step, wherein the orientation of the visually displayed abnormal distribution map is the same as the actual orientation of the wafer in each process step obtained based on the rotation angle information.

[0013] In one of the embodiments, it also includes the step of obtaining wafer sampling information in the measurement rule library, wherein the wafer sampling information includes orientation change information caused by the wafer being sampled; the step of finding the characteristic imprint having a similar area to the abnormal position in the abnormal distribution map includes: according to the rotation angle information and the orientation change information, the characteristic imprint on the wafer surface of the component that contacts the wafer during the process of the process machine is corrected by a rotation angle, and then compared with the abnormal distribution map, so as to find the characteristic imprint having a similar area to the abnormal position in the abnormal distribution map and the component corresponding to the characteristic imprint.

[0014] In one of the embodiments, the step of visually displaying the abnormal distribution map in each process step includes: adjusting the orientation of the visually displayed abnormal distribution map according to the orientation change information.

[0015] In one of the embodiments, the step of shutting down the process tool causing the wafer abnormality is also included.

[0016] In one of the embodiments, the step of obtaining information of a process tool used in the production process of the abnormal wafer is further included, and the step of comparing the characteristic imprints on the wafer surface of the parts of the process tool that contact the wafer during the process with the abnormal distribution map is to only compare the characteristic imprints involved in the process tool used in the production process of the abnormal wafer with the abnormal distribution map.

[0017] It is also necessary to provide a system for identifying the cause of abnormal wafers.

[0018] A cause identification system for abnormal wafers is used to obtain an abnormal distribution map of abnormal wafers; it is also used to compare the characteristic imprints on the wafer surface of the components of the process machine that contact the wafer during the process with the abnormal distribution map, to find the characteristic imprints with similar areas to the abnormal positions in the abnormal distribution map and the components corresponding to the characteristic imprints; and it is used to obtain the process machine and process steps that cause wafer abnormality in the process according to the components corresponding to the characteristic imprints; wherein the abnormal distribution map is obtained from a wafer abnormality system, and the wafer abnormality system includes a defect system and / or a yield system; the characteristic imprints are obtained from a machine feature fingerprint library.

[0019] The above abnormal wafer cause identification system can locate suspicious components, process machines and process steps that are the source of certain types of defects by comparing the abnormal distribution map with the characteristic imprints on the wafer surface of the components that come into contact with the wafer during the process of each process machine. This realizes the intelligent analysis of abnormal wafers, improves the degree of automation, and improves the efficiency of engineering analysis.

[0020] In one of the embodiments, the system is further used to calculate the similarity between the characteristic imprint and the abnormal position; if the similarity is greater than a preset threshold, it is determined that the corresponding characteristic imprint and the abnormal position in the abnormal distribution map have a similar area.

[0021] In one of the embodiments, the system is also used to obtain the rotation angle information of the wafer in each process tool, and the rotation angle information includes the angle at which the wafer is rotated by the corresponding process tool; the system corrects the rotation angle of the characteristic imprint on the wafer surface of the component that contacts the wafer when the process tool is performing the process according to the rotation angle information, and then compares it with the abnormal distribution map to find the characteristic imprint in a similar area to the abnormal position in the abnormal distribution map and the component corresponding to the characteristic imprint.

[0022] In one embodiment, the system is also used to divide the wafer into multiple positioning areas; the system finds the characteristic imprint that has a similar area to the abnormal position in the abnormal distribution map based on the positioning area where the anomaly is located in the abnormal distribution map and the positioning area where the characteristic imprint is located.

[0023] In one embodiment, the system divides the wafer into multiple positioning areas, including gridding the wafer surface to obtain each positioning area; the system is also used to associate each contact point of the feature imprint with each positioning area, and to identify and compare the abnormal distribution map with the contact points of each positioning area.

[0024] In one embodiment, the system is further used to visualize the abnormal distribution map in each process step, and the orientation of the abnormal distribution map in the visual display is the same as the actual orientation of the process tool of the wafer in each process step obtained based on the rotation angle information.

[0025] In one of the embodiments, the system is also used to obtain wafer sampling information in the measurement rule library, and the wafer sampling information includes orientation change information caused by the wafer being sampled; the system corrects the rotation angle of the characteristic imprint on the wafer surface of the component that contacts the wafer when the process machine is performing the process based on the rotation angle information and the orientation change information, and then compares the result with the abnormal distribution map, so as to find the characteristic imprint in a similar area to the abnormal position in the abnormal distribution map and the component corresponding to the characteristic imprint.

[0026] In one of the embodiments, the system performs a visual display of the abnormal distribution map in each process step, including adjusting the orientation of the visually displayed abnormal distribution map according to the orientation change information.

[0027] In one embodiment, the system is further used to shut down the process tool that causes the wafer abnormality.

[0028] It is also necessary to provide a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the steps in the method of any of the above embodiments are implemented.

[0029] It is also necessary to provide a computer device, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the steps in the method described in any of the above embodiments are implemented.

[0030] It is also necessary to provide a computer program product, comprising a computer program, which, when executed by a processor, implements the steps of the method described in any of the above embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more drawings. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the embodiments and / or examples currently described, and the best modes of these inventions currently understood.

[0032] Figure 1 is a flow chart of a method for identifying causes of abnormal wafers in one embodiment of the present application;

[0033] Figure 2 It is a schematic diagram of the contact between components and wafers when each process machine is performing a process in one embodiment of the present application;

[0034] Figure 3a is a schematic diagram of gridding a wafer surface in one embodiment of the present application;

[0035] Figure 3b This is an example of the content of the size schematic diagram table stored in the machine fingerprint feature library in one embodiment of the present application;

[0036] Figure 4a and Figure 4b This is an example of visually displaying and locating suspicious components in an embodiment of the present application;

[0037] Figure 5a and Figure 5b This is an example of visually displaying and locating suspicious components in another embodiment of the present application;

[0038] Figure 6a and Figure 6b This is an example of visually displaying and locating suspicious components in another embodiment of the present application;

[0039] Figure 7 is a flow chart of a method for identifying causes of abnormal wafers in another embodiment of the present application;

[0040] Figure 8 It is the architecture framework of the machine fingerprint analysis system in one embodiment of the present application;

[0041] Figure 9a This is a schematic diagram of particle monitoring at an online inspection station. Figure 9b It is a schematic diagram of particle monitoring in process equipment. DETAILED DESCRIPTION

[0042] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0044] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there may be no intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be represented as a second element, component, region, layer or part.

[0045] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0046] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0047] In an exemplary semiconductor manufacturing plant (Fab), the yield system (YMS, Yield Management System) covers yield data, yield distribution map (Yield Map) and other information, providing support for engineers and technicians to perform yield analysis. The defect system (DMS, Defect Management System) covers defect data, defect distribution map (Defect Map) and other information, providing support for engineers and technicians to perform defect analysis. The fault detection classification system (FDC, Fault Detection Classification) system is used for process monitoring and path analysis of process equipment. The production system is used to automatically manage production process equipment. However, these systems usually work independently and have poor collaboration and seamless integration capabilities. When engineers and technicians perform engineering analysis on the defect map or yield map of the wafer (Wafer), they usually need to manually obtain relevant information across databases, which makes the engineering analysis less effective.

[0048] The present application proposes a method for identifying the cause of abnormal wafers, comprising the following steps:

[0049] S110, obtaining an abnormal distribution map of abnormal wafers.

[0050] The abnormal distribution map includes a defect distribution map and / or a yield distribution map of abnormal wafers.

[0051] S120, comparing the characteristic imprints on the wafer surface of the components that come into contact with the wafer during the process of the process machine with the abnormal distribution map, and finding the characteristic imprints that have similar areas to the abnormal positions in the abnormal distribution map and the components corresponding to the characteristic imprints.

[0052] In one embodiment of the present application, step S120 includes calculating the similarity between the characteristic imprint and the abnormal position. If the similarity is greater than a preset threshold, it is determined that there is a similar area between the corresponding characteristic imprint and the abnormal position in the abnormal distribution map, so that the component corresponding to the characteristic imprint is regarded as a suspicious component.

[0053] S130, obtaining the process machine and process steps causing wafer abnormality during the process according to the component corresponding to the characteristic mark.

[0054] According to the suspicious component found in step S120, it is located at which process step and which process tool the component contacts the surface of the abnormal wafer, so that the corresponding process step and process tool are listed as the cause of the abnormal wafer.

[0055] The above-mentioned abnormal wafer cause identification method can locate the suspicious components, process machines and process steps that are the source of certain types of defects (or chip failures caused by certain types of defects) by comparing the abnormal distribution map with the characteristic imprints on the wafer surface of the components that come into contact with the wafer during the process of each process machine. This realizes intelligent analysis of abnormalities, improves the degree of automation, and improves the efficiency of engineering analysis.

[0056] Figure 2 This is a schematic diagram of the contact between components and wafers when each process machine is performing a process in an embodiment of the present application. Through the refined management of these components (spare parts), we pre-sort out the size schematic diagram of the characteristic imprint of the contact between components (spare parts) and wafers.

[0057] In one embodiment of the present application, the inducement identification method further includes the step of dividing the wafer into a plurality of positioning areas, and accordingly, the abnormal distribution map of the wafer is also divided into the same plurality of positioning areas. Positioning the suspicious component includes positioning in combination with the positioning area where the abnormality is located in the abnormal distribution map and the positioning area where the characteristic imprint is located. In one embodiment of the present application, the step of dividing the wafer into a plurality of positioning areas includes gridding the surface of the wafer to obtain each positioning area. Figure 3a The embodiment shown is a positioning area grid (ie, 9 grids S1 to S9 ) obtained by gridding the average area of ​​9 regions on the wafer surface.

[0058] In one embodiment of the present application, the database storing the dimension diagram of the feature imprint is called a machine fingerprint feature database. Figure 3b This is an example of the content of the size diagram table stored in the machine fingerprint feature library in one embodiment of the present application.

[0059] In one embodiment of the present application, the inducement identification method also includes the step of obtaining the angle information of the wafer in each process machine, the angle information includes the angle at which the wafer is rotated by the corresponding process machine, and the positioning of the suspicious component also needs to be carried out in combination with the angle information, that is, according to the angle information, the characteristic imprint of the component in contact with the wafer on the surface of the wafer of the process machine during the process is corrected by the rotation angle, and then compared with the abnormal distribution map, so as to find the characteristic imprint with a similar area to the abnormal position in the abnormal distribution map and the component corresponding to the characteristic imprint. In one embodiment of the present application, the angle information is stored in the machine angle library. When the wafer is in each process, due to the process characteristics, the process machine will automatically adjust the angle of the wafer, thereby generating an angle rotation. The angle is related to the characteristics of the process machine, and the angle law is usually customized. Table 1 is an example of the angle information stored in the machine angle library in one embodiment of the present application. Notch Location refers to the orientation of the wafer notch after the process step is completed. For example, in Table 1, 6 means the Notch (wafer notch) is facing the 6 o'clock direction, 12 means the Notch is facing the 12 o'clock direction, and X means that this column is left blank because the Notch orientation remains unchanged. Eqp type indicates the equipment type of the process machine.

[0060]

[0061] Table 1

[0062] In one embodiment of the present application, the inducement identification method further includes the step of obtaining wafer sampling information in the measurement rule library, and the wafer sampling information includes orientation change information caused by the wafer being sampled. Wafer sampling refers to the detection step of the wafer in the process, which is a sampling inspection performed according to statistical concepts, such as selecting the 24th wafer for thickness testing after the etching step; selecting the 1st and 2nd wafers for defect testing after photolithography, etc. The measurement rules are generally formulated by the process integration department of each Fab and have certain universality and characteristics. There will be differences in the Notch angle of the wafer sampled and the wafer sampled for detection. Therefore, in one embodiment of the present application, the positioning of the suspicious component also needs to be combined with the orientation change information, that is, according to the angle information and the orientation change information, the characteristic imprint of the component in contact with the wafer on the wafer surface of the process machine during the process is rotated and corrected, and then compared with the abnormal distribution map, so as to find the characteristic imprint with a similar area to the abnormal position in the abnormal distribution map and the component corresponding to the characteristic imprint.

[0063] In one embodiment of the present application, the inducement identification method also includes the step of visually displaying the abnormal distribution map of the wafer in each process step, and the orientation of the visually displayed abnormal distribution map of the wafer is the same as the actual orientation of the wafer in each process step obtained based on the rotation angle information.

[0064] In one embodiment of the present application, the orientation of the visually displayed abnormal distribution map of the wafer is determined in combination with orientation change information in a measurement rule library.

[0065] Figure 4a and Figure 4b is an example of visually displaying and locating suspicious components in one embodiment of the present application, wherein Figure 4b The yield map of a batch of abnormal wafers to be analyzed. Figure 4a and Figure 4b In the example, each batch of wafers is simplified to 3 pieces (in actual production, the number of wafers in each batch will be more). The short line segment on the map in the figure indicates the location of the failed die (DIE). In one embodiment of the present application, the short line segment on the map is the yield failure caused by scratch defects. Figure 4b The orientation of the Notch and the location of the failed DIE (grid S7) can be used to locate the process step that causes the wafer abnormality. Figure 4a Step 1 in , and the suspected component is Figure 3b Spare part 1 of the "Diffusion 1" process tool. The dark grid in the "Map Visualization List" indicates that there are wafers with a single change in the Notch direction in this process step, such as Figure 4a In the wafer of process step 2, the Notch orientation of wafer number 01 is changed to the 9 o'clock direction alone.

[0066] Figure 5a and Figure 5b is an example of visually displaying and locating suspicious components in another embodiment of the present application, wherein Figure 5b This is the yield map of a batch of abnormal wafers to be analyzed. You can see Figure 5b The failure position of one wafer (namely wafer No. 01) is inconsistent with the other wafers. Based on the above-mentioned cause identification method, it can be known that after the process of process machine No. 1 in process step 2, the Notch orientation of wafer No. 01 changes from 6 o'clock to 9 o'clock. Then the next step of process step 2, process step 3, is located as the process step that causes the wafer abnormality, and the suspicious component is Figure 3b Spare parts 1 for the "dry etching 1" process machine.

[0067] Figure 6a and Figure 6b is an example of visually displaying and locating suspicious components in another embodiment of the present application, wherein Figure 6bThis is the yield map of a batch of abnormal wafers to be analyzed. You can see Figure 6b The failure position of one wafer (namely wafer No. 03) is inconsistent with the other wafers. Based on the above-mentioned cause identification method, it can be known that after the process of process machine of measurement 3 in process step 6, the Notch orientation of wafer No. 03 changes from 8 o'clock to 3 o'clock, so the next step of process step 6 - process step 7 is located as the process step causing the wafer abnormality, and the suspicious component is spare part 1 of the "dry etching" equipment unit.

[0068] In one embodiment of the present application, after locating the process tool and process step whose components cause wafer abnormality, the corresponding process tool can be shut down.

[0069] Figure 7 : is a flow chart of a method for identifying causes of abnormal wafers in another embodiment of the present application, comprising the following steps:

[0070] S710, obtaining the production batch number of the wafer.

[0071] The production lot number of the wafer to be analyzed can be entered at the input of the system.

[0072] S720, retrieve the process path of the wafer and the process machine to be used according to the batch number.

[0073] In one embodiment of the present application, the process path of the wafer, the process tools and chambers used in the production process, etc. are retrieved from the FDC system.

[0074] S730, retrieve the corner information of the wafer in each process machine according to the batch number.

[0075] In one embodiment of the present application, the rotation angle information is retrieved from a tool rotation angle library, and the rotation angle information includes the angle at which the wafer is rotated by the corresponding process tool.

[0076] S740, obtaining the orientation of the wafer in each process machine according to the rotation angle information.

[0077] In one embodiment of the present application, the angle data corresponding to the process machine and the cavity in the angle information are associated to obtain the Notch direction of each process step, that is, the physical direction of the Map.

[0078] S750, retrieve the abnormal distribution map of the wafer according to the batch number.

[0079] In one embodiment of the present application, the yield map data is retrieved from the YMS, and the defect map data is retrieved from the DMS.

[0080] S752, visually display the abnormal distribution diagram in each process step.

[0081] In one embodiment of the present application, the orientation of the abnormal distribution map of the wafer displayed visually is the same as the actual orientation of the wafer in each process step obtained based on the rotation angle information. Figure 4a , 5a , the Map visualization list in 6a is finally visualized through the output end of the system.

[0082] S760, dividing the wafer into a plurality of positioning areas.

[0083] In one embodiment of the present application, the wafer surface is gridded to obtain various positioning areas. Figure 3a The embodiment shown is a positioning area grid (ie, 9 grids S1 to S9 ) obtained by gridding the average area of ​​9 regions on the wafer surface.

[0084] S770, locate the suspicious component by combining the location area where the abnormality and the characteristic mark are located.

[0085] Retrieve the characteristic imprints on the wafer surface of the components that contact the wafer during the process of each process machine in the machine fingerprint feature library, and perform an automatic comparison and calculation with the abnormal distribution map of the wafer based on the fingerprint feature library and the machine corner library. In one embodiment of the present application, the yield Map and the defect Map are first gridded with the average area of ​​9 regions to obtain 9 positioning areas, and each positioning area is associated with the contact point data in the machine fingerprint feature library, and each contact point is regressed to 9 positioning areas. Then, the yield Map and the defect Map are identified and compared with the contact point trajectories of the 9 positioning areas in the machine fingerprint feature library (contact gridding calculation) to obtain the corresponding relevant component information in the machine fingerprint feature library. Finally, the output end of the system realizes the automatic generation of a visualization list of failure maps and a list of suspicious machines, and the suspicious machine can automatically trigger a shutdown command.

[0086] In one embodiment of the present application, the aforementioned method for identifying the cause of abnormal wafers may be performed using a computer program.

[0087] It should be understood that, although the various steps in the flowchart of the present application are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the present application may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0088] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory or optical memory, etc. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0089] The present application also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps in the method described in any of the above embodiments are implemented.

[0090] The present application also provides a computer device, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the steps in the method described in any of the above embodiments are implemented.

[0091] The present application also provides a computer program product, including a computer program, which implements the steps of the method described in any of the above embodiments when executed by a processor.

[0092] The present application accordingly provides a cause identification system for abnormal wafers, which can also be called a machine fingerprint analysis system (FPS, Finger Print System). Figure 8 It is the framework of the machine fingerprint analysis system 800 in one embodiment of the present application. The machine fingerprint analysis system 800 is used to obtain the abnormal distribution map of abnormal wafers; it is also used to compare the characteristic imprints on the wafer surface of the parts of the process machine that contact the wafer during the process with the abnormal distribution map, find the characteristic imprints in the similar area to the abnormal position in the abnormal distribution map and the parts corresponding to the characteristic imprints; and it is used to obtain the process machine and process steps that cause wafer abnormalities in the process according to the parts corresponding to the characteristic imprints. The abnormal distribution map is obtained according to the wafer abnormality system. Figure 8In the illustrated embodiment, the wafer anomaly system includes a defect system 930 and a yield system 940. The process tool used in the wafer production process is acquired through the FDC system 910; the feature imprint is acquired through the tool feature fingerprint library 810.

[0093] In one embodiment of the present application, the machine fingerprint analysis system 800 is also used to obtain the rotation angle information of the wafer in each process machine from the machine rotation angle library 820. The rotation angle information includes the angle at which the wafer is rotated by the corresponding process machine. The machine fingerprint analysis system 800 corrects the rotation angle of the characteristic imprint on the surface of the wafer of the component in contact with the wafer when the process is performed by the process machine according to the rotation angle information, and then compares it with the abnormal distribution map, so as to find the characteristic imprint with a similar area to the abnormal position in the abnormal distribution map and the component corresponding to the characteristic imprint.

[0094] In one embodiment of the present application, the machine fingerprint analysis system 800 is further used to divide the wafer into a plurality of positioning areas. The positioning includes positioning in combination with the positioning area where the abnormality is located in the abnormality distribution map and the positioning area where the characteristic mark is located.

[0095] In one embodiment of the present application, the machine fingerprint analysis system 800 is also used to visualize the abnormal distribution map in each process step. The orientation of the abnormal distribution map in the visual display is the same as the actual orientation of the wafer in each process step obtained according to the rotation angle information.

[0096] In one embodiment of the present application, the machine fingerprint analysis system 800 is also used to obtain wafer sampling information from the measurement rule library 830. The wafer sampling information includes orientation change information caused by the wafer being sampled, and the positioning also needs to be performed in combination with the orientation change information. In one embodiment of the present application, the orientation of the visually displayed abnormal distribution map is determined in combination with the orientation change information.

[0097] In one embodiment of the present application, when the machine fingerprint analysis system 800 is working, it first inputs the production batch number of the wafer to be analyzed through the input end, and then retrieves the process path of the wafer, the process machine and chamber used in the production process and other data from the FDC system, retrieves the yield map data from the yield system 940, retrieves the defect map data from the defect system 930, retrieves the characteristic imprints of the components of each process machine that contact the wafer on the wafer surface during the process from the machine fingerprint feature library 810, and retrieves the corner information from the machine corner library 820. Then, based on the fingerprint feature library 810 and the machine corner library 820, an automatic comparison calculation is performed with the defect map and / or yield map. Specifically, the yield map and defect map are first gridded with the average area of ​​9 regions to obtain 9 positioning regions, and each positioning region is associated with the contact point data in the machine fingerprint feature library, and each contact point is regressed to 9 positioning regions. Then, the yield map and defect map are identified and compared with the contact point trajectories of the 9 positioning areas in the machine fingerprint feature library to obtain the corresponding relevant component information in the machine fingerprint feature library. Finally, the failure map visualization list and the suspicious machine list are automatically generated at the output end of the system, and a shutdown command is sent to the suspicious machine through the production system 920. The abnormal wafer cause identification system of this application is based on big data analysis, with an improved degree of automation, intelligent analysis, timely shutdown, reduced impact breadth, and improved engineering analysis efficiency.

[0098] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0099] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0100] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A method for identifying the cause of abnormal wafers, characterized in that: include: Obtaining an abnormal distribution map of abnormal wafers; The abnormal distribution map includes a defect distribution map of the wafer and / or a yield distribution map of the wafer; Compare the characteristic imprints on the wafer surface of the components of the process machine that are in contact with the wafer during the process with the abnormal distribution map, and find the characteristic imprints with similar areas to the abnormal positions in the abnormal distribution map and the components corresponding to the characteristic imprints; According to the components corresponding to the characteristic marks, the process tools and process steps causing wafer abnormality in the process are obtained.

2. The method for identifying the cause of abnormal wafer according to claim 1, characterized in that: The method further includes the step of obtaining rotation angle information of the wafer at each process tool, wherein the rotation angle information includes an angle at which the wafer is rotated by the corresponding process tool; The step of finding out the characteristic imprints that exist in similar areas to the abnormal positions in the abnormal distribution map includes: correcting the rotation angle of the characteristic imprints on the wafer surface of the components of the process machine that contact the wafer during the process according to the rotation angle information, and then comparing them with the abnormal distribution map, so as to find out the characteristic imprints that exist in similar areas to the abnormal positions in the abnormal distribution map and the components corresponding to the characteristic imprints.

3. The method for identifying the cause of abnormal wafer according to claim 1, characterized in that: The step of dividing the wafer into a plurality of positioning areas is also included; The step of finding a characteristic imprint having a similar area to the abnormal position in the abnormal distribution map includes: finding a characteristic imprint having a similar area to the abnormal position in the abnormal distribution map according to a positioning area where the abnormality is located in the abnormal distribution map and a positioning area where the characteristic imprint is located.

4. The method for identifying the cause of abnormal wafer according to claim 2, characterized in that: The method further includes a step of visually displaying the abnormal distribution map in each process step, wherein the orientation of the visually displayed abnormal distribution map is the same as the actual orientation of the wafer in each process step obtained according to the rotation angle information.

5. The method for identifying the cause of abnormal wafer according to claim 4, characterized in that: The method further includes the step of obtaining wafer sampling information in a measurement rule library, wherein the wafer sampling information includes orientation change information caused by wafer sampling; The step of finding out the characteristic imprints that exist in similar areas to the abnormal positions in the abnormal distribution map includes: according to the rotation angle information and the orientation change information, correcting the rotation angle of the characteristic imprints on the wafer surface of the components of the process machine that contact the wafer during the process, and then comparing them with the abnormal distribution map, so as to find out the characteristic imprints that exist in similar areas to the abnormal positions in the abnormal distribution map and the components corresponding to the characteristic imprints.

6. The method for identifying the cause of abnormal wafer according to claim 5, characterized in that: The step of visually displaying the abnormal distribution map in each process step includes: adjusting the orientation of the visually displayed abnormal distribution map according to the orientation change information.

7. The method for identifying causes of abnormal wafers according to claim 1, characterized in that: The step of finding a characteristic imprint having a similar area to the abnormal position in the abnormal distribution map comprises: Calculating the similarity between the characteristic imprint and the abnormal position; If the similarity is greater than a preset threshold, it is determined that there is a similar area between the corresponding characteristic imprint and the abnormal position in the abnormal distribution map.

8. A system for identifying causes of abnormal wafers, characterized in that: Used to obtain an abnormal distribution map of abnormal wafers; also used to compare the characteristic imprints on the wafer surface of the components of the process machine that are in contact with the wafer during the process with the abnormal distribution map, to find the characteristic imprints with similar areas to the abnormal positions in the abnormal distribution map and the components corresponding to the characteristic imprints; and used to obtain the process machine and process steps that cause the wafer abnormality in the process according to the components corresponding to the characteristic imprints; Among them, the abnormal distribution map is obtained from a wafer abnormality system, and the wafer abnormality system includes a defect system and / or a yield system; the feature imprint is obtained from a machine feature fingerprint library.

9. A computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps in the method according to any one of claims 1 to 7.

Images