Three-phase inverter, current sampling method thereof and motor device

Abstract

The invention discloses a three-phase inverter and a current sampling method thereof, and a motor device. The three-phase inverter comprises a three-phase inverter circuit; according to the current sampling module, the first end of a first resistor is electrically connected with the first phase bridge arm, the first end of a second resistor is electrically connected with the second phase bridge arm, the first end of a third resistor is electrically connected with the third phase bridge arm, and the second ends of the first resistor, the second resistor and the third resistor are jointly electrically connected with the first end of a fourth resistor. The second end of the fourth resistor is electrically connected with one end of the direct-current bus; the first ends of the first resistor, the second resistor and the third resistor are respectively and electrically connected with the first input end of the operational amplifier through a switch tube, and the second ends of the first resistor, the second resistor and the third resistor are jointly and electrically connected with the second input end of the operational amplifier through a switch tube; the second end of the fourth resistor is electrically connected with the first input end of the operational amplifier through a switching tube.

Description

Technical Field

[0001] The present application relates to the field of motor control, and in particular to a three-phase inverter and a current sampling method thereof, and a motor device. Background Art

[0002] In the process of controlling the three-phase inverter using the SVPWM (Space Vector Pulse Width Modulation) strategy, a key technical link is the sampling of the three-phase current. Whether it is sensory FOC (field-oriented control) or sensorless FOC, the phase current is the key to the coordinate transformation of the AC three-phase synchronous motor, and ultimately the synchronous rotation of the motor rotor magnetic field and stator magnetic field is achieved through SVPWM.

[0003] In the related art, there are many three-phase current sampling schemes. Figure 1 As shown, a three-resistance sampling scheme in the related art is required. In this scheme, four operational amplifiers are required, which is costly. In addition, due to problems with the semiconductor manufacturing process, the amplification curves of different operational amplifiers are different. Using multiple operational amplifiers to sample current will cause current curve restoration distortion. Summary of the invention

[0004] The purpose of this application is to provide a technical solution to solve the problems of high production cost of three-phase current sampling solutions in practical engineering applications and current distortion caused by inconsistent operational amplifier circuits in current sampling circuits.

[0005] In order to solve the deficiencies of the prior art, this application adopts the following technical solutions: A three-phase inverter, comprising: The three-phase inverter circuit comprises three bridge arms arranged between the positive and negative busbars, and two switch tubes are arranged in series on any bridge arm; A current sampling module, the current sampling module comprising: a first resistor, a second resistor, a third resistor and a fourth resistor, wherein a first end of the first resistor is electrically connected to the first-phase bridge arm, a first end of the second resistor is electrically connected to the second-phase bridge arm, a first end of the third resistor is electrically connected to the third-phase bridge arm, and second ends of the first resistor, the second resistor and the third resistor are commonly electrically connected to a first end of the fourth resistor, and a second end of the fourth resistor is electrically connected to one end of a DC bus; An operational amplifier, wherein the first ends of the first resistor, the second resistor, and the third resistor are respectively electrically connected to the first input end of the operational amplifier through a switch tube, the second ends of the first resistor, the second resistor, and the third resistor are commonly electrically connected to the second input end of the operational amplifier through a switch tube, and the second end of the fourth resistor is electrically connected to the first input end of the operational amplifier through a switch tube.

[0006] Furthermore, the current sampling module is arranged between the lower bridge arm of the three-phase inverter circuit and the negative end of the bus.

[0007] Furthermore, the current sampling module is arranged between the upper bridge arm of the three-phase inverter circuit and the positive end of the busbar.

[0008] Furthermore, the current sampling module is arranged between the output end of the bridge arm of the three-phase inverter circuit and the negative end of the bus.

[0009] The present application also provides a current sampling method for a three-phase inverter circuit, the current sampling method is applied to the three-phase inverter as described above, and the current sampling method includes: Controlling the conduction of the switch tube electrically connected to the second input terminal of the operational amplifier, and controlling exclusive conduction between the switch tubes electrically connected to the first input terminal of the operational amplifier; In response to any switch tube electrically connected to the first input terminal of the operational amplifier being turned on, the operational amplifier collects the phase current or bus current of the phase corresponding to the turned-on switch tube.

[0010] Furthermore, the current sampling module is arranged between the lower bridge arm of the three-phase inverter circuit and the negative end of the bus, and the sampling timing of the operational amplifier for current sampling is: all the three-phase lower bridge arms of the three-phase inverter circuit are turned on.

[0011] Furthermore, the three-phase inverter circuit adopts SVPWM modulation, and the current sampling method also includes: The SVPWM output waveform is adjusted so that the conduction pulse width of the three-phase lower bridge arm of the three-phase inverter circuit is greater than four times the minimum lower bridge arm conduction time required for sampling.

[0012] Furthermore, the current sampling module is arranged between the upper bridge arm of the three-phase inverter circuit and the positive end of the busbar, and the sampling timing of the operational amplifier for current sampling is: all the three-phase upper bridge arms of the three-phase inverter circuit are turned on.

[0013] Furthermore, the current sampling method further includes: The bus current value collected by the operational amplifier is positively processed.

[0014] The present application also provides a motor device, characterized in that it includes a three-phase motor and a three-phase inverter for outputting SVPWM to drive the three-phase motor to work, the three-phase inverter adopts the three-phase inverter described above, and adopts the current sampling method described above.

[0015] The three-phase inverter provided in this application uses four resistors and a single operational amplifier. Compared with the three-resistance sampling scheme in the related art, the number of operational amplifiers OP21 used is reduced. The implementation of this scheme is simple and can solve the problem of poor consistency caused by multiple operational amplifiers. Ultimately, the production cost can be greatly reduced while ensuring performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A schematic diagram of a three-phase current sampling scheme with three resistors in the related art; Figure 2 It is a schematic diagram of a three-phase current sampling scheme of dual resistors in the related art; Figure 3 It is a schematic diagram of a three-phase current sampling scheme of a single resistor in the related art; Figure 4 A schematic diagram of a three-phase inverter provided in Embodiment 1 of the present application; Figure 5 A schematic diagram of current sampling timing of a three-phase inverter provided in Embodiment 1 of the present application; Figure 6 A schematic diagram of a three-phase inverter provided in Embodiment 2 of the present application; Figure 7 A schematic diagram of current sampling timing of a three-phase inverter provided in Embodiment 2 of the present application; Figure 8 A schematic diagram of a three-phase inverter provided in Embodiment 3 of the present application; Fig. 9 A schematic diagram of current sampling timing of a three-phase inverter provided in Embodiment 3 of the present application; Fig.10 A schematic diagram of a three-phase inverter provided in Embodiment 4 of the present application; Fig.11 A schematic diagram of current sampling timing of a three-phase inverter provided in Embodiment 4 of the present application. DETAILED DESCRIPTION

[0017] The present application will be described in detail below in conjunction with the specific implementation modes shown in the accompanying drawings, but these implementation modes do not limit the present application. Structural, methodological, or functional changes made by ordinary technicians in the field based on these implementation modes are included in the protection scope of the present application.

[0018] like Figure 1As shown, a three-resistance sampling scheme in the related art is required. In this scheme, four operational amplifiers are required, which is costly. In addition, due to problems with the semiconductor manufacturing process, the amplification curves of different operational amplifiers are different. Using multiple operational amplifiers to sample current will cause current curve restoration distortion.

[0019] like Figure 2 As shown in the figure, a dual-resistance sampling scheme in the related art is used. In this scheme, two sampling resistors and two operational amplifiers are used. Because the current is sampled only when the lower tube is fully turned on, the PWM utilization rate cannot reach 100%. Because the dual resistor cannot avoid the window time, it is necessary to limit the duty cycle of the final PWM to reserve enough time for ADC conversion.

[0020] like Figure 3 As shown in the figure, it is a single resistor sampling scheme in the related art, in which only one sampling resistor and one operational amplifier are used. Single resistor sampling requires two samplings in one PWM cycle. Next, it is necessary to classify the phase current in the six sectors of SVPWM, analyze the principle of SVPWM, and then reconstruct the current. The current reconstruction algorithm is relatively complicated.

[0021] Table 1 is a comparison of current sampling schemes in related technologies.

[0022]

[0023] According to the above comparison, it can be seen that the phase current sampling schemes of the three-phase inverter in the related art have some defects, and it is necessary to improve the phase current sampling schemes of the three-phase inverter.

[0024] In this regard, the present application improves the phase current sampling scheme of the three-phase inverter based on the idea of ​​time-sharing multiplexing of operational amplifiers, reduces the number of operational amplifiers used, solves the problem of poor consistency caused by multiple operational amplifiers, and ultimately significantly reduces costs while ensuring performance.

[0025] Embodiment 1 The present application provides a three-phase inverter circuit, the three-phase inverter comprising: The three-phase inverter circuit comprises three bridge arms arranged between the positive and negative busbars, and two switch tubes are arranged in series on any bridge arm; Current sampling module, the current sampling module includes: a first resistor, a second resistor, a third resistor and a fourth resistor, wherein a first end of the first resistor is electrically connected to the first-phase bridge arm, a first end of the second resistor is electrically connected to the second-phase bridge arm, a first end of the third resistor is electrically connected to the third-phase bridge arm, and second ends of the first resistor, the second resistor and the third resistor are commonly electrically connected to a first end of the fourth resistor, and a second end of the fourth resistor is electrically connected to one end of the DC bus; A first operational amplifier and a second operational amplifier, first ends of the first resistor, the second resistor, and the third resistor are electrically connected to the first input terminal of the first operational amplifier through a switch tube, the second ends of the first resistor, the second resistor, and the third resistor are electrically connected to the second input terminal of the first operational amplifier, and the second input terminal of the first operational amplifier is electrically connected to the first input terminal of the second operational amplifier, and the second end of the fourth resistor is electrically connected to the second input terminal of the second operational amplifier.

[0026] Specifically, Figure 4 As shown, in one embodiment, the current sampling module is arranged between the lower bridge arm of the three-phase inverter circuit and the negative end of the bus.

[0027] That is, the first end of the first resistor R11 is electrically connected to the lower bridge arm of the first phase, the first end of the second resistor R12 is electrically connected to the lower bridge arm of the second phase, the first end of the third resistor R13 is electrically connected to the lower bridge arm of the third phase, and the second ends of the first resistor R11, the second resistor R12 and the third resistor R13 are commonly electrically connected to the first end of the fourth resistor R14, and the second end of the fourth resistor R14 is electrically connected to the negative end of the DC bus.

[0028] The first end of the first resistor R11 is electrically connected to the first input end of the first operational amplifier OP11 through the switch tube S11, the first end of the second resistor R12 is electrically connected to the first input end of the first operational amplifier OP11 through the switch tube S12, and the first end of the third resistor R13 is electrically connected to the first input end of the first operational amplifier OP11 through the switch tube S13; the second ends of the first resistor R11, the second resistor R12, and the third resistor R13 are electrically connected to the second input end of the first operational amplifier OP11. In addition, the second input end of the first operational amplifier OP11 is electrically connected to the first input end of the second operational amplifier OP12, and the second end of the fourth resistor R14 is electrically connected to the second input end of the second operational amplifier OP12.

[0029] Based on the three-phase inverter provided in the first embodiment of the present application, a current sampling method for a three-phase inverter circuit is provided, which is specifically as follows: Controlling exclusive conduction between the switch tubes electrically connected to the first input terminal of the first operational amplifier OP11; In response to any switch tube electrically connected to the first input terminal of the first operational amplifier OP11 being turned on, the first operational amplifier OP11 collects the phase current of the phase corresponding to the turned-on switch tube.

[0030] Specifically, the sampling timing of the first operational amplifier OP11 for current sampling is: the three-phase lower bridge arms of the three-phase inverter circuit are all turned on (at this time, the upper bridge arm switch tubes of the three-phase inverter circuit are all turned off, and the lower bridge arm switch tubes are all turned on). Figure 5As shown, the current sampling timing of the three-phase inverter circuit is shown. It is required to adjust the SVPWM output waveform so that the conduction pulse width of the three-phase lower bridge arm of the three-phase inverter circuit is greater than three times the minimum lower bridge arm conduction time required for sampling. Among them, the minimum lower bridge arm conduction time required for sampling refers to the shortest time required for the operational amplifier to sample the phase current of any phase line.

[0031] Based on the three-phase inverter provided in the first embodiment of the present application, different switch tubes in the current sampling module are controlled to close at different times, so as to stably sample the required phase line current and bus circuit.

[0032] As shown in Table 2, it shows the switch tube status of the current sampling module at different times in the first embodiment of the present application.

[0033]

[0034] According to Table 2, at time T0, the switch tube S11 is turned on, and the switch tubes S12 and S13 are turned off, so as to sample and obtain the A-phase current (the A-phase current is recorded as Ia). At time T1, the switch tube S12 is turned on, and the switch tubes S11 and S13 are turned off, so as to sample and obtain the B-phase current (the B-phase current is recorded as Ib). At time T2, the switch tube S13 is turned on, and the switch tubes S11 and S12 are turned off, so as to sample and obtain the C-phase current (the C-phase current is recorded as Ic). According to the three-phase inverter provided in the present application, at any time, the bus current can be sampled by the second operational amplifier OP12.

[0035] According to the above description, the three-phase inverter provided in the first embodiment of the present application uses four resistors and two operational amplifiers. Compared with the three-resistance sampling scheme in the related art, the number of operational amplifiers used is reduced. The implementation of this scheme is simple and can solve the problem of poor consistency caused by multiple operational amplifiers. Ultimately, the production cost can be greatly reduced while ensuring performance.

[0036] It should be noted that in another optional implementation, the current sampling module can also be arranged between the upper bridge arm of the three-phase inverter circuit and the positive end of the bus. In this implementation, the timing of current sampling is when all the three-phase upper bridge arms of the three-phase inverter circuit are turned on. By controlling different switching tubes in the current sampling module to close at different times, the required phase line current and bus circuit can be stably sampled. When sampling current, the state of the switching tube in the current sampling module can refer to Table 2, which will not be repeated here.

[0037] It is easy to understand that the current sampling module can also be arranged between the output end of the bridge arm of the three-phase inverter circuit and the negative end of the bus.

[0038] Based on the three-phase inverter provided in Example 1 of the present application, the present application also provides a motor device, which includes a three-phase motor and a three-phase inverter for outputting SVPWM to drive the three-phase motor to work. The three-phase inverter is the three-phase inverter of Example 1 of the present application, and adopts the current sampling method of the three-phase inverter circuit provided in Example 1 of the present application.

[0039] Embodiment 2 The present application provides a three-phase inverter circuit, the three-phase inverter comprising: The three-phase inverter circuit comprises three bridge arms arranged between the positive and negative busbars, and two switch tubes are arranged in series on any bridge arm; Current sampling module, the current sampling module includes: a first resistor, a second resistor, a third resistor and a fourth resistor, wherein a first end of the first resistor is electrically connected to the first-phase bridge arm, a first end of the second resistor is electrically connected to the second-phase bridge arm, a first end of the third resistor is electrically connected to the third-phase bridge arm, and second ends of the first resistor, the second resistor and the third resistor are commonly electrically connected to a first end of the fourth resistor, and a second end of the fourth resistor is electrically connected to one end of the DC bus; An operational amplifier, wherein the first ends of the first resistor, the second resistor, and the third resistor are respectively electrically connected to the first input terminal of the operational amplifier through a switch tube, the second ends of the first resistor, the second resistor, and the third resistor are commonly electrically connected to the second input terminal of the operational amplifier through a switch tube, and the second end of the fourth resistor is electrically connected to the first input terminal of the operational amplifier through a switch tube.

[0040] Specifically, Figure 6 As shown, in one embodiment, the current sampling module is arranged between the lower bridge arm of the three-phase inverter circuit and the negative end of the bus.

[0041] That is, the first end of the first resistor R21 is electrically connected to the lower bridge arm of the first phase, the first end of the second resistor R22 is electrically connected to the lower bridge arm of the second phase, the first end of the third resistor R23 is electrically connected to the lower bridge arm of the third phase, and the second ends of the first resistor R21, the second resistor R22 and the third resistor R23 are commonly electrically connected to the first end of the fourth resistor R24, and the second end of the fourth resistor R24 ​​is electrically connected to the negative end of the DC bus.

[0042] The first end of the first resistor R21 is electrically connected to the first input end of the operational amplifier OP21 through the switch tube S21, the first end of the second resistor R22 is electrically connected to the first input end of the operational amplifier OP21 through the switch tube S22, the first end of the third resistor R23 is electrically connected to the first input end of the operational amplifier OP21 through the switch tube S23, and the second ends of the first resistor R21, the second resistor R22, and the third resistor R23 are electrically connected to the second input end of the operational amplifier OP21 through a switch tube S24. In addition, the second end of the fourth resistor R24 ​​is electrically connected to the first input end of the operational amplifier OP21 through a switch tube S25.

[0043] Based on the three-phase inverter provided in the second embodiment of the present application, a current sampling method for a three-phase inverter circuit is provided, which is specifically as follows: Controlling the switch tube electrically connected to the second input terminal of the operational amplifier OP21 to be turned on, and controlling the exclusive conduction between the switch tubes electrically connected to the first input terminal of the operational amplifier OP21; In response to any switch tube electrically connected to the first input terminal of the operational amplifier OP21 being turned on, the operational amplifier OP21 collects the phase current or bus current of the phase corresponding to the turned-on switch tube.

[0044] Specifically, the sampling timing of the operational amplifier OP21 for current sampling is: the three-phase lower bridge arms of the three-phase inverter circuit are all turned on (at this time, the upper bridge arm switch tubes of the three-phase inverter circuit are all turned off, and the lower bridge arm switch tubes are all turned on). Figure 7 As shown, the current sampling timing of the three-phase inverter circuit is shown. It is required to adjust the SVPWM output waveform so that the conduction pulse width of the three-phase lower bridge arm of the three-phase inverter circuit is greater than four times the minimum lower bridge arm conduction time required for sampling. Among them, the minimum lower bridge arm conduction time required for sampling refers to the shortest time required for the operational amplifier OP21 to sample the phase current of any phase line.

[0045] Based on the three-phase inverter provided in the second embodiment of the present application, different switch tubes in the current sampling module are controlled to close at different times, so as to stably sample the required phase line current and bus circuit.

[0046] As shown in Table 3, it shows the switch tube status of the current sampling module at different times in the second embodiment of the present application.

[0047]

[0048] According to Table 3, at time T0, the switch tubes S21 and S24 are turned on, and the switch tubes S22 and S23 are turned off, so as to sample the A-phase current (the A-phase current is recorded as Ia). At time T1, the switch tubes S22 and S24 are turned on, and the switch tubes S21 and S23 are turned off, so as to sample the B-phase current (the B-phase current is recorded as Ib). At time T2, the switch tubes S23 and S24 are turned on, and the switch tubes S21 and S22 are turned off, so as to sample the C-phase current (the C-phase current is recorded as Ic). At time T3, the switch tubes S25 and S24 are turned on, and the switch tubes S21, S22 and S23 are turned off, so as to sample and obtain the bus current (the bus current is recorded as Is. It should be noted that when the switch S24 and the switch S25 are turned on, the direction of the input to the operational amplifier OP21 is reversed, and in actual application, the bus current reading needs to be positive.

[0049] According to the above description, the three-phase inverter provided in the second embodiment of the present application uses four resistors and a single operational amplifier. Compared with the three-resistance sampling scheme in the related art, the number of operational amplifiers OP21 used is reduced. The implementation of this scheme is simple and can solve the problem of poor consistency caused by multiple operational amplifiers. Ultimately, the production cost can be greatly reduced while ensuring performance.

[0050] It should be noted that in another optional implementation, the current sampling module can also be arranged between the upper bridge arm of the three-phase inverter circuit and the positive end of the bus. In this implementation, the timing of current sampling is when all the three-phase upper bridge arms of the three-phase inverter circuit are turned on. By controlling different switching tubes in the current sampling module to close at different times, the required phase line current and bus circuit can be stably sampled. When sampling current, the state of the switching tube in the current sampling module can refer to Table 3, which will not be repeated here.

[0051] It is easy to understand that the current sampling module can also be arranged between the output end of the bridge arm of the three-phase inverter circuit and the negative end of the bus.

[0052] Based on the three-phase inverter provided in Example 2 of the present application, the present application also provides a motor device, which includes a three-phase motor and a three-phase inverter for outputting SVPWM to drive the three-phase motor to work. The three-phase inverter is the three-phase inverter of Example 2 of the present application, and adopts the current sampling method of the three-phase inverter circuit provided in Example 2 of the present application.

[0053] Embodiment 3 The present application provides a three-phase inverter circuit, the three-phase inverter comprising: The three-phase inverter circuit comprises three bridge arms arranged between the positive and negative busbars, and two switch tubes are arranged in series on any bridge arm; Current sampling module, the current sampling module includes: a first resistor, a second resistor and a third resistor, wherein a first end of the first resistor is electrically connected to the first phase bridge arm, a first end of the second resistor is electrically connected to the second phase bridge arm, and second ends of the first resistor and the second resistor are both electrically connected to a first end of the third resistor, a first end of the third resistor is also electrically connected to the third phase bridge arm, and a second end of the third resistor is electrically connected to one end of the DC bus; A first operational amplifier and a second operational amplifier, the first ends of the first resistor and the second resistor are respectively electrically connected to the first input end of the first operational amplifier through a switch tube, the second ends of the first resistor and the second resistor are commonly electrically connected to the second input end of the first operational amplifier, and the second input end of the first operational amplifier is electrically connected to the first input end of the second operational amplifier, and the second end of the third resistor is electrically connected to the second input end of the second operational amplifier.

[0054] Specifically, Figure 8 As shown, in one embodiment, the current sampling module is arranged between the lower bridge arm of the three-phase inverter circuit and the negative end of the bus.

[0055] That is, the first end of the first resistor R31 is electrically connected to the lower bridge arm of the first phase, the first end of the second resistor R32 is electrically connected to the lower bridge arm of the second phase, and the second ends of the first resistor R31 and the second resistor R32 are commonly electrically connected to the first end of the third resistor R33, the first end of the third resistor R33 is also electrically connected to the lower bridge arm of the third phase, and the second end of the third resistor R33 is electrically connected to the negative end of the DC bus.

[0056] The first end of the first resistor R31 is electrically connected to the first input end of the first operational amplifier OP31 through the switch tube S31, the first end of the second resistor R32 is electrically connected to the first input end of the first operational amplifier OP31 through the switch tube S32, and the second ends of the first resistor R31 and the second resistor R32 are electrically connected to the second input end of the first operational amplifier OP31. The second input end of the first operational amplifier OP31 is electrically connected to the first input end of the second operational amplifier OP32, and the second end of the third resistor R33 is electrically connected to the second input end of the second operational amplifier OP32.

[0057] Based on the three-phase inverter provided in the third embodiment of the present application, a current sampling method for a three-phase inverter circuit is provided, which is specifically as follows: Controlling exclusive conduction between the switch tubes electrically connected to the first input terminal of the first operational amplifier OP31; In response to any switch tube electrically connected to the first input terminal of the first operational amplifier OP31 being turned on, the first operational amplifier OP31 collects the phase current of the phase corresponding to the turned-on switch tube.

[0058] Specifically, the sampling timing of the first operational amplifier OP31 for current sampling is: the three-phase lower bridge arms of the three-phase inverter circuit are all turned on (at this time, the upper bridge arm switch tubes of the three-phase inverter circuit are all turned off, and the lower bridge arm switch tubes are all turned on). Fig. 9 As shown, the current sampling timing of the three-phase inverter circuit is shown. It is required to adjust the SVPWM output waveform so that the conduction pulse width of the three-phase lower bridge arm of the three-phase inverter circuit is greater than twice the minimum lower bridge arm conduction time required for sampling. Among them, the minimum lower bridge arm conduction time required for sampling refers to the shortest time required for the operational amplifier to sample the phase current of any phase line.

[0059] Based on the three-phase inverter provided in the third embodiment of the present application, different switch tubes in the current sampling module are controlled to close at different times, so as to stably sample the required phase line current and bus circuit.

[0060] As shown in Table 4, it shows the switch tube status of the current sampling module at different times in the third embodiment of the present application.

[0061]

[0062] According to Table 4, at time T0, the switch tube S31 is turned on and the switch tube S32 is turned off, so as to sample and obtain the B-phase current (the B-phase current is recorded as Ib). At time T1, the switch tube S32 is turned on and the switch tube S31 is turned off, so as to sample and obtain the C-phase current (the C-phase current is recorded as Ic). According to the three-phase inverter provided by the present application, at any time, the bus current can be sampled by the second operational amplifier OP32.

[0063] The phase current of the third phase line can be calculated by the following formula: Ia+Ib+Ic=0; Wherein, Ia represents the third phase current, Ib represents the first phase current, and Ic represents the second phase current.

[0064] It should be noted that in the third embodiment of the present application, the first phase, the second phase and the third phase are only for the convenience of description and there is no specific limitation. For example, phase A can be used as the first phase, or phase A can be used as the second phase, or phase A can also be used as the third phase (the same applies to phases B and C).

[0065] According to the above description, the three-phase inverter provided in the third embodiment of the present application uses three resistors and two operational amplifiers. Compared with the three-resistance sampling scheme in the related art, the number of operational amplifiers used is reduced. The implementation of this scheme is simple and can solve the problem of poor consistency caused by multiple operational amplifiers. Ultimately, the production cost can be greatly reduced while ensuring performance.

[0066] It should be noted that in another optional implementation, the current sampling module can also be arranged between the upper bridge arm of the three-phase inverter circuit and the positive end of the bus. In this implementation, the timing of current sampling is when all the three-phase upper bridge arms of the three-phase inverter circuit are turned on. By controlling different switching tubes in the current sampling module to close at different times, the required phase line current and bus circuit can be stably sampled. When sampling current, the state of the switching tube in the current sampling module can refer to Table 4, which will not be repeated here.

[0067] It is easy to understand that the current sampling module can also be arranged between the output end of the bridge arm of the three-phase inverter circuit and the negative end of the bus.

[0068] Based on the three-phase inverter provided in Example 3 of the present application, the present application also provides a motor device, which includes a three-phase motor and a three-phase inverter for outputting SVPWM to drive the three-phase motor to work. The three-phase inverter is the three-phase inverter of Example 3 of the present application, and adopts the current sampling method of the three-phase inverter circuit provided in Example 3 of the present application.

[0069] Embodiment 4: The present application provides a three-phase inverter circuit, the three-phase inverter comprising: The three-phase inverter circuit comprises three bridge arms arranged between the positive and negative busbars, and two switch tubes are arranged in series on any bridge arm; Current sampling module, the current sampling module includes: a first resistor, a second resistor and a third resistor, wherein a first end of the first resistor is electrically connected to the first phase bridge arm, a first end of the second resistor is electrically connected to the second phase bridge arm, and second ends of the first resistor and the second resistor are both electrically connected to a first end of the third resistor, a first end of the third resistor is also electrically connected to the third phase bridge arm, and a second end of the third resistor is electrically connected to one end of the DC bus; An operational amplifier, the first ends of the first resistor and the second resistor are respectively electrically connected to the first input end of the operational amplifier through a switch tube, the second ends of the first resistor and the second resistor are commonly electrically connected to the second input end of the first operational amplifier through a switch tube, and the second end of the third resistor is electrically connected to the first input end of the operational amplifier through a switch tube.

[0070] Specifically, Fig.10 As shown, in one embodiment, the current sampling module is arranged between the lower bridge arm of the three-phase inverter circuit and the negative end of the bus.

[0071] That is, the first end of the first resistor R41 is electrically connected to the lower bridge arm of the first phase, the first end of the second resistor R42 is electrically connected to the lower bridge arm of the second phase, and the second ends of the first resistor R41 and the second resistor R42 are commonly electrically connected to the first end of the third resistor R43, the first end of the third resistor R43 is also electrically connected to the lower bridge arm of the third phase, and the second end of the third resistor R43 is electrically connected to the negative end of the DC bus.

[0072] The first end of the first resistor R41 is electrically connected to the first input end of the operational amplifier OP41 through the switch tube S41, the first end of the second resistor R42 is electrically connected to the first input end of the operational amplifier OP41 through the switch tube S42, and the second ends of the first resistor R41 and the second resistor R42 are electrically connected to the second input end of the operational amplifier OP41 through the switch tube S43. The second end of the third resistor R43 is electrically connected to the first input end of the operational amplifier OP41 through the switch tube S44.

[0073] Based on the three-phase inverter provided in the fourth embodiment of the present application, a current sampling method for a three-phase inverter circuit is provided, which is specifically as follows: Controlling the switch tube electrically connected to the second input terminal of the operational amplifier OP41 to be turned on, and controlling the exclusive conduction between the switch tubes electrically connected to the first input terminal of the operational amplifier OP41; In response to any switch tube electrically connected to the first input terminal of the operational amplifier OP41 being turned on, the operational amplifier OP41 collects the phase current or bus current of the phase corresponding to the turned-on switch tube.

[0074] Specifically, the sampling timing of the operational amplifier OP41 for current sampling is: the three-phase lower bridge arms of the three-phase inverter circuit are all turned on (at this time, the upper bridge arm switch tubes of the three-phase inverter circuit are all disconnected, and the lower bridge arm switch tubes are all closed). Fig.11 As shown, the current sampling timing of the three-phase inverter circuit is shown. It is required to adjust the SVPWM output waveform so that the conduction pulse width of the three-phase lower bridge arm of the three-phase inverter circuit is greater than three times the minimum lower bridge arm conduction time required for sampling. Among them, the minimum lower bridge arm conduction time required for sampling refers to the shortest time required for the operational amplifier OP41 to sample the phase current of any phase line.

[0075] Based on the three-phase inverter provided in the fourth embodiment of the present application, different switch tubes in the current sampling module are controlled to close at different times, so as to stably sample the required phase line current and bus circuit.

[0076] As shown in Table 5, it shows the switch tube status of the current sampling module at different times in the fourth embodiment of the present application.

[0077]

[0078] According to Table 5, at time T0, the switch tube S41 and the switch tube S43 are turned on, and the switch tube S42 and the switch tube S44 are turned off, so as to sample and obtain the B-phase current (the B-phase current is recorded as Ib). At time T1, the switch tube S42 and the switch tube S43 are turned on, and the switch tube S41 and the switch tube S44 are turned off, so as to sample and obtain the C-phase current (the C-phase current is recorded as Ic). At time T2, the switch tube S43 and the switch tube S44 are turned on, and the switch tube S41 and the switch tube S42 are turned off, so as to sample and obtain the bus current (the bus current is recorded as Is). It should be noted that when the switch S43 and the switch tube S44 are turned on, the direction of the input to the operational amplifier OP41 is reversed, and in actual application, the bus current reading needs to be positive.

[0079] The phase current of the third phase line can be calculated by the following formula: Ia+Ib+Ic=0; Wherein, Ia represents the third phase current, Ib represents the first phase current, and Ic represents the second phase current.

[0080] It should be noted that in the third embodiment of the present application, the first phase, the second phase and the third phase are only for the convenience of description and there is no specific limitation. For example, phase A can be used as the first phase, or phase A can be used as the second phase, or phase A can also be used as the third phase (the same applies to phases B and C).

[0081] According to the above description, the three-phase inverter provided in the fourth embodiment of the present application uses three resistors and a single operational amplifier. Compared with the three-resistance sampling scheme in the related art, the number of operational amplifiers used is reduced. The implementation of this scheme is simple and can solve the problem of poor consistency caused by multiple operational amplifiers. Ultimately, the production cost can be greatly reduced while ensuring performance.

[0082] It should be noted that in another optional implementation, the current sampling module can also be arranged between the upper bridge arm of the three-phase inverter circuit and the positive end of the bus. In this implementation, the timing of current sampling is when all the three-phase upper bridge arms of the three-phase inverter circuit are turned on. By controlling different switching tubes in the current sampling module to close at different times, the required phase line current and bus circuit can be stably sampled. When sampling current, the state of the switching tube in the current sampling module can refer to Table 5, which will not be repeated here.

[0083] It is easy to understand that the current sampling module can also be arranged between the output end of the bridge arm of the three-phase inverter circuit and the negative end of the bus.

[0084] Based on the three-phase inverter provided in Example 4 of the present application, the present application also provides a motor device, which includes a three-phase motor and a three-phase inverter for outputting SVPWM to drive the three-phase motor to work. The three-phase inverter is the three-phase inverter of Example 4 of the present application, and adopts the current sampling method of the three-phase inverter circuit provided in Example 4 of the present application.

[0085] It will be appreciated that the word "exemplary" as used herein means "serving as an example, instance, or illustration". Any embodiment described as "exemplary" is not necessarily preferred or superior to other embodiments and / or does not exclude the combination of features of other embodiments. It will be appreciated that certain features of the present application described in the context of separate embodiments for the sake of clarity may also be provided in a single embodiment by combination. Conversely, various features of the present application described in the context of a single embodiment for the sake of clarity may also be provided individually or in any suitable combination or as any other described embodiment of the present application.

[0086] The above disclosure is only the preferred embodiment of the present application, but it is not intended to limit the scope of rights of the present application. A person of ordinary skill in the art can understand that without departing from the spirit and scope of the present application and the appended claims, changes, modifications, substitutions, combinations, and simplifications should all be equivalent replacement methods and still fall within the scope of the invention.

Claims

1. A three-phase inverter, characterized in that: The three-phase inverter comprises: The three-phase inverter circuit comprises three bridge arms arranged between the positive and negative busbars, and two switch tubes are arranged in series on any bridge arm; A current sampling module, the current sampling module comprising: a first resistor, a second resistor, a third resistor and a fourth resistor, wherein a first end of the first resistor is electrically connected to the first-phase bridge arm, a first end of the second resistor is electrically connected to the second-phase bridge arm, a first end of the third resistor is electrically connected to the third-phase bridge arm, and second ends of the first resistor, the second resistor and the third resistor are commonly electrically connected to a first end of the fourth resistor, and a second end of the fourth resistor is electrically connected to one end of a DC bus; An operational amplifier, wherein the first ends of the first resistor, the second resistor, and the third resistor are respectively electrically connected to the first input end of the operational amplifier through a switch tube, the second ends of the first resistor, the second resistor, and the third resistor are commonly electrically connected to the second input end of the operational amplifier through a switch tube, and the second end of the fourth resistor is electrically connected to the first input end of the operational amplifier through a switch tube.

2. The three-phase inverter according to claim 1, characterized in that: The current sampling module is arranged between the lower bridge arm of the three-phase inverter circuit and the negative end of the busbar.

3. The three-phase inverter according to claim 1, characterized in that: The current sampling module is arranged between the upper bridge arm of the three-phase inverter circuit and the positive end of the busbar.

4. The three-phase inverter according to claim 1, characterized in that: The current sampling module is arranged between the bridge arm output end of the three-phase inverter circuit and the negative end of the busbar.

5. A current sampling method for a three-phase inverter circuit, characterized in that: The current sampling method is applied to the three-phase inverter according to any one of claims 1 to 4, and the current sampling method comprises: Controlling the conduction of the switch tube electrically connected to the second input terminal of the operational amplifier, and controlling exclusive conduction between the switch tubes electrically connected to the first input terminal of the operational amplifier; In response to any switch tube electrically connected to the first input terminal of the operational amplifier being turned on, the operational amplifier collects the phase current or bus current of the phase corresponding to the turned-on switch tube.

6. The current sampling method of the three-phase inverter circuit according to claim 5, characterized in that: The current sampling module is arranged between the lower bridge arm of the three-phase inverter circuit and the negative end of the busbar, and the sampling timing of the operational amplifier for current sampling is when all the three-phase lower bridge arms of the three-phase inverter circuit are turned on.

7. The current sampling method of the three-phase inverter circuit according to claim 6, characterized in that: The three-phase inverter circuit adopts SVPWM modulation, and the current sampling method also includes: The SVPWM output waveform is adjusted so that the conduction pulse width of the three-phase lower bridge arm of the three-phase inverter circuit is greater than four times the minimum lower bridge arm conduction time required for sampling.

8. The current sampling method of the three-phase inverter circuit according to claim 5, characterized in that: The current sampling module is arranged between the upper bridge arm of the three-phase inverter circuit and the positive end of the busbar, and the sampling timing of the operational amplifier for current sampling is when all the three-phase upper bridge arms of the three-phase inverter circuit are turned on.

9. The current sampling method of the three-phase inverter circuit according to claim 5, characterized in that: The current sampling method further includes: The bus current value collected by the operational amplifier is positively processed.

10. A motor device, characterized in that: It comprises a three-phase motor and a three-phase inverter for outputting SVPWM to drive the three-phase motor to work. The three-phase inverter adopts the three-phase inverter described in any one of claims 1 to 4, and adopts the current sampling method described in claim 5.

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