Multi-phase switching power supply and control circuit and control method thereof

Abstract

The invention discloses a multi-phase switching power supply and a control circuit and a control method thereof, the multi-phase switching power supply comprises n phases of power conversion circuits, n is an integer greater than or equal to 2, each phase of power conversion circuit comprises a main power tube, and the main power tube is connected with the main power tube during phase adding operation. And the control circuit controls the main power tube in the power conversion circuit of at least one phase in the newly added phases to reduce the conduction time at least in the first conduction after the phase adding moment is started. By reducing the conduction time of the main power tube of the newly-added phase during at least first conduction, the energy supplied to the output end by the newly-added phase can be reduced, so that the overshoot of the output voltage is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a multi-phase switching power supply and a control circuit and a control method thereof. Background Art

[0002] like Figure 1 As shown, an existing multi-phase switching power supply 10 includes a control circuit 100, n drive circuits 301-30n, and n-phase power conversion circuits 401-40n, wherein n is an integer greater than or equal to 2, and the output end of the n-phase power conversion circuit is coupled to the output end to output the output voltage Vout. The control circuit 100 controls the power conversion circuit 401-40n of the corresponding phase to work or not work according to the enable signal ON1-ONn. The control circuit 100 outputs the control signal PWM1-PWMn, and each drive circuit 301-30n receives a control signal, and controls the conduction and shutdown of the switch tube in each corresponding power conversion circuit 401-40n according to the received control signal. The circuit structure of each phase power conversion circuit is the same, Figure 1 Only the specific circuit structure of the first phase power conversion circuit 401 is shown, including a first switch tube T11 and a second switch tube T12 connected between the input voltage Vin and the ground, and an inductor L01 connected between the common end and the output end of the first switch device T11 and the second switch device T12, wherein the first switch tube T11 is a main power tube. Specifically, the control circuit 100 includes an on-time generating circuit 101-10n and a logic circuit 201-10n corresponding to each power conversion circuit 401-40n. The on-time generating circuit 10i (i is an arbitrary integer from 1 to n) generates a shutdown control signal ton_rsti, and the logic circuit 20i generates a control signal PWMi according to the shutdown control signal ton_rsti, the on-control signal ton_seti and the enable signal ONi. When the enable signal ONi is in an invalid state, the logic circuit 20i outputs a level signal having a third state (high impedance state), and the power conversion circuit 40i of the corresponding phase does not work; when the enable signal ONi is in a valid state, the logic circuit 20i outputs a control signal PWMi with alternating high and low level states according to the shutdown control signal ton_rsti and the on-control signal ton_seti, and the power conversion circuit 40i of the corresponding phase works.

[0003] In order to improve the energy transmission efficiency of a multi-phase switching power supply, the number of phases of the operating power conversion circuit is often set according to different load current conditions or according to a protocol. Figure 2 Shown according to Figure 1The waveform diagram of the multi-phase switching power supply 10 during the phase addition operation shown in FIG. 1 is a waveform diagram of the multi-phase switching power supply 10 during the phase addition operation. The phase addition operation represents an increase in the number of working phases. The first phase is taken as the original working phase and the second phase is taken as an example. In this diagram, PWM1 and PWM2 represent control signals corresponding to the first-phase power conversion circuit 401 and the second-phase power conversion circuit 402, respectively. ON2 represents an enable signal corresponding to the second-phase power conversion circuit 402. Vout represents the output voltage of the multi-phase switching power supply 10. The time t0 represents the phase addition time of the second phase. Figure 2 The moment t0 is also the moment when the enable signal ON2 jumps from the invalid state to the valid state. Due to the sudden addition of phases, the second phase power conversion circuit 402 will provide additional energy to the output, causing output voltage overshoot. The prior art does not perform additional processing on the on-time generation circuit, does not suppress the output energy of the newly added phase, and only stabilizes the output voltage through loop regulation. It is limited by the hysteresis effect of loop regulation, so it is easy to cause a large output voltage overshoot (ΔV1), especially when adding multiple phase power conversion circuits at the same time, the output voltage overshoot will be more severe. Summary of the invention

[0004] In view of this, an object of the present invention is to provide a multi-phase switching power supply and a control circuit and a control method thereof, so as to solve the technical problem of large output voltage overshoot in the phase addition operation in the prior art.

[0005] The technical solution of the present invention is to provide a control circuit of a multi-phase switching power supply, wherein the multi-phase switching power supply includes an n-phase power conversion circuit, wherein n is an integer greater than or equal to 2, and each phase power conversion circuit includes a main power tube,

[0006] During the phase addition operation, the control circuit controls the main power tube in at least one phase power conversion circuit of the newly added phase, and reduces the conduction time at least during the first conduction after the phase addition moment begins.

[0007] Optionally, the control circuit controls the main power tube in the power conversion circuit of at least one phase in the newly added phase to reduce the conduction time of the first p times of conduction after the phase addition moment;

[0008] Wherein, p is an integer greater than or equal to 1, and the size of p is adjustable.

[0009] Optionally, the control circuit controls the main power tubes in all power conversion circuits in the newly added phase to reduce the conduction time at least during the first conduction after the phase addition moment begins.

[0010] Optionally, the control circuit receives at least one enable signal, and obtains the phase addition moment of the corresponding phase according to the moment when the enable signal jumps from an invalid state to a valid state;

[0011] When the enable signal is in an invalid state, the power conversion circuit of the corresponding phase does not work; when the enable signal is in a valid state, the power conversion circuit of the corresponding phase works.

[0012] Optionally, the control circuit includes at least one on-time generating circuit, and when the power conversion circuit of the corresponding phase is working, the on-time generating circuit generates a shutdown control signal for controlling the main power tube of the corresponding phase to shut down, so as to control the on-time of the main power tube of the corresponding phase;

[0013] When the corresponding phase is a newly added phase, the on-time generating circuit outputs a shutdown control signal in advance, at least when the main power tube of the corresponding phase is turned on for the first time after the start of the phase addition moment, so that the on-time of the main power tube of the corresponding phase is reduced at least when it is turned on for the first time after the start of the phase addition moment.

[0014] Optionally, the on-time generating circuit includes an on-time generating core circuit and an on-time setting circuit.

[0015] The on-time generating core circuit is used to generate the off-time control signal;

[0016] The on-time setting circuit is used to generate a setting signal according to an enable signal of a corresponding phase;

[0017] The on-time generating core circuit is controlled by the setting signal to output a shutdown control signal in advance at least when the main switch tube of the corresponding phase is turned on for the first time after the phase addition moment begins.

[0018] Optionally, electrical parameters in the on-time generating core circuit are changed under the control of the setting signal.

[0019] Optionally, the on-time setting circuit includes:

[0020] An edge detection circuit receives an enable signal of a corresponding phase, detects a moment when the enable signal changes from an invalid state to a valid state, and outputs a first signal representing the phase addition moment;

[0021] a counting circuit, which starts counting in response to the first signal, and outputs a second signal when the count value reaches a preset threshold;

[0022] a setting signal generating circuit, which starts to output the setting signal in response to the first signal and stops outputting the setting signal in response to the second signal;

[0023] The counting circuit counts the number of times the main power tube of the corresponding phase is turned off, or counts the number of times the main power tube of the corresponding phase is turned on, or counts the number of switching cycles of the main power tube of the corresponding phase.

[0024] Optionally, the size of the preset threshold is adjustable.

[0025] Optionally, the on-time setting circuit includes:

[0026] An edge detection circuit receives an enable signal of a corresponding phase, detects a moment when the enable signal changes from an invalid state to a valid state, and outputs a first signal representing the phase addition moment;

[0027] a timing circuit, which starts timing in response to the first signal and outputs a second signal when a first time is reached;

[0028] The setting signal generating circuit starts to output the setting signal in response to the first signal, and stops outputting the setting signal in response to the second signal.

[0029] Optionally, the length of the first time is adjustable.

[0030] Optionally, the on-time generating core circuit includes:

[0031] A ramp signal generating circuit generates a ramp signal;

[0032] a first comparison circuit, wherein the first input terminal receives the ramp signal, the second input terminal receives a reference signal, compares the ramp signal with the reference signal, and outputs the shutdown control signal according to the comparison result;

[0033] The setting signal controls the slope of the ramp signal to increase, and / or controls the reference signal to decrease.

[0034] Optionally, the ramp signal generating circuit includes:

[0035] A first current source generates a first current;

[0036] a first capacitor, wherein during the conduction period of the main power tube of the corresponding phase, the first current charges the first capacitor, and the ramp signal is obtained according to the voltage of the first capacitor;

[0037] A first switch is connected in parallel with the first capacitor, and the first switch is closed before the main power tube of the corresponding phase is turned on to reset the ramp signal;

[0038] When the setting signal controls the slope of the ramp signal to increase, the setting signal controls the first current to increase, and / or controls the capacitance of the first capacitor to increase.

[0039] Optionally, the on-time generating core circuit includes:

[0040] An inductor current sampling circuit samples an electrical signal in a power conversion circuit of a corresponding phase to output a sampling signal representing the inductor current of the phase;

[0041] A second comparison circuit, having a first input terminal receiving the sampling signal and a second input terminal receiving a current reference signal, comparing the sampling signal with the current reference signal, and outputting the shutdown control signal according to the comparison result;

[0042] The setting signal controls the sampling signal to increase, and / or controls the current reference signal to decrease.

[0043] Optionally, the control circuit further includes:

[0044] A logic circuit corresponding to the on-time generating circuit, wherein one input end of the logic circuit receives the shutdown control signal, the other input end receives the on-control signal, and the output end outputs the control signal. When the power conversion circuit of the corresponding phase is working, the control signal controls the on and off of the main power tube of the corresponding phase.

[0045] In a second aspect, the present invention further provides a control method for a multi-phase switching power supply, wherein the multi-phase switching power supply comprises an n-phase power conversion circuit, wherein n is an integer greater than or equal to 2, and each phase power conversion circuit comprises a main power tube,

[0046] During the phase addition operation, the main power tube in the power conversion circuit of at least one phase in the newly added phase is controlled to reduce the conduction time at least during the first conduction after the phase addition moment begins.

[0047] In a third aspect, the present invention further provides a multi-phase switching power supply, comprising an n-phase power conversion circuit, wherein n is an integer greater than or equal to 2, each phase power conversion circuit comprises a main power tube, and also comprises the control circuit.

[0048] Compared with the prior art, the control scheme of the multi-phase switching power supply of the present invention has the following advantages: when the multi-phase switching power supply is added, the main power tube in the power conversion circuit of at least one phase in the newly added phase is controlled, and the conduction time of at least the first conduction after the start of the phase addition is reduced. By actively reducing the conduction time of the main power tube in the newly added phase at least when it is turned on for the first time, the energy output from the newly added phase to the output end of the multi-phase switching power supply is actively reduced, so that the output voltage overshoot can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 A schematic diagram of the circuit structure of a multi-phase switching power supply in the prior art;

[0050] Figure 2 Based on Figure 1 Schematic diagram of waveforms of a multi-phase switching power supply during phase addition operation;

[0051] Figure 3 A schematic diagram of a circuit structure of a multi-phase switching power supply according to an embodiment of the present invention;

[0052] Figure 4 Based on Figure 3 Waveform diagram of a multi-phase switching power supply during phase addition operation;

[0053] Figure 5 A schematic diagram of the circuit structure of a conduction time generating circuit according to a first embodiment of the present invention;

[0054] Figure 6 A schematic diagram of the circuit structure of a conduction time generating circuit according to a second embodiment of the present invention;

[0055] Figure 7a A schematic diagram of the circuit structure of a core circuit for generating an on-time according to an embodiment of the present invention;

[0056] Figure 7b Based on Figure 7b Schematic diagram of waveform during phase addition operation;

[0057] Figure 8 FIG. 1 is a circuit structure diagram of a core circuit for generating an on-time according to another embodiment of the present invention. DETAILED DESCRIPTION

[0058] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any substitution, modification, equivalent method and scheme made within the spirit and scope of the present invention.

[0059] In order to make the public have a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the present invention, but those skilled in the art can fully understand the present invention without these detailed descriptions.

[0060] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. It should be noted that the accompanying drawings are all simplified and not in exact proportion, and are only used for the purpose of conveniently and clearly assisting in explaining the embodiments of the present invention.

[0061] like Figure 3 As shown, a multi-phase switching power supply 20 of an embodiment of the present invention includes a control circuit 200, and n-phase power conversion circuits 401-40n, wherein n is an integer greater than or equal to 2, and the output terminals of the n-phase power conversion circuits are coupled to the output terminal to output the output voltage Vout. The circuit structure of each phase power conversion circuit is the same, and each phase power conversion circuit includes a main power tube, wherein the specific circuit structure of the first phase power conversion circuit 401 is similar to Figure 1The same as in, no further description is given here. The multi-phase switching power supply 20 receives at least one enable signal, and controls the power conversion circuit of the corresponding phase to work or not work according to the enable signal. For example, the multi-phase switching power supply 20 receives the enable signals ON1-ONn, and controls the power conversion circuit 401-40n of the corresponding phase to work or not work according to the enable signals ON1-ONn. The control circuit 200 outputs control signals PWM1-PWMn, which are respectively used to control the conduction and shutdown of the switch tubes in the corresponding power conversion circuits 401-40n. The multi-phase switching power supply 20 also includes n drive circuits 301-30n, each of which receives a control signal, and controls the conduction and shutdown of the switch tubes in the corresponding power conversion circuits according to the received control signal. During the phase addition operation, the control circuit 200 of this embodiment controls the main power tube in at least one phase power conversion circuit in the newly added phase, and the conduction time is reduced at least when the first conduction after the phase addition moment starts. Specifically, the phase-adding moment of the corresponding phase can be obtained according to the moment when the enable signal jumps from the invalid state to the valid state; wherein, when the enable signal is in the invalid state, the power conversion circuit of the corresponding phase does not work; when the enable signal is in the valid state, the power conversion circuit of the corresponding phase works. In response to the obtained phase-adding moment of the corresponding phase, the control circuit 200 controls the main power tube in the power conversion circuit of at least one phase in the newly added phase, and reduces the conduction time at least at the first conduction after the phase-adding moment starts. Figure 4 Shown according to Figure 3 The waveform diagram of the multi-phase switching power supply 20 shown in the figure during the phase addition operation is taken as an example, with the first-phase power conversion circuit as the original working phase, the second-phase power conversion circuit as the newly added phase, and the main power tube in the second-phase power conversion circuit is controlled. The conduction time of the first conduction after the phase addition moment is reduced, wherein PWM1 and PWM2 respectively represent the control signals corresponding to the first-phase power conversion circuit 401 and the second-phase power conversion circuit 402, the high-level time of the control signals PWM1 and PWM2 respectively corresponds to the conduction time of the main power tube in the first-phase power conversion circuit 401 and the second-phase power conversion circuit 402, ON2 represents the enable signal corresponding to the second-phase power conversion circuit 402, Vout represents the output voltage of the multi-phase switching power supply, and the moment t0 represents the phase addition moment of the second phase. Figure 4 The time t0 is also the time when the enable signal ON2 changes from the invalid state to the valid state. For the convenience of comparison with the prior art, as shown in FIG. Figure 4 The dashed line also shows Figure 2The waveform of the control signal PWM2 and the output voltage Vout in the control circuit PWM2. Since the present embodiment controls the main power tube in the newly added phase, i.e., the second phase power conversion circuit, the conduction time is reduced at the first conduction after the phase addition moment, so that the energy given to the output by the newly added phase is reduced, so that the output voltage overshoot (ΔV2) of the present embodiment can be achieved to be less than the output voltage overshoot (ΔV1) of the prior art. It can be understood that in one embodiment, the control circuit 200 can control the main power tube in at least one phase power conversion circuit in the newly added phase to reduce the conduction time from the first p conductions after the phase addition moment; wherein p is an integer greater than or equal to 1, and the size of p is adjustable; p can be adjusted according to actual needs, that is, the number of conduction times reduced is adjusted, so as to adjust the output voltage overshoot. In a preferred embodiment, the control circuit 200 can control the main power tubes in all power conversion circuits in the newly added phase, at least the conduction time is reduced at the first conduction after the phase addition moment, so as to achieve the minimum output voltage overshoot when adding multiple phase power conversion circuits at the same time.

[0062] Furthermore, the control circuit 200 includes a conduction time generating circuit 501-50n and a logic circuit 201-10n corresponding to each power conversion circuit 401-40n. When the i-th phase power conversion circuit 50i is working, the conduction time generating circuit 50i generates a shutdown control signal ton_rsti for controlling the shutdown of the i-th phase power conversion circuit to control the conduction time of the i-th phase power conversion circuit, where i is any integer from 1 to n. Among them, the control circuit 200 includes at least one on-time generating circuit. When the corresponding phase is a newly added phase, the on-time generating circuit outputs a shutdown control signal in advance at least when the main power tube of the corresponding phase is turned on for the first time after the start of the phase addition moment, so that the on-time of the main power tube of the newly added phase is reduced at least when it is turned on for the first time after the start of the phase addition moment; that is, the control circuit 200 includes at least one on-time generating circuit that receives the enable signal of the corresponding phase, obtains the phase addition moment of the corresponding phase according to the moment when the enable signal of the corresponding phase jumps from an invalid state to a valid state, and the on-time generating circuit outputs a shutdown control signal in advance at least when the main power tube of the corresponding phase is turned on for the first time after the start of the phase addition moment. Figure 3Taking the conduction time generating circuits 501-50n as an example, each of which receives the enable signals ON1-ONn, when the phase addition operation can be realized, all newly added corresponding conduction time generating circuits output the shutdown control signal in advance at least at the first conduction after the phase addition moment begins. Of course, in other embodiments, there may also be some conduction time generating circuits that do not receive the enable signal of the corresponding phase. In one embodiment, one input terminal of the logic circuit 20i receives a shutdown control signal ton_rsti, another input terminal receives a conduction control signal ton_seti, and an enable terminal receives an enable signal Oni, and an output terminal outputs a control signal PWMi, wherein when the enable signal ONi is in an invalid state, the logic circuit 20i outputs a level signal having a third state (high impedance state), and the power conversion circuit 40i of the corresponding phase does not work; when the enable signal ONi is in a valid state, the logic circuit 20i outputs a control signal PWMi with alternating high and low level states according to the shutdown control signal ton_rsti and the conduction control signal ton_seti, and the power conversion circuit 40i of the corresponding phase works, and the control signal PWMi controls the conduction and shutdown of the main power tube in the power conversion circuit 40i. By way of example, the logic circuit 20i includes a trigger U0i. In another embodiment, the logic circuits 201 - 10n may not receive the control signals ON1 -ONn, but the driving circuits 301 - 30n may receive ON1 -ONn respectively, and the driving circuits control the corresponding power conversion circuits to operate or not operate according to the level states of the received control signals.

[0063] It should be noted that although Figure 3 The circuit structure of the first phase power conversion circuit 401 in the embodiment is described as having a buck topology (Buck), but the power conversion circuit in the technical solution of the present invention can adopt any topology type, such as a boost topology (Boost), a buck-boost topology (Buck-Boost), a flyback topology (Flyback), etc. It should also be noted that, Figure 4 The example of the moment when the control signal PWM2 jumps from the third state to the high level state overlaps with the phase addition moment (moment t0) does not constitute a limitation on the control signal waveform. For example, in another embodiment, the control signal PWM2 may also jump from the third state to the low level state at the phase addition moment (moment t0), and jump from the low level state to the high level state when the conduction control signal ton_set2 is received after the phase addition moment.

[0064] The following takes the example of the on-time generating circuits 501-50n each receiving the enable signals ON1-ONn as an example to introduce the on-time generating circuits 501-50n. Figure 5 and Figure 6As shown, the on-time generating circuit 50i corresponding to the i-th phase power conversion circuit 40i includes an on-time generating core circuit 51 and an on-time setting circuit 52, wherein the on-time generating core circuit 51 is used to generate a shutdown control signal ton_rsti; the on-time setting circuit 52 is used to generate a setting signal according to the enable signal ONi of the corresponding phase, and the on-time generating core circuit 51 is controlled by the setting signal to output the shutdown control signal ton_rsti in advance at least when the main switch tube of the corresponding phase is turned on for the first time after the start of the phase addition moment, so that the on-time at least when the first turn-on after the start of the phase addition moment is reduced, wherein the main switch tube of the corresponding phase represents the main power tube in the power conversion circuit of the corresponding phase, that is, the main power tube in the i-th phase power conversion circuit 40i in this embodiment. Further, the on-time setting circuit 52 obtains the phase addition moment of the corresponding phase according to the moment when the enable signal ONi of the corresponding phase jumps from the invalid state to the valid state, and generates the setting signal in response to the phase addition moment. During the period when the on-time setting circuit 52 outputs the setting signal, the electrical parameters in the on-time generating core circuit 51 are controlled by the setting signal and change, so that the shutdown control signal ton_rsti is output in advance at least when the main switch tube of the corresponding phase is turned on for the first time after the phase addition moment starts; after the on-time setting circuit 52 stops outputting the setting signal, the electrical parameters in the on-time generating core circuit 51 are restored to the initial value, and the on-time of the main switch tube of the corresponding phase is restored to the initial value accordingly.

[0065] Figure 5Schematic diagram of the circuit structure of the on-time generating circuit 50i according to the first embodiment of the present invention. In this embodiment, the on-time setting circuit 52 in the on-time generating circuit 50i obtains the phase-adding moment of the corresponding phase according to the moment when the enable signal ONi of the corresponding phase jumps from the invalid state to the valid state, starts to generate the setting signal seti in response to the phase-adding moment, and starts to count the number of shutdowns or the number of ons or the number of switching cycles of the main power tube of the corresponding phase in response to the phase-adding moment, and stops outputting the setting signal seti in response to the count value reaching a preset threshold. For example, the on-time setting circuit 52 includes an edge detection circuit 521, a counting circuit 522 and a setting signal generating circuit 523. The edge detection circuit 521 receives the enable signal ONi of the corresponding phase, detects the moment when the enable signal ONi jumps from the invalid state to the valid state, and outputs a first signal S1i representing the moment of the corresponding addition phase; the counting circuit 522 starts counting in response to the first signal S1i, and outputs a second signal S2i when the count value reaches the preset threshold thi; the setting signal generating circuit 523 starts outputting the setting signal seti in response to the first signal S1i, and stops outputting the setting signal seti in response to the second signal S2i. The counting circuit 522 can count the number of times the main power tube of the corresponding phase is turned off; it can also count the number of times the main power tube of the corresponding phase is turned on; it can also count the number of switching cycles of the main power tube of the corresponding phase. In some embodiments, the size of the preset threshold thi is adjustable, and the size of the preset threshold thi can be adjusted according to actual needs. By adjusting the size of the preset threshold thi, the size of p can be adjusted, wherein p is any integer greater than or equal to 1, and the conduction time of the power conversion circuit of the corresponding phase during the first p conductions after the start of the phase addition moment is reduced. Further, in order to achieve the reduction of the conduction time of the main power tube of the corresponding phase during the first p conductions after the start of the phase addition moment, in the embodiment in which the counting circuit 522 counts the number of times the main power tube of the corresponding phase is turned off, the preset threshold thi=p can be set; in the embodiment in which the counting circuit 522 counts the number of times the main power tube of the corresponding phase is turned on, the preset threshold thi=p+1 can be set; in the embodiment in which the counting circuit 522 counts the number of switching cycles of the main power tube of the corresponding phase, the preset threshold thi=p can be set. In addition, the present application does not limit the specific time when the setting signal generating circuit 523 starts to generate the setting signal, nor does it limit the specific time when the counting circuit 522 starts counting. For example, in one embodiment, the setting signal generating circuit 523 may start generating the setting signal at the moment of generating the first signal S1i; in another embodiment, it may start generating the setting signal after a certain delay after the first signal S1i is generated; in yet another embodiment, it may start generating the setting signal at the moment of generating the on-control signal ton_seti for the first time after the first signal S1i is generated.

[0066] Figure 6: is a circuit structure diagram of a conduction time generating circuit 50i according to a second embodiment of the present invention; the circuit structure of this embodiment is basically the same as that of the first embodiment, and will not be repeated here, except that the conduction time setting circuit 52 in this embodiment does not include a counting circuit 522, but includes a timing circuit 524, and the timing circuit 524 starts timing in response to the first signal S1i, and outputs a second signal S2i after reaching the first time Ti. In some embodiments, the time length of the first time is adjustable, and the time length of the first time can be adjusted according to actual needs. By adjusting the time length of the first time Ti, the size of p can be adjusted, wherein p is any integer greater than or equal to 1, and the conduction time of the main power tube of the corresponding phase during the first p times of conduction after the start of the phase addition moment is reduced; in some embodiments, when the first time Ti is less than the conduction time of the main power tube of the corresponding phase during the first conduction after the start of the phase addition moment, by adjusting the time length of the first time Ti, the time length of the conduction time during the first conduction can also be adjusted.

[0067] Figure 7a Schematic diagram of the circuit structure of the on-time generation core circuit 51 in the on-time generation circuit 50i according to an embodiment of the present invention. In this embodiment, the control circuit 200 adopts a constant on-time control mode. The on-time generation core circuit 51 includes a ramp signal generation circuit 511 and a first comparison circuit U11. The ramp signal generation circuit 511 generates a ramp signal Vrampi. The first input end of the first comparison circuit U11 receives the ramp signal Vrampi, and the second input end receives the reference signal Vrefi. The first comparison circuit U11 compares the ramp signal Vrampi with the reference signal Vrefi, and outputs a shutdown control signal ton_rsti at the output end for controlling the shutdown of the main power tube in the i-th phase power conversion circuit 40i according to the comparison result. For example, the first input end of the first comparison circuit U11 is a positive phase input end, and the second input end is a negative phase input end. When the ramp signal Vrampi rises and reaches the reference signal Vrefi, the shutdown control signal ton_rsti is output. In one embodiment, it can be set to set the signal seti to control the slope of the ramp signal Vrampi to increase, such as Figure 7bAs shown, ONi represents an enable signal corresponding to the i-phase power conversion circuit 401, Vrampi represents a ramp signal corresponding to the i-phase power conversion circuit 401, Vrefi represents a reference signal corresponding to the i-phase power conversion circuit 401, PWMi represents a control signal corresponding to the i-phase power conversion circuit 401, wherein the high level time of the control signal PWMi corresponds to the turn-on time of the main power tube in the i-phase power conversion circuit 401, t0 represents the phase addition moment of the i-phase power conversion circuit 401, and the setting signal seti is generated in response to the phase addition moment t0. Taking the setting signal seti controlling the increase in the slope of the ramp signal Vrampi when the main power tube of the corresponding phase is turned on for the first time as an example, the time required for the ramp signal Vrampi to rise to the reference signal Vrefi when the main power tube of the corresponding phase is turned on for the first time can be shortened, that is, the shutdown control signal is output in advance, so that the turn-on time of the main switch tube of the corresponding phase when it is turned on for the first time after the start of the phase addition moment is reduced. It can be understood that in another embodiment, the setting signal seti can also be set to control the reference signal Vrefi to decrease; in another embodiment, the setting signal seti can also be set to control the slope of the ramp signal Vrampi to increase and control the reference signal Vrefi to decrease, both of which can achieve the same effect.

[0068] Please continue to refer to Figure 7a, for example, the ramp signal generating circuit 511 includes a first current source 5111, a first capacitor C01 and a first switch K01, the first current source 5111 generates a first current Ii; during the period when the main power tube of the corresponding phase is turned on, the first current Ii charges the first capacitor C01, and the ramp signal Vrampi is obtained according to the voltage of the first capacitor C01. In this embodiment, the voltage of the first capacitor C01 is directly used as the ramp signal Vrampi; the first switch K01 is connected in parallel with the first capacitor C01, and before the main power tube of the corresponding phase is turned on, the first switch K01 is closed to reset the ramp signal Vrampi. In order to realize that the setting signal seti controls the slope of the ramp signal Vrampi to increase, in one embodiment, it can be set that the setting signal seti controls the first current Ii generated by the first current source 5111 to increase; in another embodiment, it can also be set that the setting signal controls the capacitance of the first capacitor C01 to increase; in another embodiment, it can also be set that the setting signal seti controls the first current Ii to increase, and controls the capacitance of the first capacitor C01 to increase. Further, in some embodiments, the first current source 5111 generates a first current Ii of a fixed magnitude, and the reference signal Vrefi is a signal of a fixed voltage. To realize the setting signal seti to control the increase of the first current Ii, it can be set that when the on-time generating core circuit 51 fails to receive the setting signal seti, the first current source 5111 generates a first current having a first fixed value (initial value), and when the setting signal seti is received, the first current source 5111 can generate a first current having a second fixed value, wherein the second fixed value is greater than the first fixed value. In other embodiments, the first current source 5111 generates a first current Ii proportional to the input voltage Vin, and the reference signal Vrefi is a signal proportional to the output voltage Vout. To realize the setting signal seti to control the increase of the first current Ii, when the on-time generating core circuit 51 receives the setting signal seti, the first current Ii can be controlled to rise as a whole, or the ratio of the first current Ii to the input voltage Vin can be controlled to increase.

[0069] Figure 81 is a circuit structure diagram of a conduction time generation core circuit 51 in a conduction time generation circuit 50i according to another embodiment of the present invention. In this embodiment, the control circuit 200 adopts a current control mode, and the conduction time generation core circuit 51 includes an inductor current sampling circuit 512 and a second comparison circuit U12. The inductor current sampling circuit 512 samples the electrical signal in the power conversion circuit of the corresponding phase (i.e., the i-th phase power conversion circuit 40i) to output a sampling signal Vcsi representing the inductor current of the phase; the second comparison circuit U12 receives the sampling signal Vcsi at a first input terminal and the current reference signal Vpeaki at a second input terminal, compares the sampling signal Vcsi with the current reference signal Vpeaki, and outputs a shutdown control signal ton_rsti for controlling the shutdown of the main power tube in the i-th phase power conversion circuit 40i according to the comparison result. Among them, the current reference signal Vpeaki can be obtained according to the compensation signal, and the compensation signal represents the difference information between the output feedback signal of the multi-phase switching power supply and the preset reference voltage. In one embodiment, the on-time generation core circuit 51 also includes a current reference signal generation circuit 513, and the current reference signal generation circuit 513 generates the current reference signal Vpeaki according to the compensation signal Vcomp. Of course, in another embodiment, the current reference signal generation circuit 513 may not be provided, and the compensation signal Vcomp is directly used as the current reference signal Vpeaki. For example, the first input terminal of the second comparison circuit U12 is the positive phase input terminal, and the second input terminal is the negative phase input terminal. During the conduction period of the main power tube of the i-th phase power conversion circuit 40i, the sampling signal Vcsi rises, and when the sampling signal Vcsi rises to reach the reference signal Vrefi, the shutdown control signal ton_rsti is output. In one embodiment, the setting signal seti can be set to control the sampling signal Vcsi to increase, so that the time required for the sampling signal Vcsi to rise to the current reference signal Vpeaki is shortened, that is, the shutdown control signal is output in advance, so that the main switch tube of the corresponding phase (that is, the main switch tube in the i-th phase power conversion circuit 40i) is at least reduced in the first conduction time after the phase addition moment. Wherein, the setting signal seti controls the sampling signal Vcsi to increase, which can be the setting signal seti controls the sampling signal Vcsi to rise upward as a whole; or the setting signal seti controls the ratio of the sampling signal Vcsi to the inductor current of the i-th phase power conversion circuit 40i to increase. For example, in one embodiment, the inductor current sampling circuit 512 includes a sampling resistor (not shown in the figure), and the voltage of the sampling resistor is output as the sampling signal Vcsi. The setting signal seti controls the resistance value of the sampling resistor to increase, so as to realize the increase of the ratio of the sampling signal Vcsi to the inductor current of the i-th phase power conversion circuit 40i.It can be understood that in order to achieve the reduction of the conduction time of the main switch tube of the corresponding phase at least at the first conduction after the start of the phase addition moment according to the setting signal, in another embodiment, the setting signal seti can also be used to control the current reference signal Vpeaki to decrease; in another embodiment, the setting signal seti can also be used to control the sampling signal Vcsi to increase, and control the current reference signal Vpeaki to decrease.

[0070] Since the circuit for generating the conduction control signal is not the focus of the present application, the present application does not show the circuit structure for generating the conduction control signal. The present application does not limit the type of circuit for generating the conduction control signal, and the circuit for generating the conduction control signal of a suitable type in the prior art can be freely selected. For example, the circuit for generating the conduction control signal can use a clock generating circuit, and use the generated clock signal as the conduction control signal; it can also include a comparison circuit, which compares the feedback signal representing the output voltage and the size of a reference voltage, and outputs the conduction control signal according to the comparison result, and so on.

[0071] The above-described implementation methods do not constitute a limitation on the protection scope of the technical solution. Any modification, equivalent replacement and improvement made within the spirit and principle of the above-described implementation methods shall be included in the protection scope of the technical solution.

Claims

1. A control circuit of a multi-phase switching power supply, the multi-phase switching power supply comprising n-phase power conversion circuits, wherein n is an integer greater than or equal to 2, each phase power conversion circuit comprises a main power tube, characterized in that: During the phase addition operation, the control circuit controls the main power tube in at least one phase power conversion circuit of the newly added phase, and reduces the conduction time at least during the first conduction after the phase addition moment begins.

2. The control circuit according to claim 1, characterized in that: The control circuit controls the main power tube in the power conversion circuit of at least one phase in the newly added phase to reduce the conduction time of the first p times of conduction after the phase addition moment; Wherein, p is an integer greater than or equal to 1, and the size of p is adjustable.

3. The control circuit according to claim 1 or 2, characterized in that: The control circuit controls the main power tubes in all power conversion circuits in the newly added phase, and at least reduces the conduction time during the first conduction after the phase addition moment begins.

4. The control circuit according to claim 1, characterized in that: The control circuit receives at least one enable signal, and obtains the phase addition time of the corresponding phase according to the time when the enable signal jumps from an invalid state to a valid state; When the enable signal is in an invalid state, the power conversion circuit of the corresponding phase does not work; when the enable signal is in a valid state, the power conversion circuit of the corresponding phase works.

5. The control circuit according to claim 1, characterized in that: The control circuit at least includes a conduction time generating circuit. When the power conversion circuit of the corresponding phase is working, the conduction time generating circuit generates a shutdown control signal for controlling the main power tube of the corresponding phase to shut down, so as to control the conduction time of the main power tube of the corresponding phase; When the corresponding phase is a newly added phase, the on-time generating circuit outputs a shutdown control signal in advance at least when the main power tube of the corresponding phase is turned on for the first time after the phase addition moment begins.

6. The control circuit according to claim 5, characterized in that: The on-time generating circuit comprises an on-time generating core circuit and an on-time setting circuit. The on-time generating core circuit is used to generate the off-time control signal; The on-time setting circuit is used to generate a setting signal according to an enable signal of a corresponding phase; The on-time generating core circuit is controlled by the setting signal to output a shutdown control signal in advance at least when the main switch tube of the corresponding phase is turned on for the first time after the phase addition moment begins.

7. The control circuit according to claim 6, characterized in that: The electrical parameters in the on-time generating core circuit are changed under the control of the setting signal.

8. The control circuit according to claim 6, characterized in that: The on-time setting circuit comprises: An edge detection circuit receives an enable signal of a corresponding phase, detects a moment when the enable signal changes from an invalid state to a valid state, and outputs a first signal representing the phase addition moment; a counting circuit, which starts counting in response to the first signal, and outputs a second signal when the count value reaches a preset threshold; a setting signal generating circuit, which starts to output the setting signal in response to the first signal and stops outputting the setting signal in response to the second signal; The counting circuit counts the number of times the main power tube of the corresponding phase is turned off, or counts the number of times the main power tube of the corresponding phase is turned on, or counts the number of switching cycles of the main power tube of the corresponding phase.

9. The control circuit according to claim 8, characterized in that: The size of the preset threshold is adjustable.

10. The control circuit according to claim 6, characterized in that: The on-time setting circuit comprises: An edge detection circuit receives an enable signal of a corresponding phase, detects a moment when the enable signal changes from an invalid state to a valid state, and outputs a first signal representing the phase addition moment; a timing circuit, which starts timing in response to the first signal and outputs a second signal when a first time is reached; The setting signal generating circuit starts to output the setting signal in response to the first signal, and stops outputting the setting signal in response to the second signal.

11. The control circuit according to claim 10, characterized in that: The length of the first time is adjustable.

12. The control circuit according to claim 6, characterized in that: The on-time generating core circuit comprises: A ramp signal generating circuit generates a ramp signal; a first comparison circuit, wherein the first input terminal receives the ramp signal, the second input terminal receives a reference signal, compares the ramp signal with the reference signal, and outputs the shutdown control signal according to the comparison result; The setting signal controls the slope of the ramp signal to increase, and / or controls the reference signal to decrease.

13. The control circuit according to claim 12, characterized in that: The ramp signal generating circuit comprises: A first current source generates a first current; a first capacitor, wherein during the conduction period of the main power tube of the corresponding phase, the first current charges the first capacitor, and the ramp signal is obtained according to the voltage of the first capacitor; A first switch is connected in parallel with the first capacitor, and the first switch is closed before the main power tube of the corresponding phase is turned on to reset the ramp signal; When the setting signal controls the slope of the ramp signal to increase, the setting signal controls the first current to increase, and / or controls the capacitance of the first capacitor to increase.

14. The control circuit according to claim 6, characterized in that: The on-time generating core circuit comprises: An inductor current sampling circuit samples an electrical signal in a power conversion circuit of a corresponding phase to output a sampling signal representing the inductor current of the phase; A second comparison circuit, having a first input terminal receiving the sampling signal and a second input terminal receiving a current reference signal, comparing the sampling signal with the current reference signal, and outputting the shutdown control signal according to the comparison result; The setting signal controls the sampling signal to increase, and / or controls the current reference signal to decrease.

15. The control circuit according to claim 5, characterized in that: The control circuit further comprises: A logic circuit corresponding to the on-time generating circuit, wherein one input end of the logic circuit receives the shutdown control signal, the other input end receives the on-control signal, and the output end outputs the control signal. When the power conversion circuit of the corresponding phase is working, the control signal controls the on and off of the main power tube of the corresponding phase.

16. A control method for a multi-phase switching power supply, the multi-phase switching power supply comprising n-phase power conversion circuits, wherein n is an integer greater than or equal to 2, and each phase power conversion circuit comprises a main power tube, characterized in that: During the phase addition operation, the main power tube in the power conversion circuit of at least one phase in the newly added phase is controlled to reduce the conduction time at least during the first conduction after the phase addition moment begins.

17. A multi-phase switching power supply, comprising n-phase power conversion circuits, wherein n is an integer greater than or equal to 2, and each phase power conversion circuit comprises a main power tube, characterized in that: It also includes a control circuit as described in any one of claims 1-15.

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