Self-powered circuit of switching power supply and switching power supply

Abstract

The invention provides a self-powered circuit of a switching power supply and the switching power supply, and the self-powered circuit comprises a first linear voltage stabilizing circuit which is connected between a common connection end of a main power tube and an auxiliary power tube and a power supply capacitor; the second linear voltage stabilizing circuit is connected with the second linear circuit in parallel; the adjusting circuit is connected with the second linear voltage stabilizing circuit and generates adjusting voltage to adjust the first charging current flowing through the second linear voltage stabilizing circuit when the second linear voltage stabilizing circuit is switched on; wherein after the switching power supply is started, the first linear voltage stabilizing circuit is switched on, and the power supply capacitor is charged; and when the PWM signal generated by the control chip of the switching power supply is effective, the second linear voltage stabilizing circuit is controlled to be switched on. According to the invention, power supply loss can be saved and system EMI can be optimized.

Description

Technical Field

[0001] The invention relates to the field of power electronics, and in particular to a self-powered circuit of a switching power supply and the switching power supply. Background Art

[0002] By using normally on power devices, self-starting and self-powering can be realized more conveniently. The self-starting function can save the need for additional resistor starting or high-voltage starting circuits, and the self-powering function can save the need for auxiliary winding power supply.

[0003] like Figure 1 As shown, it is a self-powered circuit of a switching power supply of the prior art. The switching power supply takes a flyback converter as an example. The self-powered circuit includes a main power tube Q1 and an auxiliary power tube Q2 connected in series. The first linear adjustment circuit (LDO1) is connected between the common connection end and the power supply capacitor C0. The power supply capacitor C0 generates a power supply voltage VDD. The power supply voltage VDD is used to power the control chip of the switching power supply. The power supply voltage VDD passes through the LDO (linear adjustment circuit) to obtain a voltage VCC, which is used to power the drive circuit 01 of the auxiliary power tube Q2. The drive circuit 01 receives a PWM drive signal to generate a drive signal DRV for controlling the on and off of the auxiliary power tube Q2. The signal waveform of the self-powered circuit is shown in FIG. Figure 2 As shown, during the period when the power tube Q1 and the auxiliary power tube Q2 are turned on (t1-t2), the magnetizing inductor of the flyback converter stores energy, the inductor current I_Lm rises, the voltage Vsw at SW and the voltage drop Vds_Q2 across the auxiliary power tube Q2 are low, the control chip is powered by the power supply voltage VDD, and the VDD voltage drops. During the period when the power tube Q1 and the auxiliary power tube Q2 are turned off (t2-t3), the magnetizing inductor current supplies power to the output, the inductor current I_Lm drops, and the voltage Vsw at SW is clamped to Vin+Nps*Vo, where Vin is the DC input voltage of the flyback converter, Vo is the output voltage, and Nps is the transformer primary-secondary turns ratio Nps=Np / Ns. At this time, the power tube Q1 works in the linear region, the C0 capacitor is charged, and the voltage drop of the power tube Q1 is Vds_Q1=V SW -(-Vgs_th), where Vgs_th is the threshold voltage of the D-Mode power device. Since the voltage at SW is clamped, the power tube Q1 has a relatively large loss, and the loss P = Vds_Q1*Ivdd, where Ivdd is the average current consumed by the chip.

[0004] When the power tube Q1 and the auxiliary power tube Q2 are turned off, the supply voltage VDD comes from the voltage Vsw at SW. Vsw is a high voltage. At this time, the power tube Q1 works in the linear region, similar to a high-voltage LDO, which will cause large power loss and low system efficiency. In addition, when the auxiliary power tube Q2 is turned on, if the switching speed is not controlled, it may cause greater electromagnetic interference (EMI). Summary of the invention

[0005] The purpose of the present invention is to provide a self-powered circuit of an efficient switching power supply and the switching power supply, which are used to solve the problems of large power supply loss and low system efficiency in the prior art, and can also optimize the system EMI problem.

[0006] The present invention also provides a self-powered circuit of a switching power supply, the switching power supply comprising an inductor, a main power tube and an auxiliary power tube, the inductor is connected to a first end of the main power tube, the auxiliary power tube is connected between a second end of the main power tube and a ground end, and comprises:

[0007] A power supply capacitor, used to generate a power supply voltage for a control chip of the switching power supply;

[0008] A first linear voltage stabilizing circuit, connected between a common connection terminal of the main power tube and the auxiliary power tube and a power supply capacitor;

[0009] A second linear voltage stabilizing circuit, connected in parallel with the first linear voltage stabilizing circuit;

[0010] an adjustment circuit connected to the second linear voltage stabilization circuit, and adjusting a first charging current flowing through the second linear voltage stabilization circuit when the second linear voltage stabilization circuit is turned on, so that a voltage change rate of a first node between the main power tube and the inductor reaches a preset change rate;

[0011] Among them, during the startup of the switching power supply, the first linear voltage regulator circuit is turned on and the power supply capacitor is charged; when the PWM signal generated by the control chip of the switching power supply is valid, the second linear voltage regulator circuit is turned on and the power supply capacitor is charged.

[0012] Optionally, when the supply voltage reaches a first threshold, the first linear voltage regulation circuit is turned off.

[0013] Optionally, when the second linear voltage regulator circuit is turned on, the adjustment circuit adjusts the first charging current to a reference current so that a voltage change rate of a first node between the main power tube and the inductor reaches a preset change rate.

[0014] Optionally, the adjustment circuit includes a first resistor, which is connected to a charging path between the second linear voltage stabilization circuit and the charging capacitor; and the size of the first charging current is set by setting the size of the first resistor.

[0015] Optionally, the adjustment circuit further includes a sampling circuit and a first operational amplifier, and when the second linear voltage stabilization circuit is turned on, the sampling circuit samples the voltage of the first resistor to obtain a voltage sampling signal;

[0016] The first operational amplifier performs operational amplification on the voltage sampling signal and a first reference voltage to obtain a regulating voltage, and the regulating voltage controls the magnitude of the first charging current.

[0017] Optionally, the sampling circuit is configured to: when the second linear voltage stabilization circuit is turned on, sample the voltage of the power supply end to obtain a first sampling signal,

[0018] When the second linear voltage regulator circuit is turned off, the voltage of the power supply terminal is sampled to obtain a second sampling signal.

[0019] Subtracting the first sampling signal from the second sampling signal to obtain a voltage sampling signal representing the voltage of the first resistor;

[0020] The power supply end is a common connection end of the second linear voltage stabilization circuit and the first resistor.

[0021] Optionally, the first resistor and the power supply capacitor are integrated outside the control chip, and the first linear voltage regulator circuit, the second linear voltage regulator circuit, the main power tube and the auxiliary power tube are integrated inside the control chip.

[0022] Optionally, the adjustment circuit includes a change rate detection circuit, which is used to detect the change rate of the first node voltage to obtain a change rate detection signal, and adjust the first charging current according to the change rate detection signal.

[0023] Optionally, the adjustment circuit further includes a sampling and holding circuit and a second operational amplifier, and the sampling and holding circuit samples and holds the change rate detection signal when the second linear adjustment circuit is turned on;

[0024] The second operational amplifier performs operational amplification on the change rate detection signal obtained by the sample and hold circuit and the second reference voltage to obtain the adjustment voltage, and the adjustment voltage controls the magnitude of the first charging current.

[0025] Optionally, a clamping circuit is further included, which is connected to the high potential end of the power supply capacitor and is used to clamp the power supply voltage at a preset value when the power supply voltage is greater than a preset value.

[0026] Optionally, when the turn-on time of the second linear voltage regulator circuit reaches a preset time, the second linear voltage regulator circuit is turned off, and the auxiliary power tube is turned on.

[0027] Optionally, when the voltage of the first node between the main power tube and the inductor drops to a preset voltage, the second linear voltage regulator circuit is turned off and the auxiliary power tube is turned on.

[0028] Optionally, the power tube is a depletion-type transistor.

[0029] The present invention also provides a switching power supply, comprising a main power tube and an inductor connected to each other, and any one of the self-power supply circuits described above, for generating a power supply voltage for a control chip of the switching power supply.

[0030] Compared with the prior art, the present invention has the following advantages: the present invention establishes two charging paths between the common connection end of the main power tube and the auxiliary power tube and the power supply capacitor. When the switching power supply is just started, the power supply capacitor is pre-charged through the first charging path; when the switching power supply is working normally, when the auxiliary switching tube is turned on, the capacitor is charged through the second charging path to save the turn-on loss and optimize the power supply efficiency; at the same time, the charging current on the second path is controlled to control the falling slope of the voltage at the connection end of the inductor and the main power tube to optimize the EMI of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a self-powered circuit schematic diagram of a switching power supply in the prior art;

[0032] Figure 2 It is a working waveform diagram of the self-powered circuit in the prior art;

[0033] Figure 3 This is the principle diagram of the switching power supply of the present invention;

[0034] Figure 4 This is a schematic diagram of Embodiment 1 of the adjustment circuit of the present invention;

[0035] Figure 5 This is a schematic diagram of Embodiment 2 of the adjustment circuit of the present invention;

[0036] Figure 6 is a schematic diagram of an embodiment of a second linear voltage stabilizing circuit of the present invention;

[0037] Figure 7 It is the working waveform diagram of the self-powered circuit of the present invention. DETAILED DESCRIPTION

[0038] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any substitution, modification, equivalent method and scheme made on the spirit and range of the present invention.

[0039] In order to make the public have a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the present invention, but those skilled in the art can fully understand the present invention without these detailed descriptions.

[0040] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. It should be noted that the accompanying drawings are all simplified and not in exact proportions, in order to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0041] like Figure 3 As shown, the schematic diagram of the switching power supply of the present invention is illustrated. The switching power supply is explained by taking a flyback converter as an example. However, in the present invention, the switching power supply is not limited to a flyback converter, and may also be a buck converter, a boost converter, etc. The flyback converter of this embodiment rectifies the AC input voltage AC to obtain a DC input voltage Vin. The main power tube Q1 and the primary winding Np of the transformer T are connected in series, and the connection node is the first node SW. The rectifier tube D0 and the secondary winding Ns of the transformer T are connected in series. By controlling the switching state of the main power tube Q1, the DC input voltage Vin is converted into an output voltage Vo through the transformer T. The main power tube Q1 of the present invention is a depletion-type transistor, preferably a depletion-type gallium nitride transistor, and the gate of the main power tube Q1 is grounded; there is a parasitic capacitance between the gate and drain of the main power tube Q1, and the primary winding of the transformer T also has a parasitic capacitance. There is also a parasitic capacitance on the connection path between the main power tube Q1 and the primary winding of the transformer T. These parasitic capacitances in the flyback converter are equivalent to the equivalent capacitance C in the figure. EQ The flyback converter further includes an auxiliary power tube Q2 connected to the main power tube Q1 and a driving circuit 20 thereof. The driving circuit 20 is used to control the auxiliary power tube Q2 to be turned off according to a PWM signal.

[0042] The flyback converter also includes a self-powered circuit 10 and a drive distribution circuit 30. The drive distribution circuit 30 receives a PWM signal and generates a PWM2 signal for controlling the self-powered state of the self-powered circuit 10 and a PWM1 signal for driving the auxiliary power Q2 on and off to the drive circuit 20 according to the PWM signal. See waveform Figure 7. Specifically, the self-powered circuit 10 includes a first linear voltage regulator circuit (LDO1) 01, a second linear voltage regulator circuit (LDO2) 02, an adjustment circuit 03, a clamping circuit 04 and a power supply capacitor C0. LDO1 and LDO2 are connected between the common connection end of the main power tube Q1 and the auxiliary power tube Q2 and the first end of the power supply capacitor C0. LDO1 and LDO2 are connected in parallel. The second end of the power supply capacitor C0 is grounded. The power supply voltage VDD of the switching power supply is generated on the power supply capacitor C0. The clamping circuit 04 is connected to the high potential end of the power supply capacitor C0 to clamp the power supply voltage VDD. The adjustment circuit 03 is connected to LDO2 and receives a PWM1 signal to control the working state of LDO2. The power supply capacitor C0 is usually integrated outside the control chip, and other components of the power supply circuit 10 are integrated inside the chip.

[0043] Further, after the switching power supply is started, LDO1 is turned on, the main power tube Q2 is a normally-on device, and the voltage Vsw of the first node SW between the main power tube Q1 and the excitation inductor LM charges the power supply capacitor C0 through the main power tube Q2 and LDO1. The power supply current flowing through LDO1 is I LDO1, the supply voltage VDD generated on the power supply capacitor C0 rises. When the supply voltage VDD on the power supply capacitor C0 rises to the startup voltage of the chip, the chip is powered to generate a PWM signal. When the supply voltage VDD rises to the first threshold VDD1 (greater than or equal to the startup voltage of the chip), LDO1 is cut off. LDO1 is used to ensure that the size of the supply voltage VDD is not lower than the set first threshold VDD1, so as to ensure that the control chip can start normally. By setting LDO1, LDO1 is always kept in standby mode. When the chip is started, lightly loaded or dynamic, the charging circuit where LDO1 is located will automatically charge to ensure that the chip can always be powered and avoid power failure. At the same time, since LDO1 can be charged in standby mode, the capacity of the power supply capacitor C0 can be set smaller, which can also meet the power supply requirements. After the chip is powered, a PWM signal is generated. When the PWM signal switches from a low level to a high level, LDO2 is turned on, and the voltage Vsw continues to charge the power supply capacitor C0 through the main power tube Q2 and LDO2. The power supply voltage VDD on the power supply capacitor C0 continues to rise. In an optional manner, after LDO2 is turned on for a period of time, LDO2 is controlled to be disconnected, and the auxiliary power tube Q2 is turned on. The opening time of LDO2 can be controlled according to the falling slope of the voltage Vsw; in another optional manner, when the voltage Vsw drops to a preset value, the preset value represents that the voltage Vsw drops to a value close to the bottom, LDO2 is controlled to be disconnected, and the auxiliary power tube is turned on. The size of the power supply voltage VDD is controlled by controlling the shutdown time of LDO2 to avoid the power supply voltage VDD being too large or too small, and to avoid insufficient power supply or low power supply efficiency. The present invention charges the power supply capacitor C0 after the PWM signal is valid, the Vsw voltage will not be too high, the power supply loss is small, and the high loss caused by the large voltage Vsw charging the capacitor C0 during the shutdown period of the auxiliary power tube is avoided. Furthermore, in order to prevent the power supply voltage VDD from being overcharged and overvoltage, the clamping circuit 04 is used to clamp the power supply voltage VDD at a second threshold when the power supply voltage VDD is greater than a second threshold.

[0044] Furthermore, since dVsw / dt=(I LM -I1) / C EQ , where Vsw is the first node voltage, I LM is a fixed excitation inductor current, C EQ is an equivalent parasitic capacitor, I1 is the current of the main power tube Q1, so the change rate of the first node voltage Vsw can be adjusted by adjusting the current flowing through the main power tube Q1. Furthermore, when LDO2 is turned on, the adjustment circuit 03 generates an adjustment signal VM1 for adjusting the power supply current I flowing through LDO2. LDO2 , and then adjust the current I1 flowing through the main power tube Q1, so that the current I flowing through LDO2 LDO2The reference current is reached, so that the current I1 flowing through the main power tube Q1 reaches the expected current, and the change rate of the first node voltage Vsw reaches the expected change rate, thereby optimizing the system EMI performance and avoiding the first node voltage Vsw from dropping too fast and causing the EMI performance to be too poor, causing damage to the switching power device. According to the above analysis, the self-powered solution of the present invention can not only save power supply loss, but also optimize the EMI of the system.

[0045] like Figure 4 As shown, a schematic diagram of the embodiment 1 of the adjustment circuit 03 of the present invention is shown, which includes a first resistor R1, and the first resistor R1 is connected between LDO1, LDO2 and the power supply capacitor C0. Preferably, the first resistor R1 and the power supply capacitor C0 are arranged outside the chip, and the common connection end of the first resistor R1 and LDO1 / LDO2 is the power supply pin of the control chip, and the power supply voltage VDD is output. When LDO2 is turned on, the power supply current I flowing through LDO2 can be adjusted by adjusting the size of the first resistor R1. LDO2 , and then adjust the change rate of the voltage Vsw flowing through the first node to optimize the EMI performance of the system. Optionally, the adjustment circuit 03 also includes a sampling circuit 301 and a first operational amplifier 302. The sampling circuit 301 is used to sample the voltage on the first resistor R1 to obtain a sampling signal VS. The first operational amplifier 302 performs operational amplification on the sampling signal VS and the reference signal Vref to generate an adjustment signal VM1. The adjustment signal VM2 is used to control the current I flowing through LDO2. LDO2 Further, the sampling circuit 301 includes a logic circuit 3011, a first sampling circuit 3012, a second sampling circuit 3013 and a subtractor 3014. The logic circuit 3011 receives a PWM2 signal and may also receive a PWM signal. When the PWM2 signal effectively indicates that the power supply capacitor C0 is charged, the logic circuit 3011 outputs a control signal tr1 to control the first sampling circuit 3012 to sample the VDD voltage to obtain a first sampling signal VDD1. When the PWM2 signal is invalid, indicating that the power supply capacitor C0 is not charged and LDO2 is turned off, the logic circuit 3011 outputs a control signal tr1 to control the first sampling circuit 3012 to sample the VDD voltage to obtain a first sampling signal VDD1. The control signal tr2 controls the second sampling circuit 3032 to sample the VDD voltage to obtain the second sampling signal VDD2. The subtractor 3014 subtracts the first sampling signal VDD1 from the second sampling signal VDD2 to obtain the sampling signal VS representing the battery voltage. Furthermore, when the capacitor C0 is charged, the supply voltage VDD is equal to the voltage on the capacitor C0 plus the voltage on the resistor R1. When the capacitor C0 is not charged, the supply voltage VDD is equal to the voltage on the capacitor C0. Assuming that the voltage on the capacitor C0 does not change much before and after the capacitor C0 is charged, and when LDO2 is turned on, the charging current I LDO2 When the expected reference current is reached, the difference VS between the first sampling signal VDD1 and the second sampling signal VDD2 can represent the voltage on the turn-on resistor R1 of the LDO2.

[0046] like Figure 5 As shown, a schematic diagram of embodiment 2 of the adjustment circuit 03 of the present invention is illustrated, including a sampling circuit 303, a sampling and holding circuit 301 and a second operational amplifier 302. The sampling circuit 303 samples the change rate of the first node voltage Vsw to obtain a sampling signal VS1. Optionally, the sampling circuit 303 includes a capacitor C301 and a resistor R301 connected in series, and the voltage at the common connection end of the capacitor C301 and the resistor R301 is the sampling signal VS1. The sampling and holding circuit 301 receives the PWM2 signal. When the PWM2 signal is valid, that is, when the LDO2 is charged, the sampling signal VS1 is sampled and held to obtain the holding signal V1. The second operational amplifier 302 performs error amplification on the reference signal Vref and the holding signal V1 to obtain a regulating voltage for controlling the on-current of the LDO, thereby adjusting the change rate of the first node voltage Vsw to optimize EMI.

[0047] like Figure 6 As shown, a schematic diagram of the second linear voltage stabilizing circuit (LDO2) of the present invention is illustrated, including an adjustment tube M201, a current mirror 201 and a diode D1, wherein the positive electrode of the diode D1 is connected to the common connection terminal (the voltage of the terminal is Vd2) of the main power tube Q1 and the auxiliary power tube Q2, the negative electrode of the diode D1 is connected to one end of the current mirror 201, the input end of the current mirror 201 is connected to the adjustment tube M201, the output end of the current mirror is connected to the high potential end of the power supply capacitor C0, the control end of the adjustment tube M201 receives the adjustment voltage VM1 output by the adjustment circuit 03, and controls the current flowing through the adjustment tube M201 according to the adjustment voltage VM1, i.e., the input current of the current mirror 201, and the output current of the current mirror 201 is the charging current of the power supply capacitor C0, i.e., the current I LDO2 The output current of the current mirror 201 is proportional to the input current, preferably 1:1. The LDO2 adjusts the charging current I provided to the power supply capacitor C0 by the LDO2 according to the magnitude of the adjustment voltage VM1. LDO2 The size of the first node voltage Vsw is adjusted, and then the change rate of the first node voltage Vsw is adjusted to adjust the switching speed of the main power tube Q1, thereby optimizing the EMI of the system and avoiding damage to the power devices.

[0048] like Figure 7 As shown, the working waveform diagram of the self-powered circuit of the present invention is shown. Figure 3 The schematic circuit diagram illustrates the waveform diagram: the drive distribution circuit 30 distributes the PWM signal to generate the PWM1 signal and the PWM2 signal. During the time period t1-t3, the PWM signal is valid. During the time period t1-t2 during which the PWM is valid, PWM2 is valid, and the LDO2 is controlled to be turned on. The current I LDO2The capacitor C0 is charged, the power supply voltage VDD rises, the excitation inductor Lm is charged, the excitation inductor current ILm rises, the voltage Vds_Q2 at both ends of the auxiliary power tube Q2 drops to the Miller platform voltage of the main power tube Q1, and the first node voltage Vsw drops. At t2, the power supply voltage VDD rises to the second threshold VDD2, and the first node voltage Vsw drops to the bottom; during the t2-t3 period, PWM1 is valid, PWM2 is invalid, the auxiliary power tube Q2 is turned on, LDO2 is short-circuited and cut off, and the current I on LDO2 LDO2 The voltage Vsw of the first node remains at the bottom of the valley. As the power supply voltage VDD decreases, the voltage Vds_Q2 across the auxiliary power tube Q2 drops to the bottom of the valley. The excitation inductor is charged, and the excitation inductor current ILm increases. It can be seen from the waveform that after the inductor current ILm drops to the bottom of the valley and PWM is effective, before the auxiliary power tube Q2 is turned on, the power supply capacitor C0 is powered by LDO2, and the parasitic capacitor C EQ The above part of energy is used to charge the power supply capacitor C0, which can save part of the power supply loss. In addition, it can avoid the problem of large loss caused by high voltage Vsw charging capacitor C0, thereby optimizing the power supply efficiency. Furthermore, by adjusting the current I LDO2 The falling speed of Vsw can be adjusted to optimize system EMI.

[0049] Although the embodiments are described and illustrated separately above, some common technologies are involved. It is the opinion of ordinary technicians in this field that the embodiments can be replaced and integrated. If the content is not clearly recorded in one of the embodiments, reference can be made to another recorded embodiment.

[0050] The above-described implementation methods do not constitute a limitation on the protection scope of the technical solution. Any modification, equivalent replacement and improvement made within the spirit and principle of the above-described implementation methods shall be included in the protection scope of the technical solution.

Claims

1. A self-powered circuit of a switching power supply, the switching power supply comprising an inductor, a main power tube and an auxiliary power tube, the inductor is connected to a first end of the main power tube, the auxiliary power tube is connected between a second end of the main power tube and a ground terminal, characterized in that: include, A power supply capacitor, used to generate a power supply voltage for a control chip of the switching power supply; A first linear voltage stabilizing circuit, connected between a common connection terminal of the main power tube and the auxiliary power tube and a power supply capacitor; A second linear voltage stabilizing circuit, connected in parallel with the first linear voltage stabilizing circuit; an adjustment circuit connected to the second linear voltage stabilization circuit, and adjusting a first charging current flowing through the second linear voltage stabilization circuit when the second linear voltage stabilization circuit is turned on, so that a voltage change rate of a first node between the main power tube and the inductor reaches a preset change rate; Among them, during the startup of the switching power supply, the first linear voltage regulator circuit is turned on and the power supply capacitor is charged; when the PWM signal generated by the control chip of the switching power supply is valid, the second linear voltage regulator circuit is turned on and the power supply capacitor is charged.

2. The self-powered circuit according to claim 1, characterized in that: When the supply voltage reaches a first threshold, the first linear voltage regulator circuit is turned off.

3. The self-powered circuit according to claim 1, characterized in that: When the second linear voltage regulator circuit is turned on, the adjustment circuit adjusts the first charging current to a reference current so that a voltage change rate of a first node between the main power tube and the inductor reaches a preset change rate.

4. The self-powered circuit according to claim 1, characterized in that: The adjustment circuit includes a first resistor, which is connected to a charging path between the second linear voltage regulator circuit and the charging capacitor. The size of the first charging current is set by setting the size of the first resistor.

5. The self-powered circuit according to claim 4, characterized in that: The adjustment circuit further includes a sampling circuit and a first operational amplifier. When the second linear voltage stabilization circuit is turned on, the sampling circuit samples the voltage of the first resistor to obtain a voltage sampling signal. The first operational amplifier performs operational amplification on the voltage sampling signal and a first reference voltage to obtain a regulating voltage, and the regulating voltage controls the magnitude of the first charging current.

6. The self-powered circuit according to claim 5, characterized in that: The sampling circuit is configured to: when the second linear voltage regulator circuit is turned on, the voltage of the power supply end is sampled to obtain a first sampling signal; when the second linear voltage regulator circuit is turned off, the voltage of the power supply end is sampled to obtain a second sampling signal. Subtracting the first sampling signal from the second sampling signal to obtain a voltage sampling signal representing the voltage of the first resistor; The power supply end is a common connection end of the second linear voltage stabilization circuit and the first resistor.

7. The self-powered circuit according to claim 5, characterized in that: The first resistor and the power supply capacitor are integrated outside the control chip, and the first linear voltage stabilizing circuit, the second linear voltage stabilizing circuit, the main power tube and the auxiliary power tube are integrated inside the control chip.

8. The self-powered circuit according to claim 1, characterized in that: The adjustment circuit includes a change rate detection circuit, which is used to detect the change rate of the first node voltage to obtain a change rate detection signal, and adjust the first charging current according to the change rate detection signal.

9. The self-powered circuit according to claim 8, characterized in that: The adjustment circuit further includes a sampling and holding circuit and a second operational amplifier, and the sampling and holding circuit samples and holds the change rate detection signal when the second linear adjustment circuit is turned on; The second operational amplifier performs operational amplification on the change rate detection signal obtained by the sample and hold circuit and the second reference voltage to obtain the adjustment voltage, and the adjustment voltage controls the magnitude of the first charging current.

10. The self-powered circuit according to claim 1, characterized in that: It also includes a clamping circuit connected to the high potential end of the power supply capacitor, and is used to clamp the power supply voltage at a preset value when the power supply voltage is greater than a preset value.

11. The self-powered circuit according to claim 1, characterized in that: When the turn-on time of the second linear voltage stabilizing circuit reaches a preset time, the second linear voltage stabilizing circuit is turned off, and the auxiliary power tube is turned on.

12. The self-powered circuit according to claim 1, characterized in that: When the voltage of the first node between the main power tube and the inductor drops to a preset voltage, the second linear voltage regulator circuit is turned off and the auxiliary power tube is turned on.

13. The self-powered circuit according to claim 1, characterized in that: The power tube is a depletion-type transistor.

14. A switching power supply, comprising a main power tube and an inductor connected to each other, characterized in that: It also includes the self-powered circuit described in any one of claims 1 to 13, which is used to generate the power supply voltage of the control chip of the switching power supply.

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