Bridgeless power factor correction circuit and control method thereof

Abstract

The invention discloses a bridgeless power factor correction circuit and a control method thereof, and belongs to the technical field of power factor correction. The bridgeless power factor correction circuit comprises an input capacitor, an energy storage module, a polarity control module, at least one energy storage inductor, at least one loop control module and a control module, the energy storage module comprises a first energy storage capacitor and a second energy storage capacitor which are connected in series between the first output end and the second output end of the bridgeless power factor correction circuit, and the loop control module comprises a third switch unit, a fourth switch unit and a fifth switch unit. The fifth switch unit is connected between the second node and the first node of the loop control module; wherein the first node of the loop control module is connected with the second end of the energy storage inductor corresponding to the loop control module, and the second node is a connection node between the first energy storage capacitor and the second energy storage capacitor. The size of the bridgeless power factor correction circuit can be reduced, and the efficiency of the bridgeless power factor correction circuit is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of power factor correction, and in particular to a bridgeless power factor correction circuit and a control method thereof. Background Art

[0002] In power supply products, bridgeless power factor correction circuits have attracted much attention due to their unique design. Compared with traditional bridge power factor correction circuits, bridgeless power factor correction circuits can significantly reduce conduction losses and help improve power conversion efficiency.

[0003] However, the volume of the traditional bridgeless power factor correction circuit is not significantly reduced compared to the bridge power factor correction circuit, and the efficiency improvement is limited in practical applications, making it difficult for the bridgeless power factor correction circuit to be widely used. Summary of the invention

[0004] The present invention provides a bridgeless power factor correction circuit and a control method thereof, so as to reduce the volume of the bridgeless power factor correction circuit and improve the efficiency of the bridgeless power factor correction circuit.

[0005] According to one aspect of the present invention, there is provided a bridgeless power factor correction circuit, comprising: An input capacitor connected between a first input terminal and a second input terminal of the bridgeless power factor correction circuit; An energy storage module, comprising a first energy storage capacitor and a second energy storage capacitor connected in series between a first output terminal and a second output terminal of the bridgeless power factor correction circuit; The polarity control module comprises a first switch unit and a second switch unit; the first switch unit is connected between the first input terminal and the first output terminal, and the second switch unit is connected between the first input terminal and the second output terminal; At least one energy storage inductor; the first end of each of the energy storage inductors is connected to the second input end; A loop control module corresponding to the energy storage inductor one by one; the loop control module includes: a third switch unit, a fourth switch unit and a fifth switch unit; the third switch unit is connected between the first output end and the first node of the loop control module, the fourth switch unit is connected between the second output end and the first node of the loop control module, and the fifth switch unit is connected between the second node and the first node of the loop control module; wherein the first node of the loop control module is connected to the second end of the energy storage inductor corresponding to the loop control module, and the second node is a connection node between the first energy storage capacitor and the second energy storage capacitor; The control module is respectively connected to the control end of the first switch unit, the control end of the second switch unit, the control end of each of the third switch units, the control end of each of the fourth switch units and the control end of each of the fifth switch units.

[0006] Optionally, the control end of the fifth switch unit includes a first sub-control end and a second sub-control end; the control module is connected to the first sub-control end and the second sub-control end respectively; The fifth switch unit includes: a first transmission subunit and a second transmission subunit connected in series between the first node and the second node, the first sub-control end serving as the control end of the first transmission subunit, and the second sub-control end serving as the control end of the second transmission subunit.

[0007] Optionally, the first switch unit includes a first transistor, a control electrode of the first transistor is connected to a control terminal of the first switch unit, a first electrode of the first transistor is connected to the first input terminal, and a second electrode of the first transistor is connected to the first output terminal; The second switch unit includes a second transistor, a control electrode of the second transistor is connected to the control end of the second switch unit, a first electrode of the second transistor is connected to the second output end, and a second electrode of the second transistor is connected to the first input end; The third switch unit comprises a third transistor, a control electrode of the third transistor is connected to the control end of the third switch unit, a first electrode of the third transistor is connected to the first node, and a second electrode of the third transistor is connected to the first output end; The fourth switch unit includes a fourth transistor, a control electrode of the fourth transistor is connected to the control end of the fourth switch unit, a first electrode of the fourth transistor is connected to the second output end, and a second electrode of the fourth transistor is connected to the first node; The first transmission sub-unit includes a fifth transistor, a control electrode of the fifth transistor is connected to the first sub-control terminal of the fifth switch unit, and a second electrode of the fifth transistor is connected to the first node; The second transmission sub-unit includes a sixth transistor, a control electrode of the sixth transistor is connected to the second sub-control terminal of the fifth switch unit, a first electrode of the sixth transistor is connected to the first electrode of the fifth transistor, and a second electrode of the sixth transistor is connected to the second node.

[0008] Optionally, the withstand voltage of the first transistor, the withstand voltage of the second transistor, the withstand voltage of the third transistor and the withstand voltage of the fourth transistor are all greater than the absolute value of the voltage difference between the first output terminal and the second output terminal; the withstand voltage of the fifth transistor and the withstand voltage of the sixth transistor are both greater than half of the absolute value of the voltage difference between the first output terminal and the second output terminal; the on-state impedance of the fifth transistor and the sixth transistor are both the first impedance, and the on-state impedance of the first transistor, the second transistor, the third transistor and the fourth transistor are all the second impedance, and the first impedance is half of the second impedance.

[0009] Optionally, the withstand voltage of the first energy storage capacitor and the withstand voltage of the second energy storage capacitor are both greater than half of the absolute value of the voltage difference between the first output terminal and the second output terminal.

[0010] Optionally, the bridgeless power factor correction circuit includes two energy storage inductors and two loop control modules.

[0011] According to another aspect of the present invention, a control method of a bridgeless power factor correction circuit is provided, which is used to control the bridgeless power factor correction circuit provided by any of the above embodiments, and is executed by the control module; The control method of the bridgeless power factor correction circuit includes: For the polarity control module, according to the positive or negative of the first voltage difference, one of the first switch unit and the second switch unit is controlled to be turned on and the other is turned off; wherein the first voltage difference is the voltage difference between the second input terminal and the first input terminal; For any of the loop control modules, according to the absolute value of the first voltage difference, one of the third switch unit and the fourth switch unit is controlled to be alternately turned on with the fifth switch unit, and the other of the third switch unit and the fourth switch unit is controlled to be turned off.

[0012] Optionally, according to the positive or negative value of the first voltage difference, controlling one of the first switch unit and the second switch unit to be turned on and the other to be turned off includes: When the first voltage difference is a positive value, controlling the first switch unit to be turned off, and controlling the second switch unit to be turned on; When the first voltage difference is a negative value, controlling the second switch unit to be turned off, and controlling the first switch unit to be turned on; According to the absolute value of the first voltage difference, controlling one of the third switch unit and the fourth switch unit to be alternately turned on with the fifth switch unit, and controlling the other of the third switch unit and the fourth switch unit to be turned off, comprising: In the case where the first voltage difference is a positive value, when the absolute value of the first voltage difference is less than or equal to the second voltage difference, the fourth switch unit and the fifth switch unit are controlled to be alternately turned on, and the third switch unit is controlled to be turned off; when the absolute value of the first voltage difference is greater than the second voltage difference, the third switch unit and the fifth switch unit are controlled to be alternately turned on, and the fourth switch unit is controlled to be turned off; wherein the second voltage difference is half of the absolute value of the voltage difference between the first output terminal and the second output terminal; In the case that the first voltage difference is a negative value, when the absolute value of the first voltage difference is less than or equal to the second voltage difference, the third switch unit and the fifth switch unit are controlled to be alternately turned on, and the fourth switch unit is controlled to be turned off; when the absolute value of the first voltage difference is greater than the second voltage difference, the fourth switch unit and the fifth switch unit are controlled to be alternately turned on, and the third switch unit is controlled to be turned off.

[0013] Optionally, the fifth switch unit includes: a first transmission subunit and a second transmission subunit; The controlling the fourth switch unit and the fifth switch unit to be alternately turned on comprises: controlling the first transmission sub-unit to remain turned on, and controlling the fourth switch unit and the second transmission sub-unit to be alternately turned on; The controlling the third switch unit and the fifth switch unit to be alternately turned on includes: controlling the second transmission subunit to remain turned on, and controlling the third switch unit and the first transmission subunit to be alternately turned on.

[0014] Optionally, the bridgeless power factor correction circuit includes two energy storage inductors and two loop control modules; When the third switch unit or the fourth switch unit of one of the loop control modules is controlled to be turned on, the fifth switch unit of another loop control module is controlled to be turned on.

[0015] The technical solution of the embodiment of the present invention is to set a bridgeless power factor correction circuit including an input capacitor, an energy storage module, a control module, a polarity control module, at least one energy storage inductor and at least one loop control module. The energy storage module includes a first energy storage capacitor and a second energy storage capacitor connected in series, so that the first energy storage capacitor and the second energy storage capacitor provide an output voltage in a series form, which can effectively reduce the requirements for the energy storage capacity of the energy storage inductor, thereby reducing the size of the energy storage inductor. The energy storage inductor occupies most of the area of ​​the bridgeless power factor correction circuit, and the size of the energy storage inductor greatly affects the size of the entire circuit; therefore, reducing the volume of the energy storage inductor can effectively reduce the volume of the bridgeless power factor correction circuit. In addition, the voltage across each energy storage capacitor can eventually reach half of the required output voltage, which can effectively reduce the loss of the energy storage inductor and improve the efficiency of the bridgeless power factor correction circuit. And, in the circuit, in order to realize charging of two energy storage capacitors, the control module can control the on and off of the first switch unit, the second switch unit, the third switch unit, the fourth switch unit and the fifth switch unit according to the input voltage, thereby controlling the charging process of the two energy storage capacitors and realizing bridgeless power factor correction. In summary, the embodiment of the present invention can reduce the volume of the bridgeless power factor correction circuit and improve the efficiency of the bridgeless power factor correction circuit.

[0016] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 A schematic structural diagram of a bridgeless power factor correction circuit provided by an embodiment of the present invention; Figure 2 A schematic structural diagram of another bridgeless power factor correction circuit provided by an embodiment of the present invention; Figure 3 is a schematic diagram of a comparison of actually measured waveforms between a first driving voltage at a gate of a first transistor and an input voltage; Figure 4 is a schematic diagram of a comparison of actually measured waveforms between a second driving voltage at the gate of the second transistor and an input voltage; Figure 5 is a schematic diagram of a comparison of actually measured waveforms between a third driving voltage of a gate of a third transistor and an input voltage; Figure 6 is a schematic diagram of a comparison of actually measured waveforms between a fourth driving voltage of a gate of a fourth transistor and an input voltage; Figure 7 is a schematic diagram of a comparison of actually measured waveforms between a fifth driving voltage of a gate of a fifth transistor and an input voltage; Figure 8 is a schematic diagram of a comparison of actually measured waveforms between a sixth driving voltage of a gate of a sixth transistor and an input voltage; Fig. 9 It is the measured waveform diagram of input current and input voltage of bridgeless power factor correction circuit; Fig.10 A schematic structural diagram of another bridgeless power factor correction circuit provided by an embodiment of the present invention; Fig.11 A flow chart of a control method for a bridgeless power factor correction circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0019] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0020] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0021] An embodiment of the present invention provides a bridgeless power factor correction circuit. Figure 1 A schematic diagram of a bridgeless power factor correction circuit according to an embodiment of the present invention is provided. Figure 1 The bridgeless power factor correction circuit includes: an input capacitor C0, an energy storage module 10, a control module 40, a polarity control module 20, at least one energy storage inductor L1 and at least one loop control module 30.

[0022] The input capacitor C0 is connected between the first input terminal N and the second input terminal L of the bridgeless power factor correction circuit. The energy storage module 10 includes a first energy storage capacitor C1 and a second energy storage capacitor C2 connected in series between the first output terminal OUT1 and the second output terminal OUT2 of the bridgeless power factor correction circuit. The polarity control module 20 includes a first switch unit 21 and a second switch unit 22, the first switch unit 21 is connected between the first input terminal N and the first output terminal OUT1, and the second switch unit 22 is connected between the first input terminal N and the second output terminal OUT2. The first end of each energy storage inductor L1 is connected to the second input terminal L. Each loop control module 30 corresponds to each energy storage inductor L1 one by one; the loop control module 30 includes a third switch unit 31, a fourth switch unit 32 and a fifth switch unit 33; in any loop control module 30, the third switch unit 31 is connected between the first output terminal OUT1 and the first node A of the loop control module 30, the fourth switch unit 32 is connected between the second output terminal OUT2 and the first node A of the loop control module 30, and the fifth switch unit 33 is connected between the second node B and the first node A of the loop control module 30; wherein the first node A of the loop control module 30 is connected to the second end of the energy storage inductor L1 corresponding to the loop control module 30, and the second node B is a connection node between the first energy storage capacitor C1 and the second energy storage capacitor C2; the control module 40 is respectively connected to the control end G1 of the first switch unit 21, the control end G2 of the second switch unit 22, the control end G3 of each third switch unit 31, the control end G4 of each fourth switch unit 32 and the control end G5 of each fifth switch unit 33.

[0023] The bridgeless power factor correction circuit can be applied to various power supplies. The first input terminal N and the second input terminal L are connected to an input voltage, which can be a single-phase AC input. The first output terminal OUT1 and the second output terminal OUT2 are connected to an output voltage, which is a power factor correction voltage. Figure 1 An energy storage inductor L1 and a loop control module 30 are exemplarily provided, but are not intended to limit the present invention.

[0024] For any switch unit among the first switch unit 21, the second switch unit 22, the third switch unit 31, the fourth switch unit 32 and the fifth switch unit 33, the switch unit is used to turn on or off according to the potential of its control terminal. The on potential of each switch unit can be set to be consistent or inconsistent according to requirements. Any switch unit can be composed of any device with a controllable switch function.

[0025] The control module 40 realizes power factor correction by controlling the on and off of each unit. The specific analysis is as follows: When the control module 40 controls the second switch unit 22 and the fourth switch unit 32 to be turned on, and controls other switch units to be turned off, a first loop can be formed to enable the input capacitor C0 to store energy in the energy storage inductor L1.

[0026] When the control module 40 controls the second switch unit 22 and the fifth switch unit 33 to be turned on, and controls the other switch units to be turned off, a second loop can be formed at this time to realize that the input capacitor C0 is connected in series with the energy storage inductor L1 to release energy to the second energy storage capacitor C2, or to realize that the input capacitor C0 stores energy for the energy storage inductor L1 and the second energy storage capacitor C2 at the same time. Among them, the specific function of the second loop is related to the size of the input voltage. For example, when the absolute value of the input voltage is less than or equal to half of the absolute value of the output voltage, the second loop is used to realize that the input capacitor C0 is connected in series with the energy storage inductor L1 to release energy to the second energy storage capacitor C2; when the absolute value of the input voltage is greater than half of the absolute value of the output voltage, the second loop is used to realize that the input capacitor C0 stores energy for the energy storage inductor L1 and the second energy storage capacitor C2 at the same time.

[0027] When the control module 40 controls the second switch unit 22 and the third switch unit 31 to be turned on, and controls other switch units to be turned off, a third loop can be formed to enable the input capacitor C0 and the energy storage inductor L1 to release energy to the first energy storage capacitor C1 and the second energy storage capacitor C2.

[0028] When the control module 40 controls the first switch unit 21 and the third switch unit 31 to be turned on, and controls other switch units to be turned off, a fourth loop can be formed to enable the input capacitor C0 to store energy in the energy storage inductor L1.

[0029] When the control module 40 controls the first switch unit 21 and the fifth switch unit 33 to be turned on, and controls the other switch units to be turned off, a fifth loop can be formed at this time to realize that the input capacitor C0 is connected in series with the energy storage inductor L1 to release energy to the first energy storage capacitor C1, or to realize that the input capacitor C0 stores energy for the energy storage inductor L1 and the first energy storage capacitor C1 at the same time. Among them, the specific function of the fifth loop is related to the size of the input voltage. For example, when the absolute value of the input voltage is less than or equal to half of the absolute value of the output voltage, the fifth loop is used to realize that the input capacitor C0 is connected in series with the energy storage inductor L1 to release energy to the first energy storage capacitor C1; when the absolute value of the input voltage is greater than half of the absolute value of the output voltage, the second loop is used to realize that the input capacitor C0 stores energy for the energy storage inductor L1 and the first energy storage capacitor C1 at the same time.

[0030] When the control module 40 controls the first switch unit 21 and the fourth switch unit 32 to be turned on, and controls other switch units to be turned off, a sixth loop can be formed to enable the input capacitor C0 and the energy storage inductor L1 to release energy to the first energy storage capacitor C1 and the second energy storage capacitor C2.

[0031] In summary, through the coordination of the on-off states of each switch unit, a variety of circuits can be provided for realizing different energy storage / charging functions. Therefore, the control module 40 can reasonably select the required circuit and control the action time of each circuit according to the voltage state (such as including the positive and negative voltage and the voltage value) between the first input terminal N and the second input terminal L to realize power factor correction.

[0032] Exemplarily, the first output terminal OUT1 is a positive output terminal, and the second output terminal OUT2 is a negative output terminal; the positive electrode of the first energy storage capacitor C1 is connected to the first output terminal OUT1, the negative electrode of the first energy storage capacitor C1 is connected to the second node B, the positive electrode of the second energy storage capacitor C2 is connected to the second node B, and the negative electrode of the second energy storage capacitor C2 is connected to the second output terminal OUT2. Correspondingly, when the voltage of the second input terminal L is a positive voltage compared to the voltage of the first input terminal N, the control module 40 can control the first loop and the second loop to appear alternately according to the magnitude of the positive voltage, so as to realize the alternation of storing energy in the energy storage inductor L1 and supplying power to the second energy storage capacitor C2; or control the second loop and the third loop to appear alternately, so as to realize the alternation of storing energy in the energy storage inductor L1 and the second energy storage capacitor C2 at the same time and supplying power to the first energy storage capacitor C1 and the second energy storage capacitor C2 at the same time. When the voltage at the second input terminal L is more negative than the voltage at the first input terminal N, the control module 40 can control the fourth circuit and the fifth circuit to appear alternately according to the size of the negative voltage, so as to realize the alternation of storing energy in the energy storage inductor L1 and supplying power to the first energy storage capacitor C1; or control the fifth circuit and the sixth circuit to appear alternately, so as to realize the alternation of storing energy in the energy storage inductor L1 and the first energy storage capacitor C1 and supplying power to the first energy storage capacitor C1 and the second energy storage capacitor C2 at the same time.

[0033] The technical solution of the embodiment of the present invention is to set a bridgeless power factor correction circuit including an input capacitor C0, an energy storage module 10, a control module 40, a polarity control module 20, at least one energy storage inductor L1 and at least one loop control module 30. The energy storage module 10 includes a first energy storage capacitor C1 and a second energy storage capacitor C2 connected in series, so that the first energy storage capacitor C1 and the second energy storage capacitor C2 provide an output voltage in a series form, which can effectively reduce the requirements for the energy storage capacity of the energy storage inductor L1, thereby reducing the size of the energy storage inductor L1. The energy storage inductor L1 occupies most of the area of ​​the bridgeless power factor correction circuit, and the size of the energy storage inductor L1 greatly affects the size of the entire circuit; therefore, reducing the volume of the energy storage inductor L1 can effectively reduce the volume of the bridgeless power factor correction circuit. In addition, the voltage across each energy storage capacitor finally reaches half of the required output voltage, which can effectively reduce the loss of the energy storage inductor L1 and improve the efficiency of the bridgeless power factor correction circuit. And, in the circuit, in order to realize charging of two energy storage capacitors, the control module 40 can control the on and off of the first switch unit 21, the second switch unit 22, the third switch unit 31, the fourth switch unit 32 and the fifth switch unit 33 according to the input voltage, thereby controlling the charging process of the two energy storage capacitors and realizing bridgeless power factor correction. In summary, the embodiment of the present invention can reduce the volume of the bridgeless power factor correction circuit and improve the efficiency of the bridgeless power factor correction circuit.

[0034] Figure 2 A schematic diagram of another bridgeless power factor correction circuit provided by an embodiment of the present invention, referring to Figure 2 On the basis of the above embodiment, optionally, the control terminal G5 of the fifth switch unit 33 includes a first sub-control terminal G5-1 and a second sub-control terminal G5-2; the control module 40 is connected to the first sub-control terminal G5-1 and the second sub-control terminal G5-2 respectively. The fifth switch unit 33 includes: a first transmission sub-unit 331 and a second transmission sub-unit 332 connected in series between the first node A and the second node B of the loop control module 30 where the fifth switch unit 33 is located, the first sub-control terminal G5-1 serves as the control terminal of the first transmission sub-unit 331, and the second sub-control terminal G5-2 serves as the control terminal of the second transmission sub-unit 332.

[0035] The first transmission subunit 331 is used to turn on or off according to the potential of the first sub-control terminal G5-1, and the second transmission subunit 332 is used to turn on or off according to the potential of the second sub-control terminal G5-2. When both the first transmission subunit 331 and the second transmission subunit 332 are turned on, the fifth switch unit 33 is turned on; when at least one of the first transmission subunit 331 and the second transmission subunit 332 is turned off, the fifth switch unit 33 is turned off.

[0036] The functions of the functional modules in the bridgeless power factor correction circuit are described in the above-mentioned embodiments. The specific structures that the functional modules may have are described below, but this is not intended to limit the present invention.

[0037] Continue to refer Figure 2 On the basis of the above embodiments, optionally, the first switch unit 21 includes a first transistor Q1, the control electrode of the first transistor Q1 is connected to the control terminal G1 of the first switch unit 21, the first electrode of the first transistor Q1 is connected to the first input terminal N, and the second electrode of the first transistor Q1 is connected to the first output terminal OUT1. The second switch unit 22 includes a second transistor Q2, the control electrode of the second transistor Q2 is connected to the control terminal G2 of the second switch unit 22, the first electrode of the second transistor Q2 is connected to the second output terminal OUT2, and the second electrode of the second transistor Q2 is connected to the first input terminal N. The third switch unit 31 includes a third transistor Q3, the control electrode of the third transistor Q3 is connected to the control terminal G3 of the third switch unit 31, the first electrode of the third transistor Q3 is connected to the first node A, and the second electrode of the third transistor Q3 is connected to the first output terminal OUT1. The fourth switch unit 32 includes a fourth transistor Q4, the control electrode of the fourth transistor Q4 is connected to the control terminal G4 of the fourth switch unit 32, the first electrode of the fourth transistor Q4 is connected to the second output terminal OUT2, and the second electrode of the fourth transistor Q4 is connected to the first node A. The first transmission sub-unit 331 includes a fifth transistor Q5, a control electrode of the fifth transistor Q5 is connected to the first sub-control terminal G5-1 of the fifth switch unit 33, and a second electrode of the fifth transistor Q5 is connected to the first node A. The second transmission sub-unit 332 includes a sixth transistor Q6, a control electrode of the sixth transistor Q6 is connected to the second sub-control terminal G5-2 of the fifth switch unit 33, a first electrode of the sixth transistor Q6 is connected to the first electrode of the fifth transistor Q5, and a second electrode of the sixth transistor Q6 is connected to the second node B.

[0038] Exemplarily, the first transistor Q1 , the second transistor Q2 , the third transistor Q3 , the fourth transistor Q4 , the fifth transistor Q5 , and the sixth transistor Q6 may all be field effect transistors.

[0039] On the basis of the above embodiments, the control module 40 can optionally control the on and off of the first switch unit 21 and the second switch unit 22 according to the positive or negative voltage difference between the second input terminal L and the first input terminal N, so that based on the control of the two switch units in the polarity control module 20, the conversion of AC input to DC output can be guaranteed. On this basis, the control module 40 can select one of the third switch unit 31 and the fourth switch unit 32 to be turned on alternately with the fifth switch unit 33 according to the voltage difference between the second input terminal L and the first input terminal N, so as to select the most appropriate power factor correction strategy for different input voltages. Figure 2Taking the specific circuit structure in as an example, the working process of the bridgeless power factor correction circuit under different conditions is explained.

[0040] Specifically, the voltage on any energy storage capacitor is half of the output voltage. When the absolute value of the input voltage is less than or equal to the absolute value of half the output voltage, the first strategy can be used to control the working process of the bridgeless power factor correction circuit; when the absolute value of the input voltage is greater than the absolute value of half the output voltage, the second strategy can be used to control the working process of the bridgeless power factor correction circuit. Then, when the amplitude of the input voltage is less than or equal to the absolute value of half the output voltage, the first strategy can always be executed; when the amplitude of the input voltage is greater than the absolute value of half the output voltage, the first strategy and the second strategy can be executed alternately in real time according to the amplitude of the input voltage. The above strategies are explained below through specific embodiments.

[0041] For example, the output voltage is a DC voltage of 380 V, and half of the output voltage is 190 V. Then, when the absolute value of the input voltage is less than or equal to 190 V, the first strategy may be adopted; when the absolute value of the input voltage is greater than 190 V, the second strategy may be adopted.

[0042] The first strategy specifically includes: when the voltage difference between the second input terminal L and the first input terminal N is positive, that is, the voltage of the second input terminal L is positive voltage compared to the voltage of the first input terminal N, the control module 40 controls the second transistor Q2 and the fifth transistor Q5 to remain continuously turned on, and controls the fourth transistor Q4 and the sixth transistor Q6 to be turned on alternately at high frequency, where the fourth transistor Q4 is a switch tube and the sixth transistor Q6 is a freewheeling tube. At this time, the input capacitor C0, the energy storage inductor L1, the second transistor Q2, the fourth transistor Q4, the fifth transistor Q5, the sixth transistor Q6 and the second energy storage capacitor C2 form a first boost converter. During the conduction period of the fourth transistor Q4, the input capacitor C0 stores energy for the energy storage inductor L1; after the fourth transistor Q4 is turned off, the sixth transistor Q6 is turned on, and the input capacitor C0 is connected in series with the energy storage inductor L1 to release energy to the second energy storage capacitor C2. Exemplarily, the sixth transistor Q6 can use a transistor with a body diode, so that the sixth transistor Q6 can be naturally turned on and off through its own body diode.

[0043] When the voltage difference between the second input terminal L and the first input terminal N is a negative value, that is, the voltage of the second input terminal L is a negative voltage compared to the voltage of the first input terminal N, the control module 40 controls the first transistor Q1 and the sixth transistor Q6 to remain continuously turned on, and controls the third transistor Q3 and the fifth transistor Q5 to be turned on alternately at high frequency, where the third transistor Q3 is a switch tube and the fifth transistor Q5 is a freewheeling tube. At this time, the input capacitor C0, the energy storage inductor L1, the first transistor Q1, the third transistor Q3, the fifth transistor Q5, the sixth transistor Q6 and the first energy storage capacitor C1 form a second boost converter. During the conduction period of the third transistor Q3, the input capacitor C0 stores energy for the energy storage inductor L1; after the third transistor Q3 is turned off, the fifth transistor Q5 is turned on, and the input capacitor C0 is connected in series with the energy storage inductor L1 to release energy to the first energy storage capacitor C1. Exemplarily, the fifth transistor Q5 can be a transistor with a body diode, so that the fifth transistor Q5 can be naturally turned on and off through its own body diode.

[0044] Through this setting, the voltage between the first input terminal N and the second input terminal L can be used to supply power to the second energy storage capacitor C2 through the first boost converter during the positive half cycle, and the voltage between the first input terminal N and the second input terminal L can be used to supply power to the first energy storage capacitor C1 through the second boost converter during the negative half cycle, so that the voltage across the first energy storage capacitor C1 and the final voltage across the second energy storage capacitor C2 are both half of the output voltage. Then, each boost converter outputs energy to the first energy storage capacitor C1 and the second energy storage capacitor C2 respectively for the energy storage superimposed input voltage on the energy storage inductor L1, which is equivalent to twice the input superimposed inductor energy provided to the output energy. For example, when 100VAC is boosted to 380V, each boost converter boosts 100VAC to 190V. In this way, compared with the traditional bridgeless power factor correction circuit that directly releases energy to the output by superimposing the energy stored in the energy storage inductor on the input voltage (for example, directly boosting 100VAC to 380V), the boost ratio of the input voltage to the output voltage can be effectively reduced, so that the total energy storage required by the energy storage inductor L1 is reduced, thereby reducing the loss of the energy storage inductor L1, improving the efficiency of the power factor correction circuit, and reducing the volume of the energy storage inductor, thereby reducing the volume of the bridgeless power factor correction circuit.

[0045] The second strategy specifically includes: when the voltage difference between the second input terminal L and the first input terminal N is positive, the control module 40 controls the second transistor Q2 and the sixth transistor Q6 to remain continuously turned on, and controls the third transistor Q3 and the fifth transistor Q5 to be turned on alternately at high frequency, where the fifth transistor Q5 is a switch tube and the third transistor Q3 is a freewheeling tube. At this time, the input capacitor C0, the energy storage inductor L1, the second transistor Q2, the third transistor Q3, the fifth transistor Q5, the sixth transistor Q6, the first energy storage capacitor C1 and the second energy storage capacitor C2 form a third boost converter. During the conduction period of the fifth transistor Q5, the input capacitor C0, the energy storage inductor L1 and the second energy storage capacitor C2 form a loop, so that the input capacitor C0 simultaneously stores energy for the energy storage inductor L1 and the second energy storage capacitor C2. After the fifth transistor Q5 is disconnected, the third transistor Q3 is turned on for freewheeling, so that the energy on the input capacitor C0 is superimposed on the energy of the energy storage inductor L1 to release energy to the first energy storage capacitor C1 and the second energy storage capacitor C2.

[0046] When the voltage difference between the second input terminal L and the first input terminal N is negative, the control module 40 controls the first transistor Q1 and the fifth transistor Q5 to remain continuously turned on, and controls the fourth transistor Q4 and the sixth transistor Q6 to be turned on alternately at high frequency, where the sixth transistor Q6 is a switch tube and the fourth transistor Q4 is a freewheeling tube. At this time, the input capacitor C0, the energy storage inductor L1, the first transistor Q1, the fourth transistor Q4, the fifth transistor Q5, the sixth transistor Q6, the first energy storage capacitor C1 and the second energy storage capacitor C2 form a fourth boost converter. During the conduction period of the sixth transistor Q6, the input capacitor C0, the energy storage inductor L1 and the first energy storage capacitor C1 form a loop, so that the input capacitor C0 simultaneously stores energy for the energy storage inductor L1 and the first energy storage capacitor C1. After the sixth transistor Q6 is disconnected, the fourth transistor Q4 is turned on for freewheeling, so that the energy on the input capacitor C0 is superimposed on the energy of the energy storage inductor L1 to release energy to the first energy storage capacitor C1 and the second energy storage capacitor C2.

[0047] Through this arrangement, when the voltage between the first input terminal N and the second input terminal L is in the positive half cycle or the negative half cycle, and the absolute value of the input voltage is greater than the absolute value of half of the output voltage, the third boost converter or the fourth boost converter can store energy in the energy storage inductor L1 while storing energy in the first energy storage capacitor C1 and / or the second energy storage capacitor C2, so that the total energy storage required by the energy storage inductor L1 is reduced, thereby reducing the loss of the energy storage inductor L1, improving the efficiency of the power factor correction circuit, and reducing the volume of the energy storage inductor, thereby reducing the volume of the bridgeless power factor correction circuit.

[0048] In a specific implementation, optionally, when the output voltage is 380V and the input voltage is a relatively low-amplitude voltage, for example, between 100VAC-120VAC, specifically 100VAC, the first strategy can be always adopted. In another specific implementation, optionally, when the output voltage is 380V and the input voltage is a relatively high-amplitude voltage, for example, 240VAC, the first strategy or the second strategy can be selected in real time according to the size of the input voltage.

[0049] It should be noted that when the amplitude of the input voltage is greater than the absolute value of half of the output voltage, the fifth switch unit 33 can also be always controlled to be turned off, so that the bridgeless power factor correction circuit can adopt the control strategy of the traditional bridgeless power factor correction circuit to perform power factor correction, for example, the on and off of the first switch unit 21, the second switch unit 22, the third switch unit 31 and the fourth switch unit 32 are controlled according to the positive and negative input voltage to charge the energy storage module 10 as a whole.

[0050] On the basis of the above embodiments, optionally, the withstand voltage of the first transistor Q1, the withstand voltage of the second transistor Q2, the withstand voltage of the third transistor Q3, and the withstand voltage of the fourth transistor Q4 are all greater than the absolute value of the voltage difference between the first output terminal OUT1 and the second output terminal OUT2; the withstand voltage of the fifth transistor Q5 and the withstand voltage of the sixth transistor Q6 are both greater than half of the absolute value of the voltage difference between the first output terminal OUT1 and the second output terminal OUT2. Exemplarily, when the absolute value of the voltage difference between the first output terminal OUT1 and the second output terminal OUT2 is 380V, the withstand voltage of the first transistor Q1, the withstand voltage of the second transistor Q2, the withstand voltage of the third transistor Q3, and the withstand voltage of the fourth transistor Q4 can all be 500V, and the withstand voltage of the fifth transistor Q5 and the withstand voltage of the sixth transistor Q6 can all be 250V.

[0051] On the basis of the above embodiments, optionally, the on-state impedance of the fifth transistor Q5 and the sixth transistor Q6 are both the first impedance, the on-state impedance of the first transistor Q1, the second transistor Q2, the third transistor Q3 and the fourth transistor Q4 are all the second impedance, and the first impedance is half of the second impedance. By setting the first impedance to be half of the second impedance, the loss of the first transistor Q1, the second transistor Q2, the third transistor Q3, the fourth transistor Q4, the fifth transistor Q5 and the sixth transistor Q6 can be made equivalent to the loss of the switch tube part in the traditional bridgeless power factor correction circuit.

[0052] On the basis of the above embodiments, optionally, the withstand voltage of the first energy storage capacitor C1 and the withstand voltage of the second energy storage capacitor C2 are both greater than half of the absolute value of the voltage difference between the first output terminal OUT1 and the second output terminal OUT2. Exemplarily, the first energy storage capacitor C1 and the second energy storage capacitor C2 can both be electrolytic capacitors; when the absolute value of the voltage difference between the first output terminal OUT1 and the second output terminal OUT2 is 380V, the withstand voltage of the first energy storage capacitor C1 and the withstand voltage of the second energy storage capacitor C2 can both be 250V.

[0053] In order to verify the effect of the bridgeless power factor correction circuit provided by any of the above embodiments, the inventors Figure 2 The circuit shown was tested, and the test was based on a 500W bridgeless power factor correction circuit. The test results are as follows: When the input voltage is 100VAC, the full load efficiency of the bridgeless power factor correction circuit is increased from 97.1% to 97.6% compared with the traditional bridgeless power factor correction circuit (without the fifth transistor Q5 and the sixth transistor Q6, and the energy storage module 10 is composed of an electrolytic capacitor), which is 0.5% higher, and 0.7% higher than the efficiency of the bridge power factor correction circuit. When the input voltage is 240VAC, the full load efficiency of the bridgeless power factor correction circuit is increased from 99.0% to 99.1%, which is 0.1% higher, and 0.3% higher than the efficiency of the bridge power factor correction circuit.

[0054] At the same time, during the test, the inventors measured the input current, input voltage and driving voltage of each transistor gate of the circuit. The test results can be found in Figures 3 to 9 Among them, the test frequency is 50Hz.

[0055] in, Figure 3-Figure 8 Schematic diagrams of comparison of measured waveforms between a first driving voltage of the gate of the first transistor, a second driving voltage of the gate of the second transistor, a third driving voltage of the gate of the third transistor, a fourth driving voltage of the gate of the fourth transistor, a fifth driving voltage of the gate of the fifth transistor, and a sixth driving voltage of the gate of the sixth transistor and the input voltage, respectively, Figure 3-Figure 8 The waveform of the input voltage in one cycle is given in the figure. The horizontal axis represents time, the value of the driving voltage of the transistor gate can be found on the left vertical axis scale, the value of the input voltage can be found on the right vertical axis scale, the blue line represents the input voltage, and the red line represents the driving voltage of each transistor gate. For example, each transistor is turned on according to a high level (here 10V) and turned off according to a low level (here 0V). It should be noted that Figure 5-Figure 8The large red area in the figure indicates that the driving voltage is a high-frequency signal during this stage, and high and low levels appear alternately at high frequencies. The large red area is caused by the frequency of the driving voltage being too high compared to the frequency of the input voltage during this period. The expansion diagram of any large red area can be seen in Figure 5 The expanded diagram in the middle dashed box shows that the driving voltage is a signal with alternating high and low levels. Figure 6-Figure 8 I will not expand on these one by one.

[0056] Specifically, see Figure 3 , when the input voltage is in the positive half cycle, the first transistor Q1 is turned off; when the input voltage is in the negative half cycle, the first transistor Q1 is turned on. Figure 4 , when the input voltage is in the positive half cycle, the second transistor Q2 is turned on; when the input voltage is in the negative half cycle, the second transistor Q2 is turned off. Figure 5 When the input voltage is in the positive half cycle, the third transistor Q3 is turned off; when the input voltage is in the negative half cycle, the third transistor Q3 is turned on at high frequency. Figure 6 When the input voltage is in the positive half cycle, the fourth transistor Q4 is turned on at high frequency; when the input voltage is in the negative half cycle, the fourth transistor Q4 is turned off. Figure 7 , when the input voltage is in the positive half cycle, the fifth transistor Q5 is turned on; when the input voltage is in the negative half cycle, the fifth transistor Q5 is turned on at high frequency. Figure 8 When the input voltage is in the positive half cycle, the sixth transistor Q6 is turned on at high frequency; when the input voltage is in the negative half cycle, the sixth transistor Q6 is turned on.

[0057] Fig. 9 The measured waveforms of the input current and input voltage of the bridgeless power factor correction circuit are shown in Figure 1. The blue line represents the input voltage and the red line represents the input current. The envelope shape of the input current is directly given here for the convenience of display. Fig. 9 It can be seen that in the bridgeless power factor correction circuit provided in this embodiment, the envelope of the input current is a sine wave, and the phase is substantially the same as that of the input voltage, thereby achieving good power factor correction.

[0058] Fig.10 A schematic diagram of another bridgeless power factor correction circuit provided by an embodiment of the present invention, referring to Fig.10In one embodiment, optionally, the bridgeless power factor correction circuit may include two energy storage inductors L1, namely, a first energy storage inductor L1-1 and a second energy storage inductor L1-2; and two loop control modules 30 respectively connected to the two energy storage inductors L1, namely, a first loop control module 30-1 and a second loop control module 30-2. The first loop control module 30-1 includes a first third transistor Q3-1, a first fourth transistor Q4-1, a first fifth transistor Q5-1 and a first sixth transistor Q6-1. The control end of the first third transistor Q3-1 is connected to the control end G3-1 of the first third switch unit; the control end of the first fourth transistor Q4-1 is connected to the control end G4-1 of the first fourth switch unit; the control end of the first fifth transistor Q5-1 is connected to the first first sub-control end G5-11, and the control end of the first sixth transistor Q6-1 is connected to the first second sub-control end G5-21. The second loop control module 30-2 includes a second third transistor Q3-2, a second fourth transistor Q4-2, a second fifth transistor Q5-2 and a second sixth transistor Q6-2. The control end of the second third transistor Q3-2 is connected to the control end G3-2 of the second third switch unit, the control end of the second fourth transistor Q4-2 is connected to the control end G4-2 of the second fourth switch unit, the control end of the second fifth transistor Q5-2 is connected to the second first sub-control end G5-12, and the control end of the second sixth transistor Q6-1 is connected to the second second sub-control end G5-22. The first node A1 of the first loop control module 30-1 is connected to the second end of the first energy storage inductor L1-1, and the second node A2 of the second loop control module 30-2 is connected to the second end of the second energy storage inductor L1-2.

[0059] In this way, by providing two sets of energy storage inductors and loop control modules, the efficiency of the bridgeless power factor correction circuit can be further improved, making the circuit more suitable for high-power occasions.

[0060] Exemplarily, by setting two groups of energy storage inductors and loop control modules, an interleaved bridgeless power factor correction circuit can be formed. Specifically, the transistors in the third switch units in the two loop control modules can differ in phase by 180° in the high-frequency working state, that is, the first third transistor Q3-1 and the second third transistor Q3-2 can differ in phase by 180° in the high-frequency working state, that is, the first third transistor Q3-1 and the second third transistor Q3-2 are interleaved at high frequency. And, the transistors in the fourth switch units in the two loop control modules can differ in phase by 180° in the high-frequency working state, that is, the first fourth transistor Q4-1 and the second fourth transistor Q4-2 can differ in phase by 180° in the high-frequency working state, that is, the first fourth transistor Q4-1 and the second fourth transistor Q4-2 are interleaved at high frequency. It can be understood that the polarity control module 20 can cooperate with the first loop control module 30-1 to adopt the above-mentioned first strategy and second strategy for control, and the polarity control module 20 can cooperate with the second loop control module 30-2 to adopt the above-mentioned first strategy and second strategy for control. The coordination relationship between the fifth switch unit and the third switch unit and the fourth switch unit in any loop control module can be found in the above description and will not be repeated here.

[0061] It should be noted that the above embodiment exemplarily shows that the transistors in the third switch unit and the fourth switch unit in the two loop control modules are 180° apart in phase in the high-frequency working state, but this is not intended to limit the present invention. In practical applications, the phase difference between the transistors in the two third switch units in the high-frequency working state and the phase difference between the transistors in the two fourth switch units in the high-frequency working state can be set according to actual needs.

[0062] In order to verify the efficiency of the interleaved bridgeless power factor correction circuit provided by the above embodiment in high power applications, the inventors conducted Fig.10 The circuit shown was tested based on a 1000W bridgeless power factor correction circuit. The test results are as follows: When the input voltage is 100VAC, the full load efficiency of the interleaved bridgeless power factor correction circuit is 97.9%.

[0063] An embodiment of the present invention also provides a control method for a bridgeless power factor correction circuit. This embodiment can be applicable to the bridgeless power factor correction circuit provided by any of the above embodiments. The method can be executed by a control module, and the control module can be implemented in the form of hardware and / or software.

[0064] Fig.11 A flow chart of a control method of a bridgeless power factor correction circuit provided by an embodiment of the present invention, referring to Fig.11 , the control method of the bridgeless power factor correction circuit includes: S101. For a polarity control module, according to the positive or negative of a first voltage difference, control one of a first switch unit and a second switch unit to be turned on and the other to be turned off; wherein the first voltage difference is a voltage difference between the second input terminal and the first input terminal.

[0065] Specifically, the first voltage difference is the value obtained by subtracting the voltage of the first input terminal from the voltage of the second input terminal. Exemplarily, the first output terminal is a positive output terminal, and the second output terminal is a negative output terminal; when the first voltage difference is a positive value, the second switch unit is controlled to be turned on and the first switch unit is turned off; when the first voltage difference is a negative value, the first switch unit is controlled to be turned on and the second switch unit is turned off. By controlling the two switch units in the polarity control module according to the positive and negative of the first voltage difference, the positive output terminal can always receive a positive voltage and the negative output terminal can always receive a negative voltage, thereby realizing voltage polarity control. For the specific control process, please refer to the description of the specific working process of the bridgeless power factor correction circuit in the above embodiment, which will not be repeated here.

[0066] S102 . For any loop control module, according to the absolute value of the first voltage difference, control one of the third switch unit and the fourth switch unit to be alternately turned on with the fifth switch unit, and control the other of the third switch unit and the fourth switch unit to be turned off.

[0067] Specifically, when the absolute value of the first voltage difference is less than or equal to the absolute value of half the output voltage, if the energy of the input capacitor superimposed on the energy storage inductor is required to supply power to the second energy storage capacitor, the fourth switch unit and the fifth switch unit are controlled to be alternately turned on. If the energy of the input capacitor superimposed on the energy storage inductor is required to supply power to the first energy storage capacitor, the third switch unit and the fifth switch unit are controlled to be alternately turned on.

[0068] When the absolute value of the first voltage difference is greater than the absolute value of half the output voltage, if the input capacitor is required to store energy in the energy storage inductor while supplying power to the first energy storage capacitor and the second energy storage capacitor, the third switch unit and the fifth switch unit are controlled to be alternately turned on or the fourth switch unit and the fifth switch unit are controlled to be alternately turned on.

[0069] According to the technical solution of the embodiment of the present invention, the first energy storage capacitor and the second energy storage capacitor provide an output voltage in series, which can effectively reduce the requirements for the energy storage capacity of the energy storage inductor, thereby reducing the size of the energy storage inductor. The energy storage inductor occupies most of the area of ​​the bridgeless power factor correction circuit, and the size of the energy storage inductor greatly affects the size of the entire circuit; therefore, reducing the volume of the energy storage inductor can effectively reduce the volume of the bridgeless power factor correction circuit. In addition, the voltage across each energy storage capacitor can eventually reach half of the required output voltage, which can effectively reduce the loss of the energy storage inductor and improve the efficiency of the bridgeless power factor correction circuit. In addition, in the circuit, in order to realize the charging of the two energy storage capacitors, the control module can control the on and off of the first switch unit, the second switch unit, the third switch unit, the fourth switch unit and the fifth switch unit according to the input voltage, thereby controlling the charging process of the two energy storage capacitors and realizing bridgeless power factor correction. In summary, the embodiment of the present invention can reduce the volume of the bridgeless power factor correction circuit and improve the efficiency of the bridgeless power factor correction circuit.

[0070] Based on the above embodiment, optionally, the above S101 specifically includes: when the first voltage difference is a positive value, controlling the first switch unit to be turned off, and controlling the second switch unit to be turned on; when the first voltage difference is a negative value, controlling the second switch unit to be turned off, and controlling the first switch unit to be turned on.

[0071] The above S102 specifically includes: 1. When the first voltage difference is positive: 1) When the absolute value of the first voltage difference is less than or equal to the second voltage difference, the fourth switch unit and the fifth switch unit are controlled to be turned on alternately, and the third switch unit is controlled to be turned off. In this way, the input capacitor can store energy in the energy storage inductor through the first loop, and the input capacitor and the energy storage inductor are connected in series to release energy to the second energy storage capacitor through the second loop.

[0072] 2) When the absolute value of the first voltage difference is greater than the second voltage difference, the third switch unit and the fifth switch unit are controlled to be turned on alternately, and the fourth switch unit is controlled to be turned off; wherein the second voltage difference is half of the absolute value of the voltage difference between the first output terminal and the second output terminal. In this way, the input capacitor can store energy in the energy storage inductor and the second energy storage capacitor at the same time through the second loop, and the input capacitor and the energy storage inductor can release energy to the first energy storage capacitor and the second energy storage capacitor together through the third loop.

[0073] 2. When the first voltage difference is negative: 1) When the absolute value of the first voltage difference is less than or equal to the second voltage difference, the third switch unit and the fifth switch unit are controlled to be turned on alternately, and the fourth switch unit is controlled to be turned off. In this way, the input capacitor can store energy in the energy storage inductor through the fourth loop, and the input capacitor and the energy storage inductor are connected in series through the fifth loop to release energy to the first energy storage capacitor.

[0074] 2) When the absolute value of the first voltage difference is greater than the second voltage difference, the fourth switch unit and the fifth switch unit are controlled to be turned on alternately, and the third switch unit is controlled to be turned off. In this way, the input capacitor can store energy in the energy storage inductor and the first energy storage capacitor at the same time through the fifth loop, and the input capacitor and the energy storage inductor can release energy to the first energy storage capacitor and the second energy storage capacitor together through the sixth loop.

[0075] In summary, this embodiment provides a control method for a bridgeless power factor correction circuit, which can reduce the size of the bridgeless power factor correction circuit and improve the efficiency.

[0076] Optionally, based on the above embodiments, the fifth switch unit includes: a first transmission subunit and a second transmission subunit. Controlling the fourth switch unit and the fifth switch unit to be alternately turned on includes: controlling the first transmission subunit to remain turned on, and controlling the fourth switch unit and the second transmission subunit to be alternately turned on. Controlling the third switch unit and the fifth switch unit to be alternately turned on includes: controlling the second transmission subunit to remain turned on, and controlling the third switch unit and the first transmission subunit to be alternately turned on.

[0077] Specifically, when the first voltage difference is positive and the absolute value of the first voltage difference is less than or equal to the absolute value of the second voltage difference, the first transmission subunit can be controlled to remain turned on, and the fourth switch unit and the second transmission subunit can be controlled to be turned on alternately.

[0078] When the first voltage difference is positive and the absolute value of the first voltage difference is greater than the absolute value of the second voltage difference, the second transmission subunit can be controlled to remain turned on, and the third switch unit and the first transmission subunit can be controlled to be alternately turned on.

[0079] When the first voltage difference is negative and the absolute value of the first voltage difference is less than or equal to the absolute value of the second voltage difference, the second transmission subunit can be controlled to remain turned on, and the third switch unit and the first transmission subunit can be controlled to be alternately turned on.

[0080] When the first voltage difference is negative and the absolute value of the first voltage difference is greater than the absolute value of the second voltage difference, the first transmission subunit can be controlled to remain turned on, and the fourth switch unit and the second transmission subunit can be controlled to be alternately turned on.

[0081] Based on the above embodiments, optionally, the bridgeless power factor correction circuit may include two energy storage inductors and two loop control modules. Accordingly, any loop control module may be controlled by the relevant control method provided in any of the above embodiments.

[0082] As for the working state between the two loop control modules, the two loop control modules can be controlled to work alternately to form an interleaved bridgeless power factor correction circuit. Specifically, when the third switch unit or the fourth switch unit of one loop control module is controlled to be turned on, the fifth switch unit of the other loop control module is controlled to be turned on.

[0083] For example, when both loop control modules control the fourth switch unit and the fifth switch unit to be turned on alternately, when the first fourth switch unit is turned on, the second fourth switch unit can be controlled to be turned off and the second fifth switch unit can be controlled to be turned on at the same time, so that the two loop control modules work alternately to realize interleaved bridgeless power factor correction.

[0084] It should be noted that this embodiment provides a control method for an interleaved bridgeless power factor correction circuit, but this is not intended to limit the present invention. In practical applications, the working state relationship between the two loop control modules can be set according to actual needs.

[0085] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0086] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A bridgeless power factor correction circuit, characterized in that: include: An input capacitor connected between a first input terminal and a second input terminal of the bridgeless power factor correction circuit; An energy storage module, comprising a first energy storage capacitor and a second energy storage capacitor connected in series between a first output terminal and a second output terminal of the bridgeless power factor correction circuit; The polarity control module comprises a first switch unit and a second switch unit; the first switch unit is connected between the first input terminal and the first output terminal, and the second switch unit is connected between the first input terminal and the second output terminal; at least one energy storage inductor; The first end of each of the energy storage inductors is connected to the second input end; A loop control module corresponding one-to-one to the energy storage inductor; The loop control module includes: a third switch unit, a fourth switch unit and a fifth switch unit; the third switch unit is connected between the first output end and the first node of the loop control module, the fourth switch unit is connected between the second output end and the first node of the loop control module, and the fifth switch unit is connected between the second node and the first node of the loop control module; wherein the first node of the loop control module is connected to the second end of the energy storage inductor corresponding to the loop control module, and the second node is a connection node between the first energy storage capacitor and the second energy storage capacitor; The control module is respectively connected to the control end of the first switch unit, the control end of the second switch unit, the control end of each of the third switch units, the control end of each of the fourth switch units and the control end of each of the fifth switch units.

2. The bridgeless power factor correction circuit according to claim 1, characterized in that: The control end of the fifth switch unit includes a first sub-control end and a second sub-control end; the control module is connected to the first sub-control end and the second sub-control end respectively; The fifth switch unit includes: a first transmission subunit and a second transmission subunit connected in series between the first node and the second node, the first sub-control end serving as the control end of the first transmission subunit, and the second sub-control end serving as the control end of the second transmission subunit.

3. The bridgeless power factor correction circuit according to claim 2, characterized in that: The first switch unit includes a first transistor, a control electrode of the first transistor is connected to a control terminal of the first switch unit, a first electrode of the first transistor is connected to the first input terminal, and a second electrode of the first transistor is connected to the first output terminal; The second switch unit includes a second transistor, a control electrode of the second transistor is connected to the control end of the second switch unit, a first electrode of the second transistor is connected to the second output end, and a second electrode of the second transistor is connected to the first input end; The third switch unit comprises a third transistor, a control electrode of the third transistor is connected to the control end of the third switch unit, a first electrode of the third transistor is connected to the first node, and a second electrode of the third transistor is connected to the first output end; The fourth switch unit includes a fourth transistor, a control electrode of the fourth transistor is connected to the control end of the fourth switch unit, a first electrode of the fourth transistor is connected to the second output end, and a second electrode of the fourth transistor is connected to the first node; The first transmission sub-unit includes a fifth transistor, a control electrode of the fifth transistor is connected to the first sub-control terminal of the fifth switch unit, and a second electrode of the fifth transistor is connected to the first node; The second transmission sub-unit includes a sixth transistor, a control electrode of the sixth transistor is connected to the second sub-control terminal of the fifth switch unit, a first electrode of the sixth transistor is connected to the first electrode of the fifth transistor, and a second electrode of the sixth transistor is connected to the second node.

4. The bridgeless power factor correction circuit according to claim 3, characterized in that: The withstand voltage of the first transistor, the withstand voltage of the second transistor, the withstand voltage of the third transistor and the withstand voltage of the fourth transistor are all greater than the absolute value of the voltage difference between the first output terminal and the second output terminal; the withstand voltage of the fifth transistor and the withstand voltage of the sixth transistor are both greater than half of the absolute value of the voltage difference between the first output terminal and the second output terminal; the on-state impedance of the fifth transistor and the sixth transistor are both the first impedance, and the on-state impedance of the first transistor, the second transistor, the third transistor and the fourth transistor are all the second impedance, and the first impedance is half of the second impedance.

5. The bridgeless power factor correction circuit according to claim 1, characterized in that: The withstand voltage of the first energy storage capacitor and the withstand voltage of the second energy storage capacitor are both greater than half of the absolute value of the voltage difference between the first output terminal and the second output terminal.

6. The bridgeless power factor correction circuit according to claim 1, characterized in that: The bridgeless power factor correction circuit includes two energy storage inductors and two loop control modules.

7. A control method for a bridgeless power factor correction circuit, characterized in that: Used to control the bridgeless power factor correction circuit according to any one of claims 1 to 6, executed by the control module; The control method of the bridgeless power factor correction circuit includes: For the polarity control module, according to the positive or negative of the first voltage difference, one of the first switch unit and the second switch unit is controlled to be turned on and the other is turned off; wherein the first voltage difference is the voltage difference between the second input terminal and the first input terminal; For any of the loop control modules, according to the absolute value of the first voltage difference, one of the third switch unit and the fourth switch unit is controlled to be alternately turned on with the fifth switch unit, and the other of the third switch unit and the fourth switch unit is controlled to be turned off.

8. The control method of the bridgeless power factor correction circuit according to claim 7, characterized in that: According to the positive or negative of the first voltage difference, controlling one of the first switch unit and the second switch unit to be turned on and the other to be turned off, comprises: When the first voltage difference is a positive value, controlling the first switch unit to be turned off, and controlling the second switch unit to be turned on; When the first voltage difference is a negative value, controlling the second switch unit to be turned off, and controlling the first switch unit to be turned on; According to the absolute value of the first voltage difference, controlling one of the third switch unit and the fourth switch unit to be alternately turned on with the fifth switch unit, and controlling the other of the third switch unit and the fourth switch unit to be turned off, comprising: In the case where the first voltage difference is a positive value, when the absolute value of the first voltage difference is less than or equal to the second voltage difference, the fourth switch unit and the fifth switch unit are controlled to be alternately turned on, and the third switch unit is controlled to be turned off; when the absolute value of the first voltage difference is greater than the second voltage difference, the third switch unit and the fifth switch unit are controlled to be alternately turned on, and the fourth switch unit is controlled to be turned off; wherein the second voltage difference is half of the absolute value of the voltage difference between the first output terminal and the second output terminal; In the case that the first voltage difference is a negative value, when the absolute value of the first voltage difference is less than or equal to the second voltage difference, the third switch unit and the fifth switch unit are controlled to be alternately turned on, and the fourth switch unit is controlled to be turned off; when the absolute value of the first voltage difference is greater than the second voltage difference, the fourth switch unit and the fifth switch unit are controlled to be alternately turned on, and the third switch unit is controlled to be turned off.

9. The control method of the bridgeless power factor correction circuit according to claim 8, characterized in that: The fifth switch unit includes: a first transmission subunit and a second transmission subunit; The controlling the fourth switch unit and the fifth switch unit to be alternately turned on comprises: controlling the first transmission sub-unit to remain turned on, and controlling the fourth switch unit and the second transmission sub-unit to be alternately turned on; The controlling the third switch unit and the fifth switch unit to be alternately turned on includes: controlling the second transmission subunit to remain turned on, and controlling the third switch unit and the first transmission subunit to be alternately turned on.

10. The control method of the bridgeless power factor correction circuit according to claim 7, characterized in that: The bridgeless power factor correction circuit comprises two energy storage inductors and two loop control modules; When the third switch unit or the fourth switch unit of one of the loop control modules is controlled to be turned on, the fifth switch unit of another loop control module is controlled to be turned on.

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