Test method and device, electronic equipment and storage medium
By adopting the dichotomous cycle test method in automated jitter testing, the problem of too long testing in the existing technology is solved, and more efficient frequency point testing is achieved, which significantly improves the efficiency of automated testing.
Patent Information
- Application Number
- CN202411731790.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-28
- Publication Date
- 2025-03-25
AI Technical Summary
Existing automated jitter testing schemes have been tested too long when measuring a wide frequency range, resulting in inefficiency in testing.
The cyclic testing method based on dichotomy is adopted. By obtaining the frequency point range of the equipment to be tested, the initial left boundary value and right boundary value are determined, and the dichotomy cycle test is repeated until the left boundary value is greater than the right boundary value to determine the maximum normal operating frequency point of the equipment to be tested.
By reducing the frequency range by half each test, the number of tests and test time is significantly reduced, and the testing efficiency of automated tests is improved.
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Figure CN119696738A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of automatic testing technology, and in particular to a testing method, device, electronic equipment and storage medium. Background Art
[0002] Python is a powerful and easy-to-use programming language that is widely used in scientific computing, data analysis, instrument control and other fields. Combined with the VISA standard, users can efficiently control a variety of instruments and equipment to complete data acquisition, measurement and analysis tasks. As an extension of the Python language, the PyVISA library supports the VISA standard, allowing Python programs to communicate seamlessly with different types of instruments and equipment through the VISA interface. The PyVISA library provides a wealth of functions and class interfaces that can be used to connect, configure, and accurately control various types of measurement and test equipment, simplifying the complex instrument operation process.
[0003] Among them, jitter measurement is a key task to ensure signal quality in communication systems and high-speed electronic systems. Jitter refers to the random or periodic deviation of a signal relative to its expected position, which directly affects the timing accuracy and integrity of the signal, resulting in an increase in the bit error rate. Jitter can be classified into periodic jitter (PJ), random jitter (RJ) and deterministic jitter (DJ). The bit error rate tester can accurately measure and analyze different jitter components in the signal through high-precision sampling, phase comparison and spectrum analysis technologies, which is crucial to maintaining the performance and reliability of high-speed communication systems. The existing automated jitter test structure uses a PC to connect to the device under test through a GPIB interface, and the bit error rate tester is connected to the device through an SMA interface, and an interference signal is injected into the device under test. By dynamically adjusting the operating frequency of the device under test, the system can measure and determine its maximum normal operating frequency point. This architecture ensures the automation and high precision of the test process, while effectively evaluating the anti-interference performance and stability of the device at different frequencies. However, traditional testing solutions usually adopt the method of traversing all test parameters. For example, in actual applications, the bit error rate tester needs to cover a large number of frequency points from 100Hz to 12GHz for measurement. Although the bit error rate tester can be automatically controlled through Python scripts, reducing the need for manual monitoring, the entire test process still takes more than 24 hours, which significantly increases the test time cost and leads to low test efficiency. Summary of the invention
[0004] The present application provides a testing method, device, electronic device and storage medium to solve the technical problem of how to improve the testing efficiency of automated testing.
[0005] In a first aspect, the present application provides a testing method, the method comprising:
[0006] Obtain the frequency point range for testing the device under test;
[0007] Determine an initial left boundary value and an initial right boundary value of the test according to the frequency point range; wherein the initial left boundary value is determined based on the minimum value of the frequency point range, and the initial right boundary value is determined based on the maximum value of the frequency point range;
[0008] Repeating the binary cycle test on the device under test based on the left boundary value and the right boundary value, and adjusting the left boundary value based on the middle value of the left boundary value and the right boundary value or adjusting the right boundary value based on the middle value according to the test result of each test, until the left boundary value is greater than the right boundary value;
[0009] The maximum normal operating frequency point of the device under test is determined according to all the test results.
[0010] Optionally, the step of repeatedly performing a binary cycle test on the device under test based on the left boundary value and the right boundary value, and adjusting the left boundary value based on an intermediate value between the left boundary value and the right boundary value or adjusting the right boundary value based on the intermediate value according to the test result of each test until the left boundary value is greater than the right boundary value includes:
[0011] Calculate the middle value between the left boundary value and the right boundary value;
[0012] configuring a target frequency point corresponding to the intermediate value to the device under test, and detecting an error count of the device under test operating at the target frequency point;
[0013] If the error count is zero, the left boundary value is updated to the middle value plus one;
[0014] If the error count is greater than zero, the right boundary value is updated to the middle value minus one;
[0015] Determine whether the left boundary value is greater than the right boundary value;
[0016] If the left boundary value is less than or equal to the right boundary value, repeat the step of calculating the intermediate value between the left boundary value and the right boundary value until the step of determining whether the left boundary value is greater than the right boundary value;
[0017] If the left boundary value is greater than the right boundary value, the binary division loop test is terminated.
[0018] Optionally, the step of determining the maximum normal operating frequency point of the device under test according to all the test results includes:
[0019] Obtain all the target frequency points corresponding to the error count being zero;
[0020] The maximum normal operating frequency point of the device under test is determined according to the maximum value of all the target frequency points.
[0021] Optionally, the step of configuring a target frequency point corresponding to the intermediate value to the device under test, and detecting an error count of the device under test operating at the target frequency point includes:
[0022] Configure the target frequency point corresponding to the intermediate value to the device under test;
[0023] In a case where the device under test operates at the target frequency point, the error count of the device under test within a preset time period is detected.
[0024] Optionally, the step of obtaining a frequency point range for testing the device to be tested includes:
[0025] Obtaining a limit operating frequency value of the device under test;
[0026] The interval from zero to the limit operating frequency value is used as the frequency point range for testing the device under test.
[0027] Optionally, the step of determining an initial left boundary value and an initial right boundary value of the test according to the frequency point range includes:
[0028] Set zero as the initial left boundary value for the test;
[0029] The limit operating frequency value minus one is determined as the initial right boundary value of the test.
[0030] Optionally, after determining the maximum normal operating frequency point of the device under test according to all the test results, the method further includes:
[0031] The maximum normal operating frequency point and all the test results are output in a preset format.
[0032] In a second aspect, the present application provides a testing device, the device comprising:
[0033] An acquisition module is used to acquire the frequency point range for testing the device under test;
[0034] A first determination module, used to determine an initial left boundary value and an initial right boundary value of a test according to the frequency point range; wherein the initial left boundary value is determined based on a minimum value of the frequency point range, and the initial right boundary value is determined based on a maximum value of the frequency point range;
[0035] A cyclic testing module, configured to repeatedly perform a binary cyclic test on the device under test based on the left boundary value and the right boundary value, and adjust the left boundary value based on an intermediate value between the left boundary value and the right boundary value or adjust the right boundary value based on the intermediate value according to the test result of each test, until the left boundary value is greater than the right boundary value;
[0036] The second determination module is used to determine the maximum normal operating frequency point of the device under test according to all the test results.
[0037] In a third aspect, the present application provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other via the communication bus;
[0038] Memory, used to store computer programs;
[0039] The processor is used to implement the test method described in any embodiment of the first aspect when executing the program stored in the memory.
[0040] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the test method as described in any one of the embodiments of the first aspect.
[0041] The above technical solution provided by the embodiment of the present application has the following advantages over the prior art: the method provided by the embodiment of the present application obtains the frequency point range for testing the device to be tested; determines the initial left boundary value and the initial right boundary value of the test according to the frequency point range; wherein the initial left boundary value is determined based on the minimum value of the frequency point range, and the initial right boundary value is determined based on the maximum value of the frequency point range; repeatedly performs binary cyclic testing on the device to be tested based on the left boundary value and the right boundary value, and adjusts the left boundary value based on the middle value of the left boundary value and the right boundary value or adjusts the right boundary value based on the middle value according to the test result of each test, until the left boundary value is greater than the right boundary value; determines the maximum normal working frequency point of the device to be tested according to all the test results. The method adopts a binary cyclic test, and the frequency range to be tested can be reduced by half after each frequency point is tested, and the left boundary value and the right boundary value after adjustment are used to determine whether the test is completed, thereby greatly reducing the number of tests and test time, and improving the test efficiency of automated testing. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0043] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.
[0044] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.
[0045] Figure 1 A system architecture diagram of a testing method provided for one embodiment of the present application;
[0046] Figure 2 A flow chart of a testing method provided in one embodiment of the present application;
[0047] Figure 3 A flow chart of a testing method provided in another embodiment of the present application;
[0048] Figure 4 A schematic diagram of the structure of a testing device provided in one embodiment of the present application;
[0049] Figure 5 A schematic diagram of the structure of an electronic device provided in accordance with an embodiment of the present application. DETAILED DESCRIPTION
[0050] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.
[0051] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.
[0052] In order to solve the technical problem of how to improve the test efficiency of automated testing in the prior art, the present application provides a testing method, device, electronic device and storage medium, which adopts a cyclic test based on binary search. After each frequency point is tested, the frequency range to be tested can be reduced by half, and the completion of the test can be determined by adjusting the left boundary value and the right boundary value, thereby greatly reducing the number of tests and the test time, and improving the test efficiency of automated testing.
[0053] The first embodiment of the present application provides a testing method, which can be applied to Figure 1 The system architecture shown in the figure includes at least a test host 101, a communication interface 102, a bit error meter 103 and a device under test 104. The test host 101 is connected to the bit error meter 103 through the communication interface 102. For example, the test host can be a personal computer PC, and the communication interface can be a general purpose interface bus (GPIB) interface. In the bit error rate test based on the Python script, the PC is connected to the bit error meter through the GPIB interface, and the signal sending and data reading operations of the bit error meter are implemented through the Python script. After the device under test (also referred to as the device under test) is powered on, its operating frequency is configured through the Python script of the PC, and the frequency point is dynamically adjusted. The error count (i.e., the bit error count value) of the bit error meter is read in real time through the script, so as to determine the performance of the device under test at different frequencies, and then determine the maximum normal operating frequency point of the device under test.
[0054] To facilitate understanding of this application, some technical terms that appear are first explained as follows:
[0055] GPIB (General Purpose Interface Bus): A general purpose interface bus standard for connection and communication, used for data transmission between devices.
[0056] VISA (Virtual Instrument Software Architecture): A software architecture used to implement communication and control of virtual instruments and provide a consistent programming interface.
[0057] PyVISA: A Python library based on VISA technology, designed to provide virtual instrument control and data exchange functions and simplify the instrument programming process.
[0058] Jitter: refers to the short-term instability or change of a signal in the time domain, usually manifested as a deviation of the rising or falling edge of the signal from its ideal position. This phenomenon affects the timing accuracy of the signal and system performance.
[0059] The SMA interface (SubMiniature Version A) is a common RF connector, mainly used for high-frequency signal transmission.
[0060] The method can be applied to the test host 101 in the system architecture, wherein the test host 101 can be a desktop computer, a tablet computer, a notebook, a supercomputer, or other devices.
[0061] Next, the test method is described in detail based on the system architecture. Figure 2 , the test method includes:
[0062] Step 201, obtaining a frequency point range for testing a device under test.
[0063] The device under test refers to a device that needs to be tested for the maximum frequency it supports, and as the measurement frequency increases, the probability of error counts detected by the bit error tester increases, and the error counts show a monotonically increasing trend.
[0064] A relatively wide range may be pre-set as the frequency point range for testing the device under test, or the frequency point range for testing may be determined based on the theoretical operating frequency supported by the device under test itself.
[0065] In one embodiment, the step of obtaining a frequency point range for testing the device under test includes: obtaining a limit operating frequency value of the device under test; and using a range from zero to the limit operating frequency value as the frequency point range for testing the device under test.
[0066] In this embodiment, the limit operating frequency value of the device under test refers to the maximum frequency at which the device under test can theoretically operate, at which the device under test can operate but is likely to operate unstably. For example, if the limit operating frequency value of the device under test is Freq, the frequency point range of the device under test can be set to [0, Freq], thereby ensuring that the maximum normal operating frequency point of the device under test can be detected within the frequency point range.
[0067] Step 202, determining an initial left boundary value and an initial right boundary value of the test according to the frequency point range; wherein the initial left boundary value is determined based on the minimum value of the frequency point range, and the initial right boundary value is determined based on the maximum value of the frequency point range.
[0068] In one embodiment, the step of determining the initial left boundary value and the initial right boundary value of the test according to the frequency point range includes: determining zero as the initial left boundary value of the test; and determining the limit operating frequency value minus one as the initial right boundary value of the test.
[0069] In this embodiment, the initial left boundary value Left and the initial right boundary value Right of the test can be determined according to the frequency point range. For example, if the frequency point range of the device to be tested is [0, Freq], the initial left boundary value Left can be set to 0, and the initial right boundary value Right can be set to Freq-1. That is, the device to be tested is tested in the interval of [0, Freq-1] to detect the maximum normal operating frequency point of the device to be tested.
[0070] Step 203, repeatedly perform binary loop testing on the device to be tested based on the left boundary value and the right boundary value, and adjust the left boundary value based on the middle value of the left boundary value and the right boundary value or adjust the right boundary value based on the middle value according to the test result of each test, until the left boundary value is greater than the right boundary value.
[0071] In one embodiment, a binary loop test is repeatedly performed on the device under test based on the left boundary value and the right boundary value, and according to the test result of each test, the left boundary value is adjusted based on the middle value of the left boundary value and the right boundary value, or the right boundary value is adjusted based on the middle value until the left boundary value is greater than the right boundary value. The step includes: calculating the middle value of the left boundary value and the right boundary value; configuring the target frequency point corresponding to the middle value to the device under test, and detecting the error count of the device under test operating at the target frequency point; if the error count is zero, updating the left boundary value to the middle value plus one; if the error count is greater than zero, updating the right boundary value to the middle value minus one; judging whether the left boundary value is greater than the right boundary value; if the left boundary value is less than or equal to the right boundary value, repeatedly calculating the middle value of the left boundary value and the right boundary value until judging whether the left boundary value is greater than the right boundary value; if the left boundary value is greater than the right boundary value, ending the binary loop test.
[0072] In one embodiment, the step of configuring the target frequency point corresponding to the intermediate value to the device under test, and detecting the error count of the device under test operating at the target frequency point includes: configuring the target frequency point corresponding to the intermediate value to the device under test; when the device under test operates at the target frequency point, detecting the error count of the device under test within a preset time length.
[0073] In this embodiment, the initial left boundary value Left is 0, and the initial right boundary value Right is Freq-1 for example. In the initial state, the Left value is less than the Right value, indicating that there is an undetected frequency point. At this time, the middle value mid of the left boundary value Left and the right boundary value Right is calculated, mid=Left+(Right-Left) / 2, and the target frequency point corresponding to the mid value is configured to the device under test through a Python script, so that the device under test works at the target frequency point, and the error count of the device under test is detected by the bit error meter. If the error count is 0, it means that the device under test can still work normally at this frequency point, and Left is updated to mid+1 at this time; if the error count is not 0 (that is, greater than 0), it means that the current frequency point has exceeded the frequency limit of the normal operation of the device under test, and Right is updated to mid-1 at this time. After that, the above operation is repeated according to the current left boundary value and right boundary value until the Right value is no longer greater than the Left value, the test is completed, and the maximum normal operating frequency point supported by the device is finally determined. Through binary loop testing, each time a target frequency point is tested, the test range can be reduced by half by updating the left boundary value or the right boundary value, which greatly reduces the number of tests and test time, and improves the test efficiency of automated testing.
[0074] It should be noted that the target frequency point corresponding to the mid value refers to the frequency value that is the same as the mid value. For example, if the calculated mid value is 10000, the target frequency point is 10000 Hz.
[0075] Step 204: determine the maximum normal operating frequency point of the device under test according to all test results.
[0076] This method adopts a cyclic test based on binary division. After each frequency point is tested, the frequency range to be tested can be reduced by half, and the completion of the test can be determined by adjusting the left boundary value and the right boundary value, thereby greatly reducing the number of tests and the test time, and improving the test efficiency of the automated test.
[0077] In one embodiment, the step of determining the maximum normal operating frequency point of the device under test according to all test results includes: obtaining all target frequency points corresponding to an error count of zero; and determining the maximum normal operating frequency point of the device under test according to the maximum value of all target frequency points.
[0078] In this embodiment, when determining the maximum normal operating frequency point of the device under test according to all test results, the maximum value among all target frequency points corresponding to an error count of 0 may be used as the maximum normal operating frequency point of the device under test.
[0079] In one embodiment, after determining the maximum normal operating frequency point of the device to be tested according to all test results, the method further includes: outputting the maximum normal operating frequency point and all test results in a preset format.
[0080] In this embodiment, after obtaining the maximum normal operating frequency point of the device under test, the maximum normal operating frequency point can be output according to a preset format, such as printing it as a table in CSV format. Of course, the table can also include all test results without restriction, so as to facilitate viewing the final test results of each device under test.
[0081] In a specific embodiment, the test method is as follows Figure 3 ,include:
[0082] Step 301: Function starts. Function refers to the function of automated testing, which may be a test program.
[0083] Step 302: Initialize the bit error meter. Before the test starts, the bit error meter needs to be initialized.
[0084] Step 303, connect the hardware environment. Connect the test host to the bit error tester through the communication interface.
[0085] Step 304: Select data LANE and connect the bit error tester to the device under test.
[0086] Step 305: configure the parameters of the bit error tester and the device under test through a Python script.
[0087] Step 306, read the current error count.
[0088] Step 307 , determine whether the error count is 0. If it is 0, it means that the pre-test preparation is normal, and continue to step 309 ; if it is not 0, it means that the pre-test preparation is abnormal, and then execute step 308 .
[0089] Step 308, print error count.
[0090] Step 309, looping the frequency list.
[0091] Step 310, initializing the frequency range.
[0092] Step 311, binary division loop test.
[0093] Step 312, determine whether the error count is 0; if it is 0, execute step 313, if not 0, execute step 314.
[0094] Step 313, adjust the left boundary value.
[0095] Step 314, adjusting the right boundary value.
[0096] Step 315, determine whether the left boundary value is greater than the right boundary value; if so, execute step 316, if not, execute step 311.
[0097] Step 316, the loop ends.
[0098] Step 317, print the result to CSV.
[0099] Step 318, the function ends.
[0100] In this embodiment, the configuration parameters are sent through the PC and the error count of the bit error meter is read. Combined with the binary search strategy, the boundary value of the frequency point is judged, thereby greatly reducing the number and time of tests. Specifically, the binary search method is used to perform cyclic judgment of the frequency point, and the judgment steps are as follows: the frequency point range is set to 0 to Freq, then the initial left boundary value Left is 0, and the initial right boundary value Right is Freq-1. In the initial state, the Left value is less than the Right value, indicating that there are undetected frequency points. At this time, the middle value mid of the left boundary value Left and the right boundary value Right is calculated, mid=Left+(Right-Left) / 2, and the target frequency point corresponding to the mid value is configured to the device under test through the Python script, so that the device under test works at the target frequency point, and the error count of the device under test is detected by the bit error meter. If the error count is 0, it means that the device under test can still work normally at this frequency point, and Left is updated to mid+1; if the error count is not 0 (that is, greater than 0), it means that the current frequency point has exceeded the frequency limit of normal operation of the device under test, and Right is updated to mid-1. After that, the above operation is repeated according to the current left boundary value and right boundary value until the Right value is no longer greater than the Left value, the test is completed, and the maximum normal operating frequency point supported by the device is finally determined. Through binary loop testing, each time a target frequency point is tested, the test range can be reduced by half by updating the left boundary value or the right boundary value, which greatly reduces the number of tests and test time, and improves the test efficiency of automated testing.
[0101] Based on the same technical concept, the second embodiment of the present application provides a testing device, such as Figure 4 , the device comprises:
[0102] An acquisition module 401 is used to acquire a frequency point range for testing the device under test;
[0103] A first determination module 402, configured to determine an initial left boundary value and an initial right boundary value of a test according to the frequency point range; wherein the initial left boundary value is determined based on a minimum value of the frequency point range, and the initial right boundary value is determined based on a maximum value of the frequency point range;
[0104] A loop test module 403 is used to repeatedly perform a binary loop test on the device under test based on the left boundary value and the right boundary value, and adjust the left boundary value based on the middle value of the left boundary value and the right boundary value or adjust the right boundary value based on the middle value according to the test result of each test, until the left boundary value is greater than the right boundary value;
[0105] The second determination module 404 is configured to determine the maximum normal operating frequency point of the device under test according to all the test results.
[0106] The device adopts a cyclic test based on binary division. After each frequency point is tested, the frequency range to be tested can be reduced by half, and whether the test is completed is determined by the adjusted left boundary value and right boundary value, thereby greatly reducing the number of tests and test time, and improving the test efficiency of automated testing.
[0107] like Figure 5 As shown, an embodiment of the present application provides an electronic device, including a processor 111, a communication interface 112, a memory 113 and a communication bus 114, wherein the processor 111, the communication interface 112, and the memory 113 communicate with each other through the communication bus 114.
[0108] A memory 113, for storing computer programs;
[0109] In one embodiment of the present application, the processor 111 is used to implement the test method provided by any one of the above method embodiments when executing the program stored in the memory 113, including:
[0110] Obtain the frequency point range for testing the device under test;
[0111] Determine an initial left boundary value and an initial right boundary value of the test according to the frequency point range; wherein the initial left boundary value is determined based on the minimum value of the frequency point range, and the initial right boundary value is determined based on the maximum value of the frequency point range;
[0112] Repeating the binary cycle test on the device under test based on the left boundary value and the right boundary value, and adjusting the left boundary value based on the middle value of the left boundary value and the right boundary value or adjusting the right boundary value based on the middle value according to the test result of each test, until the left boundary value is greater than the right boundary value;
[0113] The maximum normal operating frequency point of the device under test is determined according to all the test results.
[0114] The communication bus mentioned in the above terminal can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.
[0115] The communication interface is used for communication between the above terminal and other devices.
[0116] The memory may include a random access memory (RAM) or a non-volatile memory, such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.
[0117] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
[0118] An embodiment of the present application further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the test method provided by any of the aforementioned method embodiments is implemented.
[0119] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0120] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a general hardware platform, and of course, by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the relevant technology can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.
[0121] It should be understood that the terms used herein are only for the purpose of describing specific example embodiments and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one", "an" and "said" as used herein may also be meant to include plural forms. The terms "include", "comprise", "contain", and "have" are inclusive, and therefore specify the existence of stated features, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, steps, operations, elements, parts, and / or combinations thereof. The method steps, processes, and operations described herein are not interpreted as necessarily requiring them to be performed in the specific order described or illustrated, unless the execution order is clearly indicated. It should also be understood that additional or alternative steps may be used.
[0122] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application. In the description, the suffixes such as "module", "component" or "unit" used to represent the elements are only used to facilitate the description of the present application and have no specific meaning in themselves. Therefore, "module", "component" or "unit" can be used in a mixed manner.
[0123] The above description is only a specific implementation of the present application, so that those skilled in the art can understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest range consistent with the principles and novel features applied for herein.
Claims
1. A testing method, characterized in that: The method comprises: Obtain the frequency point range for testing the device under test; Determine an initial left boundary value and an initial right boundary value of the test according to the frequency point range; wherein the initial left boundary value is determined based on the minimum value of the frequency point range, and the initial right boundary value is determined based on the maximum value of the frequency point range; Repeating the binary cycle test on the device under test based on the left boundary value and the right boundary value, and adjusting the left boundary value based on the middle value of the left boundary value and the right boundary value or adjusting the right boundary value based on the middle value according to the test result of each test, until the left boundary value is greater than the right boundary value; The maximum normal operating frequency point of the device under test is determined according to all the test results.
2. The method according to claim 1, characterized in that The step of repeatedly performing a binary cycle test on the device under test based on the left boundary value and the right boundary value, and adjusting the left boundary value based on an intermediate value between the left boundary value and the right boundary value or adjusting the right boundary value based on the intermediate value according to the test result of each test until the left boundary value is greater than the right boundary value, comprises: Calculate the middle value between the left boundary value and the right boundary value; configuring a target frequency point corresponding to the intermediate value to the device under test, and detecting an error count of the device under test operating at the target frequency point; If the error count is zero, the left boundary value is updated to the middle value plus one; If the error count is greater than zero, the right boundary value is updated to the middle value minus one; Determine whether the left boundary value is greater than the right boundary value; If the left boundary value is less than or equal to the right boundary value, repeat the step of calculating the intermediate value between the left boundary value and the right boundary value until the step of determining whether the left boundary value is greater than the right boundary value; If the left boundary value is greater than the right boundary value, the binary division loop test is terminated.
3. The method according to claim 2, characterized in that The step of determining the maximum normal operating frequency point of the device under test according to all the test results comprises: Obtain all the target frequency points corresponding to the error count being zero; The maximum normal operating frequency point of the device under test is determined according to the maximum value of all the target frequency points.
4. The method according to claim 2, characterized in that: The step of configuring the target frequency point corresponding to the intermediate value to the device under test and detecting the error count of the device under test working at the target frequency point includes: Configure the target frequency point corresponding to the intermediate value to the device under test; In a case where the device under test operates at the target frequency point, the error count of the device under test within a preset time period is detected.
5. The method according to claim 1, characterized in that The step of obtaining the frequency point range for testing the device under test comprises: Obtaining a limit operating frequency value of the device under test; The interval from zero to the limit operating frequency value is used as the frequency point range for testing the device under test.
6. The method according to claim 5, characterized in that The step of determining an initial left boundary value and an initial right boundary value of the test according to the frequency point range comprises: Set zero as the initial left boundary value for the test; The limit operating frequency value minus one is determined as the initial right boundary value of the test.
7. The method according to claim 1, characterized in that After determining the maximum normal operating frequency point of the device under test according to all the test results, the method further includes: The maximum normal operating frequency point and all the test results are output in a preset format.
8. A testing device, characterized in that: The device comprises: An acquisition module is used to acquire the frequency point range for testing the device under test; A first determination module, used to determine an initial left boundary value and an initial right boundary value of a test according to the frequency point range; wherein the initial left boundary value is determined based on a minimum value of the frequency point range, and the initial right boundary value is determined based on a maximum value of the frequency point range; A cyclic testing module, configured to repeatedly perform a binary cyclic test on the device under test based on the left boundary value and the right boundary value, and adjust the left boundary value based on an intermediate value between the left boundary value and the right boundary value or adjust the right boundary value based on the intermediate value according to the test result of each test, until the left boundary value is greater than the right boundary value; The second determination module is used to determine the maximum normal operating frequency point of the device under test according to all the test results.
9. An electronic device, characterized in that: It includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor is used to implement the test method described in any one of claims 1 to 7 when executing a program stored in a memory.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the testing method according to any one of claims 1 to 7 is implemented.