Switching chip TSN protocol TAS Fifo queue expansion method and device

Abstract

The invention discloses a switch chip TSN protocol TAS Fifo queue expansion method and device, and the method comprises the steps: S1, designing one or more expansion Fifo according to a conventional Fifo specification during the chip design, and mapping the expansion Fifo to any one or more of Fifo with the priority of 0-7 through a bitmap based on a chip application direction or a service demand; and S2, configuring an independent time gating list for each expanded Fifo, and using a unified time gating list for other conventional Fifo with eight priorities. According to the invention, through the multiple expansion Fifo which can be flexibly configured, the problems that a multi-service message gating list cannot be distinguished due to a conventional single Fifo, independent time cannot be configured according to the service, and the services influence each other are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of switching chips, and in particular to a method and device for expanding a TAS Fifo queue of a switching chip TSN protocol. Background Art

[0002] At present, the TAS (Time Aware Shaper, referred to as gating) related implementation in the TSN protocol is implemented by various manufacturers based on the protocol standard. The protocol standard does not support different service messages in the Fifo queue of the same priority to be sent at different times.

[0003] When messages of different services need to be sent with the highest or the same priority, and their respective sending time periods are different, in the same priority Fifo queue, two different messages can only be sent with one set gated time list, one of which is affected by the other, and the sending efficiency and timeliness cannot be guaranteed. For example, refer to Figure 1 , the p2 message cannot be sent out before the p1 message. Summary of the invention

[0004] The present invention mainly aims at the problem that different business messages of the same priority Fifo cannot be distinguished and sent separately. According to business needs, an extended Fifo is added to the corresponding priority Fifo to distinguish different business messages, and a time gating list is allowed to be independently configured to ensure the timeliness of message sending.

[0005] In order to achieve the above-mentioned purpose, the technical solution of the present invention provides a switching chip TSN protocol TAS Fifo queue expansion method, which includes: S1: when designing a chip, design one or more extended Fifos according to conventional Fifo specifications, wherein the extended Fifo is mapped to any one or more of the 0-7 priority Fifos through a bitmap based on the chip application direction or business requirements; S2: configure an independent time gating list for each extended Fifo, while other conventional Fifos of 8 priorities use a unified time gating list.

[0006] In a further technical solution, in step S1, when there are different service messages in a certain priority Fifo that need to be sent in time-controlled manner, one or more extended Fifos are mapped to the priority Fifo.

[0007] In a further technical solution, when one or more extended Fifos are mapped to a certain priority Fifo, service messages of the same priority are distinguished through service marking flags, so that the corresponding service messages are sent to the corresponding extended Fifo.

[0008] In a further technical solution, the service mark flag is obtained through one of the following functional modules: port attribute, flow matching, VLAN table entry, access control list ACL, nexthop table entry, priority mapping.

[0009] In a further technical solution, in step S1, when multiple priority Fifos have messages to be sent, but the time requirements of the priority Fifos vary greatly, the extended Fifo is mapped to the Fifo with a larger change in time requirements, and the corresponding message is directly sent to the extended Fifo instead of the conventional Fifo for independent time-gated control.

[0010] The technical solution of the present invention also provides a switching chip TSN protocol TAS Fifo queue expansion device, which includes: an extended Fifo design module, which is used to design one or more extended Fifos according to conventional Fifo specifications when designing a chip, wherein the extended Fifo is mapped to any one or more of the 0-7 priority Fifos through a bitmap based on the chip application direction or business requirements; a gating configuration module, which is used to configure an independent time gating list for each extended Fifo, while other conventional Fifos of 8 priorities use a unified time gating list.

[0011] In a further technical solution, in an extended Fifo design module, when different service messages exist in a certain priority Fifo and need to be sent in time-controlled manner, one or more extended Fifos are mapped to the priority Fifo.

[0012] In a further technical solution, when one or more extended Fifos are mapped to a certain priority Fifo, service messages of the same priority are distinguished through service marking flags, so that the corresponding service messages are sent to the corresponding extended Fifo.

[0013] In a further technical solution, the service mark flag is obtained through one of the following functional modules: port attribute, flow matching, VLAN table entry, access control list ACL, nexthop table entry, priority mapping.

[0014] In a further technical solution, in the extended Fifo design module, when multiple priority Fifos have messages to send, but the time requirements of the priority Fifos vary greatly, the extended Fifo will be mapped to the Fifo with a larger change in time requirements, and the corresponding message will be directly sent to the extended Fifo instead of the conventional Fifo for independent time-gated control.

[0015] The present invention solves the problem that the gating lists of multiple service messages caused by a conventional single Fifo cannot be distinguished and independent time cannot be configured according to the service, resulting in mutual influence of services, through a flexibly configurable multi-expansion Fifo.

[0016] The extended fifo of the present invention is not limited to being applied to different business messages in the same priority fifo for time-controlled transmission, but can also be applied to different priority fifos. When multiple fifos have messages to send, but the transmission time difference is large and cannot be completely controlled by a gating list, the priority message with a large time difference can be directly sent to the extended fifo, using an independent time gating list, and other priority fifos use a unified gating time list. The present invention can make the time gating list configuration more flexible, the control more accurate, and can cope with more abundant business needs at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 This is a sample diagram of the protocol standard implementation;

[0019] Figure 2 It is an example diagram of applying the extended Fifo to the same priority level of the present invention;

[0020] Figure 3 This is an example diagram of the application of the extended Fifo of the present invention to a multi-stage Fifo;

[0021] Figure 4 and Figure 5 This is a sample diagram of the gate list configuration;

[0022] Figure 6 is used for Figure 3 An example diagram of the time configuration of the corresponding Fifo. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] The present invention can cope with a variety of time-sensitive network application scenarios by flexibly configuring the extended Fifo and the independent time gating list according to business needs. First, when designing the chip, multiple extended Fifos are designed according to the conventional Fifo specifications and the chip application direction. The extended Fifo can be mapped to 0 to 7 through bitmap to expand any one or more of the 8 priority Fifos. It supports many-to-one and many-to-many mapping, that is, it supports expanding multiple extended Fifos to a certain priority Fifo, or expanding multiple priority Fifos. The specific number of supported extended Fifos can be flexibly determined according to demand and resources during design.

[0025] The design of the time gate control list (GateControlList) is consistent with the protocol standard. Since the extended fifos use the gate control list independently, the gate control status has only two states: open and closed, which can be represented by 1 bit.

[0026] When multiple extended Fifos are mapped to a certain priority Fifo, that is, used to distinguish multiple services of the same priority, you can choose to use functional modules such as port attributes, flow matching, VLAN entries, ACL (access control list), nexthop entries, priority mapping, etc. to generate a certain characteristic flow (service) tag (flag). The service message of Flag1 is sent to extended Fifo1, and the service message of Flag2 is sent to extended Fifo2, thereby achieving service (message) differentiation. According to actual needs, each extended Fifo is configured with its own gating list for control, so that the time gating lists of service messages of the same priority but different services are independent and do not affect each other.

[0027] For example, refer to Figure 2 By mapping an extended Fifo (ExFifo1) to the Fifo of priority 7, the p2 message is sent to the ExFifo1 instead of the regular Fifo, and the sending of the p2 message can be independently controlled through an independent time gating list, so that the p2 message is not affected by the p1 message.

[0028] When applied to sending messages in multiple Fifos, due to the large differences in the time requirements of each Fifo, it is impossible to use a reasonable algorithm to use a time gating list for unified configuration (that is, the time slot utilization rate is lower than a certain standard or preset standard), the extended Fifo can be mapped to the Fifo with a large change in time demand for independent control, so that the corresponding message will be directly sent to the extended Fifo instead of the regular Fifo (the extended Fifo flag is configured for the business message), thereby realizing independent time gating list control without participating in unified time gating list control.

[0029] For example, refer to Figure 3, when Fifo7 (i.e. Fifo of priority 7) has message p1 that needs to be sent, Fifo3 (i.e. Fifo of priority 3) has message p6 that needs to be sent, Fifo2 (i.e. Fifo of priority 2) has message p5 that needs to be sent, and Fifo0 (i.e. Fifo of priority 0) has message p4 that needs to be sent, message p1 in Fifo7 is sent every 2ms (the gate is opened every 2ms), message p5 in Fifo2 (class 2) is sent every 6ms. Message p4 in Fifo0 (class 0) is sent every 8ms. And message p6 in Fifo3 is sent every 4.5ms. By Figure 4 The gating list configuration shown, that is, the gating time period (gap) is switched once every 2ms, can satisfy the sending of messages p1, p5 and p4.

[0030] As mentioned above, the three Fifo packet sending requirements can be met by unifying the gating list. If Fifo3 is added, it has a cycle of 4.5ms, and the gating operation with a cycle of 2ms cannot meet the requirements. The gating time cycle (gap) must be more refined, and a cycle of 0.5ms can meet the requirements, such as Figure 5 This will waste a lot of gating list resources, especially when there are other Fifos with large time differences involved, more gating resources are needed and they must be more refined.

[0031] At this time, if Figure 3 As shown, the present invention maps the extended Fifo2 to Fifo3, so that the message p6 that should enter Fifo3 enters the extended Fifo2 (ExFifo2), and then uses the independent gating list control of the extended Fifo2, so that the p6 message can be configured with an independent sending time to ensure the message sending. This design is simple and can save a lot of resources. Similarly, p2 can also be configured to come out earliest through its own independent gating.

[0032] Specifically, see Figure 3 , the message enters Exfifo, which is determined by the flag it carries. The flag source can be obtained by acl matching. Here, flag1 is obtained by matching the mac address of message p2, and flag2 is obtained by matching the mac address of message p6. The priority of the message is determined by the VLAN tag it carries. Messages p1 and p2 both carry priority 7, and message p6 carries priority 3. If there are 4 resources for the extended fifo, the table entry is ExFifo.id0 / 1 / 2 / 3, and 1 and 2 are bound to fifo7 and fifo3 respectively. ExFifo.id1=7, ExFifo.id2=3. The time configuration is as follows Figure 6 shown.

[0033] Of course, it can be understood that the present invention only takes two extended Fifos as examples. The actual application is not limited to the number of Fifos and the number of extended Fifos. A large number of extended Fifos can be designed according to demand, and the gating lists of each extended Fifo are related and independent. Each Fifo has its own exclusive gating list. There are a total of 256 entries in the extended Fifo gating list configuration table. Specifically, extended Fifo1 can use 0-8 of them, and the time period can be T0-T8; extended Fifo2 can use 16-23, and the time period is t0-t8. As long as the use of resources does not conflict (table entry resources cannot be reused), they can overlap in time and do not affect each other.

[0034] In addition, alternatively, it is possible to expand the standard 0-7 priority queues so that each priority has multiple fixed fifos, enable them using a unified configuration register, and simultaneously expand the state switches of the queue fifos corresponding to the same number of gating lists. The function of the present invention can be achieved through refined time configuration, but it consumes a lot of resources and is not flexible enough.

[0035] In an embodiment of the present invention, a method for expanding a TAS Fifo queue of a switching chip TSN protocol is provided, which includes: S1: when designing a chip, one or more extended Fifos are designed according to conventional Fifo specifications, wherein the extended Fifos are mapped to any one or more of the 0-7 priority Fifos through a bitmap based on the chip application direction or business requirements; S2: an independent time gating list is configured for each extended Fifo, while other conventional Fifos of 8 priorities use a unified time gating list.

[0036] In a further technical solution, in step S1, when there are different service messages in a certain priority Fifo that need to be sent in time-controlled manner, one or more extended Fifos are mapped to the priority Fifo.

[0037] In a further technical solution, when one or more extended Fifos are mapped to a certain priority Fifo, service messages of the same priority are distinguished through service marking flags, so that the corresponding service messages are sent to the corresponding extended Fifo.

[0038] In a further technical solution, the service mark flag is obtained through one of the following functional modules: port attribute, flow matching, VLAN table entry, ACL (access control list), nexthop table entry, priority mapping.

[0039] In a further technical solution, in step S1, when multiple priority Fifos have messages to be sent, but the time requirements of the priority Fifos vary greatly, the extended Fifo is mapped to the Fifo with a larger change in time requirements, and the corresponding message is directly sent to the extended Fifo instead of the conventional Fifo for independent time-gated control.

[0040] In another embodiment of the present invention, a switching chip TSN protocol TAS Fifo queue expansion device is also provided, which includes: an extended Fifo design module, which is used to design one or more extended Fifos according to conventional Fifo specifications when designing a chip, wherein the extended Fifo is mapped to any one or more of the 0-7 priority Fifos through a bitmap based on the chip application direction or business requirements; a gating configuration module, which is used to configure an independent time gating list for each extended Fifo, while other conventional Fifos of 8 priorities use a unified time gating list.

[0041] In a further technical solution, in an extended Fifo design module, when different service messages exist in a certain priority Fifo and need to be sent in time-controlled manner, one or more extended Fifos are mapped to the priority Fifo.

[0042] In a further technical solution, when one or more extended Fifos are mapped to a certain priority Fifo, service messages of the same priority are distinguished through service marking flags, so that the corresponding service messages are sent to the corresponding extended Fifo.

[0043] In a further technical solution, the service mark flag is obtained through one of the following functional modules: port attribute, flow matching, VLAN table entry, ACL (access control list), nexthop table entry, priority mapping.

[0044] In a further technical solution, in the extended Fifo design module, when multiple priority Fifos have messages to send, but the time requirements of the priority Fifos vary greatly, the extended Fifo will be mapped to the Fifo with a larger change in time requirements, and the corresponding message will be directly sent to the extended Fifo instead of the conventional Fifo for independent time-gated control.

[0045] The present invention solves the problem that the gating lists of multiple service messages caused by a conventional single Fifo cannot be distinguished and independent time cannot be configured according to the service, resulting in mutual influence of services, through a flexibly configurable multi-expansion Fifo.

[0046] The extended fifo of the present invention is not limited to being applied to different business messages in the same priority fifo for time-controlled transmission, but can also be applied to different priority fifos. When multiple fifos have messages to send, but the transmission time difference is large and cannot be completely controlled by a gating list, the priority message with a large time difference can be directly sent to the extended fifo, using an independent time gating list, and other priority fifos use a unified gating time list. The present invention can make the time gating list configuration more flexible, the control more accurate, and can cope with more abundant business needs at the same time.

[0047] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A method for expanding the TAS Fifo queue of a switching chip TSN protocol, characterized in that: include: S1: When designing a chip, one or more extended Fifos are designed according to conventional Fifo specifications. Based on the chip application direction or business requirements, the extended Fifos are mapped to any one or more of the 0-7 priority Fifos through a bitmap; S2: An independent time gating list is configured for each extended Fifo, while other regular Fifos of 8 priorities use a unified time gating list.

2. The method according to claim 1, characterized in that In step S1, when there are different service messages in a certain priority Fifo that need to be sent in time-controlled manner, one or more extended Fifos are mapped to the priority Fifo.

3. The method according to claim 2, characterized in that When one or more extended Fifos are mapped to a certain priority Fifo, service messages of the same priority are distinguished through the service mark flag, so that the corresponding service messages are sent to the corresponding extended Fifo.

4. The method according to claim 3, characterized in that The service flag is obtained through one of the following functional modules: port attribute, flow matching, VLAN entry, access control list ACL, nexthop entry, priority mapping.

5. The method according to any one of claims 1 to 4, characterized in that In step S1, when multiple priority Fifos have messages to send, but the time requirements of the priority Fifos vary greatly, the extended Fifo is mapped to the Fifo with the larger time requirement variation, and the corresponding message is directly sent to the extended Fifo instead of the conventional Fifo for independent time gating control.

6. A switching chip TSN protocol TAS Fifo queue expansion device, characterized in that: include: The extended Fifo design module is used to design one or more extended Fifos according to conventional Fifo specifications when designing a chip, wherein the extended Fifo is mapped to any one or more of the 0-7 priority Fifos through a bitmap based on the chip application direction or business requirements; The gating configuration module is used to configure an independent time gating list for each extended Fifo, while other regular Fifos of 8 priorities use a unified time gating list.

7. The device according to claim 6, characterized in that In the extended Fifo design module, when different service messages exist in a certain priority Fifo and need to be sent in time-controlled manner, one or more extended Fifos are mapped to the priority Fifo.

8. The device according to claim 7, characterized in that When one or more extended Fifos are mapped to a certain priority Fifo, service messages of the same priority are distinguished through the service mark flag, so that the corresponding service messages are sent to the corresponding extended Fifo.

9. The device according to claim 8, characterized in that The service flag is obtained through one of the following functional modules: port attribute, flow matching, VLAN entry, access control list ACL, nexthop entry, priority mapping.

10. The device according to any one of claims 6 to 9, characterized in that: In the extended Fifo design module, when multiple priority Fifos have messages to send, but the time requirements of the priority Fifos vary greatly, the extended Fifo is mapped to the Fifo with a larger change in time requirements, and the corresponding message is directly sent to the extended Fifo instead of the conventional Fifo for independent time gating control.

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