Image sensor, pixel signal read-out control method, electronic equipment and vehicle

Abstract

The invention discloses an image sensor and a pixel signal readout control method, the image sensor comprises a pixel array, a plurality of analog-to-digital conversion circuits, a plurality of switch modules and a processing module, the pixel array comprises a plurality of columns of pixel units, and the plurality of analog-to-digital conversion circuits are used for quantizing pixel signals of the plurality of columns of pixel units; each switch module is connected with a plurality of columns of pixel units and a plurality of analog-to-digital conversion circuits; and the processing module is connected with the pixel array, the plurality of analog-to-digital conversion circuits and the plurality of switch modules, and is used for controlling the switch modules and the plurality of analog-to-digital conversion circuits correspondingly connected with the switch modules, so that pixel signals of the plurality of columns of pixel units correspondingly connected with the switch modules are alternately quantized and converted through the analog-to-digital conversion circuits. According to the image sensor and the control method, under the condition that the same pixel array size is guaranteed, the number of analog-to-digital conversion circuits is reduced, the occupied area of the analog-to-digital conversion circuits is reduced, and miniaturization design of devices is facilitated.

Description

Technical Field

[0001] The present invention relates to the technical field of image processing, and in particular to an image sensor, and a pixel signal readout control method, electronic equipment and a vehicle based on the image sensor. Background Art

[0002] In the related art, each column of pixel units in the image sensor corresponds to two analog-to-digital conversion circuits, one of which is used as a high-gain analog-to-digital conversion circuit and the other as a low-gain analog-to-digital conversion circuit. In this way, from the perspective of structural design, the analog-to-digital conversion circuit needs to occupy twice the area, which is not conducive to the miniaturization design of the device. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the first object of the present invention is to provide an image sensor that can reduce the occupied area of ​​the analog-to-digital conversion circuit while ensuring the same pixel array size, thereby facilitating the miniaturization design of the device.

[0004] The second object of the present invention is to provide a pixel signal readout control method;

[0005] The third object of the present invention is to provide an electronic device;

[0006] A fourth objective of the present invention is to provide a vehicle.

[0007] In order to achieve the above-mentioned purpose, an image sensor of an embodiment of the first aspect of the present invention comprises: a pixel array, the pixel array comprising multiple columns of pixel units; multiple analog-to-digital conversion circuits, the multiple analog-to-digital conversion circuits being used to quantize pixel signals of the multiple columns of pixel units; multiple switch modules, each of the switch modules correspondingly connecting multiple columns of pixel units and multiple analog-to-digital conversion circuits; a processing module, the processing module being connected to the pixel array, the multiple analog-to-digital conversion circuits and the multiple switch modules, and being used to control the switch modules and the multiple analog-to-digital conversion circuits correspondingly connected to the switch units, so as to alternately quantize and convert the pixel signals of the multiple columns of pixel units correspondingly connected to the switch modules.

[0008] According to the image sensor of the embodiment of the present invention, a plurality of columns of pixel units share an analog-to-digital conversion circuit through a switch module, and the reading time of the pixel signals of the plurality of columns of pixel units sharing the analog-to-digital conversion circuit is controlled through a processing module, so that the plurality of columns of pixel units time-share the corresponding analog-to-digital conversion circuits, that is, through the inconsistency in the reading time, the width of the analog-to-digital conversion circuit can meet the design requirements within the width of the original single-channel circuit, that is, the number of applicable analog-to-digital conversion circuits is reduced, the occupied area of ​​the analog-to-digital conversion circuit is reduced, and the miniaturization design of the device is facilitated.

[0009] In some embodiments, the plurality of analog-to-digital conversion circuits are connected to the plurality of columns of pixel units in a one-to-one correspondence.

[0010] In some embodiments, the switch module is respectively connected to two adjacent columns of pixel units and two adjacent analog-to-digital conversion circuits.

[0011] In some embodiments, the two columns of pixel units connected to each of the switch modules include a first column of pixel units and a second column of pixel units; the two analog-to-digital conversion circuits connected to each of the switch modules include a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit.

[0012] In some embodiments, the switch module includes: a first switching switch, the first switching switch is used to control the connection status of the first column of pixel units and the first analog-to-digital conversion circuit; and a second switching switch, the second switching switch is used to control the connection status of the second column of pixel units and the second analog-to-digital conversion circuit.

[0013] In some embodiments, the first end of the first switching switch is suitable for inputting the low-gain pixel signal of the first column of pixel units, and the second end of the first switching switch is connected to the first input end of the first analog-to-digital conversion circuit; the first end of the second switching switch is suitable for inputting the low-gain pixel signal of the second column of pixel units, and the second end of the second switching switch is connected to the first input end of the second analog-to-digital conversion circuit.

[0014] In some embodiments, the switch module also includes: a third switching switch, the third switching switch is used to control the connection status of the first column of pixel units and the second analog-to-digital conversion circuit; and a fourth switching switch, the fourth switching switch is used to control the connection status of the second column of pixel units and the first analog-to-digital conversion circuit.

[0015] In some embodiments, the pixel signal of the column pixel unit includes a high-gain pixel signal, the first end of the third switching switch is suitable for inputting the high-gain pixel signal of the first column pixel unit, the second end of the third switching switch is connected to the first input end of the second analog-to-digital conversion circuit, the first end of the fourth switching switch is suitable for inputting the high-gain pixel signal of the second column pixel unit, and the second end of the fourth switching switch is connected to the first input end of the first analog-to-digital conversion circuit.

[0016] In some embodiments, the first analog-to-digital conversion circuit includes: a first comparator, a first input terminal of the first comparator is suitable for inputting a pixel signal, and a second input terminal of the second comparator is suitable for inputting a ramp signal; and a first counter, the first counter is used to obtain a digital quantization value of the pixel signal according to a comparison result of the comparator.

[0017] In some embodiments, the first analog-to-digital conversion circuit also includes: a first capacitor, a first end of the first capacitor is connected to the second end of the first switching switch and the second end of the fourth switching switch, and a second end of the first capacitor is connected to the first input end of the first comparator for inputting a pixel signal; a second capacitor, a first end of the second capacitor is connected to the processing module, and a second end of the second capacitor is connected to the second input end of the first comparator for inputting a ramp signal.

[0018] In some embodiments, the first analog-to-digital conversion circuit further includes: a second comparator, an input terminal of the second comparator is connected to an output terminal of the first comparator, and the second comparator is suitable for outputting the comparison result.

[0019] In some embodiments, the first analog-to-digital conversion circuit further includes: a first reset selector, wherein an input end of the first reset selector is connected to an output end of the second comparator, and an output end of the first reset selector is connected to the first counter.

[0020] In some embodiments, the second analog-to-digital conversion circuit includes: a third comparator, a first input terminal of the third comparator is suitable for inputting a pixel signal, and a second input terminal of the third comparator is suitable for inputting a ramp signal; and a second calculator, the second calculator is used to obtain a digital quantization value of the pixel signal according to a comparison result of the comparator.

[0021] In some embodiments, the second analog-to-digital conversion circuit also includes: a third capacitor, a first end of the third capacitor is connected to the second end of the second switching switch and the second end of the third switching switch, and a second end of the third capacitor is connected to the first input end of the third comparator to input a pixel signal; and a fourth capacitor, a first end of the fourth capacitor is connected to the processing module, and a second end of the fourth capacitor is connected to the second input end of the third comparator to input a ramp signal.

[0022] In some embodiments, the second analog-to-digital conversion circuit further includes: a fourth comparator, the input end of the fourth comparator is connected to the output end of the third comparator, and the output end of the fourth comparator is suitable for inputting the comparison result.

[0023] In some embodiments, the second analog-to-digital conversion circuit further includes: a second reset selector, wherein an input terminal of the second reset selector is connected to an output terminal of the fourth comparator, and an output terminal of the second reset selector is connected to the second counter.

[0024] In some embodiments, each of the pixel units includes a first type of photoelectric conversion unit and a second type of photoelectric conversion unit, and a photosensitive area of ​​the first type of photoelectric conversion unit is larger than a photosensitive area of ​​the second type of photoelectric conversion unit.

[0025] In order to achieve the above-mentioned purpose, the second aspect of the present invention proposes a pixel signal readout control method for an image sensor, wherein the pixel signal readout control method comprises: controlling the pixel array output of the image sensor; controlling the switch module of the image sensor and the multiple analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert the pixel signals of the multiple columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits.

[0026] The pixel signal readout control method of the embodiment of the present invention is based on setting multiple switch modules in the image sensor. The connection between multiple columns of pixel units and the corresponding analog-to-digital conversion circuits can be switched through the switch modules, so that when the pixel signals are quantized, the multiple columns of pixel units can share the analog-to-digital conversion circuit, and based on this structure, the pixel signals of the column pixel units that share the analog-to-digital conversion circuit in the pixel array are alternately read out, that is, the correspondingly connected analog-to-digital conversion circuits are time-division multiplexed by the multiple columns of pixel units. Therefore, for pixel arrays of the same size, the number of analog-to-digital conversion circuits can be reduced, and the occupied area of ​​the analog-to-digital conversion circuits in the device can be reduced, which is conducive to the miniaturization design of the device.

[0027] In some embodiments, the pixel array includes an even-numbered column of pixel units and an odd-numbered column of pixel units, each of the pixel units includes a first type of photoelectric conversion unit and a second type of photoelectric conversion unit, and the photosensitive area of ​​the first type of photoelectric conversion unit is larger than the photosensitive area of ​​the second type of photoelectric conversion unit;

[0028] Controlling the pixel array output of the image sensor includes: sequentially reading out the low gain reset signal, high gain reset signal, high gain image signal and low gain image signal of the first type of photoelectric conversion unit in the odd-numbered column pixel units; sequentially reading out the high gain reset signal, high gain image signal, low gain image signal and low gain reset signal of the second type of photoelectric conversion unit in the odd-numbered column pixel units.

[0029] In some embodiments, controlling the pixel array output of the image sensor also includes: sequentially reading out the low gain reset signal, high gain reset signal, high gain image signal and low gain image signal of the first type of photoelectric conversion unit in the even-numbered column pixel units; sequentially reading out the high gain reset signal, high gain image signal, low gain image signal and low gain reset signal of the second type of photoelectric conversion unit in the even-numbered column pixel units.

[0030] In some embodiments, each of the switch modules is respectively connected to two adjacent columns of pixel units and two adjacent analog-to-digital conversion circuits; the two columns of pixel units connected to each of the switch modules include a first column of pixel units and a second column of pixel units; the two analog-to-digital conversion circuits connected to each of the switch modules include a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit; each of the switch modules includes a first switching switch and a second switching switch, the first switching switch is used to control the connection state of the first column of pixel units and the first analog-to-digital conversion circuit; the second switching switch is used to control the connection state of the second column of pixel units and the second analog-to-digital conversion circuit; the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled. The invention relates to a switching circuit, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each switch module through the analog-to-digital conversion circuit, comprising: when the pixel array outputs a low-gain reset signal of a first type of photoelectric conversion unit of the first column of pixel units, controlling the first switching switch and the second switching switch to be closed, so that the low-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; controlling the input of a low-gain ramp signal to the second input end of the first analog-to-digital conversion circuit; and controlling the first analog-to-digital conversion circuit to quantize and convert the low-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units according to the low-gain ramp signal.

[0031] In some embodiments, the switch module further includes a third exchange switch and a fourth exchange switch, the third exchange switch is used to control the connection state of the first column of pixel units and the second analog-to-digital conversion circuit, and the fourth exchange switch is used to control the connection state of the second column of pixel units and the first analog-to-digital conversion circuit; the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately digitally quantize the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also includes: when the pixel array outputs the high-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; the second analog-to-digital conversion circuit is controlled to quantize the high-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal.

[0032] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the high-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; and the second analog-to-digital conversion circuit is controlled to quantize and convert the high-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal.

[0033] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the low-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, and the third exchange switch and the fourth exchange switch are controlled to be opened, so that the low-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; a low-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; and the first analog-to-digital conversion circuit is controlled to quantize and convert the low-gain image signal of the first type of photoelectric conversion unit of the column of pixel units according to the low-gain ramp signal.

[0034] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately digitally quantize the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the high-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; and the second analog-to-digital conversion circuit is controlled to quantize the high-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal.

[0035] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the high-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; and the second analog-to-digital conversion circuit is controlled to quantize and convert the high-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal.

[0036] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the low-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, and the third exchange switch and the fourth exchange switch are controlled to be opened, so that the low-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; a low-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; and the first analog-to-digital conversion circuit is controlled to quantize and convert the low-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units according to the low-gain ramp signal.

[0037] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the low gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, and the third exchange switch and the fourth exchange switch are controlled to be disconnected, so that the low gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the low gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; and the first analog-to-digital conversion circuit is controlled to quantize and convert the low gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units according to the low gain ramp signal.

[0038] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, including: when the pixel array outputs a low-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units, controlling the first switching switch and the second switching switch to be closed so that the low-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; controlling the input of a low-gain ramp signal to the second input end of the second analog-to-digital conversion circuit; and controlling the second analog-to-digital conversion circuit to quantize and convert the low-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal.

[0039] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the high-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; and the first analog-to-digital conversion circuit is controlled to quantize and convert the high-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal.

[0040] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the high-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; and the first analog-to-digital conversion circuit is controlled to quantize and convert the high-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal.

[0041] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the low-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units, the third exchange switch and the fourth exchange switch are controlled to be disconnected, and the first exchange switch and the second exchange switch are controlled to be closed, so that the low-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; a low-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; and the second analog-to-digital conversion circuit is controlled to quantize and convert the low-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal.

[0042] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately digitally quantize the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the high-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; and the first analog-to-digital conversion circuit is controlled to quantize and convert the high-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal.

[0043] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the high-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; a high-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; and the first analog-to-digital conversion circuit is controlled to quantize and convert the high-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal.

[0044] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the low-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units, the third exchange switch and the fourth exchange switch are controlled to be disconnected, and the first exchange switch and the second exchange switch are controlled to be closed, so that the low-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; a low-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; and the second analog-to-digital conversion circuit is controlled to quantize and convert the low-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal.

[0045] In some embodiments, the switch module of the image sensor and the two analog-to-digital conversion circuits corresponding to each of the switch modules are controlled to alternately quantize and convert the pixel signals of the two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, and also include: when the pixel array outputs the low gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, and the third exchange switch and the fourth exchange switch are controlled to be disconnected, so that the low gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the low gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; and the second analog-to-digital conversion circuit is controlled to quantize and convert the low gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units according to the low gain ramp signal.

[0046] In some embodiments, the pixel signal readout control method further includes: when one of the first analog-to-digital conversion circuit and the second analog-to-digital conversion circuit performs quantization conversion on the pixel signal, controlling the other analog-to-digital conversion circuit of the first analog-to-digital conversion circuit and the second analog-to-digital conversion circuit to be in a reset state or the pixel signal input to the other analog-to-digital conversion circuit does not reach an overlapping state with the ramp signal.

[0047] In order to achieve the above objective, a third aspect of the present invention provides an electronic device, which includes the image sensor described in the above embodiment.

[0048] The electronic device of the embodiment of the present invention, by adopting the image sensor of the above embodiment, can reduce the occupied area of ​​the analog-to-digital conversion circuit while ensuring the same pixel array size, which is conducive to the miniaturization design of the device.

[0049] In order to achieve the above objective, a fourth aspect of the present invention provides a vehicle, which includes the image sensor of the above embodiment.

[0050] According to the vehicle of the embodiment of the present invention, by adopting the image sensor of the above embodiment, the space occupied by the image sensor can be reduced, and the space utilization is more effectively allocated.

[0051] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0053] Figure 1 is a schematic diagram of an image sensor structure according to an embodiment of the present invention;

[0054] Figure 2 is a schematic diagram of the structure and connection of a switch module and an analog-to-digital conversion circuit according to an embodiment of the present invention;

[0055] Figure 3 is a flowchart of a pixel signal readout control method according to an embodiment of the present invention;

[0056] Figure 4 is a schematic diagram of an odd-numbered column pixel unit structure according to an embodiment of the present invention;

[0057] Figure 5 is a schematic diagram of an even-numbered column pixel unit structure according to an embodiment of the present invention;

[0058] Figure 6 is a timing diagram of image sensor pixel signal readout and digital quantization conversion according to one embodiment of the present invention;

[0059] Figure 7 is a block diagram of an electronic device according to an embodiment of the present invention;

[0060] Figure 8 is a block diagram of a vehicle according to one embodiment of the present invention.

[0061] Reference numerals:

[0062] Vehicle 1;

[0063] Electronic equipment 1000;

[0064] Image sensor 100;

[0065] Pixel array 10, analog-to-digital conversion circuit 20, switch module 30;

[0066] A first analog-to-digital conversion circuit 201 and a second analog-to-digital conversion circuit 202;

[0067] The first switching switch SW11, the second switching switch SW12, the third switching switch SW21, the fourth switching switch SW22, the first capacitor C11, the second capacitor C12, the first comparator 21, the second comparator 22, the first counter 23, the third capacitor C21, the fourth capacitor C22, the third comparator 24, the fourth comparator 25 and the second counter 26, the first reset selector 27, and the second reset selector 28. DETAILED DESCRIPTION

[0068] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.

[0069] A first aspect of the present invention provides an image sensor, which can reduce the occupied area of ​​an analog-to-digital conversion circuit while ensuring the same pixel array size, thereby facilitating a miniaturized design of the device.

[0070] The image sensor according to the first embodiment of the present invention is described below.

[0071] Figure 1 FIG. 1 is a schematic diagram of a pixel array and a signal readout conversion circuit of an image sensor according to an embodiment of the present invention. Figure 1 As shown, the image sensor 100 of the embodiment of the present invention includes a pixel array 10, an analog-to-digital conversion circuit 20, a switch module 30 and a processing module (not shown in the figure).

[0072] The pixel array 10 includes a plurality of columns of pixel units. For example, the pixel array 10 includes M columns of pixel units, where M is a positive integer, such as M=1, 2, 3, etc. Figure 1 The pixel array 10 is y rows and 2x (2M=2x) columns, and each pixel unit is represented by P. The pixel array includes a plurality of pixel units in rows (R1, R2, R3...Ry) and columns (E1, O1, E2, O2...Ex, Ox). In some embodiments of the present invention, the pixel units in the 2M columns can be divided into even-numbered column pixel units and odd-numbered column pixel units.

[0073] There are also multiple analog-to-digital conversion circuits 20 for quantizing pixel signals of multiple columns of pixel units in the pixel array. In an embodiment, the number of analog-to-digital conversion circuits 20 may be equal to or different from the number of pixel unit columns, which is not specifically limited here.

[0074] For example, in some embodiments, the number of analog-to-digital conversion circuits 20 may also be M, and the M analog-to-digital conversion circuits 20 are arranged correspondingly to the M columns of pixel units, that is, multiple columns of pixel units are connected to multiple analog-to-digital conversion circuits in a one-to-one correspondence. That is, in some embodiments of the present invention, each column of pixel units corresponds to an analog-to-digital conversion circuit 20, so that for the same pixel array size, the occupied area of ​​the analog-to-digital conversion circuit can be reduced.

[0075] There are multiple switch modules 30 , and each switch module 30 is connected to multiple columns of pixel units and multiple analog-to-digital conversion circuits.

[0076] For example, each switch module 30 connects two columns of pixel units and two analog-to-digital conversion circuits. The switch module 30 can switch the connection state between each column of pixel units and the two analog-to-digital conversion circuits to achieve quantization conversion of high and low gain pixel signals of the two columns of pixel units, that is, to achieve dual gain quantization processing.

[0077] For another example, each switch module 30 connects three columns of pixel units and three analog-to-digital conversion circuits. The switch module 30 can switch the connection state between each column of pixel units and the three columns of analog-to-digital conversion circuits to achieve quantization conversion of high and low gain pixel signals of the pixel signals of the three columns of pixel units, that is, to achieve three-gain quantization processing.

[0078] For another example, each switch module 30 connects four columns of pixel units and four analog-to-digital conversion circuits, or each switch module 30 connects more columns of pixel units and more analog-to-digital conversion circuits. By switching the switch module 30, quantization conversion of multi-gain pixel signals such as five gains can also be achieved.

[0079] Furthermore, the processing module is respectively connected to the pixel array 10, the plurality of analog-to-digital conversion circuits 20 and the plurality of switch modules 30, and is used to control the switch module 30 and the two or more analog-to-digital conversion circuits 20 correspondingly connected to the switch module 30, so as to alternately quantize and convert the pixel signals of the two or more columns of pixel units correspondingly connected to the switch module 30. That is, each switch module 30 and the analog-to-digital conversion circuit 20 connected thereto are controlled by the processing module, so that the pixel signals of a column of pixel units are quantized each time, that is, the plurality of columns of pixel units connected to the same switch module are time-division multiplexed with the plurality of analog-to-digital conversion circuits correspondingly connected thereto. That is, the pixel signals of the plurality of columns of pixel units sharing the analog-to-digital conversion circuit are controlled to be read out at staggered times, that is, the readout times are inconsistent, so that the plurality of columns of pixel units can share the analog-to-digital conversion circuit to realize the quantization conversion of the pixel signals.

[0080] According to the image sensor 1 of the embodiment of the present invention, a plurality of switch modules 30 are provided so that a plurality of columns of pixel units share a common analog-to-digital conversion circuit, and the reading time of the plurality of columns of pixels sharing the common analog-to-digital conversion circuit is controlled by a processing module. By using the inconsistency in the reading time, i.e., time-division multiplexing of the analog-to-digital conversion circuit, the width of the analog-to-digital conversion circuit can meet the design requirements within the width of the original single-channel circuit, thereby reducing the occupied area of ​​the analog-to-digital conversion circuit and facilitating the miniaturization design of the device.

[0081] In some embodiments, in order to realize the output of high and low gain pixel signals of each column of pixel units on the basis of setting multiple analog-to-digital conversion circuits 20, in an embodiment of the present invention, multiple switch modules 30 respectively connect two adjacent columns of pixel units and two adjacent analog-to-digital conversion circuits.

[0082] That is, at least a portion of the pixel units in the pixel array 10, two columns of pixel units are connected to the corresponding two analog-to-digital conversion circuits 20 through the switch module 30, so that the switch module 30 can switch the connection state between the two columns of pixel units and the two analog-to-digital conversion circuits 20, so that the two columns of pixel units can function the two analog-to-digital conversion circuits 20 through the switch module 30. And, the processing module controls the two columns of pixel units to time-multiplex the two correspondingly connected analog-to-digital conversion circuits 20, so as to alternately digitally quantize the pixel signals of the two columns of pixel units correspondingly connected to the switch module 30.

[0083] According to the image sensor 100 of the embodiment of the present invention, on the basis of one analog-to-digital conversion circuit 20 corresponding to each column of pixel units, a pair of column analog-to-digital conversion circuits 20 can be shared when quantizing high and low gain pixel signals of at least a portion of the pixel unit columns, and the inconsistency in the reading time of the two columns of pixels sharing the analog-to-digital conversion circuit 20 can be processed by the processing module to make the width of the analog-to-digital conversion circuit 20 meet the design requirements within the width of the original single-channel circuit, that is, the occupied area of ​​the analog-to-digital conversion circuit 20 is reduced, which is conducive to the miniaturization design of the device.

[0084] Preferably, in some embodiments, the number of columns of the pixel array is an even number, and the two columns of pixel units, the even column and the odd column, can be connected to the corresponding two analog-to-digital conversion circuits through a switch module, so that the even and odd column pixel units share the analog-to-digital conversion circuit 20.

[0085] For example, the nth switch module 30 is used to control the connection state between the nth odd-numbered pixel unit and the (2n-1)th analog-to-digital conversion circuit and the connection state between the nth even-numbered pixel unit and the 2mth analog-to-digital conversion circuit to achieve the output of low-gain pixel signals. Wherein, n is a positive integer, n≤N.

[0086] For example, by controlling the connection between the nth odd-numbered column pixel unit and the (2n-1)th analog-to-digital conversion circuit, the low-gain reset signal or low-gain image signal of the nth odd-numbered column pixel unit can be transmitted to the (2n-1)th analog-to-digital conversion circuit to digitally quantize the low-gain pixel signal.

[0087] Furthermore, the nth switch module 30 is also used to control the connection state between the nth odd-numbered pixel unit and the 2nth analog-to-digital conversion circuit and to control the connection state between the nth even-numbered pixel unit and the (2n-1)th analog-to-digital conversion circuit.

[0088] For example, the nth odd-numbered column pixel unit is connected to the 2nth analog-to-digital conversion circuit 20, so that the high-gain pixel signal of the nth odd-numbered column pixel unit is transmitted to the 2nth analog-to-digital conversion circuit 20 for digital quantization. The nth even-numbered column pixel unit is connected to the (2n-1)th analog-to-digital conversion circuit 20, so that the high-gain pixel signal of the Mth even-numbered column pixel unit is transmitted to the (2n-1)th analog-to-digital conversion circuit 20 for digital quantization.

[0089] As described above, in the embodiment of the present invention, pixel signals of odd columns and even columns are distinguished, and by setting N switch modules 30, high and low gain pixel signals in odd and even columns can share a pair of analog-to-digital conversion circuits 30 when quantizing.

[0090] It is used to control the M analog-to-digital conversion circuits 20 and the N switch modules 30 to alternately quantize and convert the pixel signals of the even-numbered pixel units and the odd-numbered pixel units in the pixel array 10 , that is, to convert the pixel signals into digital code values ​​after quantization.

[0091] Further, in some embodiments, the two columns of pixel units connected to each switch module 30 include a first column of pixel units and a second column of pixel units; Figure 2 As shown, the two analog-to-digital conversion circuits connected to each switch module 30 include a first analog-to-digital conversion circuit 201 and a second analog-to-digital conversion circuit 202 .

[0092] Further, Figure 2 FIG. 1 is a schematic diagram of the structure of a switch module and an analog-to-digital conversion circuit according to an embodiment of the present invention. Figure 2 As shown, each switch module 30 includes a first switching switch SW11 and a second switching switch SW12.

[0093] The pixel signal of the column pixel unit includes a low-gain pixel signal, wherein the low-gain pixel signal of the first column pixel unit at the first end of the first switching switch SW11 can be read from the column line corresponding to the pixel array 10, and the second end of the first switching switch is connected to the first input end of the first analog-to-digital conversion circuit, so as to control the connection state of the first column pixel unit and the first analog-to-digital conversion circuit.

[0094] Specifically, when the first switching switch SW11 is closed, the low-gain pixel signal of the first column pixel unit is transmitted to the first input end of the first analog-to-digital conversion circuit 20, and then the processing module can send a low-gain ramp signal to the second input end of the first analog-to-digital conversion circuit 20, and the low-gain pixel signal of the odd-numbered column pixel unit is digitally quantized through the first analog-to-digital conversion circuit 20.

[0095] The second switching switch SW12 is used to control the connection state between the second column pixel unit and the second analog-to-digital conversion circuit. The first end of the second switching switch SW12 is suitable for inputting the low-gain pixel signal of the second column pixel unit, and the second end of the second switching switch is connected to the first input end of the second analog-to-digital conversion circuit.

[0096] Specifically, when the second switching switch SW12 is closed, the low-gain pixel signal of the second column pixel unit is transmitted to the first input terminal of the second analog-to-digital conversion circuit 20, and then the processing module can provide a low-gain ramp signal to the second input terminal of the second analog-to-digital conversion circuit 20, and the low-gain pixel signal of the even-numbered column pixel unit can be digitally quantized through the second analog-to-digital conversion circuit 20.

[0097] like Figure 2 As shown, the switch module 30 further includes a third switching switch SW21 and a fourth switching switch SW22.

[0098] The pixel signal of the column pixel unit includes a high-gain pixel signal, wherein the first end of the third switching switch SW21 is suitable for inputting the high-gain pixel signal of the first column pixel unit, such as a high-gain reset signal or a high-gain image signal. The second end of the third switching switch SW22 is connected to the first input end of the second analog-to-digital conversion circuit 20, i.e., the even-column analog-to-digital conversion circuit, for controlling the connection state between the first column pixel unit and the second analog-to-digital conversion circuit 202.

[0099] Specifically, when the third switching switch SW21 is closed, the high-gain pixel signal of the first column pixel unit is input into the first input end of the second analog-to-digital conversion circuit 202, and the processing module can provide a high-gain ramp signal to the second input end of the second analog-to-digital conversion circuit 202, and the high-gain pixel signal of the odd-numbered column pixel unit can be digitally quantized through the second analog-to-digital conversion circuit 202.

[0100] The first end of the fourth exchange switch SW22 is suitable for inputting a high-gain pixel signal of the second column pixel unit, such as a high-gain reset signal or a high-gain image signal, which can be read through the corresponding column line of the pixel array. The second end of the fourth exchange switch SW22 is connected to the first input end of the first analog-to-digital conversion circuit 201, and is used to control the connection state between the second column pixel unit and the first analog-to-digital conversion circuit 201.

[0101] Specifically, when the fourth switching switch SW22 is closed, the high-gain pixel signal of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit 201, i.e., the odd-column analog-to-digital conversion circuit, and the processing module can provide a high-gain ramp signal to the second input end of the first analog-to-digital conversion circuit 201, and the high-gain pixel signal of the second column of pixel units can be digitally quantized through the first analog-to-digital conversion circuit 201.

[0102] For example, after the pixel signals of the odd-numbered columns are read out, the pixel signals of the even-numbered columns are read out in sequence. The high and low gain signals of the odd-numbered columns of pixel units enter the analog-to-digital conversion circuits of the odd and even columns, i.e., the high gain analog-to-digital conversion circuit and the low gain analog-to-digital conversion circuit, respectively through the switching switch. After the conversion is completed, the high and low gain signals of the even-numbered columns of pixel units enter the high and low gain analog-to-digital conversion circuits respectively through the switching switch, and the data of a row after the conversion is read in sequence.

[0103] In some embodiments, each pixel unit includes a first type of photoelectric conversion unit and a second type of photoelectric conversion unit, and the photosensitive area of ​​the first type of photoelectric conversion unit is larger than the photosensitive area of ​​the second type of photoelectric conversion unit. In the example, the first type of photoelectric conversion unit can be called a large pixel, and the second type of photoelectric conversion unit can be called a small pixel. In the example, the circuit structure of the pixel unit can adopt a 7T structure or other applicable circuit structures.

[0104] Specifically, the pixel signals output by the pixel array are output to the analog-to-digital conversion circuit of the readout circuit via the column lines, wherein the low-gain pixel signals of the odd-numbered columns of large pixels are output to the low-gain analog-to-digital conversion circuit via the switching switch. Figure 1 In the odd number of analog-to-digital conversion circuits (ADCE) in the embodiment, the high gain signal of the large pixel is output to the high gain analog-to-digital conversion circuit such as Figure 2 In the even-numbered analog-to-digital conversion circuit (ADCO), the high-gain signal of the small pixel is output to the high-gain analog-to-digital conversion circuit (ADCO), and the low-gain signal is output to the low-gain analog-to-digital conversion circuit (ADCE) to complete the digital quantization conversion. After the pixel signal output conversion of the odd-numbered pixel units is completed, the low-gain signal of the large pixel of the even-numbered pixel units is output to the low-gain analog-to-digital conversion circuit. Figure 2 In ADCO, the large pixel high gain signal is output to the high gain analog-to-digital conversion circuit (ADCE in this case), the small pixel high gain signal is output to the high gain analog-to-digital conversion circuit (ADCE), and the small pixel low gain signal is output to the low gain analog-to-digital conversion circuit (ADCO) for digital quantization conversion.

[0105] The first exchange switch SW11 and the second exchange switch SW12 as well as the third exchange switch SW21 and the fourth exchange switch SW22 respectively transmit the large and small pixel signals of the odd and even column pixel units to the high and low gain analog-to-digital conversion circuits for switching and selection.

[0106] As described above, in the embodiment of the present invention, by setting N switch modules 30 between the pixel array and the M analog-to-digital conversion circuits 20, through the exchange switch of the switch module 30, a pair of odd-even column analog-to-digital conversion circuits can be shared when quantizing the high and low gain pixel signals in the odd and even columns, and at the same time, by alternately reading out the pixel units of the odd and even columns, the width of the analog-to-digital conversion circuit can meet the design requirements under the condition of 3 microns, thereby reducing the occupied area of ​​the analog-to-digital conversion circuit and facilitating the miniaturization design of the device.

[0107] In an embodiment, pixel signals of pixel units in adjacent odd and even columns share a pair of analog-to-digital conversion circuits when digital quantization is performed, wherein the analog-to-digital conversion circuits of the odd and even columns may adopt the same structure, or may adopt different structures.

[0108] like Figure 2 As shown, the first analog-to-digital conversion circuit 201 , ie, the analog-to-digital conversion circuit 20 of the odd column, may include a first capacitor C11 , a second capacitor C12 , a first comparator 21 , a second comparator 22 and a first calculator 23 .

[0109] The first input terminal of the first comparator 21 is suitable for inputting a pixel signal, and the second input terminal of the first comparator 21 is suitable for inputting a ramp signal; the first counter 23 is used to obtain a digital quantization value of the pixel signal according to the comparison result of the comparator.

[0110] Furthermore, a first end of the first capacitor C11 is connected to a second end of the first switching switch SW11 and a second end of the fourth switching switch SW22, and a second end of the first capacitor C11 is connected to a first input end of the first comparator 21 for inputting a pixel signal; a first end of the second capacitor C12 is connected to the processing module, and a second end of the second capacitor C12 is connected to a second input end of the first comparator 21 for inputting a ramp signal.

[0111] The input end of the second comparator 22 is connected to the output end of the first comparator 21 . The second comparator 22 is adapted to output a comparison result, and then the first counter 23 can obtain a digital quantization value of the pixel signal according to the comparison result.

[0112] The first analog-to-digital conversion circuit 201 further includes a first reset selector 27, the input end of the first reset selector 27 is connected to the output end of the second comparator 22, and the output end of the first reset selector 27 is connected to the first counter 23. The first reset selector 27 inputs the comparison result into the first counter 23 for digital quantization.

[0113] like Figure 2As shown, the second analog-to-digital conversion circuit 202 , ie, the analog-to-digital conversion circuit 20 of the even column, may include a third capacitor C21 , a fourth capacitor C22 , a third comparator 24 , a fourth comparator 25 , a second counter 26 , and a second reset selector 28 .

[0114] Among them, the first end of the third capacitor C21 is connected to the second end of the second switching switch SW12 and the second end of the third switching switch SW21; the first end of the fourth capacitor C22 is connected to the processing module for inputting a ramp signal; the first input end of the third comparator 24 is connected to the second end of the third capacitor C21, and the second input end of the third comparator 24 is connected to the second end of the fourth capacitor C22; the input end of the fourth comparator 25 is connected to the output end of the third comparator 24; the second calculator 26 is connected to the output end of the fourth comparator 25, and is used to obtain a digital quantization value of the pixel signal according to the comparison result of the fourth comparator 25.

[0115] The input end of the second reset selector 28 is connected to the output end of the fourth comparator 25 , and the output end of the second reset selector 28 is connected to the second counter 26 , so as to transmit the comparison result to the second counter 26 for digital quantization.

[0116] In an embodiment, the second analog-to-digital conversion circuit 202 can be used as a quantization conversion circuit for low-gain pixel signals of the second column of pixel units, such as even-numbered column pixel units, and by switching the exchange switch, the second analog-to-digital conversion circuit 202 can be used as a quantization conversion circuit for high-gain pixel signals of the first column of pixel units, such as odd-numbered column pixel units. Similarly, the first analog-to-digital conversion circuit 201 can be used as a quantization conversion circuit for low-gain pixel signals of the first column of pixel units, such as odd-numbered column pixel units, and by switching the exchange switch, the first analog-to-digital conversion circuit 201 can be used as a quantization conversion circuit for high-gain pixel signals of the second column of pixel units, such as even-numbered column pixel units.

[0117] Specifically, the low-gain reset signal and image signal output by the pixel array and the low-gain ramp are respectively input to the two ends of the comparator in the low-gain analog-to-digital conversion circuit through coupling capacitors such as the first capacitor C11 and the second capacitor C12; the high-gain reset signal and image signal and the high-gain ramp output by the pixel array are respectively coupled to the high-gain analog-to-digital conversion circuit through coupling capacitors such as the third capacitor C21 and the fourth capacitor C22.

[0118] Among them, when the pixel signals of the odd-numbered column pixel units complete the digital quantization conversion, the pixel signals of the even-numbered column pixel units are switched through the low-gain analog-to-digital conversion circuit to quantize the low-gain reset signal and the image signal, and then the switch module 30 is switched to the high-gain analog-to-digital conversion circuit to digitally quantize and convert the high-gain reset signal and the image signal.

[0119] In summary, the image sensor of the embodiment of the present invention sets M switch modules 30 between the 2M columns of pixel units and the 2M analog-to-digital conversion circuits 20 of the pixel array 10. Through the switching control of the switch modules 30, the pixel signals of the pixel units in adjacent odd and even columns can share a pair of analog-to-digital conversion circuits when digitally quantized, and the pixel signals of the pixel units in the odd and even columns are converted alternately. Therefore, for pixel arrays of the same size, the number of analog-to-digital conversion circuits used can be reduced, the area occupied by the analog-to-digital conversion circuits can be reduced, and the miniaturization design of the device can be facilitated.

[0120] Based on the image sensor of the above embodiment, a second embodiment of the present invention proposes a pixel signal readout control method.

[0121] Figure 3 FIG. 1 is a flowchart of a pixel signal readout control method according to an embodiment of the present invention. Figure 3 As shown, the pixel signal readout control method according to the embodiment of the present invention includes steps S1 and S2.

[0122] S1, controls the pixel array output of the image sensor.

[0123] S2, controlling the switch modules of the image sensor and a plurality of analog-to-digital conversion circuits corresponding to each switch module, so as to alternately quantize and convert pixel signals of a plurality of columns of pixel units corresponding to each switch module through the analog-to-digital conversion circuits.

[0124] Specifically, the pixel signal readout control method of the embodiment of the present invention is based on setting multiple switch modules between multiple columns of pixel units and multiple analog-to-digital conversion circuits of the image sensor. The connection between the connected multiple columns of pixel units and the corresponding multiple analog-to-digital conversion circuits can be switched through the multiple switch modules, so that when the pixel signal is quantized, the multiple columns of pixel units can share the analog-to-digital conversion circuit, and based on this structure, the multiple columns of pixel units in the pixel array are controlled to time-share the corresponding analog-to-digital conversion circuits. Therefore, for pixel arrays of the same size, the number of analog-to-digital conversion circuits can be reduced, and the area occupied by the analog-to-digital conversion circuits in the device can be reduced, which is conducive to the miniaturization design of the device.

[0125] In an embodiment of the present invention, the pixel array includes even-numbered columns of pixel units and odd-numbered columns of pixel units, each pixel unit includes a first type of photoelectric conversion unit and a second type of photoelectric conversion unit, the photosensitive area of ​​the first type of photoelectric conversion unit is larger than the photosensitive area of ​​the second type of photoelectric conversion unit, and in some examples, the first type of photoelectric conversion unit can be called a large pixel, and the second type of photoelectric conversion unit can be called a small pixel.

[0126] In an embodiment, the circuit structure of the pixel unit may include but is not limited to a 4T structure, a 7T structure, and the like, including pixel circuit structures of large and small pixels.

[0127] In an embodiment of the present invention, controlling the pixel array output of the image sensor may include first outputting the pixel signal of the large pixel and then outputting the pixel signal of the small pixel, or first outputting the pixel signal of the small pixel and then outputting the pixel signal of the large pixel. In addition, in an embodiment of the present invention, the pixel signals of the odd-numbered columns of pixel units and the pixel signals of the even-numbered columns of pixel units in the pixel array are alternately converted.

[0128] Specifically, the output of pixel signals for odd-numbered column pixel units may include: sequentially outputting a low-gain reset signal, a high-gain reset signal, a high-gain image signal, and a low-gain image signal of a first type of photoelectric conversion unit in the odd-numbered column pixel units; and sequentially outputting a high-gain reset signal, a high-gain image signal, a low-gain image signal, and a low-gain reset signal of a second type of pixel unit in the odd-numbered column pixel units.

[0129] The output for the even-numbered column pixel units may include: sequentially outputting a low-gain reset signal, a high-gain reset signal, a high-gain image signal, and a low-gain image signal of the first type of photoelectric conversion unit in the even-numbered column pixel units; and sequentially outputting a high-gain reset signal, a high-gain image signal, a low-gain image signal, and a low-gain reset signal of the second type of photoelectric conversion unit in the even-numbered column pixel units.

[0130] For example, Figure 4 is a circuit diagram of an odd-numbered column pixel unit according to an embodiment of the present invention, Figure 5 FIG. 1 is a circuit diagram of an even-numbered column pixel unit according to an embodiment of the present invention. Figure 4 and 5 As shown, each pixel unit includes two photodiodes SP1 and SP2, namely, the first type photoelectric conversion unit and the second type photoelectric conversion unit, and also includes transistors M1, M2, M3, M4, M5, M6 and M7. Among them, transistors M5, M6 and M7 are transmission transistors, and the control signals in the even-numbered column pixel units are FCG, TGSE and TGLE respectively, and the control signals in the even-numbered column pixel units are FCG, TGSO and TGLO respectively; M1 is a reset transistor, and the control signal is RST; M3 is a source follower buffer amplifier; M4 is a selection transistor, and the control signal is SEL; M2 is a selection transistor, and the control signal is FDG, and VDDD provides a reset voltage.

[0131] Among them, the transfer transistors M6 and M7 transfer the electrons converted by the photodiode to the node F, the high-low gain conversion transistor is M2, and the FDG pulse control signal enables the pixel unit to operate in low gain mode or high gain mode. The reset transistor M1 resets the voltage at point F to VDDD. The pixel signal is output to the analog-to-digital conversion circuit through the source follower transistor M3. Among them, the SEL pulse signal, the RST pulse signal, the FDG pulse signal, the FCG pulse signal and the FCVDD pulse signal are pulse signals used in common by the odd column pixel and the even column pixel structure. The pulse signal TGLE and the pulse signal TGSE in the odd column pixel unit control the transmission of the odd column high and low gain image signals. The pulse signals TGLO and TGSO in the even column pixel unit control the output of the high and low gain image signals of the even column pixel unit.

[0132] Furthermore, in an embodiment of the present invention, the total number of columns of the pixel array is an even number, and each switch module is respectively connected to two adjacent columns of pixel units and two adjacent analog-to-digital conversion circuits, so that the pixel signals output by the odd and even column pixel units can share the same pair of analog-to-digital conversion circuits when quantized.

[0133] The conversion of pixel signals of odd-numbered columns of pixel units will be described below.

[0134] In an embodiment, Figure 2 As shown, for the convenience of description, the two columns of pixel units connected to each switch module include a first column of pixel units and a second column of pixel units; the two analog-to-digital conversion circuits connected to each switch module include a first analog-to-digital conversion circuit 201 and a second analog-to-digital conversion circuit 202. The switch module includes a first switching switch and a second switching switch. The first switching switch is used to control the connection state of the first column of pixel units and the first analog-to-digital conversion circuit, and the second switching switch is used to control the connection state of the second column of pixel units and the second analog-to-digital conversion circuit.

[0135] When the pixel array outputs the low-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, so that the low-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the low-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; the first analog-to-digital conversion circuit is controlled to quantize the low-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units according to the low-gain ramp signal. At this time, the second analog-to-digital conversion circuit is controlled to be in a reset state, or the pixel signal and the ramp signal input to the second analog-to-digital conversion circuit do not reach an overlapping state, that is, the second analog-to-digital conversion circuit cannot perform quantization conversion, so at this time, only the pixel signals of the odd-numbered column pixel units are quantized, and the pixel signals of the even-numbered column pixel units are not quantized, thereby realizing the readout of the large pixel low-gain reset signal of the odd-numbered column pixel units.

[0136] For example, Figure 4 Taking the 7T structure shown as an example, Figure 6 According to an embodiment of the present invention, Figure 4 and 5 A schematic diagram of the control timing, high and low gain ramp timing and exchange switch timing of the odd and even column pixel units of the pixel array of the pixel unit structure.

[0137] like Figure 6 As shown, at time t1, the RST reset signal changes from a low potential to a high potential. At this time, the pixel array outputs a reset signal in a low-gain mode, i.e., a low-gain reset signal. The first switch SW11 and the second switch SW12 are turned on, and the output signal in the low-gain mode is input into the first analog-to-digital conversion circuit, i.e., a low-gain analog-to-digital conversion circuit (ADCE). After quantization, the analog quantity is converted into a digital quantity through a counter. At this time, the second analog-to-digital conversion circuit, i.e., the ADCO analog-to-digital converter, receives the output signal of the even-numbered column pixel unit, but remains in a reset state during this period, and the counter will not output a code value. In this way, the low-gain reset signal of the first type of pixel unit in the odd-numbered column pixel unit is read out.

[0138] like Figure 2 As shown, the switch module includes a third switching switch and a fourth switching switch. The third switching switch is used to control the connection state between the first column pixel unit and the second analog-to-digital conversion circuit, and the fourth switching switch is used to control the connection state between the second column pixel unit and the first analog-to-digital conversion circuit.

[0139] When the pixel array outputs the high-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units, the first and second exchange switches are controlled to be disconnected, and the third and fourth exchange switches are controlled to be closed, so that the high-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit, and the pixel signal of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; the second analog-to-digital conversion circuit is controlled to quantize the high-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal, and at this time, the first analog-to-digital conversion circuit is controlled to be in a reset state or the pixel signal and the ramp signal input to the first analog-to-digital conversion circuit do not reach an overlapping state, that is, the first analog-to-digital conversion circuit cannot perform quantization conversion. Thus, the high-gain reset signal of the large pixel of the odd-numbered column of pixel units is read out.

[0140] For example, Figure 4 Take the structure shown as an example, Figure 6 As shown, when FDG is converted from a high level to a low level, the first type of photoelectric conversion unit, i.e., the large pixel, is converted from a low gain mode to a high gain mode. At this time, the third switch SW21 and the fourth switch SW22 are turned on, and the high gain reset signal is input to the second analog-to-digital conversion circuit, i.e., the high gain analog-to-digital converter (ADCO), thereby realizing the readout of the high gain reset signal of the odd-numbered column pixel unit.

[0141] When the pixel array outputs the high-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; the second analog-to-digital conversion circuit is controlled to quantize the high-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal, at this time, the first analog-to-digital conversion circuit is controlled to be in a reset state or the pixel signal and the ramp signal input to the first analog-to-digital conversion circuit do not reach an overlapping state, that is, the first analog-to-digital conversion circuit cannot perform quantization conversion. Thus, the high-gain image signal of the first type of photoelectric conversion unit of the odd-numbered column of pixel units is read out.

[0142] For example, Figure 4 Take the structure as an example, Figure 6As shown, at time t4, the third switch and the fourth switch are in a closed state, and the TGLE pulse causes the high-gain image signal of the odd-numbered column pixel unit to be transmitted to the second analog-to-digital conversion circuit, i.e., the high-gain analog-to-digital converter, and then the high-gain image signal is quantized and transcoded. Thus, the high-gain image signal of the large pixel of the odd-numbered column pixel unit is read out.

[0143] Among them, when the pixel array outputs the low-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, and the third exchange switch and the fourth exchange switch are controlled to be opened, so that the low-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the low-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; the first analog-to-digital conversion circuit is controlled to quantize the low-gain image signal of the first type of photoelectric conversion unit of a column of pixel units according to the low-gain ramp signal. At this time, the second analog-to-digital conversion circuit is controlled to be in a reset state or the pixel signal and the ramp signal input to the second analog-to-digital conversion circuit do not reach an overlapping state, that is, the second analog-to-digital conversion circuit cannot perform quantization conversion.

[0144] For example, Figure 4 Take the structure as an example, Figure 6 As shown, at time t5, the FDG pulse converts the image signal output by the first type of photoelectric conversion unit of the odd-numbered column pixel unit into a low-gain mode; at time t6, the first switching switch and the second switching switch are in a closed state, and the TGLE pulse signal transmits the low-gain image signal to the first analog-to-digital conversion circuit, i.e., the low-gain analog-to-digital converter, and then the comparator in the low-gain analog-to-digital converter compares the input image signal with the low-gain ramp signal and counts it through a counter, thereby realizing the quantization conversion of the low-gain image signal of the large pixel of the odd-numbered column pixel unit.

[0145] The above is the readout of large pixel signals for odd-numbered pixel units according to an example of the present invention. The readout of small pixel signals for odd-numbered pixel units will be described below.

[0146] When the pixel array outputs the high-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units, the first and second exchange switches are controlled to be disconnected, and the third and fourth exchange switches are controlled to be closed, so that the high-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit, and the pixel signal of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; the second analog-to-digital conversion circuit is controlled to quantize the high-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal, and at this time, the first analog-to-digital conversion circuit is controlled to be in a reset state, or the pixel signal and the ramp signal input to the first analog-to-digital conversion circuit do not reach an overlapping state, that is, the first analog-to-digital conversion circuit cannot perform quantization conversion. Thus, the high-gain reset signal of the small pixel of the odd-numbered column of pixel units is read out.

[0147] For example, Figure 4 For example, the structure Figure 6 As shown, at time t7, the odd-numbered column pixel units output the high-gain reset signal of the small pixel, the third switching switch and the fourth switching switch are in a closed state, and the high-gain reset signal is input into the second analog-to-digital conversion circuit, i.e., the high-gain analog-to-digital converter ADCO, thereby realizing the readout of the high-gain reset signal of the small pixel of the odd-numbered column pixel units.

[0148] Among them, when the pixel array outputs the high-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; and the second analog-to-digital conversion circuit is controlled to quantize the high-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal. At this time, the first analog-to-digital conversion circuit is controlled to be in a reset state or the pixel signal and the ramp signal input to the first analog-to-digital conversion circuit do not reach an overlapping state, that is, the first analog-to-digital conversion circuit cannot perform quantization conversion.

[0149] For example, Figure 4 Taking the structure shown as an example, Figure 6 As shown, at time t8, the TGSE pulse of the odd-numbered pixel unit turns on the transmission tube M6, at which time the third switch and the fourth switch are in a closed state, outputting the high-gain image signal of the small pixel to the second analog-to-digital conversion circuit, i.e., the high-gain analog-to-digital converter, thereby realizing the readout of the high-gain image signal of the small pixel of the odd-numbered pixel unit.

[0150] Among them, when the pixel array outputs the low-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, and the third exchange switch and the fourth exchange switch are controlled to be opened, so that the low-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the low-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; and the first analog-to-digital conversion circuit is controlled to quantize the low-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units according to the low-gain ramp signal. At this time, the second analog-to-digital conversion circuit is controlled to be in a reset state or the pixel signal and the ramp signal input to the second analog-to-digital conversion circuit do not reach an overlapping state, that is, the second analog-to-digital conversion circuit cannot perform quantization conversion.

[0151] For example, Figure 4 Taking the structure shown as an example, Figure 6 As shown, at time t9, the first switch and the second switch are closed, and the signal output by the small pixel of the odd-numbered column pixel unit is the image signal of the previous moment, that is, the image signal of the pixel at time t8. The pixel output end does not receive a new image signal, and the image signal is transmitted to the first analog-to-digital conversion circuit, that is, the low-gain analog-to-digital converter (ADCE), thereby realizing the readout of the low-gain image signal of the small pixel of the odd-numbered column pixel unit.

[0152] When the pixel array outputs the low-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, and the third exchange switch and the fourth exchange switch are controlled to be opened, so that the low-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit, and the pixel signal of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the low-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; the first analog-to-digital conversion circuit is controlled to quantize the low-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units according to the low-gain ramp signal, and at this time, the second analog-to-digital conversion circuit is controlled to be in a reset state, or the pixel signal and the ramp signal input to the second analog-to-digital conversion circuit do not reach an overlapping state, that is, the second analog-to-digital conversion circuit cannot perform quantization conversion. Thus, the quantization of the low-gain reset signal of the second type of photoelectric conversion unit of the odd-numbered column of pixel units is realized.

[0153] For example, Figure 4 Taking the structure shown as an example, Figure 6As shown, at time t10, the SEL pulse of the odd-numbered column pixel unit turns on the transmission tube M4, so that the small pixel outputs a reset signal. During this period, the even-numbered column pixel unit only outputs the reset signal to the corresponding analog-to-digital converter, but the counter does not work. Thus, the low-gain reset signal of the small pixel in the odd-numbered column pixel unit is read out.

[0154] At this point, the reading and conversion of the pixel signals of the odd-numbered pixel units are completed. When the odd-numbered pixel signals are transmitted to the analog-to-digital converter for quantization and conversion through the switching switch, the even-numbered pixel signals are transmitted to the left side of the sampling capacitor. At this time, the comparator is in a reset state and no comparison is performed.

[0155] After the odd-numbered columns of pixel units are read out and converted, the even-numbered columns of pixel units can be output and converted by controlling the timing. The following describes the readout of pixel signals of the even-numbered columns of pixel units.

[0156] When the pixel array outputs a low-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units, the first switching switch and the second switching switch are controlled to be closed, so that the low-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit, and the pixel signal of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the low-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; the second analog-to-digital conversion circuit is controlled to perform quantization conversion on the low-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal, and at this time, the first analog-to-digital conversion circuit is controlled to be in a reset state, or the pixel signal and the ramp signal input to the first analog-to-digital conversion circuit do not reach an overlapping state, that is, the first analog-to-digital conversion circuit cannot perform quantization conversion.

[0157] For example, Figure 5 Taking the structure shown as an example, Figure 6 As shown, at time t11, the first type of photoelectric conversion unit of the even-numbered column pixel unit, i.e., the large pixel, outputs a low-gain reset signal. At this time, the first switch and the second switch are turned on, so that the low-gain reset signal of the large pixel is input into the second analog-to-digital conversion circuit, i.e., the low-gain analog-to-digital converter ADCO, thereby realizing the quantization conversion of the low-gain reset signal of the large pixel of the even-numbered column pixel unit.

[0158] When the pixel array outputs the high-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units, the first and second exchange switches are controlled to be disconnected, and the third and fourth exchange switches are controlled to be closed, so that the high-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit, and the pixel signal of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; the first analog-to-digital conversion circuit is controlled to quantize the high-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal, and at this time, the second analog-to-digital conversion circuit is controlled to be in a reset state, or the pixel signal and the ramp signal input to the second analog-to-digital conversion circuit do not reach an overlapping state, that is, the second analog-to-digital conversion circuit cannot perform quantization conversion. Thus, the quantization conversion of the high-gain reset signal of the large pixel of the even-numbered column of pixel units is realized.

[0159] For example, Figure 5 Taking the structure shown as an example, Figure 6 As shown, at time t13, the pulse signal FDG turns on the transmission tube M2, and the first type of photoelectric conversion unit of the even-numbered column pixel unit outputs a high-gain reset signal. At this time, the third switch and the fourth switch are closed, and the high-gain reset signal is transmitted to the first analog-to-digital conversion circuit, i.e., the high-gain analog-to-digital converter ADCE, thereby realizing the quantization conversion of the high-gain reset signal of the large pixel in the even-numbered column pixel unit.

[0160] Among them, when the pixel array outputs the high-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units is input into the first input end of the first analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; the first analog-to-digital conversion circuit is controlled to quantize the high-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal. At this time, the second analog-to-digital conversion circuit is controlled to be in a reset state or the pixel signal and the ramp signal input to the second analog-to-digital conversion circuit do not reach an overlapping state, that is, the second analog-to-digital conversion circuit cannot perform quantization conversion.

[0161] For example, Figure 5 Take the structure shown as an example, Figure 6As shown, at time t14, the control signal TGLO turns on the transmission tube M7, and the large pixel outputs a high-gain image signal. At this time, the third switch SW21 and the fourth switch SW22 are in a closed state, and the high-gain image signal is transmitted to the first analog-to-digital conversion circuit, i.e., the high-gain analog-to-digital converter ADCE, thereby realizing the quantization conversion of the high-gain image signal of the even-numbered column pixel unit.

[0162] Among them, when the pixel array outputs the low-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units, the third exchange switch and the fourth exchange switch are controlled to be disconnected, and the first exchange switch and the second exchange switch are controlled to be closed, so that the low-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the low-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; and the second analog-to-digital conversion circuit is controlled to quantize the low-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal. At this time, the first analog-to-digital conversion circuit is controlled to be in a reset state or the pixel signal and the ramp signal input to the first analog-to-digital conversion circuit do not reach an overlapping state, that is, the first analog-to-digital conversion circuit cannot perform quantization conversion.

[0163] For example, Figure 5 Take the structure shown as an example, Figure 6 As shown, before time t15, the switch is switched back to the low-gain analog-to-digital converter, that is, the first switch SW11 and the second switch SW12 are switched to be closed. At time t15, the control signal TGLO turns on the transmission tube M7 once, and outputs the low-gain image signal of the large pixel to the 2mth analog-to-digital conversion circuit, that is, the low-gain analog-to-digital converter, thereby realizing the quantization conversion of the low-gain image signal of the large pixel of the even-numbered column pixel unit. It can be understood that during the period of switch conduction and switching, the reset signal of the large pixel of the odd-numbered column is transmitted to the sampling capacitor end of the analog-to-digital conversion circuit, but the corresponding comparator does not work and is always in a reset state.

[0164] The above describes the quantization conversion of the pixel signals of the large pixels of the even-numbered columns of pixel units. The following describes the quantization conversion of the pixel signals of the small pixels of the even-numbered columns of pixel units.

[0165] When the pixel array outputs the high-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units, the first and second exchange switches are controlled to be disconnected, and the third and fourth exchange switches are controlled to be closed, so that the high-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit, and the pixel signal of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the high-gain ramp signal is input to the second input end of the first analog-to-digital conversion circuit; the first analog-to-digital conversion circuit is controlled to quantize the high-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal, and the second analog-to-digital conversion circuit is controlled to be in a reset state, or the pixel signal and the ramp signal input to the second analog-to-digital conversion circuit do not reach an overlapping state, that is, the second analog-to-digital conversion circuit cannot perform quantization conversion. Thus, the conversion of the high-gain reset signal of the even-numbered columns of small pixels can be realized.

[0166] For example, Figure 5 Take the structure shown as an example, Figure 6 As shown, at time t16, the third switch SW21 and the fourth switch SW22 are switched to be closed, and the small pixels of the even-numbered column pixel units output high-gain reset signals, which are transmitted to the first analog-to-digital conversion circuit, i.e., the high-gain analog-to-digital converter ADCE, thereby realizing the quantization conversion of the high-gain reset signals of the small pixels of the even-numbered column pixel units.

[0167] When the pixel array outputs the high-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the high-gain ramp signal is controlled to be input to the second input end of the first analog-to-digital conversion circuit; the first analog-to-digital conversion circuit is controlled to quantize the high-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal. At this time, the second analog-to-digital conversion circuit is controlled to be in a reset state or the pixel signal and the ramp signal input to the second analog-to-digital conversion circuit do not reach an overlapping state, that is, the second analog-to-digital conversion circuit cannot perform quantization conversion.

[0168] For example, Figure 5 Take the structure shown as an example, Figure 6 As shown, the TGSO pulse signal turns on the transmission tube M6, and the small pixel outputs a high-gain image signal. At this time, the fourth switch SW22 is in a closed state, and the small pixel high-gain image signal is output to the first analog-to-digital conversion circuit, i.e., the high-gain analog-to-digital converter, for quantization and conversion. Thus, the quantization conversion of the high-gain image signal of the small pixel of the even-numbered column pixel unit is realized.

[0169] When the pixel array outputs the low-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units, the third exchange switch and the fourth exchange switch are controlled to be disconnected, and the first exchange switch and the second exchange switch are controlled to be closed, so that the low-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; the low-gain ramp signal is controlled to be input to the second input end of the second analog-to-digital conversion circuit; the second analog-to-digital conversion circuit is controlled to quantize the low-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal. At this time, the first analog-to-digital conversion circuit is controlled to be in a reset state or the pixel signal and the ramp signal input to the first analog-to-digital conversion circuit do not reach an overlapping state, that is, the first analog-to-digital conversion circuit cannot perform quantization conversion.

[0170] When the pixel array outputs a low-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, and the third exchange switch and the fourth exchange switch are controlled to be disconnected, so that the low-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit, and the pixel signal of a column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; the low-gain ramp signal is input to the second input end of the second analog-to-digital conversion circuit; the second analog-to-digital conversion circuit is controlled to perform quantization conversion on the low-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal, and at this time, the first analog-to-digital conversion circuit is controlled to be in a reset state, or the pixel signal and the ramp signal input to the first analog-to-digital conversion circuit do not reach an overlapping state, that is, the first analog-to-digital conversion circuit cannot perform quantization conversion.

[0171] For example, Figure 5 Take the structure shown as an example, Figure 6 As shown, after time t17, the small pixels of the even-numbered column pixel units output low-gain reset signals and low-gain image signals, the switches are switched to the first switch SW11 and the second switch SW12 are closed, and the low-gain reset signals and low-gain image signals of the small pixels are transmitted to the second analog-to-digital conversion circuit, i.e., the low-gain analog-to-digital converter ADCO, for quantization and conversion. Thus, the quantization conversion of the low-gain reset signals and low-gain image signals of the small pixels in the even-numbered column pixel units is realized.

[0172] The above embodiments describe the pixel signal readout control method of the embodiment of the present invention, which reads and converts the pixel signals of the odd and even column pixel units in a row, wherein the pixel signals of the odd and even columns are distinguished, and the switching of the switch module can make the high and low gain signals of the pixels in the odd and even columns share a pair of odd and even column analog-to-digital conversion circuits when quantizing, and when one of the first analog-to-digital conversion circuit and the second analog-to-digital conversion circuit performs quantization conversion on the pixel signal, the other analog-to-digital conversion circuit in the first analog-to-digital conversion circuit and the second analog-to-digital conversion circuit is controlled to be in a reset state or the pixel signal input to the other analog-to-digital conversion circuit does not reach an overlapping state with the ramp signal, that is, the time-sharing multiplexing of the odd and even column pixel units corresponding to the mode conversion circuit is realized, and the pixel signal readout and conversion are realized by the inconsistency in the reading time of the odd and even column pixels. For pixel arrays of the same size, the number of analog-to-digital conversion circuits can be reduced, and the area occupied by the analog-to-digital conversion circuits can be reduced.

[0173] For example, the area occupied by the pixel unit is 3 microns × 3 microns, and the width of the analog-to-digital conversion circuits of the odd and even columns is 3 microns respectively. By exchanging switches SW11, SW12 and SW21, SW22, the odd column analog-to-digital conversion circuit ADCE and the even column analog-to-digital conversion circuit ADCO, the timing of the odd and even column pixel signals can be controlled respectively, so that the odd column pixel signals and the even column pixel signals can share the same pair of analog-to-digital conversion circuits, and the width of the analog-to-digital conversion circuit can meet the design requirements under the condition of 3 microns through the inconsistency in the reading time of the odd and even column pixels.

[0174] Based on the image sensor of the above embodiment, a third embodiment of the present invention provides an electronic device.

[0175] Figure 7 is a block diagram of an electronic device according to an embodiment of the present invention, such as Figure 7 As shown, the electronic device 1000 of the embodiment of the present invention includes the image sensor 100 of the above embodiment. The specific structure of the image sensor 100 can refer to the description of the above embodiment, which will not be described again.

[0176] In an embodiment, the electronic device 1000 may include but is not limited to a smart phone, a tablet, or a vehicle-mounted image acquisition device and other devices with an image acquisition function.

[0177] The electronic device 1000 of the embodiment of the present invention can reduce the occupied area of ​​the analog-to-digital conversion circuit while ensuring the same pixel array size by adopting the image sensor 100 of the above embodiment, which is conducive to the miniaturization design of the device.

[0178] Based on the image sensor of the above embodiment, a fourth aspect of the present invention further provides a vehicle.

[0179] Figure 8 is a block diagram of a vehicle according to an embodiment of the present invention, Figure 8 As shown, the vehicle 1 includes the image sensor 100 of the above embodiment.

[0180] In an embodiment, the image sensor 100 may be an image sensor on a vehicle-mounted camera or a vehicle-mounted tablet, or an image sensor 100 of a vehicle-mounted device having an image acquisition function.

[0181] According to the vehicle 1 of the embodiment of the present invention, by adopting the image sensor 100 of the above embodiment, the space occupied by the image sensor can be reduced, and the space utilization is more effectively allocated.

[0182] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0183] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. An image sensor, characterized in that: include: A pixel array, the pixel array comprising a plurality of columns of pixel units; A plurality of analog-to-digital conversion circuits, wherein the plurality of analog-to-digital conversion circuits are used to quantize pixel signals of the plurality of columns of pixel units; A plurality of switch modules, each of which is connected to a plurality of columns of pixel units and a plurality of analog-to-digital conversion circuits; The processing module is respectively connected to the pixel array, the multiple analog-to-digital conversion circuits and the multiple switch modules, and is used to control the switch module and the multiple analog-to-digital conversion circuits corresponding to the switch module, so as to alternately quantize and convert the pixel signals of the multiple columns of pixel units corresponding to the switch module.

2. The image sensor according to claim 1, characterized in that The multiple analog-to-digital conversion circuits are connected to the multiple columns of pixel units in a one-to-one correspondence.

3. The image sensor according to claim 2, characterized in that The switch module is respectively connected to two adjacent columns of pixel units and two adjacent analog-to-digital conversion circuits.

4. The image sensor according to claim 3, characterized in that: The two columns of pixel units connected to each of the switch modules include a first column of pixel units and a second column of pixel units; The two analog-to-digital conversion circuits connected to each of the switch modules include a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit.

5. The image sensor according to claim 4, characterized in that: The switch module comprises: A first exchange switch, used to control the connection state between the first column of pixel units and the first analog-to-digital conversion circuit; The second switching switch is used to control the connection state between the second column of pixel units and the second analog-to-digital conversion circuit.

6. The image sensor according to claim 5, characterized in that The pixel signal of the column pixel unit comprises a low-gain pixel signal, The first end of the first switching switch is suitable for inputting the low-gain pixel signal of the first column of pixel units, and the second end of the first switching switch is connected to the first input end of the first analog-to-digital conversion circuit; The first end of the second switching switch is suitable for inputting the low-gain pixel signal of the second column of pixel units, and the second end of the second switching switch is connected to the first input end of the second analog-to-digital conversion circuit.

7. The image sensor according to claim 6, characterized in that: The switch module also includes: A third exchange switch, used to control the connection state between the first column of pixel units and the second analog-to-digital conversion circuit; The fourth switching switch is used to control the connection state between the second column of pixel units and the first analog-to-digital conversion circuit.

8. The image sensor according to claim 7, characterized in that: The pixel signal of the column pixel unit comprises a high-gain pixel signal, The first end of the third switching switch is suitable for inputting the high-gain pixel signal of the first column of pixel units, and the second end of the third switching switch is connected to the first input end of the second analog-to-digital conversion circuit; The first end of the fourth switching switch is suitable for inputting the high-gain pixel signal of the second column pixel unit, and the second end of the fourth switching switch is connected to the first input end of the first analog-to-digital conversion circuit.

9. The image sensor according to claim 8, characterized in that: The first analog-to-digital conversion circuit comprises: A first comparator, wherein a first input terminal of the first comparator is adapted to input a pixel signal, and a second input terminal of the first comparator is adapted to input a ramp signal; A first counter is used to obtain a digital quantization value of the pixel signal according to a comparison result of the comparator.

10. The image sensor according to claim 9, characterized in that: The first analog-to-digital conversion circuit also includes: a first capacitor, wherein a first end of the first capacitor is connected to a second end of the first exchange switch and a second end of the fourth exchange switch, and a second end of the first capacitor is connected to a first input end of the first comparator for inputting a pixel signal; A second capacitor, wherein a first end of the second capacitor is connected to the processing module, and a second end of the second capacitor is connected to the second input end of the first comparator for inputting a ramp signal.

11. The image sensor according to claim 10, characterized in that: The first analog-to-digital conversion circuit also includes: A second comparator, wherein an input terminal of the second comparator is connected to an output terminal of the first comparator, and the second comparator is adapted to output the comparison result.

12. The image sensor according to claim 11, characterized in that: The first analog-to-digital conversion circuit also includes: A first reset selector, wherein an input end of the first reset selector is connected to an output end of the second comparator, and an output end of the first reset selector is connected to the first counter.

13. The image sensor according to claim 8, characterized in that The second analog-to-digital conversion circuit comprises: a third comparator, wherein a first input terminal of the third comparator is adapted to input a pixel signal, and a second input terminal of the third comparator is adapted to input a ramp signal; A second calculator is used to obtain a digital quantization value of the pixel signal according to the comparison result of the comparator.

14. The image sensor according to claim 13, characterized in that: The second analog-to-digital conversion circuit also includes: a third capacitor, wherein a first end of the third capacitor is connected to the second end of the second exchange switch and the second end of the third exchange switch, and a second end of the third capacitor is connected to the first input end of the third comparator to input a pixel signal; A fourth capacitor, wherein a first end of the fourth capacitor is connected to the processing module, and a second end of the fourth capacitor is connected to the second input end of the third comparator, and is used to input a ramp signal.

15. The image sensor according to claim 14, characterized in that: The second analog-to-digital conversion circuit also includes: A fourth comparator, wherein the input terminal of the fourth comparator is connected to the output terminal of the third comparator, and the output terminal of the fourth comparator is suitable for inputting the comparison result.

16. The image sensor according to claim 15, characterized in that The second analog-to-digital conversion circuit also includes: A second reset selector, wherein an input end of the second reset selector is connected to an output end of the fourth comparator, and an output end of the second reset selector is connected to the second counter.

17. The image sensor according to any one of claims 1 to 16, characterized in that: Each of the pixel units includes a first type of photoelectric conversion unit and a second type of photoelectric conversion unit, and the photosensitive area of ​​the first type of photoelectric conversion unit is larger than the photosensitive area of ​​the second type of photoelectric conversion unit.

18. A pixel signal readout control method, characterized in that: For an image sensor, the pixel signal readout control method comprises: controlling a pixel array output of the image sensor; The switch module of the image sensor and the multiple analog-to-digital conversion circuits corresponding to each of the switch modules are controlled so as to quantize and convert the pixel signals of the multiple columns of pixel units corresponding to each of the switch modules alternately through the analog-to-digital conversion circuits.

19. The pixel signal readout control method according to claim 18, characterized in that: The pixel array includes an even-numbered column of pixel units and an odd-numbered column of pixel units, each of the pixel units includes a first type of photoelectric conversion unit and a second type of photoelectric conversion unit, and the photosensitive area of ​​the first type of photoelectric conversion unit is larger than the photosensitive area of ​​the second type of photoelectric conversion unit; Controlling the pixel array output of the image sensor, comprising: Sequentially reading out the low gain reset signal, the high gain reset signal, the high gain image signal and the low gain image signal of the first type of photoelectric conversion unit in the odd-numbered columns of pixel units; The high gain reset signal, the high gain image signal, the low gain image signal and the low gain reset signal of the second type photoelectric conversion unit in the odd number column pixel unit are sequentially read out.

20. The pixel signal readout control method according to claim 19, characterized in that: Controlling the pixel array output of the image sensor, further comprising: Sequentially reading out the low gain reset signal, the high gain reset signal, the high gain image signal and the low gain image signal of the first type of photoelectric conversion unit in the even-numbered columns of pixel units; The high gain reset signal, the high gain image signal, the low gain image signal and the low gain reset signal of the second type photoelectric conversion unit in the even-numbered column pixel units are sequentially read out.

21. The pixel signal readout control method according to claim 19, characterized in that: Each of the switch modules is respectively connected to two adjacent columns of pixel units and two adjacent analog-to-digital conversion circuits; The two columns of pixel units connected to each of the switch modules include a first column of pixel units and a second column of pixel units; The two analog-to-digital conversion circuits connected to each of the switch modules include a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit; Each of the switch modules includes a first switching switch and a second switching switch, wherein the first switching switch is used to control the connection state between the first column of pixel units and the first analog-to-digital conversion circuit, and the second switching switch is used to control the connection state between the second column of pixel units and the second analog-to-digital conversion circuit; Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, comprising: When the pixel array outputs the low-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units, the first switching switch and the second switching switch are controlled to be closed, so that the low-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; Controlling the input of a low-gain ramp signal to a second input terminal of the first analog-to-digital conversion circuit; The first analog-to-digital conversion circuit is controlled to perform quantization conversion on the low-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units according to the low-gain ramp signal.

22. The pixel signal readout control method according to claim 21, characterized in that: The switch module further includes a third switching switch and a fourth switching switch, wherein the third switching switch is used to control the connection state between the first column of pixel units and the second analog-to-digital conversion circuit, and the fourth switching switch is used to control the connection state between the second column of pixel units and the first analog-to-digital conversion circuit; Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the high-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units, the first switching switch and the second switching switch are controlled to be disconnected, and the third switching switch and the fourth switching switch are controlled to be closed, so that the high-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; Controlling the input of a high-gain ramp signal to a second input terminal of the second analog-to-digital conversion circuit; The second analog-to-digital conversion circuit is controlled to digitally quantize the high-gain reset signal of the first type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal.

23. The pixel signal readout control method according to claim 22, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the high-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units, the first switching switch and the second switching switch are controlled to be disconnected, and the third switching switch and the fourth switching switch are controlled to be closed, so that the high-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; Controlling the input of a high-gain ramp signal to a second input terminal of the second analog-to-digital conversion circuit; The second analog-to-digital conversion circuit is controlled to quantize and convert the high-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal.

24. The pixel signal readout control method according to claim 23, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately digitally quantize pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the low-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units, the first switching switch and the second switching switch are controlled to be closed, and the third switching switch and the fourth switching switch are controlled to be opened, so that the low-gain image signal of the first type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; Controlling the input of a low-gain ramp signal to a second input terminal of the first analog-to-digital conversion circuit; The first analog-to-digital conversion circuit is controlled to quantize and convert the low-gain image signal of the first type of photoelectric conversion unit of the column of pixel units according to the low-gain ramp signal.

25. The pixel signal readout control method according to claim 24, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately digitally quantize pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the high-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units, the first switching switch and the second switching switch are controlled to be disconnected, and the third switching switch and the fourth switching switch are controlled to be closed, so that the high-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; Controlling the input of a high-gain ramp signal to a second input terminal of the second analog-to-digital conversion circuit; The second analog-to-digital conversion circuit is controlled to perform quantization conversion on the high-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal.

26. The pixel signal readout control method according to claim 25, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the high-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units, the first switching switch and the second switching switch are controlled to be disconnected, and the third switching switch and the fourth switching switch are controlled to be closed, so that the high-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; Controlling the input of a high-gain ramp signal to a second input terminal of the second analog-to-digital conversion circuit; The second analog-to-digital conversion circuit is controlled to quantize and convert the high-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units according to the high-gain ramp signal.

27. The pixel signal readout control method according to claim 26, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the low-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units, the first switching switch and the second switching switch are controlled to be closed, and the third switching switch and the fourth switching switch are controlled to be opened, so that the low-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; Controlling the input of a low-gain ramp signal to a second input terminal of the first analog-to-digital conversion circuit; The first analog-to-digital conversion circuit is controlled to quantize and convert the low-gain image signal of the second type of photoelectric conversion unit of the first column of pixel units according to the low-gain ramp signal.

28. The pixel signal readout control method according to claim 27, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the low-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, and the third exchange switch and the fourth exchange switch are controlled to be opened, so that the low-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; Controlling the input of a low-gain ramp signal to a second input terminal of the first analog-to-digital conversion circuit; The first analog-to-digital conversion circuit is controlled to digitally quantize the low-gain reset signal of the second type of photoelectric conversion unit of the first column of pixel units according to the low-gain ramp signal.

29. The pixel signal readout control method according to claim 28, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, comprising: When the pixel array outputs the low-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units, controlling the first exchange switch and the second exchange switch to be closed, so that the low-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; Controlling the input of a low-gain ramp signal to a second input terminal of the second analog-to-digital conversion circuit; The second analog-to-digital conversion circuit is controlled to perform quantization conversion on the low-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal.

30. The pixel signal readout control method according to claim 29, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the high-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units, the first switching switch and the second switching switch are controlled to be disconnected, and the third switching switch and the fourth switching switch are controlled to be closed, so that the high-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; Controlling the input of a high-gain ramp signal to the second input terminal of the first analog-to-digital conversion circuit; The first analog-to-digital conversion circuit is controlled to perform quantization conversion on the high-gain reset signal of the first type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal.

31. The pixel signal readout control method according to claim 30, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the high-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units, the first switching switch and the second switching switch are controlled to be disconnected, and the third switching switch and the fourth switching switch are controlled to be closed, so that the high-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; Controlling the input of a high-gain ramp signal to the second input terminal of the first analog-to-digital conversion circuit; The first analog-to-digital conversion circuit is controlled to quantize and convert the high-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal.

32. The pixel signal readout control method according to claim 31, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the low-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units, the third exchange switch and the fourth exchange switch are controlled to be disconnected, and the first exchange switch and the second exchange switch are controlled to be closed, so that the low-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; Controlling the input of a low-gain ramp signal to a second input terminal of the second analog-to-digital conversion circuit; The second analog-to-digital conversion circuit is controlled to quantize and convert the low-gain image signal of the first type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal.

33. The pixel signal readout control method according to claim 32, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the high-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units, the first exchange switch and the second exchange switch are controlled to be disconnected, and the third exchange switch and the fourth exchange switch are controlled to be closed, so that the high-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; Controlling the input of a high-gain ramp signal to a second input terminal of the first analog-to-digital conversion circuit; The first analog-to-digital conversion circuit is controlled to digitally quantize the high-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal.

34. The pixel signal readout control method according to claim 33, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the high-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units, the first switching switch and the second switching switch are controlled to be disconnected, and the third switching switch and the fourth switching switch are controlled to be closed, so that the high-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the first analog-to-digital conversion circuit; Controlling the input of a high-gain ramp signal to a second input terminal of the first analog-to-digital conversion circuit; The first analog-to-digital conversion circuit is controlled to quantize and convert the high-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units according to the high-gain ramp signal.

35. The pixel signal readout control method according to claim 34, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the low-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units, the third exchange switch and the fourth exchange switch are controlled to be disconnected, and the first exchange switch and the second exchange switch are controlled to be closed, so that the low-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; Controlling the input of a low-gain ramp signal to a second input terminal of the second analog-to-digital conversion circuit; The second analog-to-digital conversion circuit is controlled to quantize and convert the low-gain image signal of the second type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal.

36. The pixel signal readout control method according to claim 35, characterized in that: Controlling the switch module of the image sensor and two analog-to-digital conversion circuits corresponding to each of the switch modules, so as to alternately quantize and convert pixel signals of two columns of pixel units corresponding to each of the switch modules through the analog-to-digital conversion circuits, further comprising: When the pixel array outputs the low-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units, the first exchange switch and the second exchange switch are controlled to be closed, and the third exchange switch and the fourth exchange switch are controlled to be opened, so that the low-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units is input to the first input end of the second analog-to-digital conversion circuit; Controlling the input of a low-gain ramp signal to a second input terminal of the second analog-to-digital conversion circuit; The second analog-to-digital conversion circuit is controlled to perform quantization conversion on the low-gain reset signal of the second type of photoelectric conversion unit of the second column of pixel units according to the low-gain ramp signal.

37. The pixel signal readout control method according to any one of claims 21 to 36, characterized in that: The pixel signal readout control method further includes: When one of the first analog-to-digital conversion circuit and the second analog-to-digital conversion circuit performs quantization conversion on a pixel signal, the other analog-to-digital conversion circuit of the first analog-to-digital conversion circuit and the second analog-to-digital conversion circuit is controlled to be in a reset state, or the pixel signal input to the other analog-to-digital conversion circuit does not reach an overlapping state with the ramp signal.

38. An electronic device, characterized in that: The image sensor comprises the image sensor according to any one of claims 1 to 17.

39. A vehicle, characterized in that: The image sensor comprises the image sensor according to any one of claims 1 to 17.

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