Silicon wafer texturing method and solar cell manufacturing method

Abstract

The invention relates to the technical field of solar cell manufacturing. The invention particularly relates to a silicon wafer texturing method and a solar cell manufacturing method. The invention provides a silicon wafer texturing method. The silicon wafer texturing method comprises the following steps: providing a silicon wafer; preliminary texturing: forming a plurality of pyramid structures on the surface of the silicon wafer to form a pyramid textured surface; suede homogenization, which comprises the following steps: bombarding the suede, treating the silicon wafer subjected to preliminary texturing through magnetron sputtering, and forming a silicon dioxide layer on the surface of the pyramid suede; and cleaning the silicon wafer, cleaning the silicon wafer on which the silicon dioxide layer is formed, and removing the silicon dioxide layer. According to the silicon wafer texturing method provided by the invention, the uniformity of the textured surface of the substrate silicon wafer of the heterojunction solar cell can be improved.

Description

Technical Field

[0001] The invention relates to the field of solar cell manufacturing, and in particular to a silicon wafer texturing method and a solar cell manufacturing method. Background Art

[0002] With the development of the photovoltaic industry, heterojunction solar cells have gradually become an important technical direction in the photovoltaic industry. At present, after the substrate silicon wafer of the heterojunction solar cell is textured, the velvet surface is generally not uniform, the pyramid volume uniformity is poor, and the large pyramid is mixed with small pyramids, resulting in uneven coverage of the passivation layer formed on the surface, affecting the improvement of the open circuit voltage. In addition, the velvet surface of the large pyramid mixed with small pyramids will also cause the contact resistance between the amorphous silicon passivation layer and the silicon wafer surface to be high, thereby affecting the improvement of the fill factor. Therefore, a solution is needed to improve the uniformity of the velvet surface of the substrate silicon wafer of the heterojunction solar cell. Summary of the invention

[0003] Therefore, the present invention provides a solution to solve the problem of unsatisfactory uniformity of the texture surface of the substrate silicon wafer of the heterojunction solar cell.

[0004] The present invention provides a silicon wafer texturing method, comprising the following steps: providing a silicon wafer; preliminary texturing, forming a plurality of pyramid structures on the surface of the silicon wafer to form a pyramid velvet surface; velvet surface homogenization, comprising the following steps: bombarding the velvet surface, treating the silicon wafer that has undergone preliminary texturing by magnetron sputtering, forming a silicon dioxide layer on the surface of the pyramid velvet surface; cleaning the silicon wafer, cleaning the silicon wafer formed with the silicon dioxide layer, and removing the silicon dioxide layer.

[0005] Optionally, in the magnetron sputtering step of bombarding the velvet surface, the target material is a single crystal silicon target material; the ambient gas is argon, and the reaction gas is oxygen.

[0006] Optionally, in the magnetron sputtering step of bombarding the velvet surface, the purity of the single crystal silicon target material is greater than 99.999%; the purity of the argon gas is higher than 99.99%; the purity of the oxygen is higher than 99.99%; in the reaction chamber of the magnetron sputtering step, the volume fraction of oxygen is 25%-35%; and the air pressure in the chamber is 1Pa-2Pa.

[0007] Optionally, the distance between the target and the silicon wafer is 50 mm-70 mm; the power is 1 kW-10 kW; the reaction temperature is 95° C.-105° C.; and the reaction time is 60 s-70 s.

[0008] Optionally, the silicon wafer texturing method of the present invention further comprises the following steps: rounding the pyramid, treating the silicon wafer from which the silicon dioxide layer is removed with a rounding treatment liquid to round the corners of the pyramid structure. The rounding treatment liquid comprises hydrochloric acid and hydrofluoric acid; the mass fraction of the hydrochloric acid is 1%-2%; the mass fraction of the hydrofluoric acid is 0.01%-0.1%.

[0009] Optionally, the step of cleaning the silicon wafer includes: passing the silicon wafer formed with the silicon dioxide layer through multiple cleaning tanks to clean the silicon wafer to remove the silicon dioxide layer on the surface and perform surface cleaning at the same time; wherein at least the step includes: passing through a first cleaning tank, wherein an HF solution is used as a first cleaning liquid in the first cleaning tank; passing through a second cleaning tank, wherein a mixed solution of KOH and H2O2 is used as a second cleaning liquid in the second cleaning tank; passing through a third cleaning tank, wherein a mixed solution of HCl and H2O2 is used as a third cleaning liquid in the third cleaning tank; passing through a fourth cleaning tank, wherein an HF solution is used as a fourth cleaning liquid in the fourth cleaning tank.

[0010] Optionally, in the first cleaning liquid, the mass fraction of HF is 10%-15%; in the second cleaning liquid, the mass fraction of KOH is 0.5%-2%, and the mass fraction of H2O2 is 4%-8%; in the third cleaning liquid, the mass fraction of HCl is 3%-8%, and the mass fraction of H2O2 is 3%-8%.

[0011] Optionally, the silicon wafer texturing method of the present invention further comprises: pre-cleaning, before the preliminary texturing step, using a pre-cleaning liquid to pre-clean the silicon wafer to remove the surface damage layer. The pre-cleaning liquid is a potassium hydroxide solution with a mass fraction of 2%.

[0012] The present invention also provides a method for manufacturing a solar cell, comprising the following steps: providing a substrate, wherein the substrate is a silicon wafer processed by the silicon wafer texturing method provided by the present invention.

[0013] Optionally, the solar cell manufacturing method of the present invention also includes the following steps: depositing a passivation layer on the surfaces of opposite sides of the substrate; depositing a first conductive type semiconductor layer on the surface of the passivation layer on one side, and depositing a second conductive type semiconductor layer on the surface of the passivation layer on the other side; depositing a transparent conductive layer on the surface of the first conductive type semiconductor layer and the surface of the second conductive type semiconductor layer; forming a metal electrode on the surface of the transparent conductive layer; wherein the first conductive type semiconductor layer and the second conductive type semiconductor layer have opposite conductivity types.

[0014] The beneficial effects of the present invention are:

[0015] The silicon wafer texturing method provided by the present invention bombards the velvet surface by magnetron sputtering after preliminary texturing, and forms a silicon dioxide layer on the surface of the velvet surface; in this process, most of the relatively small pyramid structures are destroyed during the sputtering process, or are quickly transformed to form a part of the silicon dioxide layer, and are removed together in the subsequent cleaning process. For the larger pyramid structures, only the surface part is bombarded, and part of it is transformed to form a silicon dioxide layer. After cleaning and removing the silicon dioxide layer, a larger volume and a more complete structural morphology are still retained. Since most of the smaller pyramid structures are removed (mainly small pyramid structures with a height of less than 0.3 μm are removed), and the larger pyramid structures can be retained, the uniformity of the pyramid velvet surface can be improved. In addition, the passivation layer formed on the surface can be more closely and evenly contacted with the silicon wafer as a substrate, the open circuit voltage can be improved, and the contact resistance between the passivation layer and the silicon wafer surface can be reduced, and the filling factor can be improved. Thereby improving the performance of the solar cell.

[0016] The solar cell manufacturing method provided by the present invention uses a silicon wafer treated by the silicon wafer texturing method provided by the present invention, and after preliminary texturing, the velvet surface is bombarded by magnetron sputtering to form a silicon dioxide layer on the velvet surface; in this process, most of the relatively small pyramid structures are destroyed during the sputtering process, or are quickly transformed to form a part of the silicon dioxide layer, and are removed together in the subsequent cleaning process. For the larger pyramid structure, only the surface part is bombarded, and part of it is transformed to form a silicon dioxide layer. After cleaning and removing the silicon dioxide layer, a larger volume and a more complete structural morphology are still retained. Since most of the smaller pyramid structures are removed, while the larger pyramid structures can be retained, the uniformity of the pyramid velvet surface can be improved. In addition, the passivation layer formed on the surface can be more covered, and the open circuit voltage can be improved. The contact resistance between the passivation layer and the silicon wafer surface can be reduced, and the filling factor can be improved. Thereby improving the performance of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 It is a schematic diagram of the process of the silicon wafer texturing method of the present invention;

[0019] Figure 2 A schematic diagram of a process of a silicon wafer texturing method according to an embodiment of the present invention;

[0020] Figure 3 It is a schematic diagram of a silicon wafer after preliminary texturing in a silicon wafer texturing method according to an embodiment of the present invention;

[0021] Figure 4 It is a schematic diagram of a silicon wafer after a silicon dioxide layer is formed in a silicon wafer texturing method according to an embodiment of the present invention;

[0022] Figure 5 This is a schematic diagram of a silicon wafer after the silicon dioxide layer is removed in a silicon wafer texturing method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0023] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] Embodiment 1

[0025] refer to Figure 1 A flowchart of the process, and Figure 3-Figure 5 The process state diagram of the present embodiment provides a silicon wafer texturing method, comprising the following steps:

[0026] Providing a silicon wafer 100;

[0027] Preliminary texturing: forming a plurality of pyramid structures 101 and 102 on the surface of the silicon wafer 100 to form a pyramid texture surface;

[0028] The suede surface is homogenized, including the following steps:

[0029] Bombarding the textured surface: treating the silicon wafer 100 that has undergone preliminary texture processing by magnetron sputtering to form a silicon dioxide layer 200 on the surface of the pyramid textured surface;

[0030] Cleaning the silicon wafer: cleaning the silicon wafer 100 on which the silicon dioxide layer 200 is formed, and removing the silicon dioxide layer 200 .

[0031] The silicon wafer texturing method provided in this embodiment bombards the velvet surface by magnetron sputtering after preliminary texturing, and forms a silicon dioxide layer 200 on the velvet surface; in this process, most of the relatively small pyramid structures 102 are destroyed during the sputtering process, or are quickly transformed to form a part of the silicon dioxide layer, and are removed together in the subsequent cleaning process. For the larger pyramid structure 101, only the surface part is bombarded, and part of it is transformed to form a silicon dioxide layer 200. After cleaning and removing the silicon dioxide layer 200, a larger volume and a more complete structural morphology are still retained. Since most of the smaller pyramid structures 102 are removed (mainly small pyramid structures with a height of less than 0.3 μm are removed), and the larger pyramid structures 101 can be retained, the uniformity of the pyramid velvet surface can be improved. In addition, the passivation layer formed on the surface can be more closely and evenly contacted with the silicon wafer 100 as a substrate, the open circuit voltage can be improved, and the contact resistance between the passivation layer and the silicon wafer surface can be reduced, and the filling factor can be improved. Thereby improving the performance of solar cells.

[0032] Specifically, refer to Figure 3 First, a pyramid structure is formed on the surface of the silicon wafer to form a pyramid velvet surface. At this time, the pyramid structures on the surface of the silicon wafer vary in size, some are large and some are small (including a large pyramid structure 101 and a small pyramid structure 102), and the variance is large. Figure 4 , magnetron sputtering is used to process the silicon wafer to form a silicon dioxide layer 200 on the velvet surface. In this process, the smaller pyramid structure 102 is directly destroyed or converted into silicon dioxide, and is basically completely removed (there is still a very small amount of residue). The larger pyramid structure 101 is only affected on the surface, and the overall change is not significant (the volume is reduced to a certain extent, but the degree of change is very small, not shown in the figure). Figure 5 , the silicon dioxide layer 200 is removed, and the remaining silicon wafer velvet surface is mainly a larger pyramid structure 101, while the smaller pyramid structure 102 is basically removed, with only a small amount of residue, so that the overall uniformity is effectively improved.

[0033] Furthermore, in the magnetron sputtering step of bombarding the velvet surface, the target material is a single crystal silicon target material, which has a uniform lattice structure and can form uniform silicon oxide; the ambient gas is argon, and the reaction gas is oxygen. Oxygen as a reaction gas is cheap, and the process is stable and mature.

[0034] Specifically, in the magnetron sputtering step of bombarding the velvet surface, the purity of the single crystal silicon target is greater than 99.999%; the purity of the argon gas is higher than 99.99%; the purity of the oxygen is higher than 99.99%; in the reaction chamber of the magnetron sputtering step, the volume fraction of the oxygen is 25%-35%; if the volume fraction of oxygen is lower than 25%, epitaxial silicon is easily formed on the surface of the silicon substrate, resulting in surface defects; if the volume fraction of oxygen is higher than 35%, the deposition rate is reduced and the deposition time is prolonged. Therefore, the volume fraction of sheep's hoof is in the range of 25%-35%, which can strike a balance between shorter deposition time and reduced surface defects. The air pressure in the chamber is 1Pa-2Pa. If the air pressure is lower than 1Pa, it cannot be ignited or the ignition is insufficient; if the air pressure is higher than 2Pa, the argon ions lose too much kinetic energy in the collision with the target atoms, and the energy of the atoms deposited on the substrate is low, making it difficult to achieve the purpose of bombarding and removing the small pyramid structure. Therefore, when the air pressure is within the range of 1Pa-2Pa, a balance can be achieved between sufficient ignition and reducing kinetic energy loss.

[0035] The distance between the target and the silicon wafer is 50mm-70mm; the power is 1kW-10kW; if the power is lower than 1kW, the useful work does not reach the threshold and sputtering cannot be performed; if the power is higher than 10kW, the internal stress in the film layer increases, which will cause the film layer to break and reduce the uniformity. Too high a power will cause the substrate silicon wafer to deform. Therefore, within the power range of 1kW-10kW, a balance can be achieved between sputtering bombardment and avoiding film breakage. The reaction temperature is 95℃~105℃; the reaction time is 60-70s. The reaction time is the total time including the initial heating and ventilation steps.

[0036] The volume fraction of oxygen in the reaction chamber of the magnetron sputtering step is positively correlated with the power; and the reaction temperature is negatively correlated with the reaction time.

[0037] The thickness of the final silicon dioxide layer is affected by the size of the pyramid structure on the surface of the silicon wafer. The smaller the volume of the pyramid structure, the greater the thickness. It is affected by the oxygen volume fraction. The higher the volume fraction, the slower the deposition speed and the smaller the thickness. It is affected by power. The greater the power, the thicker the thickness. It is affected by reaction time. The longer the time, the thicker the thickness.

[0038] For further reference, Figure 2 The silicon wafer texturing method of this embodiment further includes:

[0039] Rounding the pyramid, using a rounding treatment liquid to treat the silicon wafer after removing the silicon dioxide layer to round the corners of the pyramid structure. The rounding treatment liquid includes hydrochloric acid and hydrofluoric acid; the mass fraction of the hydrochloric acid is 1%-2%; the mass fraction of the hydrofluoric acid is 0.05%.

[0040] Furthermore, the step of cleaning the silicon wafer includes:

[0041] The silicon wafer having the silicon dioxide layer formed thereon is cleaned through a plurality of cleaning tanks to remove the silicon dioxide layer on the surface and to clean the surface at the same time;

[0042] These include at least:

[0043] Using a first cleaning tank, wherein the first cleaning tank uses an HF solution as a first cleaning solution to remove the silicon dioxide layer;

[0044] Passing through a second cleaning tank, wherein a mixed solution of KOH and H2O2 is used as a second cleaning solution, to remove residual particles on the surface;

[0045] Through a third cleaning tank, a mixed solution of HCl and H2O2 is used as a third cleaning solution in the third cleaning tank to remove residual cleaning solution on the surface of the silicon wafer and metal ions attached to the surface of the silicon wafer;

[0046] By passing through the fourth cleaning tank, HF solution is used as the fourth cleaning liquid in the fourth cleaning tank to remove the trace silicon dioxide generated during the treatment process in the third cleaning tank, and at the same time, the surface of the silicon wafer is passivated, and no oxide layer is generated in a short time, avoiding affecting the subsequent film layer formation.

[0047] Specifically, in the first cleaning liquid, the mass fraction of HF is 10%-15%; in the second cleaning liquid, the mass fraction of KOH is 0.5%-2%, and the mass fraction of H2O2 is 4%-8%; in the third cleaning liquid, the mass fraction of HCl is 3%-8%, and the mass fraction of H2O2 is 3%-8%.

[0048] For further reference, Figure 2 The silicon wafer texturing method of this embodiment further includes:

[0049] Pre-cleaning: Before the preliminary texturing step, the silicon wafer is pre-cleaned with a pre-cleaning liquid to remove the surface damage layer. The pre-cleaning liquid is a potassium hydroxide solution with a mass fraction of 2%.

[0050] Embodiment 2

[0051] This embodiment provides a method for manufacturing a solar cell, comprising the following steps:

[0052] A substrate is provided, wherein the substrate is a silicon wafer processed by the silicon wafer texturing method provided in the first embodiment.

[0053] The solar cell manufacturing method provided in this embodiment uses the silicon wafer treated by the silicon wafer texturing method provided in the above embodiment 1, and after preliminary texturing, the velvet surface is bombarded by magnetron sputtering to form a silicon dioxide layer on the velvet surface; in this process, most of the relatively small pyramid structures are destroyed during the sputtering process, or quickly transformed to form a part of the silicon dioxide layer, and are removed together in the subsequent cleaning process. For the larger pyramid structure, only the surface part is bombarded, and part of it is transformed to form a silicon dioxide layer. After cleaning and removing the silicon dioxide layer, a larger volume and a more complete structural morphology are still retained. Since most of the smaller pyramid structures are removed, and the larger pyramid structures can be retained, the uniformity of the pyramid velvet surface can be improved. In addition, the passivation layer formed on the surface can be more covered, and the open circuit voltage can be improved. The contact resistance between the passivation layer and the silicon wafer surface can be reduced, and the fill factor can be improved. Thereby improving the performance of the solar cell.

[0054] Furthermore, the solar cell manufacturing method of the present invention further comprises the following steps:

[0055] A passivation layer is deposited on two opposite sides of the substrate, and the passivation layer may be, for example, an intrinsic amorphous silicon layer.

[0056] A first conductive type semiconductor layer is deposited on the surface of the passivation layer on one side, and a second conductive type semiconductor layer is deposited on the surface of the passivation layer on the other side.

[0057] A transparent conductive layer is deposited on the surface of the first conductive type semiconductor layer and the surface of the second conductive type semiconductor layer. The transparent conductive layer may be, for example, an ITO layer or an IZO layer.

[0058] A metal electrode is formed on the surface of the transparent conductive layer, and the metal electrode may be, for example, a silver electrode or a copper electrode.

[0059] The first conductive type semiconductor layer and the second conductive type semiconductor layer have opposite conductive types. For example, the first conductive type semiconductor layer is an N-type doped amorphous silicon layer, and the second conductive type semiconductor layer is a P-type doped amorphous silicon layer.

[0060] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0061] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0062] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0063] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the invention.

Claims

1. A method for texturing a silicon wafer, characterized in that: The following steps are involved: Provide silicon wafers; Preliminary texturing: forming a plurality of pyramid structures on the surface of the silicon wafer to form a pyramid texturing surface; The suede surface is homogenized, including the following steps: Bombarding the velvet surface: treating the silicon wafer that has undergone preliminary velvet processing by magnetron sputtering to form a silicon dioxide layer on the surface of the pyramid velvet surface; Cleaning the silicon wafer: cleaning the silicon wafer on which the silicon dioxide layer is formed to remove the silicon dioxide layer.

2. The method for texturing a silicon wafer according to claim 1, characterized in that: In the magnetron sputtering step of bombarding the velvet surface, the target material is a single crystal silicon target material; The ambient gas is argon and the reactive gas is oxygen.

3. The method for texturing a silicon wafer according to claim 2, characterized in that: In the magnetron sputtering step of bombarding the velvet surface, The purity of the single crystal silicon target material is greater than 99.999%; The purity of the argon gas is higher than 99.99%; The purity of the oxygen is higher than 99.99%; In the reaction chamber of the magnetron sputtering step, the volume fraction of oxygen is 25%-35%; The air pressure in the chamber is 1Pa-2Pa.

4. The method for texturing a silicon wafer according to claim 3, characterized in that: The distance between the target and the silicon wafer is 50 mm to 70 mm; Power is 1kW-10kW; The reaction temperature is 95°C-105°C; The total reaction time is 60s-70s; The volume fraction of oxygen in the reaction chamber of the magnetron sputtering step is positively correlated with the power; and the reaction temperature is negatively correlated with the reaction time.

5. The method for texturing a silicon wafer according to claim 1, characterized in that: Also includes: Rounding the pyramid, treating the silicon wafer from which the silicon dioxide layer is removed with a rounding treatment liquid to round the corners of the pyramid structure; The rounding treatment liquid includes hydrochloric acid and hydrofluoric acid; The mass fraction of the hydrochloric acid is 1%-2%; The mass fraction of the hydrofluoric acid is 0.01% to 0.1%.

6. The method for texturing a silicon wafer according to claim 1, characterized in that: The step of cleaning the silicon wafer comprises: The silicon wafer having the silicon dioxide layer formed thereon is cleaned through a plurality of cleaning tanks to remove the silicon dioxide layer on the surface and to clean the surface at the same time; These include at least: Passing through a first cleaning tank, wherein the first cleaning tank uses an HF solution as a first cleaning solution; Passing through a second cleaning tank, wherein a mixed solution of KOH and H2O2 is used as a second cleaning solution in the second cleaning tank; Passing through a third cleaning tank, wherein a mixed solution of HCl and H2O2 is used as a third cleaning solution in the third cleaning tank; The fourth cleaning tank is passed through, wherein the HF solution is used as the fourth cleaning liquid.

7. The method for texturing a silicon wafer according to claim 6, characterized in that: In the first cleaning solution, the mass fraction of HF is 10%-15%; In the second cleaning solution, the mass fraction of KOH is 0.5%-2%, and the mass fraction of H2O2 is 4%-8%; In the third cleaning solution, the mass fraction of HCl is 3%-8%, and the mass fraction of H2O2 is 3%-8%.

8. The method for texturing a silicon wafer according to claim 1, characterized in that: Also includes: Pre-cleaning: before the preliminary texturing step, the silicon wafer is pre-cleaned with a pre-cleaning liquid to remove the surface damage layer; The pre-cleaning solution is a potassium hydroxide solution with a mass fraction of 2%.

9. A method for manufacturing a solar cell, characterized in that: The following steps are involved: A substrate is provided, wherein the substrate is a silicon wafer processed by the silicon wafer texturing method according to any one of claims 1 to 8.

10. The method for manufacturing a solar cell according to claim 9, characterized in that: The following steps are also included: Depositing a passivation layer on two opposite surfaces of the substrate; Depositing a first conductive type semiconductor layer on the surface of the passivation layer on one side, and depositing a second conductive type semiconductor layer on the surface of the passivation layer on the other side; Depositing a transparent conductive layer on a surface of the first conductive type semiconductor layer and a surface of the second conductive type semiconductor layer; forming a metal electrode on the surface of the transparent conductive layer; The first conductive type semiconductor layer and the second conductive type semiconductor layer have opposite conductive types.

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