Automatic redundancy switching train monitoring display control system and method

Abstract

The invention discloses a train monitoring display control system and method with an automatic redundancy switching function, relates to the technical field of automatic redundancy control, and solves the problem that when a monitoring display breaks down during train operation, automatic redundancy switching of a main monitoring display system and a standby monitoring display system is difficult to realize. The technical problem that the detection safety can be improved due to the fact that a dynamic detection period is neglected during heartbeat signal detection is solved; according to the invention, hot standby redundancy is carried out on the minimum system, which is most likely to break down, of the display equipment, and when the FPGA monitors that the main control system is abnormal through the dynamic sending period of the heartbeat signal, the standby system is switched to immediately and automatically; when the main control system breaks down, the standby system is activated to take over immediately, continuous work of the monitoring displayer during train operation is ensured, and information loss or operation interruption caused by displayer faults is avoided.

Description

Technical Field

[0001] The invention belongs to the field of rail transit safety, relates to an automatic redundancy control technology, and specifically is a train monitoring display control system and method for automatic redundancy switching. Background Art

[0002] With the rapid development of rail transit systems, the safety and reliability of train operation have become particularly important. As a key monitoring device, the train monitoring display is used to display the status information of the train in real time. Its stability and real-time performance directly affect the safe operation of the train. During the operation of the train, occasional display failures are inevitable, causing the train driver to stop the train, restart the display or enable the backup display, and then drive the train. Such operations will cause train delays and affect the running time of the train on the entire line, which may affect the scheduling of the train network.

[0003] At present, most train monitoring display control systems find it difficult to achieve automatic and imperceptible redundant switching of the main and standby monitoring display systems when a monitoring display fails during train operation. Manual intervention is required, and there is a certain time delay in the switching, which will cause certain operating risks of the train during the switching time, making it difficult to ensure the safety of passengers' lives and property. At the same time, most train monitoring display control systems use a fixed detection cycle to detect abnormalities in heartbeat signals, ignoring the fact that a dynamic detection cycle can improve detection safety, reducing the reliability and practicality of the system.

[0004] Therefore, the present invention discloses a train monitoring display control system and method with automatic redundant switching, which are used to solve the above technical problems. Summary of the invention

[0005] The present invention aims to solve at least one of the technical problems existing in the prior art; to this end, the present invention proposes a train monitoring display control system and method with automatic redundant switching, which is used to solve the technical problems that when a monitoring display fails during train operation, it is difficult to realize automatic redundant switching of a main and standby monitoring display system, and that the dynamic detection cycle is ignored when performing heartbeat signal detection to improve the detection safety. The present invention solves the above problems by performing hot standby redundancy on the minimum system of the display device that is most prone to failure. When the FPGA monitors the abnormality of the main control system through the dynamic sending cycle of the heartbeat signal, it automatically switches to the standby system immediately.

[0006] To achieve the above object, the first aspect of the present invention provides a train monitoring display control system with automatic redundant switching, comprising: an auxiliary processing module, and a display configuration module, a redundant switching module and a database connected thereto;

[0007] The display configuration module is used to mark the display main control system as system A and the display backup system as system B; and configure the control modules for system A and system B respectively;

[0008] The auxiliary processing module is used to synchronize the MVB data of system A and system B through FPGA and select the operating system, and obtain and record the heartbeat signals of system A and system B;

[0009] The redundant switching module is used to detect the heartbeat signal of system A, perform redundant switching when the heartbeat signal of system A is abnormal, select the voice broadcast module through FPGA, and control the backlight of the display screen.

[0010] Preferably, configuring the control modules for the A system and the B system respectively includes:

[0011] An independent CPU, MVB communication module, Ethernet communication module and voice broadcast module are set for system A; an independent CPU, MVB communication module, Ethernet communication module and voice broadcast module are set for system B;

[0012] The key module, display module and touch screen module are set as common modules for system A and system B.

[0013] Preferably, the key circuit in the key module is a matrix key, which is connected to the FPGA, and the automatic scanning of the matrix key is realized through the FPGA.

[0014] Preferably, the automatic scanning of matrix buttons is realized by FPGA, including:

[0015] Use FPGA to detect whether there is a press signal on the matrix button; if yes, debounce the press signal, generate a press interrupt, and send the press interrupt to the CPU of system A and system B;

[0016] Detect whether there is a release signal on the matrix button through FPGA; if yes, debounce the release signal, generate a release interrupt, and send the release interrupt to the CPU of system A and system B;

[0017] The key code value is sent to the A series and B series CPU through the serial port signal.

[0018] Preferably, the method of performing MVB data synchronization on system A and system B and selecting the operating system through FPGA includes:

[0019] Connect the front-end receiving signals of the MVB to the MVB communication modules of the A system and the B system respectively through the FPGA;

[0020] Connect the front-end sending signal of the MVB to the A system, mark the A system as the running system, switch the key module, display module and touch screen module to the A system, and control the signal sending of the entire train monitoring display through the A system.

[0021] Preferably, the step of acquiring and recording the heartbeat signals of the A system and the B system includes:

[0022] C1: Obtain the failure rate G1 of the current train monitoring display and the failure rate G2 of the train monitoring display with the same number as the current train monitoring display, and obtain the dynamic transmission period DZ based on the formula DZ=CZ+CZ×(β×(1 / exp(α1×G1+α2×G2)-1)); wherein CZ is the standard transmission period set by experience, β is the amplitude adjustment coefficient of the manually set exp() function, and the value range of β is (0,2); α1 and α2 are manually set proportional adjustment coefficients, and α1+α2=1, α1≥α2;

[0023] C2: Determine whether the dynamic transmission period DZ is greater than the maximum value of the safety period range; if yes, update the dynamic transmission period DZ using the maximum value of the safety period range; if no, jump to C3; wherein the safety period range is obtained by manual setting;

[0024] C3: Determine whether the dynamic transmission period DZ is less than the minimum value of the safety period range; if yes, update the dynamic transmission period DZ using the minimum value of the safety period range; if no, do not update the dynamic transmission period DZ;

[0025] C4: The CPUs of system A and system B respectively send heartbeat signals to FPGA through a GPIO based on a dynamic sending period DZ, and FPGA records the heartbeat signals of system A and system B.

[0026] Preferably, the performing heartbeat signal detection on the A system includes:

[0027] D1: Get the number of trains running YL1 of the train network at the current time, and the average value PYL1 of the number of trains running YL1 at the current time in the historical days; get the number of trains running YL2 of the current line at the current time, and the average value PYL2 of the number of trains running YL2 at the current time in the historical days;

[0028] D2: The time difference determination threshold TZ is obtained based on the formula TZ = DZ × ZB × μ / exp(δ1 × YL1 / PYL1 + δ2 × YL2 / PYL2); wherein ZB is a manually set reference multiple, μ is an manually set amplitude adjustment coefficient of the exp() function, and the value range of μ is (0,2); δ1 and δ2 are proportional adjustment coefficients greater than 0, and δ1+δ2=1;

[0029] D3: Determine whether the time difference determination threshold TZ is greater than the maximum value of the safety threshold range; if yes, use the maximum value of the safety threshold range to update the time difference determination threshold TZ; if no, jump to D4; wherein the safety threshold range is obtained by manual setting;

[0030] D4: Determine whether the time difference determination threshold TZ is greater than the minimum value of the safety threshold range; if yes, update the time difference determination threshold TZ using the minimum value of the safety threshold range; if no, do not update the time difference determination threshold TZ;

[0031] D5: Obtain the time difference between the time when the most recent heartbeat signal of system A is sent and the current time, and determine through FPGA whether the time difference is greater than the time difference determination threshold TZ; if yes, send a heartbeat signal abnormality signal of system A; if no, do nothing.

[0032] Preferably, performing redundancy switching when the heartbeat signal of system A is abnormal includes:

[0033] When an abnormal heartbeat signal of system A is received, system B is marked as the running system, and the key module, display module and touch screen module are switched to system B through FPGA, and the signal transmission of the entire train monitoring display is dominated by system B.

[0034] Preferably, the selecting of the voice broadcast module through FPGA and the backlight control of the display screen include:

[0035] Acquire the voice broadcast signals of system A and system B, and send the voice broadcast signals to the corresponding voice decoding modules of system A and system B for decoding and output;

[0036] Determine whether the heartbeat signal of system A is abnormal; if yes, connect the voice broadcast module to the voice decoding module of system B through the arbitration function of FPGA; if no, connect the voice broadcast module to the voice decoding module of system A through the arbitration function of FPGA;

[0037] The voice broadcast module receives the output signal of the connected voice decoding module, and turns on the voice speaker for broadcasting according to the content contained in the output signal;

[0038] Determine whether the heartbeat signal of system A is abnormal; if yes, receive the PWM value of system B, and FPGA adjusts the backlight brightness of the display through the PWM duty cycle FPGA; if no, receive the PWM value of system A, and FPGA adjusts the backlight brightness of the display through the PWM duty cycle FPGA.

[0039] A second aspect of the present invention provides a method for controlling a train monitoring display with automatic redundant switching, comprising the following steps:

[0040] S1: Mark the display main control system as system A, and mark the display backup system as system B; configure the control modules of system A and system B respectively;

[0041] S2: synchronize the MVB data of system A and system B through FPGA and select the running system, obtain and record the heartbeat signals of system A and system B;

[0042] S3: Detect the heartbeat signal of system A. When the heartbeat signal of system A is abnormal, perform redundant switching, select the voice broadcast module through FPGA, and control the backlight of the display screen.

[0043] Compared with the prior art, the present invention has the following beneficial effects:

[0044] 1. The present invention provides hot standby redundancy for the smallest system of the display device that is most prone to failure. When the FPGA monitors the abnormality of the main control system through the dynamic sending cycle of the heartbeat signal, it automatically switches to the backup system immediately, thereby solving the technical problems of difficulty in realizing automatic redundant switching of the main and backup monitoring display systems when the monitoring display fails during train operation, and ignoring the dynamic detection cycle when performing heartbeat signal detection to improve the detection safety. The present invention can activate the backup system to take over immediately when the main control system fails, ensuring the continuous operation of the monitoring display during train operation and avoiding information loss or operation interruption due to display failure.

[0045] 2. The present invention optimizes the fault detection of the train monitoring display by dynamically adjusting the acquisition cycle of the heartbeat signal. The present invention does not use a fixed cycle to obtain the heartbeat signals of the main control system and the backup system, but conducts a comprehensive analysis based on the failure rate of the current train monitoring display and the historical failure rate of the display with the same number, thereby determining a dynamic sending cycle, through which the system adaptively obtains the heartbeat signal; this method enables the sending cycle of the heartbeat signal to be flexibly adjusted according to the actual fault situation of the train monitoring display: when the failure rate is high, the sending cycle is shortened to improve the timeliness and accuracy of fault detection; and when the failure rate is low, the sending cycle is extended to reduce the system's computational burden and improve operating efficiency. This dynamic adjustment mechanism not only enhances the reliability of the system, but also effectively optimizes resource utilization.

[0046] 3. When setting the time difference judgment threshold corresponding to the time difference between the sending time of the most recent heartbeat signal and the current time, the present invention does not set the time difference judgment threshold to a fixed value, but dynamically sets it according to the train network and the number of trains running on the current line in the current time. This is done because the communication load in the train network may increase with the increase in the number of trains. Under high load conditions, the transmission of the heartbeat signal may be delayed, resulting in misjudgment. When the number of trains is large and the network load is high, the transmission of the heartbeat signal may be delayed. The dynamic setting of the threshold can appropriately extend the judgment threshold according to the current network load situation to reduce misjudgments caused by network delays; when the number of trains is small and the network load is low, the transmission of the heartbeat signal is relatively stable. At this time, a shorter judgment threshold can be set to improve the response speed of the system and the accuracy of fault detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0048] Figure 1 It is a schematic diagram of the operation steps of the present invention;

[0049] Figure 2 It is a schematic diagram of the system module of the present invention;

[0050] Figure 3 A schematic diagram of the operation steps of obtaining a heartbeat signal according to the present invention;

[0051] Figure 4 It is a logic block diagram for implementing the present invention. DETAILED DESCRIPTION

[0052] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0053] See also Figure 1-Figure 2 , the first aspect of the present invention provides an automatic redundant switching train monitoring display control system, comprising: an auxiliary processing module, and a display configuration module, a redundant switching module and a database connected thereto;

[0054] Display configuration module: used to mark the display main control system as system A and the display backup system as system B; configure the control modules for system A and system B respectively;

[0055] Auxiliary processing module: used to synchronize MVB data between system A and system B through FPGA and select the running system, and obtain and record the heartbeat signals of system A and system B;

[0056] Redundancy switching module: used to detect the heartbeat signal of system A, perform redundancy switching when the heartbeat signal of system A is abnormal, select the voice broadcast module through FPGA, and control the backlight of the display screen.

[0057] It should be noted that MVB is a serial data communication bus mainly used between interconnected devices with interoperability and interchangeability requirements.

[0058] It should be noted that LVDS is a high-speed digital signal transmission technology.

[0059] See also Figure 4 UART is a serial communication interface used for asynchronous data transmission between a computer system and an external device. In this embodiment, UART communication is adopted between the CPU and the FPGA, and the UART baud rate is 115200.

[0060] In this application, control modules are configured for system A and system B respectively, including:

[0061] An independent CPU, MVB communication module, Ethernet communication module and voice broadcast module are set for system A; an independent CPU, MVB communication module, Ethernet communication module and voice broadcast module are set for system B;

[0062] The key module, display module and touch screen module are set as common modules for system A and system B.

[0063] It should be noted that the FPGA and the CPU are connected using IO signals and serial port signals to achieve communication between the FPGA and the CPU.

[0064] The key circuit in the key module in this application is a matrix key, which is connected to the FPGA, and the automatic scanning of the matrix key is realized through the FPGA.

[0065] In this application, FPGA is used to realize automatic scanning of matrix buttons, including:

[0066] Use FPGA to detect whether there is a press signal on the matrix button; if yes, debounce the press signal, generate a press interrupt, and send the press interrupt to the CPU of system A and system B;

[0067] Detect whether there is a release signal on the matrix button through FPGA; if yes, debounce the release signal, generate a release interrupt, and send the release interrupt to the CPU of system A and system B;

[0068] The key code value is sent to the A series and B series CPU through the serial port signal.

[0069] It is worth noting that sending the press interrupt, release interrupt and key code value to the CPU of system A and system B can ensure the synchronization of key operation functions of system A and system B in hot standby state, the unified display of program running interface of system A and system B, and the unchanged display interface when fault redundancy switching occurs.

[0070] In this application, FPGA is used to synchronize MVB data between system A and system B and select the operating system, including:

[0071] Connect the front-end receiving signals of the MVB to the MVB communication modules of the A system and the B system respectively through the FPGA;

[0072] Connect the front-end sending signal of the MVB to the A system, mark the A system as the running system, switch the key module, display module and touch screen module to the A system, and control the signal sending of the entire train monitoring display through the A system.

[0073] It should be noted that by connecting the front-end receiving signal of MVB to the MVB communication modules of the CPU of system A and system B respectively through FPGA, it can be ensured that during hot standby, system A and system B can ensure the synchronization of MVB data reception in real time and ensure data uniformity.

[0074] It should be noted that hot standby means that during normal system operation, the backup resources are always in operation to maintain synchronization with the primary resources. Once the primary resources fail, the backup resources can immediately take over the work, thus achieving high availability.

[0075] See also Figure 3 , in this application, the heartbeat signals of system A and system B are obtained and recorded, including:

[0076] C1: Obtain the failure rate G1 of the current train monitoring display and the failure rate G2 of the train monitoring display with the same number as the current train monitoring display, and obtain the dynamic transmission period DZ based on the formula DZ=CZ+CZ×(β×(1 / exp(α1×G1+α2×G2)-1)); wherein CZ is the standard transmission period set by experience, β is the amplitude adjustment coefficient of the manually set exp() function, and the value range of β is (0,2); α1 and α2 are manually set proportional adjustment coefficients, and α1+α2=1, α1≥α2;

[0077] C2: Determine whether the dynamic sending cycle DZ is greater than the maximum value of the safety cycle range; if yes, use the maximum value of the safety cycle range to update the dynamic sending cycle DZ; if no, jump to C3; wherein the safety cycle range is obtained by manual setting;

[0078] C3: Determine whether the dynamic sending cycle DZ is less than the minimum value of the safe cycle range; if yes, use the minimum value of the safe cycle range to update the dynamic sending cycle DZ; if no, do not update the dynamic sending cycle DZ;

[0079] C4: The CPUs of system A and system B respectively send heartbeat signals to FPGA through a GPIO based on a dynamic sending period DZ, and FPGA records the heartbeat signals of system A and system B.

[0080] It is worth noting that when acquiring the heartbeat signals of system A and system B, the present invention does not acquire them according to a fixed time period, but performs a comprehensive analysis based on the failure rate G1 of the current train monitoring display and the failure rate of the train monitoring display with the same number as the current train monitoring display to obtain a dynamic sending cycle, and acquires the heartbeat signal of the current train monitoring display according to this dynamic sending cycle. In this way, the sending cycle of the heartbeat signal can be adjusted accordingly with the fault situation of the current train monitoring display. When the fault of the train monitoring display is high, the sending cycle can be reduced, which can improve the timeliness of fault detection; when the fault of the train monitoring display is low, the sending cycle can be increased, which can reduce the amount of calculation of the system and improve the operating efficiency of the system.

[0081] It should be noted that the failure rate of the train monitoring display is: the number of times the current train monitoring display fails after being installed on the current train, divided by the number of times the train runs after the current train monitoring display is installed on the current train.

[0082] It should be noted that β is the amplitude adjustment coefficient of the manually set exp() function, and β is used to adjust the influence of the failure rate G1 and the failure rate G2 on the dynamic sending period DZ; when other conditions remain unchanged, the larger β is, the larger the value of the dynamic sending period DZ is, and the smaller β is, the smaller the value of the dynamic sending period DZ is.

[0083] It should be noted that the dependent variable of the 1 / exp(x) function decreases as the independent variable increases, and it is a downward trending curve.

[0084] It should be noted that α1 and α2 are proportional adjustment coefficients, and α1≥α2 is because: for train monitoring displays, the failure rate of train monitoring displays with the same number can only be used as a reference data for the current train monitoring display, and cannot absolutely reflect the situation where the current train monitoring display may fail. The failure rate of the current train monitoring display is a statistic of the failure of the current train monitoring display, which can directly reflect the situation where the current train monitoring display may fail. Therefore, the importance of the failure rate of the current train monitoring display is not less than the failure rate of the train monitoring display with the same number, and therefore, the value of the proportional adjustment coefficient α1 is not less than the proportional adjustment coefficient α2.

[0085] It should be noted that, among the train monitoring displays with the same number as the current train monitoring display, the same type refers to train monitoring displays of the same type produced by the same manufacturer.

[0086] It should be noted that GPIO is a general input and output interface used to connect and control various external devices.

[0087] In this application, the heartbeat signal detection of system A includes:

[0088] D1: Get the number of trains running YL1 of the train network at the current time, and the average value PYL1 of the number of trains running YL1 at the current time in the historical days; get the number of trains running YL2 of the current line at the current time, and the average value PYL2 of the number of trains running YL2 at the current time in the historical days;

[0089] D2: The time difference determination threshold TZ is obtained based on the formula TZ = DZ × ZB × μ / exp(δ1 × YL1 / PYL1 + δ2 × YL2 / PYL2); wherein ZB is a manually set reference multiple, μ is an manually set amplitude adjustment coefficient of the exp() function, and the value range of μ is (0,2); δ1 and δ2 are proportional adjustment coefficients greater than 0, and δ1+δ2=1;

[0090] D3: Determine whether the time difference determination threshold TZ is greater than the maximum value of the safety threshold range; if yes, use the maximum value of the safety threshold range to update the time difference determination threshold TZ; if no, jump to D4; wherein the safety threshold range is obtained by manual setting;

[0091] D4: Determine whether the time difference determination threshold TZ is greater than the minimum value of the safety threshold range; if yes, update the time difference determination threshold TZ using the minimum value of the safety threshold range; if no, do not update the time difference determination threshold TZ;

[0092] D5: Get the time difference between the last heartbeat signal sending time of system A and the current time, and determine whether the time difference is greater than the time difference determination threshold TZ through FPGA; if yes, send a heartbeat signal abnormality signal of system A; if no, do nothing.

[0093] It is worth noting that when setting the time difference judgment threshold corresponding to the time difference between the sending time of the most recent heartbeat signal and the current time, the present invention does not set the time difference judgment threshold to a fixed value, but dynamically sets it according to the number of trains running on the train network and the current line in the current time. This is done because the communication load in the train network may increase with the increase in the number of trains. Under high load conditions, the transmission of the heartbeat signal may be delayed, resulting in misjudgment. When the number of trains is large and the network load is high, the transmission of the heartbeat signal may be delayed. The dynamic setting of the threshold can appropriately extend the judgment threshold according to the current network load situation to reduce misjudgments caused by network delays; when the number of trains is small and the network load is low, the transmission of the heartbeat signal is relatively stable. At this time, a shorter judgment threshold can be set to improve the response speed of the system and the accuracy of fault detection.

[0094] It should be noted that when system A is abnormal or the application of system A is abnormal, system A will not be able to send a heartbeat signal to the FPGA.

[0095] It should be noted that μ is the amplitude adjustment coefficient of the manually set exp() function, and μ is used to adjust the number of train operations YL1 in the train network at the current time and the number of train operations YL2 at the current time in historical days. When other conditions remain unchanged, the larger the μ, the larger the value of the time difference judgment threshold TZ, and the smaller the value of the μ time difference judgment threshold TZ.

[0096] It should be noted that the dependent variable of the 1 / exp(x) function decreases as the independent variable increases, and it is a downward trending curve.

[0097] It should be noted that the current line in the number of train operations on the current line YL2 is: the starting point and the end point of the current train are marked as the current line.

[0098] In this application, when the heartbeat signal of system A is abnormal, redundancy switching is performed, including:

[0099] When an abnormal heartbeat signal of system A is received, system B is marked as the running system, and the key module, display module and touch screen module are switched to system B through FPGA, and the signal transmission of the entire train monitoring display is dominated by system B.

[0100] In this application, the voice broadcast module is selected through FPGA and the backlight of the display screen is controlled, including:

[0101] Acquire the voice broadcast signals of system A and system B, and send the voice broadcast signals to the corresponding voice decoding modules of system A and system B for decoding and output;

[0102] Determine whether the heartbeat signal of system A is abnormal; if yes, connect the voice broadcast module to the voice decoding module of system B through the arbitration function of FPGA; if no, connect the voice broadcast module to the voice decoding module of system A through the arbitration function of FPGA;

[0103] The voice broadcast module receives the output signal of the connected voice decoding module, and turns on the voice speaker for broadcasting according to the content contained in the output signal;

[0104] Determine whether the heartbeat signal of system A is abnormal; if yes, receive the PWM value of system B, and FPGA adjusts the backlight brightness of the display through the PWM duty cycle FPGA; if no, receive the PWM value of system A, and FPGA adjusts the backlight brightness of the display through the PWM duty cycle FPGA.

[0105] It should be noted that the arbitration function of FPGA is mainly used to solve the resource allocation problem when multiple request sources send requests at the same time. In FPGA, the main function of the arbitrator is to determine which source should be responded to based on the current priority when multiple sources send requests at the same time.

[0106] It should be noted that the backlight control of the display screen adopts a PWM drive circuit, and the CPU sends the PWM duty cycle to the FPGA through the serial port to adjust the backlight brightness of the display screen.

[0107] It should be noted that the specific explanation of FPGA adjusting the backlight brightness of the display screen through PWM duty cycle FPGA is: the PWM value sent by the receiving system, FPGA generates a corresponding PWM signal according to the received PWM value, and outputs the generated PWM signal to the display screen backlight control circuit, which is used to adjust the backlight brightness of the display screen by adjusting the current or voltage of the LED.

[0108] A second aspect of the present invention provides a method for controlling a train monitoring display with automatic redundant switching, comprising the following steps:

[0109] S1: Mark the display main control system as system A, and mark the display backup system as system B; configure the control modules of system A and system B respectively;

[0110] S2: synchronize the MVB data of system A and system B through FPGA and select the running system, obtain and record the heartbeat signals of system A and system B;

[0111] S3: Detect the heartbeat signal of system A. When the heartbeat signal of system A is abnormal, perform redundant switching, select the voice broadcast module through FPGA, and control the backlight of the display screen.

[0112] Part of the data in the above formula is calculated by removing the dimension and taking its numerical value. The formula is a formula closest to the actual situation obtained by software simulation of a large amount of collected data; the preset parameters and preset thresholds in the formula are set by technical personnel in this field according to actual conditions or obtained through simulation of a large amount of data.

[0113] Working principle of the present invention:

[0114] The present invention provides hot standby redundancy for the minimum system of the display device that is most prone to failure, and can realize hot standby redundancy function for the minimum system of hardware and software; the heartbeat monitoring of the two minimum systems is performed through FPGA, and when an abnormality occurs in the main system, the FPGA automatically switches to the backup system immediately after monitoring the failure and continues to operate. During the hot standby period, the main and backup systems share data, and the display, communication and buttons are always kept unified. When switching to the backup system, it can be seamlessly switched to normal operation without the need for manual intervention by the driver.

[0115] The above embodiments are only used to illustrate the technical method of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical method of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical method of the present invention.

Claims

1. A train monitoring display control system with automatic redundant switching, characterized in that: include: An auxiliary processing module, and a display configuration module, a redundant switching module and a database connected thereto; The display configuration module is used to mark the display main control system as system A and the display backup system as system B; and configure the control modules for system A and system B respectively; The auxiliary processing module is used to synchronize the MVB data of system A and system B through FPGA and select the operating system, and obtain and record the heartbeat signals of system A and system B; The redundant switching module is used to detect the heartbeat signal of system A, perform redundant switching when the heartbeat signal of system A is abnormal, select the voice broadcast module through FPGA, and control the backlight of the display screen.

2. The train monitoring display control system with automatic redundant switching according to claim 1 is characterized in that: The control module configuration of the A system and the B system respectively includes: An independent CPU, MVB communication module, Ethernet communication module and voice broadcast module are set for system A; an independent CPU, MVB communication module, Ethernet communication module and voice broadcast module are set for system B; The key module, display module and touch screen module are set as common modules for system A and system B.

3. The automatic redundant switching train monitoring display control system according to claim 2 is characterized in that: The key circuit in the key module is a matrix key, which is connected to the FPGA, and the automatic scanning of the matrix key is realized through the FPGA.

4. The train monitoring display control system with automatic redundant switching according to claim 3 is characterized in that: The automatic scanning of matrix buttons is realized by FPGA, including: Use FPGA to detect whether there is a press signal on the matrix button; if yes, debounce the press signal, generate a press interrupt, and send the press interrupt to the CPU of system A and system B; Detect whether there is a release signal on the matrix button through FPGA; if yes, debounce the release signal, generate a release interrupt, and send the release interrupt to the CPU of system A and system B; The key code value is sent to the A series and B series CPU through the serial port signal.

5. The train monitoring display control system with automatic redundant switching according to claim 1, characterized in that: The method of performing MVB data synchronization on system A and system B through FPGA and selecting the operating system includes: Connect the front-end receiving signals of the MVB to the MVB communication modules of the A system and the B system respectively through the FPGA; Connect the front-end sending signal of the MVB to the A system, mark the A system as the running system, switch the key module, display module and touch screen module to the A system, and control the signal sending of the entire train monitoring display through the A system.

6. The train monitoring display control system with automatic redundant switching according to claim 1, characterized in that: The step of obtaining and recording the heartbeat signals of the A system and the B system includes: C1: Obtain the failure rate G1 of the current train monitoring display and the failure rate G2 of the train monitoring display with the same number as the current train monitoring display, and obtain the dynamic transmission period DZ based on the formula DZ=CZ+CZ×(β×(1 / exp(α1×G1+α2×G2)-1)); where CZ is the standard transmission period, β is the amplitude adjustment coefficient of the exp() function, and the value range of β is (0,2); α1 and α2 are proportional adjustment coefficients, and α1+α2=1, α1≥α2; C2: Determine whether the dynamic transmission period DZ is greater than the maximum value of the safety period range; if yes, update the dynamic transmission period DZ using the maximum value of the safety period range; if no, jump to C3; C3: Determine whether the dynamic transmission period DZ is less than the minimum value of the safety period range; if yes, update the dynamic transmission period DZ using the minimum value of the safety period range; if no, do not update the dynamic transmission period DZ; C4: The CPUs of system A and system B respectively send heartbeat signals to FPGA through a GPIO based on a dynamic sending period DZ, and FPGA records the heartbeat signals of system A and system B.

7. The automatic redundant switching train monitoring display control system according to claim 6, characterized in that: The heartbeat signal detection of the A system includes: D1: Get the number of trains running YL1 of the train network at the current time, and the average value PYL1 of the number of trains running YL1 at the current time in the historical days; get the number of trains running YL2 of the current line at the current time, and the average value PYL2 of the number of trains running YL2 at the current time in the historical days; D2: The time difference determination threshold TZ is obtained based on the formula TZ = DZ × ZB × μ / exp(δ1 × YL1 / PYL1 + δ2 × YL2 / PYL2); wherein ZB is the reference multiple, μ is the amplitude adjustment coefficient of the exp() function, and the value range of μ is (0,2); δ1 and δ2 are proportional adjustment coefficients greater than 0, and δ1+δ2=1; D3: Determine whether the time difference determination threshold TZ is greater than the maximum value of the safety threshold range; if yes, use the maximum value of the safety threshold range to update the time difference determination threshold TZ; if no, jump to D4; D4: Determine whether the time difference determination threshold TZ is greater than the minimum value of the safety threshold range; if yes, update the time difference determination threshold TZ using the minimum value of the safety threshold range; if no, do not update the time difference determination threshold TZ; D5: Obtain the time difference between the time when the most recent heartbeat signal of system A is sent and the current time, and determine through FPGA whether the time difference is greater than the time difference determination threshold TZ; if yes, send a heartbeat signal abnormality signal of system A; if no, do nothing.

8. The automatic redundant switching train monitoring display control system according to claim 7, characterized in that: The redundant switching when the heartbeat signal of system A is abnormal includes: When an abnormal heartbeat signal of system A is received, system B is marked as the running system, and the key module, display module and touch screen module are switched to system B through FPGA, and the signal transmission of the entire train monitoring display is dominated by system B.

9. The train monitoring display control system with automatic redundant switching according to claim 1, characterized in that: The method of selecting a voice broadcast module through FPGA and controlling the backlight of a display screen includes: Acquire the voice broadcast signals of system A and system B, and send the voice broadcast signals to the corresponding voice decoding modules of system A and system B for decoding and output; Determine whether the heartbeat signal of system A is abnormal; if yes, connect the voice broadcast module to the voice decoding module of system B through the arbitration function of FPGA; if no, connect the voice broadcast module to the voice decoding module of system A through the arbitration function of FPGA; The voice broadcast module receives the output signal of the connected voice decoding module, and turns on the voice speaker for broadcasting according to the content contained in the output signal; Determine whether the heartbeat signal of system A is abnormal; if yes, receive the PWM value of system B, and FPGA adjusts the backlight brightness of the display through the PWM duty cycle FPGA; if no, receive the PWM value of system A, and FPGA adjusts the backlight brightness of the display through the PWM duty cycle FPGA.

10. A method for controlling a train monitoring display with automatic redundant switching, based on the operation of a train monitoring display control system with automatic redundant switching according to any one of claims 1 to 9, characterized in that: S1: Mark the display main control system as system A, and mark the display backup system as system B; configure the control modules of system A and system B respectively; S2: synchronize the MVB data of system A and system B through FPGA and select the running system, obtain and record the heartbeat signals of system A and system B; S3: Detect the heartbeat signal of system A. When the heartbeat signal of system A is abnormal, perform redundant switching, select the voice broadcast module through FPGA, and control the backlight of the display screen.

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