Device and process for preparing DLC (Diamond Like Carbon) coating on surface of electronic component

Abstract

The invention relates to an electronic component surface DLC (diamond-like carbon) coating preparation device and a preparation process thereof, and the preparation process comprises the following steps: S1, cleaning a substrate: placing an experimental substrate in a container of anhydrous alcohol or acetone, cleaning for 30-60 minutes by adopting an ultrasonic cleaning instrument, taking out the substrate, blow-drying the substrate by using compressed air, and placing for later use; s2, substrate installation: opening the vacuum chamber, placing the substrate on the sample platform, closing the door, and vacuumizing until the vacuum degree is lower than 3 * 10 <-4 > Pa; s3, ion cleaning: connecting a pulse direct-current power supply to the substrate, setting pulse parameters as follows:-500V, air pressure of 1.0 Pa and argon flow of 120sccm, and cleaning the sample for 20 minutes. The process aims at solving the problems that in the prior art, the resistivity of a DLC coating is difficult to control, the sputtering rate is low, the binding force with a substrate is insufficient, and the uniformity of the coating is poor. By optimizing sputtering process parameters, the method aims at achieving efficient and stable preparation of the high-resistivity DLC coating so as to meet the requirements of electronic components for high-performance surface protection materials.

Description

Technical Field

[0001] The invention relates to the technical field of electronic component surface treatment, and in particular to a device for preparing a DLC coating on the surface of an electronic component and a preparation process thereof. Background Art

[0002] DLC (diamond-like carbon) coating has a wide range of applications in the field of electronic component surface protection due to its unique physical and chemical properties, such as high hardness, excellent wear resistance, high resistivity, good chemical stability, etc. Especially on the surface of electronic components, DLC coating can provide wear resistance, corrosion resistance and electrical insulation protection, thereby extending the service life of components and improving their performance.

[0003] The application prospects of DLC coating on electronic components are very broad. First, due to the high resistivity of DLC coating, it can be used as an ideal dielectric material in the ultra-high frequency and microwave bands for the insulation protection of electronic devices. Secondly, the high hardness and wear resistance of DLC coating make it an ideal choice for improving the durability of electronic components, especially on parts that require frequent contact and mechanical operation. In addition, the chemical stability and corrosion resistance of DLC coating make it have potential application value in the field of protective films for electronic components. With the growing demand for high-performance materials in the electronics industry, the market demand for DLC coating is also expanding.

[0004] Although DLC coating has many advantages, there are still some technical challenges in its preparation process. First, controlling the resistivity of DLC coating is a technical problem, which requires precise adjustment of sputtering process parameters, such as working gas pressure, sputtering power and substrate DC negative bias, to obtain the ideal resistivity. Secondly, the bonding force between DLC coating and substrate is also a problem that needs attention in the preparation process, and the adhesion and stability of coating need to be improved by optimizing the process. In addition, the uniformity and repeatability of DLC coating are also problems that need to be solved in large-scale production to ensure the consistency of coating performance. Therefore, it is urgent to design a device for preparing DLC ​​coating on the surface of electronic components and its preparation process to solve the above problems. Summary of the invention

[0005] The purpose of the present invention is to provide a device for preparing a DLC coating on the surface of an electronic component and a preparation process thereof, so as to solve the above-mentioned deficiencies in the prior art.

[0006] In order to achieve the above object, the present invention provides the following technical solutions: A process for preparing a DLC coating on the surface of an electronic component comprises the following steps: S1. Cleaning of substrate: Place the experimental substrate in a container of anhydrous alcohol or acetone, clean it with an ultrasonic cleaning instrument for 30 to 60 minutes, take it out and blow dry the substrate with compressed air, and set it aside for use; S2. Substrate installation: Open the vacuum chamber, place the substrate on the sample platform, close the door and evacuate the chamber until the vacuum degree is lower than 3×10 -4 Pa; S3, ion cleaning: Use a pulsed DC power supply to connect to the substrate, set the pulse parameters: -460~-520V, gas pressure 1.0~1.2Pa, argon flow rate 100~130sccm, and clean the sample for 20~30 minutes; S4. Preparation of metal bonding layer: using multi-arc ion plating technology, the working gas is argon 100~130sccm, the working pressure is 1.0~1.2Pa, the arc current is set to 45~60A, the negative bias voltage is -100~-120V, the time is 8~15min, and a 480~510nm thick metal bonding layer is prepared; S5. Preparation of DLC nano-coating: four-target closed-field non-equilibrium composite magnetron sputtering technology was used, and the carbon target was connected to a high-power pulsed magnetron sputtering power supply; the high-power pulsed power supply parameters were set, the working gas was argon 60~90sccm, the working gas pressure was 0.6~1.0Pa, the sputtering power was set to 2~4kW, the negative bias voltage was -60~-70V, and the time was 50~70min, and a DLC nano-coating with a thickness of about 2.6~3.5mm was prepared; During the coating process, the working gas pressure, sputtering power and substrate DC negative bias are controlled to achieve efficient and stable preparation of high resistivity DLC coatings. After the DLC coating is prepared, post-processing steps are required to further improve the coating properties. Annealing treatment can be performed to reduce residual stress and increase the crystallinity and hardness of the coating. Optical treatment can also be performed to improve the optical transmittance and appearance of the coating. Steps to optimize sputtering process parameters: a. Determine the experimental goal: According to the required performance of the substrate and coating, how to improve the high resistivity DLC coating, determine the experimental goal; b. Design experimental scheme: According to the experimental objectives, design different experimental schemes, including different process parameters, gas flow, working gas pressure, sputtering power, substrate DC negative bias, and sputtering time; The working gas pressure is determined to be 0.6~1.0Pa: Through experimental comparison, it is found that when the gas pressure is lower than 0.6Pa, the plasma density is insufficient, resulting in reduced sputtering efficiency; when it is higher than 1.0Pa, the collision of gas molecules intensifies, the energy of particles sputtered from the carbon target decreases, affecting the density of the coating; The sputtering power is determined to be 2~4kW: High-power pulsed magnetron sputtering (HiPIMS) technology is used to excite the carbon target through short-time high-energy pulses with a pulse width of 50~200μs and a frequency of 50~500Hz. When the sputtering power is lower than 2kW, the kinetic energy of the carbon particles is insufficient, and the proportion of sp³ bonds in the coating decreases, resulting in a decrease in resistivity; when the power is higher than 4kW, the target material overheats and easily produces micro-arc discharge, introducing impurities; The negative bias voltage of the substrate is determined to be -60~-70V: the negative bias voltage affects the internal stress and bonding strength of the coating by regulating the energy of carbon particles bombarding the substrate; experiments show that when the bias voltage is too low, the bias voltage>-70V, the particle bombardment energy is insufficient, and the internal stress of the coating accumulates, resulting in a decrease in bonding strength; when the bias voltage is too high, the bias voltage<-60V, excessive ion bombardment is triggered, destroying the coating structure; The argon flow rate is determined to be 60~90sccm: the argon flow rate directly affects the plasma density and sputtering efficiency; when the flow rate is lower than 60sccm, the sputtering rate is too low; when the flow rate is higher than 90sccm, the collision frequency of gas molecules is too high and the carbon particle deposition rate decreases; c. Experimental operation: According to the experimental plan, carry out experimental operation and record the process parameters, substrate and coating performance data of each group of experiments; d. Data analysis: Statistic and analyze the experimental data to find out the influence of different process parameters on substrate and coating performance; e. Optimize process parameters: Determine a better combination of process parameters based on data analysis results to achieve better substrate and coating performance; f. Verification experiment: Conduct verification experiments on better process parameters to ensure the reliability and repeatability of the experimental results; f. Verification experiment: Conduct verification experiments on better process parameters to ensure the reliability and repeatability of the experimental results; S6. Sampling: After the coating preparation is completed, wait 30 to 60 minutes to take the sample.

[0007] In a preferred embodiment of the present invention, the surface coating of the electronic component is divided into a bonding layer and a DLC coating, and the bonding layer is used to improve the adhesion between the DLC coating and the substrate.

[0008] As a preferred solution of the present invention, in S4, the metal is a chromium (Cr) or titanium (Ti) layer, which uses a chromium or titanium target.

[0009] In a preferred embodiment of the present invention, the DLC coating is a high resistivity hydrogen-free DLC coating, which is sputtered using a carbon target.

[0010] As a preferred solution of the present invention, the method for preparing the DLC coating on the surface of electronic components is a high-power pulsed magnetron sputtering composite multi-arc ion plating technology, wherein the bonding layer uses multi-arc ion plating technology and the DLC coating uses high-power pulsed magnetron sputtering technology.

[0011] In the preferred embodiment of the present invention, the nano hardness of the coating is 15 to 30 GPa, H / E * (E * (effective Young's modulus) ≥ 0.1, uniformity ≥ 95%, H 3 / E *2 ≥0.3, membrane-base bonding strength (Rockwell indentation bonding strength ≥HF1), fracture toughness KIC ≥3MPa∙m 1 / 2 , friction coefficient ≤ 0.3, resistance ≥ 2MΩ.

[0012] In a preferred embodiment of the present invention, the substrate is a stainless steel block or a stainless steel sheet.

[0013] A device for preparing a DLC coating on the surface of an electronic component, further comprising a coating preparation device, wherein an arc source A, a magnetron target A, a magnetron target B, an arc source B, a magnetron target C, and a magnetron target D are sequentially arranged on the outside of the coating preparation device in a clockwise order; The outer walls of both sides of the coating preparation device are respectively provided with a working gas inlet pipe and an exhaust pipe; An observation window is provided on one side of the bottom of the coating preparation device; A turntable is arranged inside the coating preparation device, and a sample stage is arranged outside the turntable.

[0014] In a preferred embodiment of the present invention, the coating preparation device is a hexagonal structure.

[0015] As a preferred solution of the present invention, the sample stages are distributed in an equidistant ring around the turntable, and the number of the sample stages is four to eight.

[0016] In the above technical solution, the present invention provides a device for preparing a DLC coating on the surface of an electronic component and a preparation process thereof, and the beneficial effects are: A process for preparing a DLC coating on the surface of an electronic component, in particular, preparing a DLC coating with high resistance characteristics by combining multi-arc ion plating with high-power pulsed magnetron sputtering technology. Multi-arc ion plating technology can realize the rapid preparation of coatings on the surface of metal parts, and high-power pulsed magnetron sputtering technology can prepare high-surface quality, particle defect-free, high-performance nano coatings. The process aims to solve the problems of difficult resistivity control, low sputtering rate, insufficient bonding with the substrate, and poor coating uniformity of DLC coatings in the prior art. By optimizing the sputtering process parameters, the present invention aims to achieve efficient and stable preparation of high-resistivity DLC coatings to meet the needs of electronic components for high-performance surface protection materials. In addition, the present invention also aims to improve the adhesion and durability of the DLC coating to extend the service life of electronic components and improve their performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0018] Figure 1 A basic schematic diagram of a sputtering device provided for an electronic component surface DLC coating preparation device and a preparation process embodiment thereof according to the present invention.

[0019] Figure 2 A coating sample block diagram provided for an electronic component surface DLC coating preparation device and a preparation process embodiment of the present invention.

[0020] Figure 3 An HRC indentation bonding force diagram provided for an electronic component surface DLC coating preparation device and a preparation process embodiment of the present invention.

[0021] Figure 4 A micron indentation morphology diagram provided for a device for preparing a DLC coating on the surface of an electronic component and an embodiment of its preparation process according to the present invention.

[0022] Figure 5 A coating thickness measurement diagram provided for an electronic component surface DLC coating preparation device and a preparation process embodiment of the present invention.

[0023] Figure 6 A coating Raman curve diagram provided for a device for preparing a DLC coating on the surface of an electronic component and an embodiment of its preparation process according to the present invention.

[0024] 1. Coating preparation device; 2. Arc source A; 3. Magnetron target A; 4. Magnetron target B; 5. Arc source B; 6. Magnetron target C; 7. Magnetron target D; 8. Working gas inlet pipe; 9. Exhaust pipe; 10. Observation window; 11. Turntable; 12. Sample table. DETAILED DESCRIPTION

[0025] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined invention purpose, the specific implementation mode, structure, characteristics and effects of the present invention are described in detail below in combination with the accompanying drawings and preferred embodiments.

[0026] like Figure 1-6 As shown, a process for preparing a DLC coating on the surface of an electronic component provided by an embodiment of the present invention comprises the following steps: S1. Cleaning of substrate: Place the experimental substrate in a container of anhydrous alcohol or acetone, clean it with an ultrasonic cleaning instrument for 45 minutes, take it out and blow dry the substrate with compressed air, and set it aside for use; S2. Substrate installation: Open the vacuum chamber, place the substrate on the sample platform, close the door and evacuate the chamber until the vacuum degree is lower than 3×10 -4 Pa; S3, ion cleaning: connect the substrate with a pulsed DC power supply, set the pulse parameters: -500V, gas pressure 1.0Pa, argon flow rate 120sccm, and clean the sample for 20 minutes; S4. Preparation of metal bonding layer: using multi-arc ion plating technology, with working gas argon 120 sccm, working pressure 1.2 Pa, setting arc current 50A, negative bias voltage -100V, time 10min, to prepare a 500nm thick metal bonding layer; S5, DLC nano-coating preparation: four-target closed-field non-balanced composite magnetron sputtering technology was used, and the carbon target was connected to a high-power pulsed magnetron sputtering power supply; the high-power pulsed power supply parameters were set, the working gas was argon 80sccm, the working gas pressure was 0.8Pa, the sputtering power was set to 3kW, the negative bias voltage was -60V, and the time was 60min, and a DLC nano-coating with a thickness of about 3mm was prepared; S6. Sampling: Take samples 60 minutes after the coating preparation is completed.

[0027] In this embodiment, the following steps are included: S1. Cleaning of substrate: Place the experimental substrate in a container of anhydrous alcohol or acetone, clean it with an ultrasonic cleaning instrument for 45 minutes, take it out and blow dry the substrate with compressed air, and set it aside for use; S2. Substrate installation: Open the vacuum chamber, place the substrate on the sample platform, close the door and evacuate the chamber until the vacuum degree is lower than 3×10 -4 Pa; S3, ion cleaning: connect the substrate with a pulsed DC power supply, set the pulse parameters: -500V, gas pressure 1.0Pa, argon flow rate 120sccm, and clean the sample for 20 minutes; S4. Preparation of metal bonding layer: using multi-arc ion plating technology, with working gas argon 120 sccm, working pressure 1.2 Pa, setting arc current 50A, negative bias voltage -100V, time 10min, to prepare a 500nm thick metal bonding layer; S5, DLC nano-coating preparation: four-target closed-field non-balanced composite magnetron sputtering technology was used, and the carbon target was connected to a high-power pulsed magnetron sputtering power supply; the high-power pulsed power supply parameters were set, the working gas was argon 80sccm, the working gas pressure was 0.8Pa, the sputtering power was set to 3kW, the negative bias voltage was -60V, and the time was 60min, and a DLC nano-coating with a thickness of about 3mm was prepared; During the coating process, the working gas pressure, sputtering power and substrate DC negative bias are controlled to achieve efficient and stable preparation of high resistivity DLC coatings. After the DLC coating is prepared, post-processing steps are required to further improve the coating properties. Annealing treatment can be performed to reduce residual stress and increase the crystallinity and hardness of the coating. Optical treatment can also be performed to improve the optical transmittance and appearance of the coating. Steps to optimize sputtering process parameters: a. Determine the experimental goal: According to the required performance of the substrate and coating, how to improve the high resistivity DLC coating, determine the experimental goal; b. Design experimental scheme: According to the experimental objectives, design different experimental schemes, including different process parameters, gas flow, working gas pressure, sputtering power, substrate DC negative bias, and sputtering time; The working gas pressure is determined to be 0.6~1.0Pa: Through experimental comparison, it is found that when the gas pressure is lower than 0.6Pa, the plasma density is insufficient, resulting in reduced sputtering efficiency; when it is higher than 1.0Pa, the collision of gas molecules intensifies, and the energy of particles sputtered from the carbon target decreases, affecting the density of the coating. Therefore, controlling the gas pressure within the range of 0.6~1.0Pa can balance the plasma density and particle kinetic energy, and improve the uniformity and sputtering rate of the coating.

[0028] The sputtering power is determined to be 2~4kW: High-power pulsed magnetron sputtering (HiPIMS) technology is used to excite the carbon target through short-time high-energy pulses with a pulse width of 50~200μs and a frequency of 50~500Hz. When the sputtering power is lower than 2kW, the kinetic energy of the carbon particles is insufficient, the sp³ bond ratio in the coating decreases, and the resistivity decreases; when the power is higher than 4kW, the target material overheats and easily produces micro-arc discharge, introducing impurities. Through power optimization, the sp³ / sp² bond ratio can be increased (verified by Raman spectroscopy), significantly improving the resistivity (≥2MΩ); The negative bias voltage of the substrate is determined to be -60~-70V: the negative bias voltage affects the internal stress and bonding strength of the coating by regulating the energy of carbon particles bombarding the substrate; experiments show that when the bias voltage is too low, the bias voltage>-70V, the particle bombardment energy is insufficient, and the internal stress of the coating accumulates, resulting in a decrease in bonding strength; when the bias voltage is too high, the bias voltage<-60V, excessive ion bombardment is triggered, destroying the coating structure. The present invention reduces the internal stress of the coating by 30%~40% and improves the bonding strength to above HF1 level (Rockwell indentation test) by optimizing the negative bias voltage range; The argon flow rate is determined to be 60~90sccm: the argon flow rate directly affects the plasma density and sputtering efficiency; when the flow rate is lower than 60sccm, the sputtering rate is too low; when the flow rate is higher than 90sccm, the collision frequency of gas molecules is too high and the carbon particle deposition rate decreases; by optimizing the argon flow rate, the sputtering rate is increased by 20%~30%, and the coating thickness uniformity reaches ≥95%; Synergistic effect of high-power pulsed magnetron sputtering (HiPIMS): HiPIMS technology generates high-density plasma through high-energy short pulses, which gives carbon particles higher kinetic energy and ionization rate (≥80%, traditional magnetron sputtering is only 20%~30%). The high ionization rate promotes the formation of sp³ bonds (Raman spectrum ID / IG value ≤0.2), thereby significantly improving the resistivity and hardness of the coating (nanohardness 25~30GPa).

[0029] c. Experimental operation: According to the experimental plan, carry out experimental operation and record the process parameters, substrate and coating performance data of each group of experiments; d. Data analysis: Statistic and analyze the experimental data to find out the influence of different process parameters on substrate and coating performance; e. Optimize process parameters: Determine a better combination of process parameters based on data analysis results to achieve better substrate and coating performance; f. Verification experiment: Conduct verification experiments on better process parameters to ensure the reliability and repeatability of the experimental results; By optimizing the steps of sputtering process parameters, it was found that high resistivity DLC coating can be prepared efficiently and stably by controlling gas flow, working gas pressure, sputtering power, substrate DC negative bias and sputtering time.

[0030] Through orthogonal experimental design (L9 array), it was verified that sputtering power (3kW), gas pressure (0.8Pa), and negative bias voltage (-60V) are the optimal parameter combination. Under this combination, the average resistivity of the coating reached 2.8MΩ, the hardness was 28GPa, and the friction coefficient was 0.25 ( Figure 4 Micro-indentation morphology verification).

[0031] Compared with traditional DC magnetron sputtering, the sputtering rate of this process is increased by 40% (3μm / h vs. 2.1μm / h), and the coating defect density is reduced by 90% (no particle defects observed by SEM).

[0032] S6. Sampling: Take samples 60 minutes after the coating preparation is completed.

[0033] In this embodiment, the surface coating of the electronic component is divided into a bonding layer and a DLC coating, and the bonding layer is used to improve the adhesion between the DLC coating and the substrate.

[0034] Specifically, in S4, the metal is a chromium (Cr) or titanium (Ti) layer, which uses a chromium or titanium target.

[0035] Specifically, the DLC coating is a high resistivity hydrogen-free DLC coating, which is sputtered using a carbon target.

[0036] In this embodiment, the method for preparing the DLC coating on the surface of the electronic component is a high-power pulsed magnetron sputtering composite multi-arc ion plating technology, wherein the bonding layer uses the multi-arc ion plating technology, and the DLC coating uses the high-power pulsed magnetron sputtering technology.

[0037] In this embodiment, the nanohardness of the coating is 25 GPa, H / E * (E * (effective Young's modulus) ≥ 0.1, uniformity ≥ 95%, H 3 / E *2 ≥0.3, membrane-base bonding strength (Rockwell indentation bonding strength ≥HF1), fracture toughness KIC ≥3MPa∙m 1 / 2 , friction coefficient ≤ 0.3, resistance ≥ 2MΩ.

[0038] Specifically, the substrate is a stainless steel block or a stainless steel sheet, such as Figure 2 As shown, the left side is a stainless steel block and the right side is a stainless steel sheet.

[0039] like Figure 3 As shown, the test results show that the coating has no cracks or shedding, indicating that the bonding force between the coating and the substrate is strong (stainless steel block).

[0040] like Figure 4 As shown, the micro-indentation morphology test results are: left: 100g HV 3206.5; right: 200g HV 2832.4 (stainless steel block).

[0041] Take out the sample and use an ohmmeter to measure two random locations of the sample with a range of 4 MΩ (stainless steel sheet).

[0042] A device for preparing a DLC coating on the surface of an electronic component, comprising a coating preparation device 1, wherein an arc source A2, a magnetron target A3, a magnetron target B4, an arc source B5, a magnetron target C6, and a magnetron target D7 are sequentially arranged on the outer side of the coating preparation device 1 in a clockwise order; A working gas inlet pipe 8 and an exhaust pipe 9 are respectively provided on the outer walls of both sides of the coating preparation device 1. The exhaust pipe 9 is connected to a vacuum pump to evacuate the interior of the coating preparation device 1. The working gas can be supplied to the interior of the coating preparation device 1 through the working inlet pipe 8. The working gas is preferably argon gas. An observation window 10 is provided at one side of the bottom of the coating preparation device 1, through which the coating preparation status inside the coating preparation device 1 can be easily viewed; A turntable 11 is disposed inside the coating preparation device 1 , and a sample table 12 is disposed outside the turntable 11 , on which the substrate is placed.

[0043] Specifically, the coating preparation device 1 is a hexagonal structure.

[0044] Specifically, the sample stages 12 are distributed in a circular shape around the turntable 11 at equal intervals. The number of the sample stages 12 is four to eight, and the number of the sample stages 12 is preferably four.

[0045] The effects brought by the present invention compared with the prior art are as follows: Precise control of resistivity: In the prior art, the resistivity of DLC coatings is greatly affected by the fluctuation of sp² / sp³ bond ratio (usually 0.5~1.5MΩ). The present invention uses HiPIMS technology combined with optimized negative bias to increase the sp³ bond ratio to more than 70%, and the resistivity is stable ≥2MΩ ( Figure 6 Raman curve shows ID / IG value ≤ 0.20).

[0046] Breakthrough in membrane-based bonding strength: In traditional processes, the thickness of the bonding layer (such as the Cr layer) is difficult to accurately control (usually 300~600nm), resulting in fluctuations in bonding strength. The present invention uses multi-arc ion plating technology to prepare the bonding layer. Through the synergistic effect of arc current (45~60A) and negative bias voltage (-100~-120V), the thickness of the bonding layer is accurately controlled at 480~510nm, and the bonding strength is increased to HF2 level ( Figure 3 Indentation test showed no cracks).

[0047] Improved coating uniformity: In the prior art, the thickness deviation of DLC coating is often as high as ±15%. The present invention adopts an equidistant annular design ( Figure 1 ), combined with substrate rotation (5~10rpm) and multi-target coordinated sputtering, the coating thickness deviation is ≤±3% ( Figure 5 Thickness measurement data).

[0048] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technical personnel in this field can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present invention. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.

Claims

1. A process for preparing a DLC coating on the surface of an electronic component, characterized in that: The following steps are involved: S1. Cleaning of substrate: Place the experimental substrate in a container of anhydrous alcohol or acetone, clean it with an ultrasonic cleaning instrument for 30 to 60 minutes, take it out and blow dry the substrate with compressed air, and set it aside for use; S2. Substrate installation: Open the vacuum chamber, place the substrate on the sample platform, close the door and evacuate the chamber until the vacuum degree is lower than 3×10 -4 Pa; S3, ion cleaning: Use a pulsed DC power supply to connect to the substrate, set the pulse parameters: -460~-520V, gas pressure 1.0~1.2Pa, argon flow rate 100~130sccm, and clean the sample for 20~30 minutes; S4. Preparation of metal bonding layer: using multi-arc ion plating technology, the working gas is argon 100~130sccm, the working pressure is 1.0~1.2Pa, the arc current is set to 45~60A, the negative bias voltage is -100~-120V, the time is 8-15min, and a 480~510nm thick metal bonding layer is prepared; S5. Preparation of DLC nano-coating: four-target closed-field non-equilibrium composite magnetron sputtering technology was used, and the carbon target was connected to a high-power pulsed magnetron sputtering power supply; the high-power pulsed power supply parameters were set, the working gas was argon 60-90sccm, the working gas pressure was 0.6~1.0Pa, the sputtering power was set to 2-4kW, the negative bias voltage was -60~-70V, the time was 50~70min, and a DLC nano-coating with a thickness of about 2.6~3.5mm was prepared; The sputtering process parameters include gas flow, working gas pressure, sputtering power, substrate DC negative bias voltage, and sputtering time; The working gas pressure is determined to be 0.6-1.0Pa; the sputtering power is determined to be 2-4kW; the substrate negative bias voltage is determined to be -60~-70V; the argon gas flow rate is determined to be 60~90sccm; S6. Sampling: After the coating preparation is completed, wait 30 to 60 minutes to take the sample.

2. A process for preparing a DLC coating on the surface of an electronic component according to claim 1, characterized in that: The surface coating of electronic components is divided into a bonding layer and a DLC coating. The bonding layer is used to improve the adhesion between the DLC coating and the substrate.

3. A process for preparing a DLC coating on the surface of an electronic component according to claim 2, characterized in that: In S4, the metal is a chromium (Cr) or titanium (Ti) layer, which uses a chromium or titanium target.

4. A process for preparing a DLC coating on the surface of an electronic component according to claim 2, characterized in that: The DLC coating is a high resistivity hydrogen-free DLC coating, which is sputtered using a carbon target.

5. A process for preparing a DLC coating on the surface of an electronic component according to claim 4, characterized in that: The preparation method of DLC coating on the surface of electronic components is high-power pulsed magnetron sputtering composite multi-arc ion plating technology, in which the bonding layer uses multi-arc ion plating technology and the DLC coating uses high-power pulsed magnetron sputtering technology.

6. A process for preparing a DLC coating on the surface of an electronic component according to claim 1, characterized in that: Nanohardness of coating 15~30GPa, H / E * ≥0.1, uniformity ≥95%, H 3 / E *2 ≥0.3, membrane-base bonding strength, fracture toughness KIC≥3MPa∙m 1 / 2 , friction coefficient ≤ 0.3, resistance ≥ 2MΩ.

7. A process for preparing a DLC coating on the surface of an electronic component according to claim 1, characterized in that: The substrate is a stainless steel block or a stainless steel sheet; During the coating process, the working gas pressure, sputtering power and substrate DC negative bias are controlled to achieve efficient and stable preparation of high resistivity DLC coatings. After the DLC coating is prepared, post-processing steps are required to further improve the coating properties. Annealing treatment can be performed to reduce residual stress and increase the crystallinity and hardness of the coating. Optical treatment can also be performed to improve the optical transmittance and appearance of the coating. Steps to optimize sputtering process parameters: a. Determine the experimental goal: According to the required performance of the substrate and coating, how to improve the high resistivity DLC coating, determine the experimental goal; b. Design experimental scheme: According to the experimental objectives, design different experimental schemes, including different process parameters, gas flow, working gas pressure, sputtering power, substrate DC negative bias, and sputtering time; c. Experimental operation: According to the experimental plan, carry out experimental operation and record the process parameters, substrate and coating performance data of each group of experiments; The sputtering process parameters include gas flow, working gas pressure, sputtering power, substrate DC negative bias voltage, and sputtering time; The working gas pressure is determined to be 0.6~1.0Pa: Through experimental comparison, it is found that when the gas pressure is lower than 0.6Pa, the plasma density is insufficient, resulting in reduced sputtering efficiency; when it is higher than 1.0Pa, the collision of gas molecules intensifies, the energy of particles sputtered from the carbon target decreases, affecting the density of the coating; The sputtering power is determined to be 2~4kW: High-power pulsed magnetron sputtering (HiPIMS) technology is used to excite the carbon target through short-time high-energy pulses with a pulse width of 50~200μs and a frequency of 50~500Hz. When the sputtering power is lower than 2kW, the kinetic energy of the carbon particles is insufficient, and the proportion of sp³ bonds in the coating decreases, resulting in a decrease in resistivity; when the power is higher than 4kW, the target material overheats and easily produces micro-arc discharge, introducing impurities; The negative bias voltage of the substrate is determined to be -60~-70V: the negative bias voltage affects the internal stress and bonding strength of the coating by regulating the energy of carbon particles bombarding the substrate; experiments show that when the bias voltage is too low, the bias voltage>-70V, the particle bombardment energy is insufficient, and the internal stress of the coating accumulates, resulting in a decrease in bonding strength; when the bias voltage is too high, the bias voltage<-60V, excessive ion bombardment is triggered, destroying the coating structure; The argon flow rate is determined to be 60~90sccm: the argon flow rate directly affects the plasma density and sputtering efficiency; when the flow rate is lower than 60sccm, the sputtering rate is too low; when the flow rate is higher than 90sccm, the collision frequency of gas molecules is too high and the carbon particle deposition rate decreases; d. Data analysis: Statistic and analyze the experimental data to find out the influence of different process parameters on substrate and coating performance; e. Optimize process parameters: Determine a better combination of process parameters based on data analysis results to achieve better substrate and coating performance; f. Verification experiment: Verification experiments are carried out on more optimal process parameters to ensure the reliability and repeatability of the experimental results.

8. The process for preparing a DLC coating on the surface of an electronic component according to claim 1, characterized in that: It also includes a coating preparation device (1), wherein an arc source A (2), a magnetron target A (3), a magnetron target B (4), an arc source B (5), a magnetron target C (6), and a magnetron target D (7) are arranged on the outer side of the coating preparation device (1) in a clockwise order. The coating preparation device (1) is provided with a working gas inlet pipe (8) and an exhaust pipe (9) on both side outer walls respectively; The coating preparation device (1) is provided with an observation window (10) on one side of the bottom; A turntable (11) is arranged inside the coating preparation device (1), and a sample table (12) is arranged outside the turntable (11).

9. A process for preparing a DLC coating on the surface of an electronic component according to claim 8, characterized in that: The coating preparation device (1) has a hexagonal structure.

10. The process for preparing a DLC coating on the surface of an electronic component according to claim 8, characterized in that: The sample stages (12) are distributed in an equidistant ring around the turntable (11), and the number of the sample stages (12) is four to eight.

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