Quantitative characterization method of residual stress and bonding stress amplification structure thereof

Abstract

The invention discloses a quantitative characterization method of residual stress and a bonding stress amplification structure thereof, and relates to the technical field of packaging, and the method comprises the following steps: S1, stripping a blue film on the surface of a bare silicon wafer; s2, characterizing the bare silicon wafer processed in the step S1 through selected area measurement of Raman spectrum; s3, the bare silicon wafer processed in the S1 is adsorbed on a dispensing table through air pressure, adhesive is used for dispensing according to a compact rectangular-ambulatory-plane pattern, and the thickness of an adhesive layer is increased; s4, after dispensing is completed, an adhesive layer is formed on the bare silicon wafer, and curing is performed on the adhesive layer and the adhesive substrate to obtain an adhesive stress amplification structure; s5, characterizing the bare silicon wafer of the bonding stress amplification structure through selected area measurement of the Raman spectrum; and S6, obtaining a Raman spectrum frequency shift value delta wj, and further calculating to obtain a residual stress value borne by the bare silicon wafer. The invention effectively solves the problem that the conventional chip is difficult to carry out accurate Raman spectrum characterization due to the limitation of size and stress level.

Description

Technical Field

[0001] The invention relates to the technical field of military ceramic packaging and metal packaging, and in particular to a quantitative characterization method for residual stress and a bonding stress amplification structure thereof. Background Art

[0002] Digital control reference voltage source is an extremely important component of contemporary analog integrated circuits. It provides reference voltage for series voltage regulator circuits, A / D and D / A converters, and is also the voltage regulator power supply or excitation source for most sensors. With the high-resolution requirements of new-generation strategic weapons, radars, electronic warfare equipment, and the large-scale application of high-precision A / D and D / A in the next generation of equipment, the demand for such devices will also increase.

[0003] As the initial reference point of the accuracy of the high-precision analog signal processing system, the reference voltage source has stringent initial accuracy requirements and requires that its voltage remain stable when the load current, temperature and time change. However, in the process of developing such integrated circuit products, it was found that the selection of different adhesives in the die bonding process would lead to large differences in the output voltage changes of the device. Analysis and speculation indicate that the main reason is that the different characteristics of the adhesives cause different stresses to be generated at the bonding interface after curing, which causes differences in the deformation of the silicon chip, and ultimately reflects the differences in the output voltage changes of the device. This stress generated at the bonding interface after curing is usually called bonding residual stress, which is the result of thermal mismatch between chip-adhesive-substrate. In essence, it is caused by the volume shrinkage of the adhesive when it changes from an uncured small molecule state to a cross-linked macromolecule. It occurs during the curing of the adhesive and during the cooling period from the curing temperature to room temperature, and usually causes the chip to warp inward from the four corners. Therefore, quantitative characterization of the residual stress of different adhesives in different interface environments is crucial to the development of packaging processes for products such as reference voltage sources. However, at this stage, the industry's consideration of the performance of adhesives used for bonding semiconductor integrated circuits has not yet involved quantitative information on residual stress, and it is impossible to quantitatively compare the differences in residual stress between different bonding systems, different bonding materials and different curing processes.

[0004] Raman spectroscopy is a high-resolution, non-destructive, and fast characterization method that is often used to measure material stress. This method is based on the principle that Raman spectroscopy can be affected by the residual stress inside the material, which is manifested as a frequency shift in the spectrum of light incident on the sample being measured. Then, the quantitative data of the residual stress at a specific location of the material can be obtained through theoretical calculation. When this method is applied to the field of microelectronics, due to the small size of the chip, it is difficult for the internal residual stress to form a more obvious material deformation, which makes it difficult to capture the problem of such deformation through the frequency shift of the Raman spectrum.

[0005] Therefore, a quantitative characterization method of residual stress and its bonding stress amplification structure are proposed. Summary of the invention

[0006] The purpose of the present invention is to provide a quantitative characterization method for residual stress and its bonding stress amplification structure, which avoids the influence of factors such as small chip size, non-uniform surface material, and small chip deformation caused by residual stress in conventional integrated circuits on the residual stress characterization, so as to overcome the shortcomings of the prior art that the chip bonding residual stress is difficult to accurately characterize.

[0007] In order to achieve the above object, the present invention provides a method for quantitatively characterizing residual stress, comprising the following steps: S1, peeling off the blue film on the surface of the bare silicon wafer; S2, the characteristic Raman spectrum of the material can be affected by the residual stress inside the material, which is manifested as the frequency shift of the spectrum of the light incident on the sample being tested, so that the residual stress value at a specific location can be obtained by measuring the selected area of ​​the material; the bare silicon wafer processed by S1 is characterized by the selected area measurement of the Raman spectrum; S3, using the bare silicon wafer processed in S1 as the substrate, adsorbing it on the dispensing table by air pressure, dispensing the adhesive in a compact U-shaped pattern, and increasing the thickness of the adhesive layer; S4, after the dispensing is completed, an adhesive layer is formed on the bare silicon wafer, and a bonding substrate is pressed on the adhesive layer and then cured to obtain an adhesive stress amplification structure; S5, characterizing the bare silicon wafer of the bonding stress amplification structure by selectively measuring the Raman spectrum, and recording the peak value of the Raman spectrum curve obtained by testing the bare silicon wafer after bonding; S6: The peak value of the Raman spectrum curve obtained in S5 minus the peak value of the Raman spectrum curve obtained in S2 to obtain the Raman spectrum frequency shift value. Dwj , according to the obtained Raman spectrum frequency shift value Dwj The residual stress value of the bare silicon wafer is calculated.

[0008] Furthermore, the residual stress value calculation formula is: s =-435 Dwj ; in s is the residual stress value, Dwj is the Raman spectrum frequency shift value; According to this formula and S6, the Raman spectrum frequency shift values ​​of three points can be obtained Dwj Then the residual stress values ​​of the three points are obtained s .

[0009] Furthermore, in order to increase the thickness of the glue layer as much as possible while ensuring the consistency of the thickness of the glue layer in S3, the specific steps are: placing four steel balls with a diameter of 0.5 mm at the four corners of the glue spotting area; increasing the glue spotting height and reducing the marking speed.

[0010] Furthermore, in S3, the glue dispensing area is set to be 500 μm away from the edge of the bare silicon wafer. In order to prevent glue overflow from the side of the chip and affect the stress distribution of the bare silicon wafer, the glue dispensing area is set to be 500 μm away from the edge of the bare silicon wafer.

[0011] Furthermore, the adhesive needs to be taken out from a -40°C environment and left to stand at room temperature for 30 minutes before use.

[0012] Furthermore, the thickness of the bare silicon wafer is 50 μm, so that the toughness of the bare silicon wafer is increased as much as possible, which is more conducive to the bare silicon wafer producing obvious deformation when subjected to the residual stress of the adhesive.

[0013] Furthermore, the bonding substrate described in S3 is made of sapphire glass; there are two main purposes: first, to ensure the flatness of the adhesive layer and the consistency of the thickness of the adhesive layer, to avoid abnormal deformation of the bare silicon wafer surface due to the unevenness of the adhesive layer interface, thereby affecting the test results; second, to make the bonding effect of the structure visible, that is, after the bonding is completed, the bonding void rate of the adhesive can be directly observed through the bottom side of the bonding substrate. The adhesive is consistent with the mature epoxy adhesive products commonly used in monolithic integrated circuit packaging to ensure that the test results have effective guiding significance for actual production.

[0014] On the other hand, the present invention further provides a bonding stress amplification structure, comprising a bonding substrate, an adhesive layer is disposed on the bonding substrate, a material to be bonded is disposed on the adhesive layer, and the material to be bonded is a bare silicon wafer.

[0015] Furthermore, the thickness of the bare silicon wafer is 1 / 4 of the thickness of a conventional chip, and the size of the bare silicon wafer is 2 to 3 times the size of a conventional chip.

[0016] Furthermore, the adhesive is an epoxy adhesive.

[0017] Compared with the prior art, the present invention has the following beneficial technical effects: The present invention provides a quantitative characterization method for residual stress. In order to overcome the limitations of traditional characterization methods in chip-level residual stress measurement, especially for those microchips that are difficult to effectively characterize by conventional methods (such as Raman spectroscopy) due to complex surface material composition, small size, and relatively weak bonding residual stress, the present invention cleverly uses large-sized thinned bare silicon wafers as an alternative to the material to be bonded. By bonding the large-sized thinned bare silicon wafers with adhesives commonly used in online products, the large-sized characteristics of the bare silicon wafers are used to achieve the proportional amplification effect of chip-level bonding residual stress. This strategy not only significantly improves the detection sensitivity of residual stress, but also makes the weak stress signals that were originally difficult to capture clearly visible, thereby effectively solving the problem that conventional chips are difficult to accurately characterize with Raman spectroscopy due to size and stress level limitations.

[0018] This method also fully considers various variables in the bonding process. By precisely controlling the selection of adhesives and the thickness of the bonding layer, it ensures the uniformity of bonding quality and residual stress distribution, further improving the accuracy and reliability of the characterization results.

[0019] The quantitative characterization method of residual stress provided by the present invention can be applied to the consideration and evaluation of various adhesives in terms of residual stress, and can help guide the optimization of the curing temperature curves of various adhesives, effectively guide the selection of adhesives in the packaging process of related products, and has guiding significance for the development of packaging processes for residual stress-sensitive integrated circuit products (such as reference voltage source devices, high-precision MEMS devices, etc.). It can also help evaluate and optimize the process technology capabilities of electronic packaging processes, provide meaningful theoretical basis support for the quantitative characterization of electronic packaging reliability, and provide important theoretical support for in-depth understanding of bonding mechanisms and circuit failure mechanisms.

[0020] The present invention provides a bonding stress amplification structure, which restores the assembly structure involved in the chip bonding process in the microelectronics field, effectively proportionally amplifies the residual stress value generated by bonding, and improves the measurability of the residual stress. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 The figure is a flow chart of a method for quantitatively characterizing residual stress in an embodiment of the present invention.

[0022] Figure 2 Schematic diagram comparing the optimization effects of the wafer bonding process of a quantitative characterization method of residual stress in an embodiment of the present invention.

[0023] Figure 3 Schematic diagram of adhesive layer thickness consistency processing in a method for quantitative characterization of residual stress in an embodiment of the present invention.

[0024] Figure 4A schematic diagram of test site information for Raman spectroscopy characterization of a bare silicon wafer before bonding in a method for quantitative characterization of residual stress in an embodiment of the present invention.

[0025] Figure 5 A schematic diagram of test site information for Raman spectroscopy characterization of bare silicon wafers after bonding in a method for quantitative characterization of residual stress in an embodiment of the present invention.

[0026] Figure 6 Schematic diagram of the bonding stress amplification structure in an embodiment of the present invention.

[0027] In the figure, 1. bonding substrate; 2. adhesive layer; 3. bare silicon wafer; 4. steel ball. DETAILED DESCRIPTION

[0028] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0029] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0030] Example 1 See also Figure 1 A quantitative characterization method for residual stress is proposed. Based on the fact that bonding residual stress is affected by factors such as the size and thickness of the material to be bonded, the inherent characteristics of the adhesive, the thickness of the bonding layer and the curing curve, a pre-processed large-size sapphire glass is used as the bonding substrate 1, a large-size thinned bare silicon wafer 3 is used as the material to be bonded, and the adhesive commonly used in online products is used to bond them to achieve the proportional amplification of chip-level bonding residual stress. The specific steps are as follows: S1, peel off the blue film on the surface of the bare silicon wafer 3, and the size of the bare silicon wafer 3 is 2 to 3 times the size of a conventional chip, and the thickness of the bare silicon wafer 3 is 1 / 4 of the thickness of a conventional chip, and the thickness of the bare silicon wafer 3 is 50μm, in order to increase the toughness of the bare silicon wafer as much as possible, which is more conducive to its obvious deformation when subjected to the residual stress of the adhesive, because it can be known from the mathematical relationship of the bonding residual stress that the bonding residual stress is proportional to the thickness of the glue layer and is proportional to the chip size (bonding area). Therefore, the size of the bare silicon wafer is proportionally enlarged to 2 to 3 times the size of the conventional chip.

[0031] S2, the bare silicon wafer 3 processed by S1 is characterized by the selected area measurement of Raman spectrum. The peak values ​​of the Raman spectrum curves of the three test points of the bare silicon wafer 3 are consistent. The peak value of the obtained Raman spectrum curve is recorded as w j0 ; S3, using the bare silicon wafer 3 processed in S1 as a substrate, adsorbing it on the dispensing table by air pressure, dispensing adhesive in a compact U-shaped pattern, and increasing the thickness of the adhesive layer; S4, after the dispensing is completed, an adhesive layer 2 is formed on the bare silicon wafer 3, and the adhesive substrate 1 is pressed on the adhesive layer 2 and then cured to obtain an adhesive stress amplification structure. In order to ensure the flatness of the adhesive layer 2 and the consistency of the adhesive layer thickness, and to avoid abnormal deformation of the surface of the bare silicon wafer 3 due to the unevenness of the adhesive layer 2, thereby affecting the test results, the adhesive substrate 1 uses sapphire glass; and the sapphire glass can make the bonding effect visible, that is, after the bonding is completed, the bonding void rate of the adhesive can be intuitively observed through the bottom side of the bonding substrate 1.

[0032] S5, characterizing the bare silicon wafer 3 of the bonding stress amplification structure by selectively measuring the Raman spectrum, and recording the peak values ​​of the Raman spectra of the three test points of the bare silicon wafer 3 after bonding as w jA , w jB , w jC ; S6, by w j(A,B,C) - w j0 Obtain the Raman spectrum frequency shift values ​​of three test points Dwj , according to formula (1): s =-435 Dwj ; (1) The residual stress value of the bare silicon wafer 3 treated by S3 is calculated s; It can also be calculated according to formula (2): Δwj=-0.0022σ ; (2) The residual stress value of the bare silicon wafer 3 treated by S3 is calculated s .

[0033] Based on the testing mechanism and conditions of Raman spectroscopy, there are two main testing methods on the market: point scanning and surface scanning. Point scanning is used to detect the Raman spectrum curve of a certain area of ​​the material. Based on the finite element simulation of chip bonding residual stress, it can be seen that the bonding residual stress transmitted to the chip is usually the largest at the four corners, and the stress is the smallest at the position closer to the center of the bare silicon wafer. Therefore, point scanning is more suitable for the characterization of the unevenly distributed residual stress on the surface of the bare silicon wafer. The experimental results of Raman spectroscopy are a series of spectral graphs. The frequency shift of the Raman peak can be obtained by analysis. If the Raman wave number is wj0 (j=l, 2, 3) when there is no strain, and the Raman wave number is wj when there is strain, then the frequency shift Δwj of the Raman wave can be calculated by the following formula: ; For mechanical analysis of silicon chip materials in the field of microelectronics, it is necessary to establish a connection between the frequency shift data of the Raman spectrum test and the stress / strain in the silicon material, so it is necessary to solve the eigenvalue λj through the dynamic Secular equation. By consulting the data, silicon is a diamond-like material, assuming that the sample is under unidirectional stress along a single direction. s state, according to Hooke's law e 11 = S 11 s , e 22 = e 33 = S 12 s ( S ij represents the elastic compliance tensor of silicon), from which the following formula is obtained: ; For silicon chips, the phonon deformation voltage of silicon is p =-1.85w0 2 , q = -2.31 w0 2 , the elastic compliance tensor of silicon S 11 =7.68×10 -12 Pa -1 , S 12 =2.14×10 -12 Pa-1 , substituting into the above formula, we can get the following formula: s =-435 Dwj (1) or Δwj=-0.0022σ ; (2); And through the test and calculation results, the direction of the force exerted on the silicon chip can also be obtained: that is, when the Raman frequency shift is positive, it corresponds to compressive stress, and vice versa, it corresponds to tensile stress.

[0034] The adhesive is consistent with the mature epoxy adhesive products commonly used in monolithic integrated circuit packaging to ensure that the test results have effective guiding significance for actual production. The bare silicon wafer 3 is selected as the bonding material, mainly to meet the Raman spectroscopy test requirements and keep consistent with the actual chip main material.

[0035] In the preferred embodiment of the present invention, the purchased bare wafer is first thinned to 50 μm by a thinning dicing machine. The dicing size needs to take into account the size of the purchased glass substrate (29×29 mm) and the glue dispensing of the automatic die bonding machine and the width of the overflow glue around the chip after bonding (1~2 mm), so the dicing size of the bare silicon wafer is selected to be 25×25 mm; Because the bare silicon wafer 3 is thin and large in size, it cannot be removed by an automatic wafer picker. It is necessary to slowly lift the corners from the blue film with pointed tweezers, and then slowly peel off the blue film with tweezers; and characterize the bare silicon wafer before bonding by selective measurement of Raman spectroscopy. Three test points need to be selected for the test. The specific locations are as follows Figure 4 As shown in FIG. 1 , the peak values ​​of the Raman spectrum curves of the three test points (A, B, C) of the bare silicon wafer 3 are as follows: w j0 The peak value of the Raman spectrum curve is recorded as w j0 ; Take the adhesive out of the -40℃ environment and let it stand at room temperature for 30 minutes before installing it on the dispensing machine to start the chip bonding work. Because the bare silicon chip is large in size and has good toughness, if the conventional chip bonding sequence is used, first dispensing glue on the substrate, then sucking up the chip and pressing it on the glue layer, it will cause obvious depressions at the contact point between the bare silicon chip 3 and the nozzle after the glue is cured (see Figure 2), so by changing the dispensing order, the bare silicon wafer is used as the base, the processed bare silicon wafer 3 is adsorbed on the dispensing table by air pressure, and then the dispensing is performed in a compact U-shaped pattern. And because the bare silicon wafer 3 is only 50μm thick, in order to prevent the glue from overflowing from the side of the chip and affecting the stress distribution of the bare silicon wafer 3, the dispensing area is set to be 500μm away from the edge of the bare silicon wafer 3. In order to increase the thickness of the glue layer as much as possible while ensuring the consistency of the glue layer thickness, four steel balls 4 with a diameter of 0.3mm are placed at the four corners of the dispensing area (see Figure 3 ) and appropriately increase the dispensing height and appropriately reduce the scribing speed. After dispensing, the glass substrate is picked up by the robot arm and pressed on the glue layer. The downward pressure dwell time of the nozzle needs to be appropriately increased to allow the colloid to flow fully. The bonded sample is placed in a high-temperature oven for curing process to complete the bonding stress amplification structure.

[0036] The bare silicon wafer after bonding is characterized by selective measurement of Raman spectroscopy. Three test points need to be selected for the test. The specific locations are as follows: Figure 5 As shown, the peak value of the Raman spectrum of the bare silicon wafer after bonding is recorded as w jA , w jB , w jC , then you can w j(A,B,C) - w j0 The Raman spectrum frequency shift values ​​of the three test points are obtained. According to the above formula (1), the corresponding residual stress value and direction can be obtained by calculation.

[0037] The principle of Raman spectroscopy is that the characteristic Raman spectrum of a material can be affected by the residual stress inside the material, which is manifested as a frequency shift in the spectrum of light incident on the sample being tested. Therefore, the residual stress value at a specific location can be obtained by measuring a selected area of ​​the material.

[0038] Example 2 See also Figure 6The present invention also provides a bonding stress amplification structure, including a bonding substrate 1, an adhesive layer 2 is arranged on the bonding substrate 1, and a material to be bonded is arranged on the adhesive layer 2, and the material to be bonded is a bare silicon wafer 3. The thickness of the bare silicon wafer 3 is 1 / 4 of the thickness of a conventional chip, the size of the bare silicon wafer 3 is 2 to 3 times the size of a conventional chip, and the adhesive is an epoxy adhesive. Based on the fact that the bonding residual stress is affected by factors such as the size and thickness of the material to be bonded, as well as the inherent characteristics of the adhesive, the thickness of the bonding layer and the curing curve, a pre-processed large-size sapphire glass window is used as the bonding substrate 1, and a large-size thinned bare silicon wafer 3 is used as the material to be bonded, and the adhesive commonly used in online products is used to bond them, thereby achieving proportional amplification of chip-level bonding residual stress, and effectively solving the problem that conventional chips are difficult to characterize by Raman spectroscopy due to complex surface material composition, small size, and small bonding residual stress. A chip-level bonding residual stress amplification structure is used to simulate the bonding structure of the chip, and the Raman spectroscopy method is used to select the structure for detection. Then, the precise value of the bonding residual stress can be calculated by using the mathematical relationship between the Raman spectrum frequency shift value before and after the material bonding and the stress / strain in the material. This effectively solves the problem of the difficulty in accurately characterizing the chip bonding residual stress.

[0039] The key to the residual stress amplification effect of the bonding stress amplification structure lies in the following three points: 1. Compared with the common ceramic and metal substrates in the field of microelectronics, the wettability of the glass substrate with the glue is worse, which leads to the glue being more conducive to lateral shrinkage during the curing process, and the generated bonding residual stress is also correspondingly larger; 2. By reducing the thickness of the bare silicon wafer to about 1 / 4 of the thickness of the conventional chip, reaching 50μm, in order to increase the toughness of the bare silicon wafer as much as possible, it is more conducive to its obvious deformation when subjected to the residual stress of the adhesive; 3. Because it can be known from the mathematical relationship of the bonding residual stress that the bonding residual stress is proportional to the thickness of the adhesive layer and the chip size (bonding area). Therefore, by proportionally expanding the size of the bare silicon wafer 3 to 2~3 times the size of the conventional chip, reaching 25mm×25mm, and by optimizing the bonding process technology, the thickness of the adhesive layer is increased as much as possible under the premise of ensuring the consistency of the adhesive layer thickness and manufacturability.

[0040] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essence of the present invention. In the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other arbitrarily.

Claims

1. A method for quantitative characterization of residual stress, characterized in that: The following steps are involved: S1, peeling off the blue film on the surface of the bare silicon wafer (3); S2, characterizing the bare silicon wafer (3) processed by S1 through selected area measurement of Raman spectroscopy, and recording the peak value of the obtained Raman spectral curve; S3, adsorbing the bare silicon wafer (3) processed by S1 onto the dispensing table by air pressure, dispensing adhesive in a compact U-shaped pattern, and increasing the thickness of the adhesive layer; S4, after the dispensing is completed, an adhesive layer (2) is formed on the bare silicon wafer (3), and a bonding substrate (1) is pressed on the adhesive layer (2) and then cured to obtain an adhesive stress amplification structure; S5, characterizing the bare silicon wafer (3) of the bonding stress amplification structure by selectively measuring the Raman spectrum, and recording the peak value of the Raman spectrum curve obtained by testing the bare silicon wafer (3) after bonding; S6: The peak value of the Raman spectrum curve obtained in S5 minus the peak value of the Raman spectrum curve obtained in S2 to obtain the Raman spectrum frequency shift value. Δwj , according to the obtained Raman spectrum frequency shift value Δwj The residual stress value of the bare silicon wafer (3) is calculated.

2. A quantitative characterization method for residual stress according to claim 1, characterized in that: The residual stress value calculation formula is: σ =-435 Δwj ； in σ is the residual stress value, Δwj is the Raman spectrum frequency shift value.

3. The method for quantitatively characterizing residual stress according to claim 1, characterized in that: The specific steps of increasing the thickness of the glue layer in S3 are: placing four steel balls (4) with a diameter of 0.5 mm at the four corners of the glue spotting area and then performing glue spotting, and during the glue spotting process, increasing the glue spotting height and reducing the marking speed.

4. The method for quantitatively characterizing residual stress according to claim 2, characterized in that: In S3, the glue dispensing area is set to be 500 μm away from the edge of the bare silicon wafer (3).

5. The method for quantitatively characterizing residual stress according to claim 1, characterized in that: The adhesive must be taken out from a -40°C environment before use and allowed to stand at room temperature for 30 minutes.

6. A quantitative characterization method for residual stress according to claim 1, characterized in that: The size of the bonding substrate (1) is larger than the size of the bare silicon wafer (3).

7. A quantitative characterization method for residual stress according to claim 1, characterized in that: The bonding substrate (1) in S3 is made of sapphire glass.

8. The bonding stress amplification structure according to any one of claims 1 to 7, characterized in that: It comprises a bonding substrate (1), an adhesive layer (2) is provided on the bonding substrate (1), a material to be bonded is provided on the adhesive layer (2), and the material to be bonded is a bare silicon wafer (3).

9. The bonding stress amplification structure according to claim 8, characterized in that: The thickness of the bare silicon wafer (3) is 1 / 4 of the thickness of a conventional chip, and the size of the bare silicon wafer (3) is 2 to 3 times the size of a conventional chip.

10. The bonding stress amplification structure according to claim 8, characterized in that: The adhesive is an epoxy adhesive.

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