Current test circuit and test method

Abstract

The invention belongs to the technical field of integrated circuits, and particularly relates to a current test circuit and a test method. The current test circuit comprises a current source which is provided with a current output end capable of adjusting the magnitude of output current, and the current output end is used for being connected with a tested pin of a tested chip; the in-phase input end of the comparator is used for being connected with preset reference voltage, the reverse input end of the comparator is used for being connected with the tested pin, and the output end of the comparator is a testing end. The current value of the tested pin is determined by adjusting the magnitude of the current output by the current source and recording the overturning point of the output signal of the comparator, analog quantity test is converted into function test, and the current value of the tested pin of the tested chip can be conveniently detected.

Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a current testing circuit and a testing method. Background Art

[0002] Measuring current by applying voltage is a common method in chip analog quantity testing. It generally uses PMU (precision measurement unit) to apply the required voltage to the chip pins and measure the corresponding current through PMU. For example, if you need to measure the current generated by the chip pin at 0.5V, use PMU to apply 0.5V voltage to the chip pin and measure the current of the pin at this time.

[0003] Since the above method needs to apply voltage once and measure current once, it is not a big problem when measuring a small amount of current on a single pin of a single chip. However, when it is necessary to measure tens of thousands or even millions of current units, since the PMU measures analog quantities, it will obviously be time-consuming and labor-intensive, which is not conducive to testing large quantities of chips. Summary of the invention

[0004] The present invention aims to provide a current testing circuit and a testing method for measuring current by applying pressure, in order to solve the technical problem that the testing method is time-consuming and labor-intensive.

[0005] A current testing circuit, comprising:

[0006] A current source having a current output terminal with an adjustable output current, wherein the current output terminal is used to be connected to a tested pin of the tested chip;

[0007] A comparator, wherein the in-phase input terminal is used to connect to a preset reference voltage, the inverting input terminal is used to connect to the pin to be tested, and the output terminal is a test terminal.

[0008] When there are at least two pins to be tested, there are at least two comparators, and the inverting input terminal of each comparator is connected to a corresponding pin to be tested;

[0009] The current output end of the current source is connected to each of the tested pins respectively.

[0010] A current testing method comprises using the current testing circuit to test the current value of a tested pin of a tested chip, specifically comprising the following steps:

[0011] Connect the current output terminal of the current source to the tested pin of the tested chip;

[0012] Connect the non-inverting input terminal of the comparator to a preset reference voltage, and connect the inverting input terminal to the pin to be tested;

[0013] Different test currents are applied to the tested pin through the current source, and the test current recorded when the output signal of the comparator is flipped is the current value of the tested pin.

[0014] Optionally, applying different test currents to the tested pin by the current source includes:

[0015] Applying different test currents starts from a preset current initial value, and the test current is increased according to a preset current increase value to obtain a new test current, until a preset current end value is reached.

[0016] Optionally, when there are at least two pins to be tested:

[0017] Applying the initial current value to the plurality of the tested pins simultaneously through the current source, recording the output terminal signals of at least two of the comparators, and obtaining a set of test signals;

[0018] Increasing the initial current value according to the current increase value to obtain a new test current and applying it to the plurality of tested pins at the same time, recording the output terminal signals of the comparator in sequence until the current end value is applied, and finally obtaining a plurality of test signals;

[0019] Multiple groups of the test signals are formed into a current test signal matrix with the test current and the tested pins as rows and columns and the test signals as elements. The current value of the tested pin can be obtained by checking the flip point of the test signal of each tested pin.

[0020] Optionally, at least two of the tested pins are divided into at least two groups;

[0021] There are at least two current sources, and each current source is correspondingly connected to each of the tested pins in the same group.

[0022] Optionally, different current units inside the chip under test are output to the pin under test;

[0023] Apply different excitations to the chip under test, and at the same time apply different test currents to the pin under test through the current source, and record the comparator output terminal signals corresponding to different test currents under different excitations to obtain multiple groups of test signals;

[0024] Multiple groups of the test signals are arranged with the test current and the applied excitation as rows and columns and the test signals as elements to form a current test signal matrix. The current value of the tested pin can be obtained by checking the flip point of the test signal of the tested pin.

[0025] Optionally, connecting the non-inverting input terminal of the comparator to a preset reference voltage includes:

[0026] The non-inverting input terminal of the comparator is connected to the voltage output terminal of a voltage source, and the voltage source has an adjustable output voltage.

[0027] The positive and progressive effect of the present invention is that the present invention adopts a current test circuit and a test method, and determines the current value of the tested pin by adjusting the current output by the current source and recording the flip point of the comparator output signal, thereby converting the analog quantity test into a functional test, and can conveniently detect the current value of the tested pin of the tested chip. In particular, when a tested pin of the tested chip can output multiple different currents, the current test circuit and the test method of the present invention can significantly improve the test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 The figure is a circuit connection diagram of the present invention. DETAILED DESCRIPTION

[0029] In order to make the technical means, creative features, objectives and effects achieved by the present invention easy to understand, the present invention is further described below with reference to specific illustrations.

[0030] Reference Figure 1 A current test circuit includes a current source 100 and a comparator 200. The current source 100 has a current output terminal with an adjustable output current, and the current output terminal is used to connect to a tested pin of a tested chip 300. The in-phase input terminal of the comparator 200 is used to connect to a preset reference voltage Vref, the inverting input terminal of the comparator 200 is used to connect to a tested pin of the tested chip 300, and the output terminal of the comparator 200 is a test terminal OUT.

[0031] When there are at least two pins under test, there are at least two comparators 200, and the inverting input terminal of each comparator 200 is connected to a corresponding pin under test. At this time, the reference voltage Vref of each comparator 200 can be the same or different according to the scene requirements. The current output terminal of the current source 100 is connected to each pin under test respectively. The at least two pins under test can be pins under test on different chips under test 300, or different pins under test on the same chip under test 300.

[0032] A current testing method includes using the current testing circuit of the present invention to test the current value of the tested pin of the tested chip 300, specifically including the following steps:

[0033] S1, circuit connection: connect the current output terminal of the current source 100 to the tested pin of the tested chip 300, connect the non-inverting input terminal of the comparator 200 to the preset reference voltage Vref, and connect the inverting input terminal of the comparator 200 to the tested pin of the tested chip 300.

[0034] The reference voltage Vref in this step is the voltage value corresponding to the current value of the tested pin to be measured. Figure 1 As shown in , to measure the current generated by the first upper left pin of the chip under test 300 at 0.5V, the non-inverting input terminal of the comparator 200 is connected to the reference voltage Vref of 0.5V.

[0035] In one embodiment, connecting the non-inverting input terminal of the comparator 200 to a preset reference voltage Vref includes: connecting the non-inverting input terminal of the comparator 200 to a voltage output terminal of a voltage source, where the voltage source has an adjustable output voltage.

[0036] The reference voltage Vref in this embodiment can be output by a voltage source, which is preferably a voltage source with an adjustable output voltage. For example, to measure the current generated by the first upper left pin of the chip under test 300 at 0.5V, the voltage source outputs a reference voltage Vref of 0.5V to the non-inverting input terminal of the comparator 200. To measure the current generated by the first upper left pin of the chip under test 300 at 1V, the voltage source outputs a reference voltage Vref of 1V to the non-inverting input terminal of the comparator 200.

[0037] S2, current test: applying different test currents to the tested pin through the current source 100, and recording the test current when the output signal of the comparator 200 is flipped as the current value of the tested pin.

[0038] For example, to measure the current generated by the first upper left pin of the chip under test 300 at 0.5V, when the test current applied by the current source 100 is 100uA, the output signal of the comparator 200 is reversed, indicating that the current of the tested pin working at 0.5V is 100uA.

[0039] In one embodiment, different test currents are applied to the tested pin by the current source 100, including:

[0040] Applying different test currents starts from a preset current initial value, and increases the test current according to a preset current increase value to obtain a new test current until a preset current end value is reached. That is, the test current applied by the current source 100 to the tested pin is:

[0041] Where i is from 1 to n, is the preset initial current value, is the preset current end value, and A is the preset current increase value.

[0042] For example, to measure the current generated by the first upper left pin of the chip under test 300 at 0.5V, a test current is applied to the pin under test through the current source 100, from 0uA to 1000uA in sequence, that is, 0uA, A is 1000uA, and A can be 1uA, 10uA or 100uA as needed.

[0043] Through the above method, it is easier and more convenient to detect a certain pin under test of a certain chip under test 300. In particular, when the chip under test 300 modifies some internal parameter configurations, the pin under test may present different currents, that is, a pin under test may output multiple different currents. The current scanning method of the present invention through the test current from the initial current value to the end current value can significantly improve the test efficiency.

[0044] In one embodiment, when there are at least two pins to be tested, the current test method in the above scenario is as follows:

[0045] There are at least two comparators 200, and the inverting input terminal of each comparator 200 is connected to a corresponding pin under test. At this time, the reference voltage Vref of each comparator 200 can be the same or different according to the scene requirements. The current output terminal of the current source 100 is connected to each pin under test respectively. The at least two pins under test can be pins under test on different chips under test 300, or different pins under test on the same chip under test 300.

[0046] The initial current value is applied to multiple pins under test simultaneously through the current source 100, and the output signals of at least two comparators 200 are recorded to obtain a group of test signals; the initial current value is increased according to the current increase value to obtain a new test current and applied to multiple pins under test at the same time, and the output signals of the comparator 200 are recorded in sequence until the current end value is applied, and finally multiple groups of test signals are obtained; the multiple groups of test signals are formed into a current test signal matrix with the test current and the pins under test as rows and columns and the test signal as an element, and the current value of the pin under test can be obtained by checking the flip point of the test signal of each pin under test.

[0047] For example, to perform current tests on seven pins under test, the seven pins under test are i1 to i7. The inverting input terminals of the seven comparators 200 are connected to a corresponding pin under test. The reference voltage Vref of each comparator 200 is set respectively. The current output terminal of the current source 100 is connected to each pin under test respectively. The initial current value of the current source 100 is set to 1uA, the end current value is set to 20uA, and the current increase value is set to 1uA. The current source 100 simultaneously transmits test currents of 1uA / 2 uA / 3 uA… / 20 uA to the seven pins under test, and 20 groups of test signals are measured from the output terminal of the comparator 200. The 20 groups of test signals measured are organized into a matrix as shown in the following table:

[0048] Through this matrix, it can be easily obtained that the currents of the seven tested pins i1 to i7 are 8uA, 3uA, 10uA, 2uA, 15uA, 17uA and 13uA respectively.

[0049] When a large number of tested pins need to be tested, the tested pins may be grouped, and multiple current sources 100 may be used to provide current to the tested pins in a corresponding group.

[0050] In one embodiment, when there is only one pin under test and there are multiple current units inside the chip under test, the current test method in the above scenario is as follows:

[0051] Different current units inside the chip under test are output to the same preset pin under test. The current output end of the current source 100 is connected to the pin under test, and the inverting input end of the comparator 200 is connected to the pin under test.

[0052] Apply different excitations to the chip under test, and apply different test currents under different excitations, that is, when a certain excitation is applied to the chip under test, apply the initial current value to the pin under test through the current source 100, record the output terminal signal of the comparator 200, and obtain a set of test signals; increase the initial current value according to the current increase value to obtain a new test current and apply it to the pin under test, record the output terminal signal of the comparator 200 in sequence until it is applied to the end value of the current, and finally obtain multiple groups of test signals; form a current test signal matrix with the test current and the applied excitation as rows and columns and the test signal as an element, and the current value of the pin under test can be obtained by checking the flip point of the test signal of the pin under test. For example, seven different excitations are applied to the chip under test, and the different excitations are j1 to j7. The current output terminal of the current source 100 is connected to the pin under test, and the reverse input terminal of the comparator 200 is connected to the pin under test. Set the current source 100's initial current value to 1uA, the current end value to 20uA, and the current increase value to 1uA.

[0053] In seven different excitation scenarios, the current source 100 delivers test current to the tested pin at 1uA / 2uA / 3uA… / 20uA in turn, and 20 groups of test signals are measured from the output end of the comparator 200. The 20 groups of test signals measured are organized into a matrix as shown in the following table:

[0054] Through this matrix, it is easy to obtain the current values ​​of the tested pins under seven different excitations, which are 8uA, 3uA, 10uA, 2uA, 15uA, 17uA and 13uA respectively.

[0055] The above shows and describes the basic principles, main features and advantages of the present invention. It should be understood by those skilled in the art that the present invention is not limited to the above embodiments, and the above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, which fall within the scope of the present invention to be protected. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A current test circuit, characterized in that: include: A current source having a current output terminal with an adjustable output current, wherein the current output terminal is used to be connected to a tested pin of the tested chip; A comparator, wherein the in-phase input terminal is used to connect to a preset reference voltage, the inverting input terminal is used to connect to the pin to be tested, and the output terminal is a test terminal.

2. The current test circuit according to claim 1, characterized in that: When there are at least two pins to be tested, there are at least two comparators, and the inverting input terminal of each comparator is connected to a corresponding pin to be tested; The current output end of the current source is connected to each of the tested pins respectively.

3. A current testing method, characterized in that: The method comprises using the current test circuit of claim 1 or 2 to test the chip under test, specifically comprising the following steps: Connect the current output terminal of the current source to the tested pin of the tested chip; Connect the non-inverting input terminal of the comparator to a preset reference voltage, and connect the inverting input terminal to the pin to be tested; Different test currents are applied to the tested pin through the current source, and the test current recorded when the output signal of the comparator is flipped is the current value of the tested pin.

4. The current testing method according to claim 3, characterized in that: The applying different test currents to the tested pin by the current source comprises: Applying different test currents starts from a preset current initial value, and the test current is increased according to a preset current increase value to obtain a new test current, until a preset current end value is reached.

5. The current testing method according to claim 4, characterized in that: When there are at least two pins to be tested: Applying the initial current value to the plurality of the tested pins simultaneously through the current source, recording the output terminal signals of at least two of the comparators, and obtaining a set of test signals; Increasing the initial current value according to the current increase value to obtain a new test current and applying it to the plurality of tested pins at the same time, recording the output terminal signals of the comparator in sequence until the current end value is applied, and finally obtaining a plurality of test signals; Multiple groups of the test signals are formed into a current test signal matrix with the test current and the tested pins as rows and columns and the test signals as elements. The current value of the tested pin can be obtained by checking the flip point of the test signal of each tested pin.

6. The current testing method according to claim 5, characterized in that: At least two of the tested pins are divided into at least two groups; There are at least two current sources, and each current source is correspondingly connected to each of the tested pins in the same group.

7. The current testing method according to claim 4, characterized in that: Outputting different current units inside the chip under test to the pin under test; Apply different excitations to the chip under test, and at the same time apply different test currents to the pin under test through the current source, and record the comparator output terminal signals corresponding to different test currents under different excitations to obtain multiple groups of test signals; Multiple groups of the test signals are arranged with the test current and the applied excitation as rows and columns and the test signals as elements to form a current test signal matrix. The current value of the tested pin can be obtained by checking the flip point of the test signal of the tested pin.

8. The current testing method according to claim 3, characterized in that: The step of connecting the non-inverting input terminal of the comparator to a preset reference voltage comprises: The non-inverting input terminal of the comparator is connected to the voltage output terminal of a voltage source, and the voltage source has an adjustable output voltage.

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