Data access method and device and storage medium

Abstract

The invention relates to a data access method and device and a storage medium. The data access method comprises the steps that the addressing mode of an operation system of the electronic equipment is determined, the addressing mode of a memory is determined, and the addressing mode is the minimum data unit of each time of data access; and according to the addressing mode of the operating system and the addressing mode of the memory, reconfiguring the addressing mode of the memory, and performing data access according to the reconfigured addressing mode. Through the method and the device, the memory can adapt to operating systems and application programs with different addressing modes, and better performance can be provided for each operating system.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a data access method, device and storage medium. Background Art

[0002] Data transfer between the memory and the host is usually based on a certain data unit. This method of accessing data in a certain data unit is also called an addressing method. The addressing method determines how to divide, transfer and process data. Different memory devices and host systems can use addressing methods of different sizes, usually in bytes. For example, a common addressing method is 4KB addressing. However, in the case of large file transfers, if the addressing method is smaller, more transmission times and additional processing steps will be required, resulting in inefficient data transfer.

[0003] In the related art, a file system using an addressing method with a larger data unit can be designed, but the compatibility problem between storage devices with different addressing methods and different operating systems is difficult to solve. Summary of the invention

[0004] In order to overcome the problems existing in the related art, the present disclosure provides a data access method, device and storage medium.

[0005] According to a first aspect of an embodiment of the present disclosure, there is provided a data access method, comprising: determining an addressing mode of an electronic device operating system and determining an addressing mode of a memory, wherein the addressing mode is the minimum data unit for each data access; reconfiguring the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and performing data access according to the reconfigured addressing mode.

[0006] In one embodiment, the addressing mode of the memory is reconfigured according to the addressing mode of the operating system and the addressing mode of the memory, and data is accessed according to the reconfigured addressing mode, including: if the addressing mode of the operating system and the addressing mode of the memory are both the first addressing mode, the memory is configured to access data according to the first addressing mode.

[0007] In one implementation, the method further includes: after configuring the memory to access data according to the first addressing mode, maintaining the addressing mode of the memory.

[0008] In one embodiment, the addressing mode of the memory is reconfigured according to the addressing mode of the operating system and the addressing mode of the memory, and data is accessed according to the reconfigured addressing mode, including: if the addressing mode of the operating system is the second addressing mode and the addressing mode of the memory is the first addressing mode, the addressing mode of the memory is configured to be the second addressing mode; and data is accessed according to the second addressing mode.

[0009] In one embodiment, the data access according to the second addressing mode includes: storing the first data from the operating system in the first data unit of the memory in the second addressing mode, the first data unit being the minimum data unit for each data access in the first addressing mode; in response to the memory receiving the second data from the operating system, reading out the first data, and storing the first data and the second data in the first data unit in the second addressing mode.

[0010] In one embodiment, the method further includes: when the first data unit has been stored in the data received by the memory, storing the data received by the memory in a second data unit in a second addressing manner, and the second data unit is a data unit that is equal in size to the first data unit and has a position in the memory that is different from the first data unit.

[0011] According to a second aspect of an embodiment of the present disclosure, a data access device is provided, comprising: a determination unit, configured to determine an addressing mode of an operating system of an electronic device and an addressing mode of a memory, wherein the addressing mode is the minimum data unit for each data access; and a processing unit, configured to reconfigure the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and perform data access according to the reconfigured addressing mode.

[0012] In one embodiment, the processing unit reconfigures the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and accesses data according to the reconfigured addressing mode: if the addressing mode of the operating system and the addressing mode of the memory are both the first addressing mode, the memory is configured to access data according to the first addressing mode.

[0013] In one implementation, the processing unit is further configured to: after configuring the memory to access data according to the first addressing mode, maintain the addressing mode of the memory.

[0014] In one embodiment, the processing unit reconfigures the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and accesses data according to the reconfigured addressing mode: if the addressing mode of the operating system is the second addressing mode and the addressing mode of the memory is the first addressing mode, then configure the addressing mode of the memory to the second addressing mode; and access data according to the second addressing mode.

[0015] In one embodiment, the processing unit accesses data in accordance with the second addressing method in the following manner: first data from the operating system is stored in a first data unit of the memory in the second addressing method, the first data unit being the minimum data unit for each data access in the first addressing method; in response to the memory receiving the second data from the operating system, the first data is read out, and the first data and the second data are stored in the first data unit in the second addressing method.

[0016] In one embodiment, the processing unit is also used to: when the first data unit has stored the data received by the memory, store the data received by the memory into a second data unit in a second addressing mode, and the second data unit is a data unit that is equal to the first data unit in size and has a different position in the memory from the first data unit.

[0017] According to a third aspect of the present disclosure, a data access device is provided, comprising: a processor; a memory for storing instructions executable by the processor; wherein the processor is configured to: execute the data access method described in the first aspect or any one of the embodiments of the first aspect.

[0018] According to a fourth aspect of the present disclosure, a storage medium is provided, wherein the storage medium stores instructions, and when the instructions are executed by a processor, the data access method described in the first aspect or any one of the embodiments of the first aspect is executed.

[0019] The technical solution provided by the embodiments of the present disclosure may include the following beneficial effects: by reconfiguring the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, the memory can adapt to operating systems and applications with different addressing modes, can provide better performance for each operating system, improve the compatibility of the memory, and, by supporting a larger addressing mode, improve the read and write performance of the memory and the operating system, the memory can map a larger data range.

[0020] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0022] Figure 1 The invention is a flow chart showing a data access method according to an exemplary embodiment.

[0023] Figure 2 The invention is a flowchart showing a method for reconfiguring an addressing mode according to an exemplary embodiment.

[0024] Figure 3 The figure is a flow chart showing a data access method in a second addressing mode according to an exemplary embodiment.

[0025] Figure 4 It is a schematic diagram showing an addressing method according to an exemplary embodiment.

[0026] Figure 5 is a schematic diagram showing another addressing method according to an exemplary embodiment.

[0027] Figure 6 is a schematic diagram showing another addressing method according to an exemplary embodiment.

[0028] Figure 7 It is a schematic diagram showing a data access method according to an exemplary embodiment.

[0029] Figure 8 is a schematic diagram showing yet another data access method according to an exemplary embodiment.

[0030] Fig. 9A It is a schematic diagram showing a 4KB data mapping according to an exemplary embodiment.

[0031] Fig. 9B It is a schematic diagram showing a 16KB data mapping according to an exemplary embodiment.

[0032] Fig.10 The invention is a block diagram showing a data access device according to an exemplary embodiment.

[0033] Fig.11 It is a block diagram of a device 200 for data access according to an exemplary embodiment. DETAILED DESCRIPTION

[0034] Here, exemplary embodiments will be described in detail, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present disclosure.

[0035] The method provided in the embodiment of the present disclosure can be applied to the scenario of data access between the operating system and the memory of the electronic device. Data access mainly includes two parts: data reading and data storage, which can also be generally referred to as data reading and writing, data access, data interaction or data operation.

[0036] The data access method provided by the embodiments of the present disclosure may be performed by an electronic device, wherein the electronic device may be any device that includes an operating system and a storage device and is used to perform a certain function or task. For example, examples of electronic devices may include: computers, mobile phones, laptops, tablet computers, PDAs, mobile Internet devices (MID), digital cameras, audio players, televisions, routers, sensors, controllers, etc. Among them, the operating system may also be referred to as a host, a host system, a file system, etc. The memory may also be referred to as a storage device, a storage device, a memory device, etc.

[0037] The data file of the operating system is a logical structure. Data files are usually logical units used by the operating system to manage and store data. In the operating system, data files usually consist of a series of data records or data blocks, which contain actual information. The operating system manages these data files through the file system.

[0038] When accessing data to files in a storage device or operating system, it is usually done in fixed-size data units. In this method, each data unit is assigned a unique address or location to locate and access it in the storage device or operating system. Therefore, this method of accessing data in fixed-size data units is also called addressing mode, which is used to transfer data between storage devices such as hard drives or solid-state drives and operating systems. The following is the general process of how storage and operating systems interact with data in fixed-size data units:

[0039] Both the storage device and the operating system have a defined data unit size, which is usually a fixed size in bytes. For example, this size can be 4KB, 8KB, 16KB, etc., depending on the configuration of the system and the storage device. When data is to be written to the storage device or the operating system, the data is divided into data units of equal size. If the size of the data is not an integer multiple of the data unit size, the last data unit may be filled with zeros or processed in other ways. Then, these data units are written sequentially to the free space of the storage device or the file of the operating system.

[0040] When data in a storage device or operating system needs to be accessed, the system reads the data according to the boundaries of the data unit. If data larger than one data unit needs to be read, the system reads the data units one by one and then combines them into the complete data.

[0041] In general, data units are the basic units of data access for memory and operating systems. They simplify the management and organization of data, allowing data to be stored and retrieved efficiently. This concept of data units helps improve the performance and reliability of storage systems and enables operating systems to manage storage space more efficiently. Different memory devices and operating systems may use different data unit sizes and management strategies, but the basic principles of addressing are usually similar.

[0042] However, in the case of large file transfers, if the addressing method is smaller, the amount of data contained in each data unit is less. This means that when transferring the entire large file, more data units are required to cover the entire file. Therefore, more transfers are required to complete the file transfer, and each transfer requires additional time and resources.

[0043] In addition, the system needs to perform address lookups and positioning more frequently. Each time a small block of data is transmitted, the system must determine the address of the next data block and then read it from the storage device. This involves steps such as looking up the index and determining whether the cache is hit. These additional operations increase transmission time and system overhead.

[0044] In the related art, although a file system using an addressing method with a larger data unit can be designed, the compatibility problem between storage devices with different addressing methods and different operating systems is difficult to solve.

[0045] In view of this, a data access method is proposed in an embodiment of the present disclosure. In the data access method provided by the present disclosure, by setting the operating system and the low bytecode format application to use the same structure and memory layout, it is possible to directly transfer structure data between the operating system and the low bytecode format application.

[0046] Figure 1 is a flow chart of a data access method according to an exemplary embodiment. Figure 1 As shown, the data storage includes steps S11 to S12.

[0047] In step S11, the addressing mode of the electronic device operating system is determined, and the addressing mode of the memory is determined. The addressing mode is the minimum data unit for each data access.

[0048] During the startup process of an electronic device, the operating system usually needs to perform initialization operations and communication with the memory to ensure that they can work together correctly. Inside the memory, there are registers containing memory configuration information, which are used to inform the operating system of the memory's capabilities and characteristics. For example, the addressing methods supported by the memory. In this case, the operating system can determine the addressing method of the memory by reading specific registers in the memory. The addressing method of the electronic device operating system can be set through the file system and recorded in a specific file location.

[0049] When accessing data to a file in a storage device or operating system, it is usually done in units of fixed-size data units. In this method, each data unit is assigned a unique address or location for location and access in the storage device or operating system. Therefore, this method of accessing data in units of fixed-size data units is also called addressing mode, which is used to transfer data between storage devices such as hard disk drives or solid-state drives and operating systems.

[0050] In step S12, the addressing mode of the memory is reconfigured according to the addressing mode of the operating system and the addressing mode of the memory, and data is accessed according to the reconfigured addressing mode.

[0051] If the addressing mode of the electronic device's operating system is inconsistent with the addressing mode of the memory, the addressing mode of the memory can be reconfigured in a simulated addressing mode according to the addressing mode of the operating system and the addressing mode of the memory, and data can be directly accessed in the operating system and the memory according to the reconfigured addressing mode.

[0052] In the disclosed embodiment, the operating system confirms the addressing mode supported by the memory by reading a specific register in the memory, which helps to ensure the compatibility and adaptability between the operating system and the memory. The operating system can be configured according to the actual support of the memory without guessing or relying on default settings to select the most suitable addressing mode for data transmission. The data access method in the disclosed embodiment helps to optimize performance, especially data access performance when processing large files or tasks requiring high performance.

[0053] In one embodiment, if the addressing mode of the operating system and the addressing mode of the memory are both the first addressing mode, the memory is configured to access data according to the first addressing mode.

[0054] If the addressing mode of the operating system is consistent with the addressing mode of the memory, the memory is configured to access data according to the first addressing mode. The first addressing mode can be the addressing mode of the memory when it leaves the factory, or it can be an addressing mode with a larger minimum data unit for each data access. For example, the operating system and the memory are both 16kb addressing modes. Then the memory and the operating system use 16kb as the minimum data unit for each data access.

[0055] In the disclosed embodiment, since the operating system and the memory both use the same addressing mode, data can be read and written in the size of the first addressing mode, which helps to improve data transmission performance. In addition, the consistency between the operating system and the memory helps to ensure data reliability and reduce potential errors and data inconsistencies that may be caused by different addressing modes.

[0056] In one embodiment, after the memory is configured to access data according to the first addressing mode, the addressing mode of the memory is maintained.

[0057] In the embodiment of the present disclosure, when the addressing mode of the operating system and the addressing mode of the memory are both the first addressing mode, the memory is configured to access data according to the first addressing mode, and the first addressing mode of the memory is kept unchanged, which helps to improve the stability and reliability of the memory device.

[0058] Figure 2 is a flow chart showing a method for reconfiguring an addressing mode according to an exemplary embodiment. Figure 2 As shown, the method includes steps S41 to S42.

[0059] In step S41, if the addressing mode of the operating system is the second addressing mode and the addressing mode of the memory is the first addressing mode, the addressing mode of the configuration memory is the second addressing mode.

[0060] In step S42, data access is performed according to the second addressing mode.

[0061] When the addressing modes supported by the operating system and the memory are inconsistent, a method can be adopted in which the memory simulates the addressing mode of the operating system to access data, so as to configure the data access mode of the memory to be consistent with the operating system.

[0062] For example, the memory device uses a 16K addressing mode when it leaves the factory, which means that data storage and access inside the memory are performed in units of 16KB. However, the operating system uses a 4K addressing mode. In this case, an emulated addressing mode can be provided for the memory device, allowing the 4K addressing operating system to use the emulated addressing mode in units of 4KB for data access, that is, to read and write data in 4KB blocks.

[0063] Figure 3 is a flow chart showing a second addressing mode data access method according to an exemplary embodiment. Figure 3 As shown, the method includes steps S51 to S52.

[0064] In step S51, first data from the operating system is stored in a first data unit of the memory in a second addressing mode, where the first data unit is the minimum data unit for each data access in the first addressing mode.

[0065] In step S52, in response to the memory receiving the second data from the operating system, the first data is read out, and the first data and the second data are stored in the first data unit in a second addressing manner.

[0066] After configuring the second addressing mode for the memory, the memory can receive the first data of the second addressing mode from the operating system and store it in the storage unit. When receiving the second data of the second addressing mode again, the first data is read out and stored in the first data unit together with the second data.

[0067] For example, a memory configuration for 16KB addressing simulates a 4KB addressing mode. The memory receives 4KB data blocks each time and stores them together with the previously received 4KB data in 16KB data units.

[0068] In one embodiment, when the data received by the memory has been stored in the first data unit, the data received by the memory is stored in the second data unit in a second addressing mode. The second data unit is a data unit that is equal to the first data unit in size and has a different position in the memory from the first data unit.

[0069] After the memory receives data of the size of the first data unit, the memory can store the received data into a new second data unit in the second addressing mode. For example, after the memory with 16KB addressing receives 4 blocks of data from the operating system with 4KB addressing, the memory can store the 4KB data block from the operating system with 4KB addressing into a blank 16KB storage unit.

[0070] Exemplarily, the minimum access unit of the memory is set to 16KB, which means that each data operation involves a continuous 16KB memory space. However, the minimum access unit of the operating system is 4KB, which means that it expects to read and write data in units of 4KB. In order to simulate the 4K addressing mode in the memory, the following are the steps of operation:

[0071] The operating system sends a 4KB block of data to the memory. The memory receives this 4KB block of data and stores it in an internal 16KB data unit. However, the memory not only stores the new 4KB data, but also reads out the previously received and stored data (if any) and stores it in this 16KB data unit. The memory continues to receive 4KB blocks of data from the operating system. Each time it receives a 4KB block, it stores the data of this new block in the current 16KB data unit. When the memory has received 4 4KB blocks of data, it switches to a new 16KB data unit and starts storing the new data. The purpose of this is to maintain the consistency of 16KB addressing.

[0072] In this way, the memory looks like it works in 4KB addressing mode externally, because it allows the operating system to read and write data in 4KB units. However, in fact, the memory stores and manages data in 16KB units internally, and each time it receives a 4KB data block, it adaptively stores and reads data to maintain the consistency of the 16KB data unit. This method realizes the simulation of the 4K addressing mode while taking advantage of the performance advantages of the 16KB addressing mode.

[0073] In the embodiment of the present disclosure, by configuring the second addressing mode for the memory and accessing data in the second addressing mode, the versatility, ease of operation and compatibility of the memory device are increased, so that it can be used in different types of systems. The memory device is more flexible and can be used in different environments and work with various types of hosts and operating systems.

[0074] The data access method involved in the embodiment of the present disclosure is described below with examples. The storage device is used as the storage device, the host file system is used as the operating system, the addressing method with the minimum data unit of 16KB, i.e., 16K addressing, is used as the first addressing method, and the addressing method with the minimum data unit of 4KB, i.e., 4K addressing, is used as the second addressing method.

[0075] In the related art, the file addressing unit size used on the storage devices of electronic devices such as mobile phones is generally 4KB, but as time goes by, the size of application data continues to increase, and the basic size of 4KB will soon be unable to meet the needs. Although some file systems can support 16KB addressing, there are currently no 16KB storage devices compatible with it, so the addressing given by the system to the storage device still needs to be converted into 4KB, resulting in transmission fragmentation and reducing the overall read and write performance.

[0076] Figure 4 FIG. 1 is a schematic diagram showing an addressing method according to an exemplary embodiment. Figure 4 As shown in the figure, both the memory and the operating system use 4KB as the addressing unit. This means that when transferring 16KB of data, it needs to be divided into 4 transmissions, because only 4KB of data can be transmitted each time. In this case, the entire transmission needs to be split and integrated multiple times, resulting in reduced efficiency.

[0077] Figure 5 FIG. 1 is a schematic diagram showing another addressing method according to an exemplary embodiment. Figure 5 As shown in FIG. 1 , when the host operating system is improved to a 16K addressing unit, the transmission of 16KB of data can be completed in one transmission. However, since the memory cannot be adapted, one more step of splitting and integration is still required to complete the entire transmission, and the overall efficiency is still poor.

[0078] Figure 6 FIG. 1 is a schematic diagram showing another addressing method according to an exemplary embodiment. Figure 6 As shown, the host file system and storage device are simultaneously improved to 16K addressing. At this time, the transmission has been integrated into one time, and the storage unit does not need to be split and integrated again. The overall transmission efficiency is the best.

[0079] In view of this, a new addressing mechanism is proposed in the embodiment of the present disclosure, allowing the storage device to support both 4KB and 16KB settings. When the file system addressing method is upgraded to a size of 16KB, the device can be synchronously set to 16KB to meet the best transmission effect and improve the overall read and write performance.

[0080] Figure 7 is a schematic diagram showing a data access method according to an exemplary embodiment. Figure 7 As shown, the storage unit array of the storage device is designed as a 16K addressing mode when it leaves the factory, and the controller of the storage device is used to support the simulated 4K addressing mode. For the host with 4K addressing, the simulated addressing mode of 4K-4K, that is, 4KB is used as the minimum data unit for data access, can be directly used to read and write the memory.

[0081] Figure 8is a schematic diagram showing another data access method according to an exemplary embodiment. Figure 8 As shown,

[0082] When the host using 16K addressing is turned on for the first time, it can confirm that the storage device can support 16K addressing and send a command to turn off the 4K emulation mode. At this time, the storage device controller also returns to 16K addressing, and the host and the storage device use the 16K-16K method, that is, 16KB is used as the minimum data unit for data access to read and write data.

[0083] In one embodiment, in order to consider the stability of the device, the addressing mode is switched to a single setting, and will not be changed after setting.

[0084] Fig. 9A is a schematic diagram showing a 4KB data mapping according to an exemplary embodiment. Fig. 9B is a schematic diagram showing a 16KB data mapping according to an exemplary embodiment. Fig. 9A and Fig. 9B As shown in the figure, when the block table size remains unchanged, the access unit changes from 4KB to 16KB, so the mapping range covered by SRAM is expanded by 4 times. Therefore, 16K addressing can effectively increase the coverage of data and improve the random read and write performance of large files.

[0085] Based on the same concept, the embodiment of the present disclosure also provides a data access device.

[0086] It is understandable that the data access device provided by the embodiment of the present disclosure includes hardware structures and / or software modules corresponding to the execution of each function in order to realize the above functions. In combination with the units and algorithm steps of each example disclosed in the embodiment of the present disclosure, the embodiment of the present disclosure can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the technical solution of the embodiment of the present disclosure.

[0087] Fig.10 is a block diagram of a data access device according to an exemplary embodiment. Fig.10 , the data access device comprises:

[0088] The determining unit 101 is used to determine the addressing mode of the electronic device operating system and the addressing mode of the memory, where the addressing mode is the minimum data unit for each data access;

[0089] The processing unit 102 is used to reconfigure the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and access data according to the reconfigured addressing mode.

[0090] In one embodiment, the processing unit 102 reconfigures the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and accesses data according to the reconfigured addressing mode: if the addressing mode of the operating system and the addressing mode of the memory are both the first addressing mode, the memory is configured to access data according to the first addressing mode.

[0091] In one embodiment, the processing unit 102 is further configured to: after configuring the memory to access data according to the first addressing mode, maintain the addressing mode of the memory.

[0092] In one embodiment, the processing unit reconfigures the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and accesses data according to the reconfigured addressing mode: if the addressing mode of the operating system is the second addressing mode and the addressing mode of the memory is the first addressing mode, the addressing mode of the memory is configured to be the second addressing mode, and data is accessed according to the second addressing mode.

[0093] In one embodiment, the processing unit 102 accesses data in accordance with the second addressing method in the following manner: first data from the operating system is stored in a first data unit of the memory in the second addressing method, and the first data unit is the minimum data unit for each data access in the first addressing method.

[0094] In response to the memory receiving the second data from the operating system, the first data is read out, and the first data and the second data are stored in the first data unit in a second addressing mode.

[0095] In one embodiment, the processing unit 102 is also used to: when the data received in the first data unit has been stored in the memory, store the data received by the memory in a second data unit in a second addressing manner, and the second data unit is a data unit that is equal to the first data unit in size and has a different position in the memory from the first data unit.

[0096] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0097] Fig.112 is a block diagram of a device 200 for data access according to an exemplary embodiment. For example, the device 200 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0098] Reference Fig.11 , the device 200 may include one or more of the following components: a processing component 202 , a memory 204 , a power component 206 , a multimedia component 208 , an audio component 210 , an input / output (I / O) interface 212 , a sensor component 214 , and a communication component 216 .

[0099] The processing component 202 generally controls the overall operation of the device 200, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 202 may include one or more processors 220 to execute instructions to perform all or part of the steps of the above-described method. In addition, the processing component 202 may include one or more modules to facilitate interaction between the processing component 202 and other components. For example, the processing component 202 may include a multimedia module to facilitate interaction between the multimedia component 208 and the processing component 202.

[0100] The memory 204 is configured to store various types of data to support operations on the device 200. Examples of such data include instructions for any application or method operating on the device 200, contact data, phone book data, messages, pictures, videos, etc. The memory 204 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0101] The power component 206 provides power to the various components of the device 200. The power component 206 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the device 200.

[0102] The multimedia component 208 includes a screen that provides an output interface between the device 200 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 208 includes a front camera and / or a rear camera. When the device 200 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0103] The audio component 210 is configured to output and / or input audio signals. For example, the audio component 210 includes a microphone (MIC), and when the device 200 is in an operation mode, such as a call mode, a recording mode, and a speech recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 204 or sent via the communication component 216. In some embodiments, the audio component 210 also includes a speaker for outputting audio signals.

[0104] I / O interface 212 provides an interface between processing component 202 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: a home button, a volume button, a start button, and a lock button.

[0105] The sensor assembly 214 includes one or more sensors for providing various aspects of the status assessment of the device 200. For example, the sensor assembly 214 can detect the open / closed state of the device 200, the relative positioning of components, such as the display and keypad of the device 200, the sensor assembly 214 can also detect the position change of the device 200 or a component of the device 200, the presence or absence of user contact with the device 200, the orientation or acceleration / deceleration of the device 200 and the temperature change of the device 200. The sensor assembly 214 can include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 214 can also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 214 can also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor or a temperature sensor.

[0106] The communication component 216 is configured to facilitate wired or wireless communication between the device 200 and other devices. The device 200 can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 216 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 216 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0107] In an exemplary embodiment, the apparatus 200 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors or other electronic components to perform the above method.

[0108] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 204 including instructions, and the instructions can be executed by the processor 220 of the device 200 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0109] It is to be understood that in the present disclosure, "plurality" refers to two or more than two, and other quantifiers are similar. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. The singular forms "a", "the" and "the" are also intended to include plural forms, unless the context clearly indicates other meanings.

[0110] It is further understood that the terms "first", "second", etc. are used to describe various information, but such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other, and do not indicate a specific order or degree of importance. In fact, the expressions "first", "second", etc. can be used interchangeably. For example, without departing from the scope of the present disclosure, the first information can also be referred to as the second information, and similarly, the second information can also be referred to as the first information.

[0111] It can be further understood that, unless otherwise specified, “connection” includes a direct connection without other components between the two, and also includes an indirect connection with other components between the two.

[0112] It is further understood that, although the operations are described in a specific order in the drawings in the embodiments of the present disclosure, it should not be understood as requiring the operations to be performed in the specific order shown or in a serial order, or requiring the execution of all the operations shown to obtain the desired results. In certain environments, multitasking and parallel processing may be advantageous.

[0113] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any modifications, uses or adaptations of the present disclosure, which follow the general principles of the present disclosure and include common knowledge or customary technical means in the art that are not disclosed in the present disclosure.

[0114] It should be understood that the present disclosure is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the scope of the appended claims.

Claims

1. A data access method, characterized in that: include: Determine the addressing mode of the electronic device operating system and determine the addressing mode of the memory, wherein the addressing mode is the minimum data unit for each data access; According to the addressing mode of the operating system and the addressing mode of the memory, the addressing mode of the memory is reconfigured, and data is accessed according to the reconfigured addressing mode.

2. The data access method according to claim 1, characterized in that: The step of reconfiguring the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and accessing data according to the reconfigured addressing mode, comprises: If the addressing mode of the operating system and the addressing mode of the memory are both the first addressing mode, the memory is configured to access data according to the first addressing mode.

3. The data access method according to claim 2, characterized in that: The method further comprises: After configuring the memory to access data according to the first addressing mode, the addressing mode of the memory is maintained.

4. The data access method according to claim 1, characterized in that: The step of reconfiguring the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and accessing data according to the reconfigured addressing mode, comprises: If the addressing mode of the operating system is the second addressing mode and the addressing mode of the memory is the first addressing mode, then the addressing mode of the memory is configured to be the second addressing mode; Data access is performed according to the second addressing mode.

5. The data access method according to claim 4, characterized in that: The step of accessing data according to the second addressing mode includes: Storing first data from the operating system into a first data unit of the memory in a second addressing mode, wherein the first data unit is a minimum data unit for each data access in the first addressing mode; In response to the memory receiving the second data from the operating system, the first data is read out, and the first data and the second data are stored in the first data unit in a second addressing mode.

6. The data access method according to claim 5, characterized in that: The method further comprises: When the first data unit has stored the data received by the memory, the data received by the memory is stored in a second data unit in a second addressing mode, and the second data unit is a data unit that is equal in size to the first data unit and has a different position in the memory from the first data unit.

7. A data access device, characterized in that: include: A determination unit, used to determine an addressing mode of an operating system of an electronic device and an addressing mode of a memory, wherein the addressing mode is a minimum data unit for each data access; The processing unit is used to reconfigure the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and perform data access according to the reconfigured addressing mode.

8. The data access device according to claim 7, characterized in that: The processing unit reconfigures the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and accesses data according to the reconfigured addressing mode: If the addressing mode of the operating system and the addressing mode of the memory are both the first addressing mode, the memory is configured to access data according to the first addressing mode.

9. The data access device according to claim 8, characterized in that: The processing unit is also used for: After configuring the memory to access data according to the first addressing mode, the addressing mode of the memory is maintained.

10. The data access device according to claim 7, characterized in that: The processing unit reconfigures the addressing mode of the memory according to the addressing mode of the operating system and the addressing mode of the memory, and accesses data according to the reconfigured addressing mode: If the addressing mode of the operating system is the second addressing mode and the addressing mode of the memory is the first addressing mode, then the addressing mode of the memory is configured to be the second addressing mode; Data access is performed according to the second addressing mode.

11. The data access device according to claim 10, characterized in that: The processing unit accesses data according to the second addressing method in the following manner: Storing first data from the operating system into a first data unit of the memory in a second addressing mode, wherein the first data unit is a minimum data unit for each data access in the first addressing mode; In response to the memory receiving the second data from the operating system, the first data is read out, and the first data and the second data are stored in the first data unit in a second addressing mode.

12. The data access device according to claim 11, characterized in that: The processing unit is also used for: When the first data unit has stored the data received by the memory, the data received by the memory is stored in a second data unit in a second addressing mode, and the second data unit is a data unit that is equal in size to the first data unit and has a different position in the memory from the first data unit.

13. A data access device, characterized in that: include: processor; a memory for storing processor-executable instructions; Wherein, the processor is configured to: execute the method described in any one of claims 1 to 6.

14. A storage medium, characterized in that: The storage medium stores instructions, and when the instructions in the storage medium are executed by a processor of the terminal, the terminal is enabled to execute the method according to any one of claims 1 to 6.

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