HMB-based SSD hierarchical read Cache management method and device, computer equipment and storage medium

Abstract

The invention provides an HMB-based SSD hierarchical read Cache management method and device, computer equipment and a storage medium, and the method comprises the following steps: applying for a Loca l / HMB read buffer memory through a Cache management engine, and initializing a read Cache management module; monitoring a host command, and judging whether the host command is a read command or not; when the host command is not the read command, switching to an SSD traditional path for processing and returning to the host to continue to monitor the host command; when the host command is a read command, judging whether the read Cache management module is hit or not through a hit check module; if so, acquiring data from the Loca l / HMB read buffer memory, returning the data to a host, and updating a management table item; and if not, processing and recording the access times according to an SSD traditional path. The technical problem that large-range Cache reading and performance improvement are difficult to realize due to the fact that an internal memory of an SOC chip is less and an effective read Cache cannot be constructed due to strict cost control of a consumer SSD at present is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of solid state drives, and more specifically to an HMB-based SSD hierarchical read cache management method, device, computer equipment and storage medium. Background Art

[0002] With the rapid development of information technology, the status of solid-state drives (SSDs) in the storage field has become increasingly prominent. They have been widely used in many scenarios, especially in the PC market. With their reliability and performance advantages, they have gradually replaced traditional HDDs and brought high-quality experience to users.

[0003] With the advancement of technology, the interface rate of SSDs continues to rise, and performance continues to improve. However, data reading still faces challenges. Reading data from NAND requires executing specific commands, which takes a long time. For example, a single page read takes about 20us. Although in actual user scenarios, spatial aggregation characteristics are often present, such as repeated reading of a certain interval of data, the recent host access data is stored in the memory, and the data can be directly returned when the subsequent read hits the buffer, avoiding the waiting time for reading from NAND, which can effectively reduce access latency and enhance performance.

[0004] However, current consumer SSDs are facing severe cost control pressure, which has led to a sharp decrease in the available memory inside the SOC chip. Limited memory cannot build an effective read cache, and it is difficult to implement a large-scale read cache to improve performance. In this context, how to build a flexible and large-scale read cache in a memory-constrained SSD has become a key design problem to improve the performance competitiveness of SSDs. Innovative solutions are urgently needed to break through this bottleneck, meet the growing data processing needs and improve user experience. Summary of the invention

[0005] The purpose of the present invention is to overcome the defects of the prior art and provide an SSD hierarchical read cache management method, device, computer equipment and storage medium based on HMB, which aims to solve the technical problem that due to the strict cost control of consumer SSDs, the internal memory of the SOC chip is small and an effective read cache cannot be built, making it difficult to achieve large-scale read cache performance improvement.

[0006] To achieve the above object, the present invention adopts the following technical solutions:

[0007] A HMB-based SSD hierarchical read cache management method includes the following steps:

[0008] Apply for Local / HMB read buffer memory through the cache management engine and initialize the read cache management module;

[0009] Listening to a host command, and determining whether the host command is a read command;

[0010] When the host command is not a read command, the command is transferred to the SSD traditional path for processing and returns to the host to continue listening to the host command;

[0011] When the host command is a read command, a hit check module is used to determine whether the read cache management module is hit;

[0012] If a hit is found, data is obtained from the Local / HMB read buffer memory and returned to the host and the management table entry is updated;

[0013] If it misses, it will be processed according to the traditional SSD path and the access count will be recorded.

[0014] In one embodiment, when the host command is not a read command, the step of switching to the SSD traditional path for processing and continuing to listen to the host command further includes:

[0015] Determine whether the read cache management module is hit by the hit check module;

[0016] If a hit occurs, the read cache management module is invalidated, the SSD traditional path is switched to process, and the host command is continued to be listened;

[0017] If there is no hit, it will go to the traditional SSD path for processing and return to the host to continue listening to host commands.

[0018] In one embodiment, according to the HMB-based SSD tiered read cache management method of claim 1, the Local / HMB read buffer memory includes a Local buffer and an HMB buffer, and the steps after processing according to the SSD traditional path and recording the access times if a miss comprises:

[0019] Increment the number of accesses to the corresponding LBA interval;

[0020] Determining whether the number of accesses to the LBA interval exceeds a threshold;

[0021] If the threshold is exceeded, searching the read cache management module for the entry located in the Local buffer and having the lowest heat;

[0022] If the threshold is not exceeded, the system returns to the host and continues to listen for host commands.

[0023] In one embodiment, the step of searching the read cache management module for the entry located in the Local buffer and having the lowest temperature includes:

[0024] Determine whether there is any remaining available space in the HMB buffer;

[0025] If there is remaining available space in the HMB buffer, replace the entry with the lowest temperature in the Local buffer with the available space in the HMB buffer;

[0026] If there is no remaining available space in the HMB buffer, search the read cache management module for the entry in the HMB buffer with the lowest heat, invalidate the entry in the HMB buffer with the lowest heat, and release the HMB buffer.

[0027] In one embodiment, the steps after replacing the entry with the lowest temperature in the Local buffer into the available space in the HMB buffer include:

[0028] Modify the entry with the lowest temperature in the Local buffer in the read cache management module to the entry in the HBM buffer;

[0029] Read new read command data from NAND and store it in Local buffer;

[0030] Creating a table entry of the new read command data in the read cache management module;

[0031] Return to the host and continue listening for host commands.

[0032] In one embodiment, the step of creating an entry of the new read command data in the read cache management module includes:

[0033] Confirm the LBA interval of the table entry of the new read command data;

[0034] Set the number of visits to 1;

[0035] Set the last access time to the current time;

[0036] The specified data storage location is the memory space allocated for the Local buffer.

[0037] In one embodiment, the steps of the SSD traditional path processing include:

[0038] The host submits a read command to the front-end module of the SSD;

[0039] The SSD front-end module divides the command into mapping units;

[0040] Submit the operation request to the buffer management module and allocate a read buffer;

[0041] Submitting an operation request to the mapping table management module;

[0042] The mapping table management module is responsible for converting the logical address into the NAND physical address;

[0043] Submit the operation request to the backend module, and the backend module initiates a NAND read request based on the physical address;

[0044] Wait for the NAND read operation request to complete and load the data into the NAND flash memory register;

[0045] The data is transferred from the NAND flash memory register to a host.

[0046] A HMB-based SSD hierarchical read cache management device, the device comprising:

[0047] Cache management engine module, used to apply for Local / HMB read buffer memory and initialize the read cache management module;

[0048] A host command listening and judging module is used to listen to the host command and judge whether the received host command is a read command;

[0049] A hit check module is used to determine whether the read cache management module is hit;

[0050] Read Cache management module, used to record and manage read cache data information;

[0051] The SSD traditional path processing module is used to process the host command when the host command does not hit the read cache management module.

[0052] A computer device comprises a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the above method when executing the computer program.

[0053] A computer-readable storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the above method can be implemented.

[0054] The beneficial effects of the present invention compared with the prior art are:

[0055] (1) The cache management engine is used to divide the Local / HMB read buffer memory to build a hierarchical read cache, which increases the read cache capacity. When a read hit occurs, data can be quickly retrieved from the buffer and returned to the host, avoiding NAND read delays and greatly improving the read operation speed. If frequently accessed data is stored in the Local buffer, read requests can be quickly responded to, improving overall read performance;

[0056] (2) Based on the hierarchical management of Local and HMB buffers, the storage location is dynamically adjusted according to the data access popularity. By reasonably replacing data, efficient use of memory resources is ensured to avoid poor cache reading effect due to memory limitation, so that limited memory can better serve frequently accessed data, record the number and time of data access, and track the popularity;

[0057] (3) When a miss occurs and the number of accesses exceeds the threshold, the read cache is optimized and hot data is loaded into the Local buffer to adapt to different access patterns, maintain a high cache hit rate, and continuously improve read performance.

[0058] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the following preferred embodiments are specifically cited and described in detail as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Figure 1 A schematic diagram of a process of an SSD tiered read cache management method based on HMB provided in an embodiment of the present invention Figure 1 ;

[0060] Figure 2 A schematic diagram of a process of an SSD tiered read cache management method based on HMB provided in an embodiment of the present invention Figure 2 ;

[0061] Figure 3 A schematic diagram of a process of an SSD tiered read cache management method based on HMB provided in an embodiment of the present invention Figure 3 ;

[0062] Figure 4 A schematic diagram of a process of an SSD tiered read cache management method based on HMB provided in an embodiment of the present invention Figure 4 ;

[0063] Figure 5 A schematic diagram of a process of an SSD tiered read cache management method based on HMB provided in an embodiment of the present invention Figure 5 ;

[0064] Figure 6 A schematic diagram of a process of an SSD tiered read cache management method based on HMB provided in an embodiment of the present invention Figure 6 ;

[0065] Figure 7 A schematic diagram of a process of an SSD tiered read cache management method based on HMB provided in an embodiment of the present invention Figure 7 ;

[0066] Figure 8 A schematic block diagram of an SSD tiered read cache management device based on HMB provided in an embodiment of the present invention;

[0067] Fig. 9 A schematic block diagram of a computer device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0068] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0069] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0070] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0071] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0072] It should be further understood that the term "and / or" used in the present description and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0073] See also Figure 1 As shown, the embodiment of the present invention discloses a SSD hierarchical read cache management method based on HMB, comprising the following steps:

[0074] S100, applying for Local / HMB read buffer memory through the Cache management engine, and initializing the read Cache management module;

[0075] Specifically, the Cache management engine is responsible for applying for Local / HMB read buffer memory, which includes Local buffer and HMB buffer. Local buffer is usually located inside the SSD, has a faster access speed, and can quickly respond to data read requests; HMB buffer uses host memory, and its capacity is relatively large. By reasonably dividing these two memory spaces with different characteristics, the foundation is laid for subsequent hierarchical read cache management. It can be understood that in the present embodiment, the application scenarios that may occur are, for example, when the system starts, the Cache management engine allocates a certain amount of memory to the Local buffer according to a preset strategy for storing the most urgent or most frequently accessed data, and at the same time allocates the remaining part to the HMB buffer to cache more data, thereby improving the overall read cache capacity and performance.

[0076] At the same time, the read cache management module is initialized. This module is mainly used to record and manage important information related to the read cache. This module includes:

[0077] The logical block address interval of the data, namely the LBA interval, which clarifies the logical location of the data in the storage medium and facilitates the rapid location of the data;

[0078] Access count, used to count the frequency with which data is read, so as to judge the popularity of the data;

[0079] The most recent access time can further help determine the activity of the data by recording the time of each access;

[0080] The storage location of the data in the cache (such as in the Local buffer or HMB buffer), etc.

[0081] The initialization and subsequent management of these module information are used to maintain the efficient operation of the entire read cache. For example, during initialization, all access times are set to 0 and the most recent access time is set to the initial value, providing a basis for subsequent accurate statistics and judgments.

[0082] S200, listening to a host command, and determining whether the host command is a read command;

[0083] Specifically, the system will continuously listen to commands from the host. Whether it is data reading, writing or other operation requests, it needs to be listened to first to ensure that the system can respond to various operation requirements of the host in a timely manner. For example, in a multi-tasking environment, the system is ready to receive different commands issued by the host at any time to ensure the timeliness and continuity of data transmission. Once a host command is received, the judgment mechanism is immediately started to determine whether the command is a read command. This judgment result serves as the key decision-making basis for the entire management process and determines the subsequent processing path. If it is determined that the host issues a read command, it enters a processing flow specifically for read commands to make full use of the read cache to improve read performance; if it is not a read command, it is transferred to the traditional SSD path for processing to ensure that the system can correctly handle various types of commands and maintain the normal operation of the system.

[0084] S300, when the host command is not a read command, transfer to the SSD traditional path for processing and return to the host to continue to listen to the host command;

[0085] Specifically, when it is determined that the host command is not a read command, the system directly switches to the SSD traditional path for processing. The SSD traditional path usually involves a series of complex operations, such as data storage, retrieval, update, and interaction with other storage components. It can be understood that the SSD traditional path includes operations such as the movement of data between different storage levels and communication with disk arrays or other storage devices. These operations are the regular processing methods of the SSD when there is no read cache hit. Although the processing speed is slower than the read cache hit, it can ensure the normal operation of the basic functions of the system in various situations. After completing the processing of the traditional path, the system will return to the host and continue to listen for new host commands. This operation ensures that the system can continue to provide services to users, respond to subsequent operation requests in a timely manner, maintain the interactivity and availability of the system, and will not interrupt the service to the host due to the processing of a non-read command.

[0086] S400, when the host command is a read command, determining whether the read cache management module is hit by a hit check module;

[0087] S410, if a hit is found, data is obtained from the Local / HMB read buffer memory and returned to the host and the management table entry is updated;

[0088] S420: If there is no hit, process according to the traditional SSD path and record the access times.

[0089] Specifically, when the host command is a read command, the hit check module starts working to determine whether the read command hits the read cache management module. If it hits, it means that the required data has been stored in the previously divided Local / HMB read buffer memory. At this time, the system can quickly obtain data directly from the Local / HMB read buffer memory and quickly return the data to the host, greatly reducing the delay in data reading. For example, for frequently accessed hot data, once it hits the read cache, it can be provided to the host at an extremely fast speed, improving the response speed of the system. At the same time, the system will update the relevant information in the management table, such as incrementing the number of accesses to the corresponding data, which helps the system track the frequency of data use in real time; update the last access time to the current time, so as to more accurately judge the popularity of the data and provide a basis for subsequent data management and optimization.

[0090] If the read command does not hit the read cache management module, the system processes the read command according to the traditional SSD path. In this process, the number of accesses to the corresponding LBA interval is recorded, which provides a basis for subsequent read cache optimization. By counting the number of accesses, the system can gradually understand which data is frequently accessed hot data. When the number of accesses reaches a certain threshold, it can consider loading these data into the read cache to increase the probability of future read hits, thereby optimizing read performance. For example, after multiple misses in the same LBA interval, the system will determine that the data may be hot data based on the recorded number of accesses, and then take corresponding optimization measures.

[0091] See also Figure 2 As shown, in one embodiment, when the host command is not a read command, the step of switching to the SSD traditional path for processing and continuing to listen to the host command also includes:

[0092] S310, determining whether the read cache management module is hit by a hit check module;

[0093] Specifically, when the system receives a host command and determines that the command is not a read command, the hit check module is first started. The hit check module will check whether the non-read command has some association with the data in the read cache, that is, determine whether it hits the read cache management module. It will determine whether the data involved in the command is in the cache based on various information previously recorded in the read cache management module, such as the LBA interval and storage location of the data. For example, if a non-read command may affect the validity of certain data in the read cache, then the hit check module needs to accurately determine whether this data exists in the read cache to provide a basis for subsequent correct processing.

[0094] S311, if hit, invalidate the read cache management module, transfer to the SSD traditional path for processing and continue to listen to host commands;

[0095] Specifically, if the hit check module determines that the read cache management module is hit, the current non-read command may have an impact on the data in the read cache, causing the data to no longer be valid. At this time, the system will mark the data related to the hit in the read cache management module as invalid. It is understandable that during the non-read command processing process, the hit check module determines whether the read cache management module is hit, and the read cache management module is invalidated in time when it is hit, which can effectively prevent the data in the read cache from being inconsistent with the actual stored data. Whether it is a write operation of the host or other non-read commands that may affect the validity of the data, this mechanism can ensure that subsequent read operations obtain accurate data, improve the reliability and integrity of the data, and avoid erroneous results caused by inconsistent data. For example, when the host performs a write operation, the cached data in the read cache may be overwritten. By correctly invalidating the relevant data in the read cache, it is ensured that subsequent read operations will not obtain erroneous old data, thereby ensuring data consistency.

[0096] After the invalidation operation is completed, the system transfers the non-read command to the SSD traditional path for processing. The SSD traditional path includes a series of complex operations, such as data storage, update, and interaction with other storage components. This is because non-read commands usually need to perform some specific operations, such as writing new data, modifying storage structures, etc. These operations cannot be processed by reading the cache, but need to be operated according to the normal process of the SSD to ensure the integrity and correctness of the data.

[0097] After completing the processing of the traditional SSD path, the system will not stop working, but will immediately return to continue listening for new commands from the host to ensure that the system can continue to respond to various operation requests from the host, maintain the interactivity and availability of the system, and will not interrupt the service to the host due to the processing of a non-read command, ensuring that the normal operation of the system is not affected.

[0098] S312: If no hit is found, the process switches to the SSD traditional path for processing and returns to the host to continue listening to host commands.

[0099] Specifically, when the hit check module determines that the read cache management module is not hit, the non-read command has no direct association with the data in the read cache, and the system directly transfers the command to the SSD traditional path for processing. For different types of non-read commands, such as formatting, deletion and other operations, corresponding processing is performed according to established rules and processes to ensure the normal function of the system. After completing the processing of the SSD traditional path, the system returns to the host, informs the host of the result of the command processing, and then continues to listen to new commands from the host, so that the system can respond to subsequent operation requests from the host in a timely manner, maintain good interaction between the system and the host, and ensure that the system is always on standby and ready to handle new tasks at any time.

[0100] See also Figure 3 As shown, in one embodiment, the Local / HMB read buffer memory includes a Local buffer and an HMB buffer, and the steps after processing according to the SSD traditional path and recording the access times if a miss occurs include:

[0101] S421, increment the number of accesses to the corresponding LBA interval;

[0102] Specifically, when a read command misses the read cache and is processed according to the traditional SSD path, the system will increment the number of accesses to the LBA interval corresponding to the read command to count the access frequency of the data in the specific logical block address interval. Every attempt to access the data in this interval will be recorded regardless of whether it hits the read cache. By continuously increasing the number of accesses, the system can gradually understand which data may be hot data that users often need to access. For example, in an application scenario where a specific part of a file is frequently read, that is, corresponding to a specific LBA interval, as the number of accesses increases each time the data in this part is read, the system can recognize that the access popularity of the data in this LBA interval is increasing.

[0103] S422, determining whether the number of accesses to the LBA interval exceeds a threshold;

[0104] Specifically, after incrementing the number of accesses, the system will compare the number of accesses to the current LBA interval with the preset threshold. It is understandable that this threshold is a pre-set value used to measure whether the data has reached the level of popularity that needs to be loaded into the read cache. By comparing the number of accesses and the threshold, the system can determine whether the read cache needs to be further optimized to improve performance. For example, if the threshold is set to 100 accesses, when the number of accesses to a certain LBA interval reaches or exceeds 100, the system will consider the data to be hot data and measures need to be taken to include it in the read cache management to speed up subsequent accesses; if it does not exceed the threshold, no special processing is required for the time being.

[0105] By recording and analyzing the number of accesses to the LBA interval and comparing it with the threshold, the system can dynamically identify hot data. When hot data appears, it is promptly loaded into the Local buffer of the read cache, which optimizes the content of the read cache and improves the hit rate of the read cache. The read cache can be continuously adjusted according to the actual data access mode, always maintaining a fast response to hot data, and improving the overall read performance of the SSD.

[0106] S423: If the threshold is exceeded, search the read cache management module for an entry that is located in the Local buffer and has the lowest heat;

[0107] Specifically, when it is determined that the number of accesses to an LBA interval exceeds a threshold, it means that the data in the LBA interval has become hot data, and the system needs to load it into the read cache to improve subsequent access efficiency. Since the Local buffer in the read cache is faster, the system first searches for the entry in the read cache management module that is located in the Local buffer and has the lowest heat, in preparation for replacing it with new hot data, making room for the hot data to be loaded, and ensuring that the Local buffer always stores the most valuable (most frequently accessed) data. It is understandable that the heat here can be judged by a variety of factors, such as fewer accesses, earlier last access time, etc.

[0108] By selecting the least popular table item in the Local buffer, the memory resources of the read cache are used reasonably to ensure that the limited Local buffer space is allocated to the most valuable (frequently accessed) data first, avoiding unnecessary data occupying the cache space for a long time and improving the utilization of memory resources. At the same time, the replacement operation is only performed when the data really becomes hot data (the number of accesses exceeds the threshold), avoiding frequent and unnecessary memory data movement and reducing system overhead.

[0109] S424: If the threshold is not exceeded, return to the host and continue to listen to host commands.

[0110] Specifically, if the number of accesses to the LBA interval does not exceed the threshold, it means that the data is not currently hot data, and the system does not need to perform special optimization operations on the read cache. At this time, the system directly returns to the host to inform the host of the processing result of this read command, that is, it did not hit the read cache but has been processed according to the traditional path, and continues to listen to new commands from the host. The system maintains continuous response to host commands, while avoiding unnecessary read cache adjustments when the data access frequency is not high, saving system resources.

[0111] For data that does not exceed the threshold, no additional read cache optimization operation is performed, but the data is directly returned to the host to continue listening for commands, which ensures that the system can normally process various data access requests while avoiding the waste of resources caused by over-optimization. The system processes data in a targeted manner based on the actual access popularity of the data, which not only improves the read performance, but also does not affect the overall system performance and response speed due to frequent read cache adjustments, thus achieving a balance between performance improvement and resource consumption.

[0112] See also Figure 4 As shown, in one embodiment, the step after searching the read cache management module for the entry located in the Local buffer and having the lowest heat level includes:

[0113] S425, determining whether there is any remaining available space in the HMB buffer;

[0114] Specifically, after finding the entry in the read cache management module that is located in the Local buffer and has the lowest heat, the system needs to make room for the hot data to be loaded. First, it is necessary to determine whether there is any remaining available space in the HMB buffer. The HMB buffer is a cache area expanded from the host memory and has a relatively large capacity. The system monitors the usage of the HMB buffer through a specific management mechanism to determine whether there is any unoccupied space available to store data replaced from the Local buffer. For example, by recording the storage location allocated to each data block in the HMB buffer and the corresponding occupancy status and other information, it is possible to accurately determine whether there is any remaining available space.

[0115] S4251. If there is remaining available space in the HMB buffer, replace the entry with the lowest temperature in the Local buffer with the available space in the HMB buffer;

[0116] Specifically, when it is determined that there is remaining free space in the HMB buffer, the system will perform the operation of replacing the least popular table item in the Local buffer with the available space in the HMB buffer. This is because the Local buffer is usually faster and should be used to store hot data first to improve reading efficiency. The least popular table item is relatively less frequently accessed recently, and replacing it with a larger HMB buffer can free up space in the Local buffer for hotter data.

[0117] When performing replacement, the system will accurately migrate the data from the Local buffer to the specified available space in the HMB buffer based on the information about the least popular entry recorded in the read cache management module, such as the data's LBA interval, storage location, etc. At the same time, the relevant information in the read cache management module will be updated to reflect the new storage location of the data, ensuring that subsequent management and query of the data can be performed accurately. For example, during the migration process, the storage location field recorded in the entry will be modified to point to the new location in the HMB buffer.

[0118] S4252: If there is no remaining available space in the HMB buffer, search the entry in the read cache management module that is located in the HMB buffer and has the lowest temperature, invalidate the entry in the HMB buffer with the lowest temperature, and release the HMB buffer.

[0119] Specifically, when it is determined that there is no remaining free space in the HMB buffer, the system needs to make adjustments within the HMB buffer to make room. First, the read cache management module will be searched for the entry with the lowest heat in the HMB buffer. It is understandable that the basis for judging the heat here can also be a comprehensive consideration of factors such as the number of accesses and the most recent access time. By analyzing this information, the relatively least frequently accessed entry is found as the object of subsequent operations.

[0120] After finding the entry with the lowest heat in the HMB buffer, the system will invalidate it. The purpose of invalidation is to ensure that the data will no longer be mistakenly used as valid data, because the storage space where it is located is about to be released. Then, through a specific management mechanism, the HMB buffer space occupied by the entry is released, so that the HMB buffer has available space again, so that the data replaced from the Local buffer can be stored in it later. In this process, it is also necessary to update the relevant information in the read cache management module, such as marking the state of the entry as released, and adjusting the storage location of other related data to ensure the information accuracy of the entire read cache management system. It is understandable that in the process of performing operations such as data replacement, invalidation and release, it is necessary to always pay attention to the update of the relevant information in the read cache management module to ensure the information accuracy of the entire read cache management system, so that the system can operate according to accurate information when querying, managing and using cache data in the future, avoiding problems such as data reading errors or management confusion caused by information errors, and improving the reliability and stability of data management.

[0121] Furthermore, by reasonably replacing and adjusting the data in the Local buffer and the HMB buffer according to the remaining available space in the HMB buffer, the optimized utilization of the cache space is achieved. When the HMB buffer has remaining space, the data with lower popularity in the Local buffer is replaced, so that the Local buffer can always store more popular data, improving the space utilization and reading efficiency of the Local buffer; when the HMB buffer has no remaining space, the lowest popularity table items are cleared in the HMB buffer to make room, ensuring that the entire cache system can continue to accept new hot data, avoiding the situation where the hot data cannot be effectively cached due to insufficient cache space.

[0122] At the same time, because the local buffer stores hot data first, it can be obtained faster from the local buffer when reading hot data, reducing the time to read data from the slow NAND flash memory, thereby improving the overall performance of the read operation. By dynamically adjusting the cache space, it ensures that the cache system can adapt to different data access modes, always maintain a high cache hit rate, and further improve the read performance.

[0123] See also Figure 5 As shown, in one embodiment, the steps after replacing the entry with the lowest temperature in the Local buffer into the available space of the HMB buffer include:

[0124] S4253, modifying the entry with the lowest temperature in the Local buffer in the read cache management module to the entry in the HBM buffer;

[0125] Specifically, after completing the operation of replacing the lowest-heat entry in the Local buffer with the available space in the HMB buffer, the relevant records in the read cache management module need to be updated. Specifically, it is necessary to modify the various information originally corresponding to the lowest-heat entry in the Local buffer to the entry information corresponding to the HBM buffer. This includes the logical block address interval (i.e., LBA interval) of the data, the number of accesses, the most recent access time, and other related attributes recorded in the entry. For example, the information originally recorded about the storage location of the data in the Local buffer must now be updated to the new storage location information in the HMB buffer to ensure that the information in the read cache management module is consistent with the actual data storage location, so as to facilitate the subsequent accurate management and query of the data.

[0126] S4254, read new read command data from NAND and store it in Local buffer;

[0127] Specifically, since space in the Local buffer has been freed up for new hot data, the system will read the data corresponding to the new read command from the NAND flash memory and store it in the Local buffer. NAND flash memory is the core medium for storing data in solid-state drives. Reading data requires executing specific commands and takes a relatively long time. However, by storing the new read command data in the Local buffer, if there is a subsequent read request for the data, it can be directly obtained from the faster Local buffer without having to read it from NAND again, thereby improving read performance. During the reading process, the corresponding data will be accurately obtained and transferred to the Local buffer for storage according to the storage structure and reading rules of the NAND flash memory.

[0128] S4255, creating a table entry of the new read command data in the read cache management module;

[0129] Specifically, in order to effectively manage the read command data newly stored in the Local buffer, it is necessary to create a table entry of the new data in the read cache management module. When creating the table entry, each key information of the new read command data will be clearly recorded.

[0130] S4256. Return to the host and continue to listen to host commands.

[0131] Specifically, after completing the above series of operations, the system will return to the host to inform the host of the completion of this operation, that is, the new data has been successfully stored in the Local buffer. Then, the system will continue to listen to the host command and be ready to receive new host commands at any time, whether they are read commands or other types of commands, to ensure that the system can continue to provide services to users and maintain the normal operation of the system and interaction with the host.

[0132] See also Figure 6 As shown, in one embodiment, the step of creating an entry of the new read command data in the read cache management module includes:

[0133] S42551, confirming the LBA interval of the entry of the new read command data;

[0134] Specifically, when creating a table entry for new read command data, its logical block address (LBA) interval must first be determined. LBA is a logical numbering method used to identify the storage location of data in a storage device (such as the NAND flash memory of a solid-state drive). By confirming the LBA interval of the new data, the data can be accurately located in the entire storage system. Whether in subsequent queries, reading, or data management operations, the corresponding specific data block can be quickly found based on this interval information.

[0135] The system will determine the specific LBA range of the new data in the storage medium based on the storage logic and mapping relationship followed when reading the new read command data from the NAND flash memory. For example, when reading data from a specific storage area of ​​the NAND flash memory, the LBA interval corresponding to the new read command data will be accurately calculated and confirmed based on the LBA start address and data length corresponding to the area, and then recorded in the newly created table entry.

[0136] S42552, set the number of visits to 1;

[0137] Specifically, the access count of the new read command data is initialized to 1 in order to start statistical tracking of the access popularity of the data. The access count is an important indicator to measure the frequency of data being read by the host. With the subsequent continuous access to the data, the access count will increase accordingly. By observing the changes in the access count, we can understand whether the data is gradually becoming hot data, thereby providing a basis for subsequent cache management decisions (such as whether to retain the data in the cache area, etc.). Setting the access count to 1 means that the new data has just been read and stored in the Local buffer, and this is the first time its access is recorded. In the subsequent read operation process, whenever the data is read again, the corresponding read cache management module will automatically increment its access count to reflect the actual access frequency of the data in real time.

[0138] S42553, setting the most recent access time to the current time;

[0139] Specifically, the last access time of the new read command data is set to the current time, mainly to reflect the freshness and activity of the data in real time. Together with the number of accesses, the last access time can more comprehensively depict the access characteristics of the data, helping the system to determine whether the data is hot data and whether cache optimization and other operations are required. For example, if the last access time of a certain data is very close to the current time and the number of accesses is also large, then it is very likely that the data is the current hot data and needs special attention in cache management. It is understandable that when executing this step, the system will obtain the current precise timestamp and assign it to the last access time field in the new read command data table entry. In this way, each time the data is read and the table entry is updated, the last access time will be updated to the latest current time, so that the access dynamics of the data can be accurately tracked.

[0140] S42554. Specify the data storage location as the memory space allocated to the Local buffer.

[0141] Specifically, the storage location of the new read command data is explicitly specified as the memory space allocated by the Local buffer, so that the specific cache area where the data is located can be quickly located in subsequent data query, reading, and management operations. The Local buffer plays an important role in the entire HMB-based SSD tiered read cache management system. It usually has a faster access speed, and storing new data here is conducive to improving the response speed of subsequent read operations. When creating a table entry, the corresponding storage location information will be recorded in the table entry, clearly pointing to the specific memory address range or identifier of the Local buffer, so that when the data needs to be read, the system can directly obtain the data from the Local buffer based on this storage location information, without blindly searching in the entire cache system, thereby improving the efficiency of data management and reading.

[0142] See also Figure 7 As shown, in one embodiment, the steps of the SSD traditional path processing include:

[0143] S320, the host submits a read command to the front-end module of the SSD;

[0144] S321, the SSD front-end module divides the command into mapping units;

[0145] S322, submitting the operation request to the buffer management module and allocating a read buffer;

[0146] S323, submitting the operation request to the mapping table management module;

[0147] S324, the mapping table management module is responsible for converting the logical address into a NAND physical address;

[0148] S325, submitting the operation request to the backend module, and the backend module initiates a NAND read request according to the physical address;

[0149] S326, waiting for the NAND read operation request to complete, and loading the data into the NAND flash memory register;

[0150] S327, transmitting the data from the NAND flash memory register to a host.

[0151] Specifically, through the segmentation of the read command by the front-end module and the collaborative work of the subsequent modules, especially the accurate conversion of the logical address into the NAND physical address by the mapping table management module, the system can accurately locate the data to be read in the huge NAND flash memory, thereby effectively avoiding data reading errors caused by unclear addresses and ensuring that the host can obtain the required accurate data. The operation of allocating the read buffer allows the read data to have a temporary storage place, ensuring the integrity and continuity of the data during transmission and processing. Each module processes the request in sequence according to the established order, so that the entire data reading process proceeds in an orderly manner, reducing problems such as data loss or transmission interruption caused by process confusion, and improving the efficiency of data transmission and processing.

[0152] Furthermore, the front-end module divides the commands into mapping units so that read commands of different scales and different logical address ranges can be effectively processed. Whether reading a small part of the data or a large range of data, the data reading operation can be completed in the SSD in an appropriate manner through this segmentation and subsequent processing flow, which enhances the system's adaptability to diversified read commands. The back-end module initiates NAND read requests based on the physical address and waits for data to be loaded into the register, etc., establishes an effective connection and interaction mechanism between the SSD and the NAND flash memory, ensures that data can be successfully obtained from the NAND flash memory and transmitted to the host, so that the SSD can fully utilize the storage function of the NAND flash memory to meet the host's data reading needs.

[0153] Figure 8 Schematic block diagram of an SSD tiered read cache management device based on HMB provided in an embodiment of the present application. Figure 8 As shown, corresponding to the above HMB-based SSD tiered read cache management method, the present application also provides an HMB-based SSD tiered read cache management device 400. The HMB-based SSD tiered read cache management device 400 includes a unit for executing the above HMB-based SSD tiered read cache management method, and the device can be configured in a desktop computer, tablet computer, laptop, and other terminals.

[0154] Specifically, see Figure 8 As shown, the HMB-based SSD hierarchical read cache management device 500 includes:

[0155] The cache management engine module 510 is used to apply for Local / HMB read buffer memory and initialize the read cache management module; specifically, the cache management engine module 510 is the starting point of the entire hierarchical read cache management, providing necessary memory resources and initialized management modules for subsequent read cache operations, ensuring that the system can operate read cache related functions normally.

[0156] The host command listening and judging module 520 is used to listen to the host command and judge whether the received host command is a read command; specifically, the host command listening and judging module 520 is responsible for the decision-making of the entire management process, determines the subsequent processing path according to the command type, and is a bridge connecting the host and the SSD read cache management system, guiding the data flow to different processing modules.

[0157] The hit check module 530 is used to determine whether the read cache management module is hit; specifically, the hit check module 530 is called multiple times in the entire process, and accurately determines the hit situation of the read cache, which is an important link in optimizing the read cache management and ensuring data consistency.

[0158] The read cache management module 540 is used to record and manage the data information of the read cache; specifically, the read cache management module 540 is used to record various information related to the read cache, such as the LBA interval of the data, the number of accesses, the most recent access time, and the storage location of the data in the cache, etc. It is the core data management unit of the entire hierarchical read cache management, providing the basis for data query, update and management for other modules, ensuring that the system can accurately grasp the status of the data in the read cache and realize efficient read cache management.

[0159] The SSD traditional path processing module 550 is used to process the host command when the host command does not hit the read cache management module; specifically, the SSD traditional path processing module 550 is composed of multiple sub-modules working in coordination:

[0160] Front-end module: Receives read commands submitted by the host, splits the commands into mapping units, starts the traditional path processing flow, and is the entry point for traditional path processing.

[0161] Buffer management module: receives operation requests from the front-end module, is responsible for allocating read buffers, provides temporary storage areas for data reading, and ensures that data has appropriate storage space during transmission and processing.

[0162] Mapping table management module: receives requests from the buffer management module and is responsible for converting logical addresses into NAND physical addresses, realizing the mapping of logical addresses to physical storage locations, which is the key link for accurate data reading.

[0163] Back-end module: receives the request from the mapping table management module, initiates a NAND read request based on the physical address, waits for the read operation request to be completed, loads the data into the NAND flash register, and finally transfers the data from the NAND flash register to the host, completing the data reading and transmission process under the entire traditional path.

[0164] Furthermore, the read cache management module 540 in this embodiment specifically includes:

[0165] The data increment and threshold judgment module is responsible for incrementing the number of accesses to the corresponding LBA interval and judging whether the number of accesses to the interval exceeds the threshold when the host command is a read command and does not hit the read cache. The data increment and threshold judgment module provides a basis for optimizing the read cache by counting the number of accesses and comparing it with the threshold, and dynamically adjusts the read cache management strategy to adapt to different data access modes.

[0166] The data replacement module is responsible for finding the entry with the lowest temperature in the Local buffer or HMB buffer in the read cache management module when data replacement is needed (such as when the number of accesses exceeds the threshold and there is remaining space in the HMB buffer or when there is no remaining space in the HMB buffer), and performing corresponding data replacement operations (including replacing the entry with the lowest temperature in the Local buffer with the available space in the HMB buffer, or finding and invalidating the entry with the lowest temperature in the HMB buffer and releasing its space). The data replacement module optimizes the use of cache space and improves the overall performance of the read cache by reasonably managing the data distribution in the read cache.

[0167] After the data replacement is completed, the data loading and table entry creation module is responsible for reading the new read command data from the NAND and storing it in the Local buffer, and creating a new read command data table entry in the read cache management module (including confirming the LBA interval, setting the number of accesses to 1, setting the most recent access time to the current time, and specifying the data storage location as the memory space allocated by the Local buffer). The data loading and table entry creation module implements the loading of new data and registration in the management module, providing data support and management information for subsequent read hit operations.

[0168] It should be noted that technical personnel in the relevant field can clearly understand that the specific implementation process of the above-mentioned HMB-based SSD tiered read cache management device and each unit can refer to the corresponding description in the aforementioned method embodiment, and for the convenience and conciseness of the description, it will not be repeated here.

[0169] The above-mentioned HMB-based SSD tiered read cache management device 500 can be implemented in the form of a computer program, and the computer program can be run on the computer device as shown in the figure.

[0170] See also Fig. 9 , Fig. 9 600 is a schematic block diagram of a computer device provided in an embodiment of the present application. The computer device 600 can be a terminal or a server, wherein the terminal can be an electronic device with communication functions such as a smart phone, a tablet computer, a laptop computer, a desktop computer, a personal digital assistant, and a wearable device. The server can be an independent server or a server cluster composed of multiple servers.

[0171] See also Fig. 9 As shown, the computer device 600 includes a processor 620 , a memory, and a network interface 650 connected via a system bus 610 , wherein the memory may include a non-volatile storage medium 630 and an internal memory 640 .

[0172] The non-volatile storage medium 630 can store an operating system 631 and a computer program 632. The computer program 632 includes program instructions, and when the program instructions are executed, the processor 320 can execute a SSD tiered read cache management method based on HMB.

[0173] The processor 620 is used to provide computing and control capabilities to support the operation of the entire computer device 600 .

[0174] The internal memory 640 provides an environment for the operation of the computer program 632 in the non-volatile storage medium 630. When the computer program 632 is executed by the processor 620, the processor 620 can execute an SSD tiered read cache management method based on HMB.

[0175] The network interface 650 is used to communicate with other devices through a network. Fig. 9 The structure shown in the figure is merely a block diagram of a portion of the structure related to the solution of the present application, and does not constitute a limitation on the computer device 600 to which the solution of the present application is applied. The specific computer device 600 may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0176] It should be understood that in the embodiment of the present application, the processor 620 may be a central processing unit (CPU), and the processor 320 may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Among them, the general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0177] It can be understood by those skilled in the art that all or part of the processes in the method for implementing the above embodiment can be completed by instructing the relevant hardware through a computer program. The computer program includes program instructions, and the computer program can be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the process steps of the embodiment of the above method.

[0178] Therefore, the present application also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program includes program instructions. When the program instructions are executed by a processor, the processor executes the following steps:

[0179] S100, applying for Local / HMB read buffer memory through the Cache management engine, and initializing the read Cache management module;

[0180] S200, listening to a host command, and determining whether the host command is a read command;

[0181] S300, when the host command is not a read command, transfer to the SSD traditional path for processing and return to the host to continue to listen to the host command;

[0182] S400, when the host command is a read command, determining whether the read cache management module is hit by a hit check module;

[0183] S410, if a hit is found, data is obtained from the Local / HMB read buffer memory and returned to the host and the management table entry is updated;

[0184] S420: If there is no hit, process according to the traditional SSD path and record the access times.

[0185] The storage medium may be a USB flash drive, a mobile hard disk, a read-only memory (ROM), a magnetic disk, or an optical disk, etc., which are computer-readable storage media that can store program codes.

[0186] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0187] The non-Company software tools or components appearing in the embodiments of this application are merely examples and do not represent actual use.

[0188] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of each unit is only a logical function division, and there may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed.

[0189] The steps in the method of the embodiment of the present application can be adjusted in order, combined and deleted according to actual needs. The units in the device of the embodiment of the present application can be combined, divided and deleted according to actual needs. In addition, the functional units in the various embodiments of the present application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0190] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, terminal, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present application.

[0191] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A HMB-based SSD tiered read cache management method, characterized in that: The following steps are involved: Apply for Local / HMB read buffer memory through the cache management engine and initialize the read cache management module; Listening to a host command, and determining whether the host command is a read command; When the host command is not a read command, the command is transferred to the SSD traditional path for processing and returns to the host to continue listening to the host command; When the host command is a read command, a hit check module is used to determine whether the read cache management module is hit; If a hit occurs, data is obtained from the Local / HMB read buffer memory and returned to the host and the management table entry is updated; If it misses, it will be processed according to the traditional SSD path and the access count will be recorded.

2. According to the HMB-based SSD tiered read cache management method of claim 1, it is characterized in that: When the host command is not a read command, the step of switching to the SSD traditional path for processing and continuing to listen to the host command also includes: Determine whether the read cache management module is hit by the hit check module; If a hit occurs, the read cache management module is invalidated, the SSD traditional path is switched to process, and the host command is continued to be listened; If there is no hit, it will go to the traditional SSD path for processing and return to the host to continue listening to host commands.

3. The HMB-based SSD tiered read cache management method according to claim 1, characterized in that: The local / HMB read buffer memory includes a local buffer and an HMB buffer, and the steps after processing according to the SSD traditional path and recording the access times if a miss occurs include: Increment the number of accesses to the corresponding LBA interval; Determining whether the number of accesses to the LBA interval exceeds a threshold; If the threshold is exceeded, searching the read cache management module for the entry located in the local buffer and having the lowest heat; If the threshold is not exceeded, the system returns to the host and continues to listen for host commands.

4. The HMB-based SSD tiered read cache management method according to claim 3, characterized in that: The step after searching the entry in the read cache management module that is located in the local buffer and has the lowest heat level includes: Determine whether there is any remaining available space in the HMB buffer; If there is remaining available space in the HMB buffer, replace the entry with the lowest temperature in the Local buffer with the available space in the HMB buffer; If there is no remaining available space in the HMB buffer, search the read cache management module for the entry in the HMB buffer with the lowest heat, invalidate the entry in the HMB buffer with the lowest heat, and release the HMB buffer.

5. The HMB-based SSD tiered read cache management method according to claim 4, characterized in that: The steps after replacing the entry with the lowest temperature in the Local buffer into the available space in the HMB buffer include: Modify the entry with the lowest temperature in the Local buffer in the read cache management module to the entry in the HBM buffer; Read new read command data from NAND and store it in the Local buffer; Creating a table entry of the new read command data in the read cache management module; Return to the host and continue listening for host commands.

6. The HMB-based SSD tiered read cache management method according to claim 5, characterized in that: The step of creating an entry of the new read command data in the read cache management module comprises: Confirm the LBA interval of the table entry of the new read command data; Set the number of visits to 1; Set the last access time to the current time; The designated data storage location is the memory space allocated for the Local buffer.

7. The HMB-based SSD tiered read cache management method according to claim 1, characterized in that: The steps of the SSD traditional path processing include: The host submits a read command to the front-end module of the SSD; The SSD front-end module divides the command into mapping units; Submit the operation request to the buffer management module and allocate a read buffer; Submitting an operation request to the mapping table management module; The mapping table management module is responsible for converting the logical address into the NAND physical address; Submit the operation request to the backend module, and the backend module initiates a NAND read request based on the physical address; Wait for the NAND read operation request to complete and load the data into the NAND flash memory register; The data is transferred from the NAND flash memory register to a host.

8. An SSD tiered read cache management device based on HMB, characterized in that: The device comprises: Cache management engine module, used to apply for Local / HMB read buffer memory and initialize the read cache management module; A host command listening and judging module is used to listen to the host command and judge whether the received host command is a read command; A hit check module is used to determine whether the read cache management module is hit; Read Cache management module, used to record and manage read cache data information; The SSD traditional path processing module is used to process the host command when the host command does not hit the read cache management module.

9. A computer device, characterized in that: The computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the method according to any one of claims 1 to 7 can be implemented.

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