Data processing method and device, computer equipment and storage medium

Abstract

The invention relates to a data processing method and device, computer equipment, a storage medium and a computer program product. The method comprises the following steps: acquiring each complex data to be processed from a memory, storing real part data of each complex data in the complex data to a first storage section of a buffer, and storing imaginary part data of each complex data in the complex data to a second storage section of the buffer; and calculating each piece of real part data in the first storage section based on a vector arithmetic unit in the mercuration NPU to obtain a real part calculation result, and calculating each piece of imaginary part data in the second storage section to obtain an imaginary part calculation result. By adopting the method, the data processing efficiency can be improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a data processing method, apparatus, computer equipment, storage medium and computer program product. Background Art

[0002] Polar coordinate operator, whose forward calculation function converts a set of real tensor coordinates x and y into an imaginary tensor z through polar coordinate transformation. This transformation is often used for imaginary number calculation processing of intelligent voice, image processing, signal processing, etc. The calculation of polar coordinate operator is deployed in GPU, for example, CPU backend and CUDA backend in Pytorch framework. However, if the CUDA backend code is directly ported to Ascend NPU, it will occupy more computing resources and be inefficient. Summary of the invention

[0003] Based on this, it is necessary to provide a data processing method, apparatus, computer equipment, computer-readable storage medium and computer program product that can improve computing efficiency in response to the above technical problems.

[0004] In a first aspect, the present application provides a data processing method. Applied to Ascend NPU, the method comprises:

[0005] Acquire each complex data to be processed from the memory, store the real data of each complex data in the first storage segment of the buffer, and store the imaginary data of each complex data in the second storage segment of the buffer;

[0006] Calculate each real part data in the first storage segment based on the vector operator in the Ascend NPU to obtain a real part calculation result, and calculate each imaginary part data in the second storage segment to obtain an imaginary part calculation result;

[0007] Based on the first storage position change function, the real part calculation result of each complex data is obtained from the first storage segment and the corresponding imaginary part calculation result is obtained from the second storage segment, and the real part calculation result and the imaginary part calculation result of each complex data are correspondingly stored in the memory.

[0008] In one embodiment, the obtaining of the real part calculation result of each complex data from the first storage segment and the obtaining of the corresponding imaginary part calculation result from the second storage segment based on the first storage position change function includes:

[0009] Based on the first storage position change function, obtaining first position information of the real part calculation result and second position information corresponding to the imaginary part calculation result from the first mask tensor array; wherein the real part calculation result and the imaginary part calculation result appear alternately in the first mask tensor array;

[0010] Based on the first position information, a real part calculation result is obtained from a first storage segment, and based on the second position information, an imaginary part calculation result is obtained from the second storage segment.

[0011] In one embodiment, after obtaining the complex data to be processed from the memory, the method further includes:

[0012] Acquire each gradient data to be processed from the memory;

[0013] Based on a second storage position change function, storing the real data of each of the gradient data in the first cache segment of the value buffer, and storing the imaginary data of each of the gradient data in the second cache segment of the buffer;

[0014] and storing the real data of each of the complex data in the third buffer segment of the value buffer, and storing the imaginary data of each of the complex data in the fourth buffer segment of the buffer;

[0015] The data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment are respectively fused to obtain target data.

[0016] In one embodiment, the target data includes the amplitude of the gradient data, and the fusing of the data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment to obtain the target data includes:

[0017] Performing an inversion operation on each imaginary part data in the second cache segment to obtain inverted data, and storing the inverted data in the second cache segment overwriting the inverted data;

[0018] Divide each real part data in the third cache segment by the length of the corresponding complex modulus of the gradient data to obtain processed real part data, and store the processed real part data in a fifth cache segment;

[0019] Divide each imaginary data in the fourth cache segment by the length of the corresponding complex modulus of the gradient data to obtain processed imaginary data, and store the processed imaginary data in the sixth cache segment;

[0020] Performing data fusion on the processed real data in the fifth cache segment and the real data in the first cache segment to obtain first fused data;

[0021] Performing data fusion on the processed imaginary data in the sixth cache segment and the imaginary data in the second cache segment to obtain second fused data;

[0022] The first fused data and the second fused data are fused to obtain the amplitude of the gradient data.

[0023] In one embodiment, the target data includes angle data of the gradient data, and the fusion processing of the data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment to obtain the target data includes:

[0024] Performing an inversion operation on each imaginary part data in the fourth cache segment to obtain inverted data, and storing the inverted data in the fourth cache segment;

[0025] fusing each real part data in the first cache segment and each imaginary part data in the fourth cache segment to obtain third fused data;

[0026] fusing each imaginary data in the second cache segment and each real data in the third cache segment to obtain fourth fused data;

[0027] The third fused data and the fourth fused data are fused to obtain angle data of the gradient data.

[0028] In one embodiment, based on the second storage position change function, storing the real part data of each of the complex data in the first cache segment of the value buffer and storing the imaginary part data of each of the complex data in the second cache segment of the buffer comprises:

[0029] Based on the second storage position change function, determine the third position information of the real data and the fourth position information of the complex data from the second mask tensor array; wherein the real data in the second mask tensor are stored adjacently and the complex data are stored adjacently;

[0030] Based on the third position information, the real part data of each complex data in the real part data is stored in the first buffer segment of the value buffer;

[0031] Based on the fourth position information, the imaginary data of each complex data is stored in the second buffer segment of the buffer.

[0032] In a second aspect, the present application further provides a data processing device. The device comprises:

[0033] an acquisition module, configured to acquire each complex data to be processed from a memory, store the real data of each complex data in a first storage segment of a buffer, and store the imaginary data of each complex data in a second storage segment of the buffer;

[0034] A calculation module, configured to calculate each real part data in the first storage segment based on the vector operator in the Ascend NPU to obtain a real part calculation result, and to calculate each imaginary part data in the second storage segment to obtain an imaginary part calculation result;

[0035] A storage module is used to obtain the real part calculation result of each complex data from the first storage segment and the corresponding imaginary part calculation result from the second storage segment based on the first storage position change function, and store the real part calculation result and the imaginary part calculation result of each complex data in the memory accordingly.

[0036] In one embodiment, the storage module is further used for:

[0037] Based on the first storage position change function, obtaining first position information of the real part calculation result and second position information corresponding to the imaginary part calculation result from the first mask tensor array; wherein the real part calculation result and the imaginary part calculation result appear alternately in the first mask tensor array;

[0038] Based on the first position information, a real part calculation result is obtained from a first storage segment, and based on the second position information, an imaginary part calculation result is obtained from the second storage segment.

[0039] In one embodiment, the device further comprises a processing module.

[0040] A processing module, used for acquiring each gradient data to be processed from the memory;

[0041] Based on a second storage position change function, storing the real data of each of the gradient data in the first cache segment of the value buffer, and storing the imaginary data of each of the gradient data in the second cache segment of the buffer;

[0042] and storing the real data of each of the complex data in the third buffer segment of the value buffer, and storing the imaginary data of each of the complex data in the fourth buffer segment of the buffer;

[0043] The data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment are respectively fused to obtain target data.

[0044] In one embodiment, the processing module is further configured to:

[0045] Performing an inversion operation on each imaginary part data in the second cache segment to obtain inverted data, and storing the inverted data in the second cache segment overwriting the inverted data;

[0046] Divide each real part data in the third cache segment by the length of the corresponding complex modulus of the gradient data to obtain processed real part data, and store the processed real part data in a fifth cache segment;

[0047] Divide each imaginary data in the fourth cache segment by the length of the corresponding complex modulus of the gradient data to obtain processed imaginary data, and store the processed imaginary data in the sixth cache segment;

[0048] Performing data fusion on the processed real data in the fifth cache segment and the real data in the first cache segment to obtain first fused data;

[0049] Performing data fusion on the processed imaginary data in the sixth cache segment and the imaginary data in the second cache segment to obtain second fused data;

[0050] The first fused data and the second fused data are fused to obtain the amplitude of the gradient data.

[0051] In one embodiment, the processing module is further configured to:

[0052] Performing an inversion operation on each imaginary part data in the fourth cache segment to obtain inverted data, and storing the inverted data in the fourth cache segment;

[0053] fusing each real part data in the first cache segment and each imaginary part data in the fourth cache segment to obtain third fused data;

[0054] fusing each imaginary data in the second cache segment and each real data in the third cache segment to obtain fourth fused data;

[0055] The third fused data and the fourth fused data are fused to obtain angle data of the gradient data.

[0056] In one embodiment, the processing module is further configured to:

[0057] Information, and fourth position information of the complex data; wherein, in the second mask tensor, each real part data is stored adjacently, and each complex data is stored adjacently;

[0058] Based on the third position information, the real part data of each complex data in the real part data is stored in the first buffer segment of the value buffer;

[0059] Based on the fourth position information, the imaginary data of each complex data is stored in the second buffer segment of the buffer.

[0060] In a third aspect, the present application further provides a computer device, wherein the computer device comprises a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the method described in any one of the embodiments of the present disclosure is implemented.

[0061] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the method described in any one of the embodiments of the present disclosure is implemented.

[0062] In a fifth aspect, the present application further provides a computer program product, wherein the computer program product includes a computer program, and when the computer program is executed by a processor, the method described in any one of the embodiments of the present disclosure is implemented.

[0063] The above-mentioned data processing method, device, computer equipment, storage medium and computer program product, taking into account that in the Ascend NPU, it belongs to the Da Vinci architecture, that is, a vector computing core consists of a scalar operator and a vector operator. For example, the time taken to execute a float operation (scalar operator) is the same as the time taken to execute 64 float vector operations (vector operators). Among them, the time consumption mainly depends on the number of instructions, not the actual amount of calculation. Furthermore, the scalar computing power of the Ascend NPU is extremely low, the vector computing power is moderate, and the matrix computing power is huge. Therefore, in order to improve the processing efficiency, the real part data A in each complex data (AB form) is stored in the first storage segment, and the real part data A in each complex data (AB form) is stored in the second storage segment to form the form of (AAAABBBB), and then the Ascend NPU appropriate operator is used to uniformly process AAAA and BBBB, thereby improving the processing efficiency of complex operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 is a flow chart of a data processing method in one embodiment;

[0065] Figure 2 Schematic diagram of the structure of Ascend NPU in one embodiment;

[0066] Figure 3 A flowchart of a first storage position change function process in one embodiment;

[0067] Figure 4 is a flow chart of a data processing method in another embodiment;

[0068] Figure 5 A flowchart of a second storage position change function process in one embodiment;

[0069] Figure 6is a flow chart of a data processing method in another embodiment;

[0070] Figure 7 is a flow chart of a data processing method in another embodiment;

[0071] Figure 8 is a structural block diagram of a data processing device in one embodiment;

[0072] Fig. 9 is an internal structure diagram of a computer device in one embodiment;

[0073] Fig.10 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0074] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0075] In one embodiment, Figure 1 As shown, a data processing method is provided. This embodiment takes the method applied to a terminal as an example. It can be understood that the method can also be applied to a server, and can also be applied to a system including a terminal and a server, and is implemented through the interaction between the terminal and the server. In this embodiment, the method includes the following steps:

[0076] Step S101, obtaining each complex data to be processed from the memory, storing the real data of each complex data in the first storage segment of the buffer, and storing the imaginary data of each complex data in the second storage segment of the buffer.

[0077] The embodiment of the present disclosure can be used for the forward kernel function, which is used for model reasoning. The operator principle formula is as follows:

[0078] z=abs×cos(angle)+abs×sin(angle)i (1)

[0079] Among them, abs and angle are tensors input to the operator, both of real type, which can support FP32 / FP16 precision. z is the tensor output by the operator, of ordinal type, which can support COMPLEX64 / COMPLEX32 precision.

[0080] In the specific implementation process, the operator initialization operation can be performed first, specifically, the Tiling block parameters are determined, and the required block size and number of loops are calculated. The queue TQue and the local cache TBuf need to be initialized. The total cache amount cannot exceed the size of the Unified Buffer joint buffer area in the Ascend NPU, so that the total amount of TBuf and TQue fills the Unified Buffer, and the length of each cache satisfies the 32-byte alignment. A total of 2 TQUEs with VECIN attributes, 1 TQUE with VECOUT attributes, and 1 TBuf with VECCALC attributes are allocated. The three TQues can all enable double cache to ensure parallel read and write pipelines. In an exemplary embodiment, the GlobalTensor in the global memory can be copied to the queue TQue and accessed in the form of LocalTensor, which is physically stored in the Unified Buffer of the Ascend NPU. DataCopyPad is used during copying, and the unaligned tail block data is filled separately.

[0081] In a specific calculation process, taking the complex data z=A+Bi as an example, the real data of each complex data is stored in the first storage segment of the buffer (e.g., TBuf), for example, the format of the data stored in the first storage segment is: AAAA. Similarly, the imaginary data of each complex data is stored in the second storage segment of the buffer, for example, the format of the data stored in the second storage segment is: BBBB. If the first storage segment represents the first half of the buffer, and the second storage segment represents the second half of the buffer, the format of the data stored in the buffer is: AAAABBBB.

[0082] Step S103: Based on the vector operator in the Ascend NPU, each real part data in the first storage segment is calculated to obtain a real part calculation result, and each imaginary part data in the second storage segment is calculated to obtain an imaginary part calculation result.

[0083] In an exemplary embodiment, reference Figure 2 As shown, Figure 2 The diagram shows a schematic diagram of the structure of the Ascend NPU. Although it and the GPU both belong to the parallel computing architecture in terms of concept, they are very different from the GPU architecture in terms of hardware implementation details.

[0084] First, the NPU programming model is SPMD (single program multiple data), while the GPU programming model is SIMT (single instruction multiple data). Each computing core (Block) does not share data in the on-chip memory. Developers only need to care about the writing of single-core operators and data segmentation processing. A computing core has only one thread, and can only issue one computing instruction (scalar / vector / matrix multiplier) per clock.

[0085] However, GPUs have several threads per computing core (NVIDIA GPUs have 32), so they are also called thread blocks Warp. Each thread can share memory or event synchronization within the block, and each thread can issue a general computing instruction (scalar) once, or the entire thread block Warp can perform a matrix multiplication and addition operation. Therefore, GPUs have more threads and are very capable in scalar computing. The scalar computing power of Ascend NPU is extremely low, the vector computing power is moderate, and the matrix computing power is huge. For example, the clock of Ascend 910B is 1.8Ghz-40 cores, the vector computing is a group of 64 FP32 floating point numbers, and the matrix multiplication and addition operations are 16×16×16, so the scalar computing power is 1.8×40×10 9 ÷10 12 =0.072TFLOPS, vector computing power is 1.8×64×40×10 9 ÷10 12 =4.608TFLOPS, the matrix multiplication and addition power is 1.8×16×16×16×40×10 9 ÷10 12 = 294.912 TFLOPS. The polar coordinate transformation operation involved in the embodiment of the present disclosure does not involve matrix multiplication and addition. Figure 2 As shown in the figure, the main operation units involved are scalar operators and vector operators. Therefore, vector operators should be used as much as possible to design kernel functions.

[0086] In a specific calculation process, the data of a single calculation core can be split into N loops. Each time a preset length (e.g., tileLength) is accessed, the calculation can be divided into two branches. The real data can be calculated first: abs×cos(angle), and then the imaginary data can be calculated: abs×sin(angle). The calculation results can be stored in the first storage segment and the second storage segment respectively. In an exemplary embodiment, the pseudo code can be expressed as follows:

[0087] zLocalBuf[0:tileLength]=Cos(yLocal);

[0088] zLocalBuf[0:tileLength]=Mul(zLocalBuf[0:tileLength],xLocal);

[0089] zLocalBuf[tileLength:2*tileLength]=Sin(yLocal);

[0090] zLocalBuf[tileLength:2*tileLength]=Mul(zLocalBuf[tileLength:2*tileLength],xLocal);

[0091] In the above pseudo code, zLocalBuf is the buffer (TBuf) used when the operator is initialized, which is used to temporarily cache and store the final calculation results. xLocal and yLocal are the variables representing abs and angle in the local buffer respectively. The length of zLocalBuf is 2xtileLength, the first half 0 to tileLength-1 stores the real part data, and the second half tileLength to 2xtileLength-1 stores the imaginary part data.

[0092] Step S105, based on the first storage position change function, obtain the real part calculation result of each complex data from the first storage segment and the corresponding imaginary part calculation result from the second storage segment, and store the real part calculation result and the imaginary part calculation result of each complex data in the memory accordingly.

[0093] In one embodiment, the acquiring the real part calculation result of each complex data from the first storage segment and the acquiring the corresponding imaginary part calculation result from the second storage segment based on the first storage position change function includes:

[0094] Based on the first storage position change function, first position information of the real part calculation result and second position information of the corresponding imaginary part calculation result are obtained from the first mask tensor array; wherein the real part calculation result and the imaginary part calculation result appear alternately in the first mask tensor array.

[0095] Based on the first position information, a real part calculation result is obtained from a first storage segment, and based on the second position information, an imaginary part calculation result is obtained from the second storage segment.

[0096] The first storage location change function may include a Gather function in the Ascend NPU, where the Gather function is an Ascend built-in function that utilizes MTE storage transformation.

[0097] Specifically, the real part calculation results and the imaginary part calculation results appear alternately in the first mask tensor array. Figure 3 As shown, in the first mask tensor array (Gather Mask), the first position information 0 of the real part calculation result, the second position information 128 of the imaginary part calculation result, the first position information 1 of the real part calculation result, the second position information 129 of the imaginary part calculation result, the first position information 2 of the real part calculation result, etc. Continue to refer to Figure 3, the first storage segment is represented as a0 to a127, and the second storage segment is represented as b0 to b127. According to the first mask tensor array, a0 at position 0 and b0 at position 128 are stored together, similarly, a1 at position 1 and b1 at position 129 are stored together, and so on. In this way, the data in the original AAAABBBBB is converted into ABABABAB form, where A represents the real part data of the complex number, and B represents the imaginary part data of the complex number. In an exemplary embodiment, the real part calculation result and the imaginary part calculation result of each complex number data are stored in the global memory accordingly.

[0098] In the above embodiment, considering that in the Ascend NPU, it belongs to the Da Vinci architecture, that is, a vector computing core is composed of a scalar operator and a vector operator. For example, the time taken to execute a float operation (scalar operator) is the same as the time taken to execute 64 float vector operations (vector operators). Among them, the time consumption mainly depends on the number of instructions, not the actual amount of calculation. Furthermore, the scalar computing power of the Ascend NPU is extremely low, the vector computing power is moderate, and the matrix computing power is huge. Therefore, in order to improve the processing efficiency, the real part data A in each complex data (AB form) is stored in the first storage segment, and the real part data A in each complex data (AB form) is stored in the second storage segment to form the form of (AAAABBBB), and then the Ascend NPU appropriate operator is used to uniformly process AAAA and BBBB, thereby improving the processing efficiency of complex operations.

[0099] In one embodiment, reference Figure 4 As shown, after obtaining the complex data to be processed from the memory, the method further includes:

[0100] Step S401, obtaining each gradient data to be processed from the memory.

[0101] In the embodiments of the present disclosure, it can be used for the reverse kernel function, which is mainly used for model training. The principle formula of the operator is as follows:

[0102]

[0103] Among them, grad_abs and grad_angle are the output tensors of the reverse kernel function, both of which are real number types and support FP32 / FP16 precision. It is the conjugate complex number of the input gradient, z is the input (corresponding to the forward output z), which is a complex tensor with precision supporting COMPLEX64 / COMPLEX32. sgn(z) represents the sign function, and Re() represents extracting the real part of the complex number.

[0104] Since the output result only needs the real part Re, the imaginary part calculation can be omitted, so the calculation can be simplified. By decomposing the calculation steps of formula (2) and formula (3), the following calculation steps are obtained:

[0105] z_sgn = sgn(z) (4)

[0106]

[0107] grad_abs = grad_conj_re ×Re(z_sgn) - grad_conj_im ×Im(z_sgn) (7)

[0108]

[0109] In the disclosed embodiment, the gradient data is a vector (vector), indicating that the directional derivative of a function at that point has a maximum value along that direction, that is, the function changes fastest along that direction (the direction of the gradient) at that point, and the rate of change is the largest (the modulus of the gradient). The gradient can be used to indicate the direction and rate of change of the loss function in the parameter space.

[0110] Step S403: based on the second storage position change function, storing the real data of each gradient data in the first cache segment of the value buffer, and storing the imaginary data of each gradient data in the second cache segment of the buffer.

[0111] In one embodiment, based on the second storage position change function, storing the real part data of each of the complex data in the first cache segment of the value buffer and storing the imaginary part data of each of the complex data in the second cache segment of the buffer comprises: determining the third position information of the real data and the fourth position information of the complex data from the second mask tensor array based on the second storage position change function. Based on the third position information, storing the real part data of each of the complex data in the first cache segment of the value buffer; based on the fourth position information, storing the imaginary part data of each of the complex data in the second cache segment of the buffer.

[0112] In a specific implementation process, the real data in the second mask tensor are stored adjacently, and the imaginary data are stored adjacently. Figure 5 As shown, in the second mask tensor array (Gather Mask), the third position information 0 of the real data, the third position information 2 of the real data, the third position information 4 of the real data, etc. are adjacent, and the fourth position information 1 of the imaginary data, the fourth position information 3 of the imaginary data, the fourth position information 5 of the imaginary data, etc. are adjacent. Figure 5, the third position information 0, 2, 4, etc., all correspond to real data, that is, the data corresponding to 0, 2, 4, etc. in "Input" are moved to the adjacent position, that is, Figure 5 In the "Gather calculation", the a0a1...a127 in the fourth position information 1, 3, 5, etc. all correspond to the real part data, that is, the data corresponding to the 1st, 3rd, 5th, etc. in the "Input input" are moved to the adjacent position, that is, Figure 5 In the "Gather calculation", the data in ABABABAB is converted into AAAABBBB format, where A can represent the real part data and B can represent the imaginary part data.

[0113] After understanding the function of the second position change function, we reallocate the storage positions of the real and imaginary data of each complex data, and reallocate the storage positions of the real and imaginary data of each gradient data.

[0114] Specifically, the first cache segment (denoted as tmp1) caches the real part data of the gradient data, and the second cache segment (denoted as tmp2) caches the imaginary part data of the gradient data.

[0115] Step S405 , and storing the real data of each of the complex data in the third buffer segment of the value buffer, and storing the imaginary data of each of the complex data in the fourth buffer segment of the buffer.

[0116] Specifically, the third cache segment cache (denoted as tmp3) caches the real part data of the complex data, and the fourth cache segment (denoted as tmp4) caches the imaginary part data of the complex data.

[0117] Step S407 , performing fusion processing on the data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment to obtain target data.

[0118] In one embodiment, reference Figure 6 As shown, the target data includes the amplitude of the gradient data, and the data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment are fused to obtain the target data, including:

[0119] Step S601 , performing an inversion operation on each imaginary part data in the second cache segment to obtain inverted data, and storing the inverted data in the second cache segment overwriting the inverted data.

[0120] Specifically, referring to formula (4), the imaginary data in the second cache segment may be inverted first, and the inverted data may be stored in the second cache segment.

[0121] Step S603 , dividing each real part data in the third cache segment by the length of the corresponding complex modulus of the gradient data to obtain processed real part data, and storing the processed real part data in the fifth cache segment.

[0122] Specifically, referring to formula (5), each real part data in the third cache segment is divided by the length of the corresponding complex modulus of the gradient data to obtain the processed real part data grad_conj_re. The processed real part data grad_conj_re is stored in the fifth cache segment (remembered as tmp5)

[0123] Step S605 , dividing each imaginary data in the fourth cache segment by the length of the corresponding complex modulus of the gradient data to obtain processed imaginary data, and storing the processed imaginary data in the sixth cache segment.

[0124] Specifically, referring to formula (6), each imaginary data in the fourth cache segment is divided by the length of the corresponding complex modulus of the gradient data to obtain processed imaginary data grad_conj_im, and the processed imaginary data grad_conj_im is stored in the sixth cache segment (denoted as tmp6).

[0125] Step S607 , performing data fusion on the processed real data in the fifth cache segment and the real data in the first cache segment to obtain first fused data.

[0126] Specifically, referring to formula (7), the processed real data grad_conj_re in the fifth cache segment is fused with the real data Re(z_sgn) in the first cache segment to obtain the first fused data: grad_conj_re×Re(z_sgn).

[0127] Step S609: fusing the processed imaginary data in the sixth cache segment and the imaginary data in the second cache segment to obtain second fused data.

[0128] Specifically, referring to formula (7), the processed imaginary data grad_conj_im in the sixth cache segment is fused with Im(z_sgn) in the second cache segment to obtain second fused data: grad_conj_im×Im(z_sgn).

[0129] Step S611, fusing the first fused data and the second fused data to obtain the amplitude of the gradient data.

[0130] Specifically, referring to formula (7), the first fused data grad_conj_re×Re(z_sgn) and the second fused data grad_conj_im×Im(z_sgn) are fused to obtain the amplitude grad_abs of the gradient data.

[0131] In one embodiment, reference Figure 7 As shown, the target data includes angle data of the gradient data, and the data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment are fused to obtain the target data, including:

[0132] Step S701 , performing an inversion operation on each imaginary part data in the fourth cache segment to obtain inverted data, and storing the inverted data in the fourth cache segment.

[0133] Specifically, the fourth cache segment (denoted as tmp4) caches the imaginary part data of the complex data. Referring to formula (8), the imaginary part data of the complex data is inverted to obtain inverted data: -Im(z). The inverted data is stored in the fourth cache segment, and the original data in the fourth cache segment is cleared.

[0134] Step S703: fusing the real data in the first cache segment and the imaginary data in the fourth cache segment to obtain third fused data.

[0135] Specifically, referring to formula (8), the first cache segment (denoted as tmp1) caches the real part of the gradient data: Each imaginary part data in the fourth cache segment -Im(z), the above two parts of data are fused to obtain the third fused data, which is expressed as:

[0136] Step S705 , fusing the imaginary data in the second cache segment and the real data in the third cache segment to obtain fourth fused data.

[0137] Specifically, referring to formula (8), the imaginary data of the gradient data stored in the second cache segment are: The real data in the third cache segment: Re(z). The above two parts of data are fused to obtain fourth fused data, which is expressed as:

[0138] Step S707: fusing the third fused data and the fourth fused data to obtain angle data of the gradient data.

[0139] Specifically, refer to Figure 8 As shown, for the third fusion data and the fourth fusion data A fusion process is performed to obtain angle data grad_angle of the gradient data.

[0140] In the above data processing method, the storage position of each complex data or gradient data is changed through the first storage position transformation function and the second storage position transformation function, so as to make full use of the vector operator with stronger computing power in the Ascend NPU and improve the computing efficiency.

[0141] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0142] Based on the same inventive concept, the embodiment of the present application also provides a data processing device for implementing the data processing method involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in the one or more data processing device embodiments provided below can refer to the limitations on the data processing method above, and will not be repeated here.

[0143] In one embodiment, Figure 8 As shown, a data processing device 800 is provided. The device comprises:

[0144] An acquisition module 801 is used to acquire each complex data to be processed from a memory, store the real data of each complex data in a first storage segment of a buffer, and store the imaginary data of each complex data in a second storage segment of the buffer;

[0145] A calculation module 803 is used to calculate each real part data in the first storage segment based on the vector operator in the Ascend NPU to obtain a real part calculation result, and to calculate each imaginary part data in the second storage segment to obtain an imaginary part calculation result;

[0146] The storage module 805 is used to obtain the real part calculation result of each complex data from the first storage segment and the corresponding imaginary part calculation result from the second storage segment based on the first storage position change function, and store the real part calculation result and the imaginary part calculation result of each complex data in the memory accordingly.

[0147] In one embodiment, the storage module is further used for:

[0148] Based on the first storage position change function, obtaining first position information of the real part calculation result and second position information corresponding to the imaginary part calculation result from the first mask tensor array; wherein the real part calculation result and the imaginary part calculation result appear alternately in the first mask tensor array;

[0149] Based on the first position information, a real part calculation result is obtained from a first storage segment, and based on the second position information, an imaginary part calculation result is obtained from the second storage segment.

[0150] In one embodiment, the device further comprises a processing module.

[0151] A processing module, used for acquiring each gradient data to be processed from the memory;

[0152] Based on a second storage position change function, storing the real data of each of the gradient data in the first cache segment of the value buffer, and storing the imaginary data of each of the gradient data in the second cache segment of the buffer;

[0153] and storing the real data of each of the complex data in the third buffer segment of the value buffer, and storing the imaginary data of each of the complex data in the fourth buffer segment of the buffer;

[0154] The data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment are respectively fused to obtain target data.

[0155] In one embodiment, the processing module is further configured to:

[0156] Performing an inversion operation on each imaginary part data in the second cache segment to obtain inverted data, and storing the inverted data in the second cache segment overwriting the inverted data;

[0157] Divide each real part data in the third cache segment by the length of the corresponding complex modulus of the gradient data to obtain processed real part data, and store the processed real part data in a fifth cache segment;

[0158] Divide each imaginary data in the fourth cache segment by the length of the corresponding complex modulus of the gradient data to obtain processed imaginary data, and store the processed imaginary data in the sixth cache segment;

[0159] Performing data fusion on the processed real data in the fifth cache segment and the real data in the first cache segment to obtain first fused data;

[0160] Performing data fusion on the processed imaginary data in the sixth cache segment and the imaginary data in the second cache segment to obtain second fused data;

[0161] The first fused data and the second fused data are fused to obtain the amplitude of the gradient data.

[0162] In one embodiment, the processing module is further configured to:

[0163] Performing an inversion operation on each imaginary part data in the fourth cache segment to obtain inverted data, and storing the inverted data in the fourth cache segment;

[0164] fusing each real part data in the first cache segment and each imaginary part data in the fourth cache segment to obtain third fused data;

[0165] fusing each imaginary data in the second cache segment and each real data in the third cache segment to obtain fourth fused data;

[0166] The third fused data and the fourth fused data are fused to obtain angle data of the gradient data.

[0167] In one embodiment, the processing module is further configured to:

[0168] Information, and fourth position information of the complex data; wherein, in the second mask tensor, each real part data is stored adjacently, and each complex data is stored adjacently;

[0169] Based on the third position information, the real part data of each complex data in the real part data is stored in the first buffer segment of the value buffer;

[0170] Based on the fourth position information, the imaginary data of each complex data is stored in the second buffer segment of the buffer.

[0171] Each module in the above data processing device can be implemented in whole or in part by software, hardware or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module.

[0172] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Fig. 9 As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store data processing data. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a data processing method is implemented.

[0173] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Fig.10 As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. Among them, the processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. When the computer program is executed by the processor, a data processing method is implemented. The display unit of the computer device is used to form a visually visible image, and can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen. The input device of the computer device can be a touch layer covered on the display screen, or a button, trackball or touchpad set on the computer device casing, or an external keyboard, touchpad or mouse, etc.

[0174] Those skilled in the art will understand that Fig.10The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0175] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant laws, regulations and standards of relevant countries and regions.

[0176] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.

[0177] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0178] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A data processing method, characterized in that: Applied to Ascend NPU, the method includes: Acquire each complex data to be processed from the memory, store the real data of each complex data in the first storage segment of the buffer, and store the imaginary data of each complex data in the second storage segment of the buffer; Calculate each real part data in the first storage segment based on the vector operator in the Ascend NPU to obtain a real part calculation result, and calculate each imaginary part data in the second storage segment to obtain an imaginary part calculation result; Based on the first storage position change function, the real part calculation result of each complex data is obtained from the first storage segment and the corresponding imaginary part calculation result is obtained from the second storage segment, and the real part calculation result and imaginary part calculation result of each complex data are correspondingly stored in the memory.

2. The method according to claim 1, characterized in that The step of acquiring the real part calculation result of each complex data from the first storage segment and acquiring the corresponding imaginary part calculation result from the second storage segment based on the first storage position change function includes: Based on the first storage position change function, obtaining first position information of the real part calculation result and second position information corresponding to the imaginary part calculation result from the first mask tensor array; wherein the real part calculation result and the imaginary part calculation result appear alternately in the first mask tensor array; Based on the first position information, a real part calculation result is obtained from a first storage segment, and based on the second position information, an imaginary part calculation result is obtained from the second storage segment.

3. The method according to claim 1, characterized in that After obtaining the complex data to be processed from the memory, the method further includes: Acquire each gradient data to be processed from the memory; Based on a second storage position change function, storing the real data of each of the gradient data in the first cache segment of the value buffer, and storing the imaginary data of each of the gradient data in the second cache segment of the buffer; and storing the real data of each of the complex data in the third buffer segment of the buffer value, and storing the imaginary data of each of the complex data in the fourth buffer segment of the buffer; The data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment are respectively fused to obtain target data.

4. The method according to claim 3, characterized in that The target data includes the amplitude of the gradient data, and the data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment are fused to obtain the target data, including: Performing an inversion operation on each imaginary part data in the second cache segment to obtain inverted data, and storing the inverted data in the second cache segment overwriting the inverted data; Divide each real part data in the third cache segment by the length of the corresponding complex modulus of the gradient data to obtain processed real part data, and store the processed real part data in a fifth cache segment; Divide each imaginary data in the fourth cache segment by the length of the corresponding complex modulus of the gradient data to obtain processed imaginary data, and store the processed imaginary data in a sixth cache segment; Performing data fusion on the processed real data in the fifth cache segment and the real data in the first cache segment to obtain first fused data; Performing data fusion on the processed imaginary data in the sixth cache segment and the imaginary data in the second cache segment to obtain second fused data; The first fused data and the second fused data are fused to obtain the amplitude of the gradient data.

5. The method according to claim 3, characterized in that: The target data includes angle data of the gradient data, and the data corresponding to the first cache segment, the second cache segment, the third cache segment, and the fourth cache segment are fused to obtain the target data, including: Performing an inversion operation on each imaginary part data in the fourth cache segment to obtain inverted data, and storing the inverted data in the fourth cache segment; fusing each real part data in the first cache segment and each imaginary part data in the fourth cache segment to obtain third fused data; fusing each imaginary data in the second cache segment and each real data in the third cache segment to obtain fourth fused data; The third fused data and the fourth fused data are fused to obtain angle data of the gradient data.

6. The method according to claim 3, characterized in that Based on the second storage position change function, storing the real part data of each of the complex data in the first cache segment of the value buffer, and storing the imaginary part data of each of the complex data in the second cache segment of the buffer, comprises: Based on the second storage position change function, determine the third position information of the real data and the fourth position information of the complex data from the second mask tensor array; wherein the real data in the second mask tensor are stored adjacently and the complex data are stored adjacently; Based on the third position information, the real part data of each complex data in the real part data is stored in the first buffer segment of the value buffer; Based on the fourth position information, the imaginary data of each complex data is stored in the second buffer segment of the buffer.

7. A data processing device, characterized in that: The device comprises: an acquisition module, configured to acquire each complex data to be processed from a memory, store the real data of each complex data in a first storage segment of a buffer, and store the imaginary data of each complex data in a second storage segment of the buffer; A calculation module, configured to calculate each real part data in the first storage segment based on the vector operator in the Ascend NPU to obtain a real part calculation result, and to calculate each imaginary part data in the second storage segment to obtain an imaginary part calculation result; A storage module is used to obtain the real part calculation result of each complex data from the first storage segment and the corresponding imaginary part calculation result from the second storage segment based on the first storage position change function, and store the real part calculation result and the imaginary part calculation result of each complex data in the memory accordingly.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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